JP2547652B2 - Power converter - Google Patents

Power converter

Info

Publication number
JP2547652B2
JP2547652B2 JP2125774A JP12577490A JP2547652B2 JP 2547652 B2 JP2547652 B2 JP 2547652B2 JP 2125774 A JP2125774 A JP 2125774A JP 12577490 A JP12577490 A JP 12577490A JP 2547652 B2 JP2547652 B2 JP 2547652B2
Authority
JP
Japan
Prior art keywords
circuit
output
current
conversion circuit
detecting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2125774A
Other languages
Japanese (ja)
Other versions
JPH0421362A (en
Inventor
和博 平塚
悦男 硲口
邦穂 田中
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Denki Co Ltd
Original Assignee
Sanyo Denki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Denki Co Ltd filed Critical Sanyo Denki Co Ltd
Priority to JP2125774A priority Critical patent/JP2547652B2/en
Publication of JPH0421362A publication Critical patent/JPH0421362A/en
Application granted granted Critical
Publication of JP2547652B2 publication Critical patent/JP2547652B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Description

【発明の詳細な説明】 (イ) 産業上の利用分野 本発明は、燃料電池などの直流電源を交流に変換する
電力変換装置に関する。
Description: (a) Field of Industrial Application The present invention relates to a power converter for converting a direct current power source such as a fuel cell into an alternating current.

(ロ) 従来の技術 第2図は、本願出願人が特願昭63−307506号において
提案した電力変換装置を示す。
(B) Conventional Technology FIG. 2 shows a power conversion device proposed by the applicant of the present application in Japanese Patent Application No. 63-307506.

ここで、1は燃料電池などの直流電源、2は直流リア
クトル、3はトランジスタ4、ダイオード5、電解コン
デンサ6よりなり直流電源1の出力電圧を昇圧する直流
−直流変換回路、7は直流−直流変換回路3の出力を交
流に変換する直流−交流変換回路即ちインバータ、8は
直流−交流変換回路7の出力により駆動される負荷であ
る。
Here, 1 is a direct current power source such as a fuel cell, 2 is a direct current reactor, 3 is a transistor 4, a diode 5, and a DC-DC converter circuit which boosts the output voltage of the direct current power source 1 comprising an electrolytic capacitor 6, and 7 is a direct current-direct current. A DC-AC conversion circuit, that is, an inverter that converts the output of the conversion circuit 3 into an AC, and a load 8 driven by the output of the DC-AC conversion circuit 7.

9は直流−直流変換回路3の出力電圧を検出する電圧
検出手段、10は直流−直流変換回路3の出力電圧の目標
値を設定する設定手段、11は直流−直流変換回路3の入
力電流を検出する第1直流検出手段、12は第1電流検出
手段11の検出結果を入力とし、直流リアクトル2に流れ
る直流入力電流に含まれるリップル電流の周期よりも十
分長い時定数をもつ第1フィルタ回路、13は第1電流検
出手段11の検出結果を入力とし、直流リアクトル2に流
れる直流入力電流に含まれるリップル電流の周期に近い
時定数をもつ第2フィルタ回路、14は第1フィルタ回路
12と第2フィルタ回路13との出力差を生成する加算点、
15は加算点14の出力によって設定手段10の設定値を変更
する変更手段としての加算点、16は電圧検出手段9の検
出結果を加算点15の出力と比較する比較手段としての加
算点、17は加算点16の出力に基づきトランジスタ4に信
号を与えて直流−直流変換回路3の動作を制御する制御
手段としてのパルス幅制御回路である。
Reference numeral 9 is a voltage detecting means for detecting the output voltage of the DC-DC converting circuit 3, 10 is setting means for setting a target value of the output voltage of the DC-DC converting circuit 3, and 11 is an input current of the DC-DC converting circuit 3. The first DC detection means 12 for detection receives the detection result of the first current detection means 11, and has a time constant sufficiently longer than the period of the ripple current contained in the DC input current flowing through the DC reactor 2. , 13 is a second filter circuit having a time constant close to the period of the ripple current contained in the DC input current flowing in the DC reactor 2, 13 being the input of the detection result of the first current detecting means 11, and 14 is the first filter circuit
12 and an addition point for generating an output difference between the second filter circuit 13,
Reference numeral 15 is an addition point as a changing means for changing the set value of the setting means 10 by the output of the addition point 14, 16 is an addition point as a comparison means for comparing the detection result of the voltage detection means 9 with the output of the addition point 15, 17 Is a pulse width control circuit as a control means for controlling the operation of the DC-DC conversion circuit 3 by giving a signal to the transistor 4 based on the output of the addition point 16.

而して、第1フィルタ回路12は直流リアクトル2に流
れるリップル電流の周期よりも十分長い時定数をもつか
ら、第1フィルタ回路12の出力には直流リアクトル2に
流れる電流の直流分に相当する信号が得られる。また第
2フィルタ回路13は直流リアクトル2に流れるリップル
電流の周期に近い時定数をもつから、第2フィルタ回路
13の出力には直流リアクトル2に流れる電流のリップル
分を含んだ信号が得られる。従って、第1フィルタ回路
12と第2フィルタ回路13との出力差を生成する加算点14
では、直流リアクトル2に流れる電流のリップル分に相
当する信号が得られる。よって本構成によれば、設定手
段10の設定値をかかる信号に基づいて変更して電圧検出
手段9の検出結果と比較し、かかる比較結果に基づいて
直流−直流変換回路3を制御するので、直流リアクトル
2に流れるリップル電流を抑制するように制御を行うこ
とができ、直流リアクトル2、電解コンデンサ6を小型
化できるなどの利点がある。
Since the first filter circuit 12 has a time constant sufficiently longer than the cycle of the ripple current flowing in the DC reactor 2, the output of the first filter circuit 12 corresponds to the DC component of the current flowing in the DC reactor 2. The signal is obtained. Since the second filter circuit 13 has a time constant close to the period of the ripple current flowing in the DC reactor 2, the second filter circuit 13
At the output of 13, a signal containing the ripple component of the current flowing in the DC reactor 2 is obtained. Therefore, the first filter circuit
Addition point 14 for generating the output difference between 12 and the second filter circuit 13
Then, a signal corresponding to the ripple of the current flowing through the DC reactor 2 is obtained. Therefore, according to this configuration, the setting value of the setting means 10 is changed based on such a signal to compare with the detection result of the voltage detecting means 9, and the DC-DC conversion circuit 3 is controlled based on the comparison result. Control can be performed so as to suppress the ripple current flowing in the DC reactor 2, and there are advantages that the DC reactor 2 and the electrolytic capacitor 6 can be downsized.

しかしながら、かかる構成では、定常状態の負荷、も
しくは第1フィルタ回路12の時定数よりも遅い負荷変動
に対しては良好な運転制御が可能であるが、急激な負荷
変動などにより入力電流が急増する場合には、電流変化
を少なくするように制御がなされてしまうため、電解コ
ンデンサ6の電圧が下がってしまい出力波形が歪んでし
まうという問題がある。
However, with such a configuration, good operation control is possible for a steady-state load or a load change slower than the time constant of the first filter circuit 12, but the input current increases rapidly due to a sudden load change or the like. In this case, the control is performed so as to reduce the change in current, so that the voltage of the electrolytic capacitor 6 is lowered and the output waveform is distorted.

(ハ) 発明が解決しようとする課題 本発明は、定常状態はもちろん、急激な負荷変動など
があって電流が急増しても、波形歪みの少ない出力が得
られる出力変換装置を提供するものである。
(C) Problem to be Solved by the Invention The present invention provides an output conversion device that can obtain an output with less waveform distortion even when the current suddenly increases due to a sudden load change or the like in the steady state. is there.

(ニ) 課題を解決するための手段 本発明電力変換装置は、直流電源を昇圧あるいは降圧
する直流−直変変換回路と、該直流−直流変換回路の出
力を交流に変換する直流−交流変換回路と、前記直流−
直流変換回路の出力電圧を検出する電圧検出手段と、前
記直流−直流変換回路の出力電圧の目標値を設定する設
定手段と、前記直流−直流変換回路の入力電流を検出す
る第1電流検出手段と、該第1電流検出手段の検出結果
を入力する第1及び第2フィルタ回路と、前記直流−交
流変換回路の入力電流を検出する第2電流検出手段と、
該第2電流検出手段の検出結果を入力する微分回路と、
該微分回路の出力及び前記第1及び第2のフィルタ回路
の出力差によって前記設定手段の設定値を変更する変更
手段と、前記電圧検出手段の検出結果を前記変更手段の
出力と比較する比較手段と、該比較手段の出力により前
記直流−直流変換回路を制御する制御手段とよりなるこ
とを特徴とする。
(D) Means for Solving the Problems A power conversion device of the present invention is a DC-direct conversion converter that steps up or steps down a DC power supply, and a DC-AC conversion circuit that converts the output of the DC-DC conversion circuit into AC. And the DC-
Voltage detection means for detecting the output voltage of the DC conversion circuit, setting means for setting a target value of the output voltage of the DC-DC conversion circuit, and first current detection means for detecting the input current of the DC-DC conversion circuit. A first and a second filter circuit for receiving the detection result of the first current detecting means, and a second current detecting means for detecting an input current of the DC-AC converting circuit,
A differentiating circuit for inputting the detection result of the second current detecting means,
Changing means for changing the set value of the setting means according to the output of the differentiating circuit and the output difference of the first and second filter circuits, and comparing means for comparing the detection result of the voltage detecting means with the output of the changing means. And a control means for controlling the DC-DC conversion circuit by the output of the comparison means.

(ホ) 作用 第1フィルタ回路と第2フィルタ回路の出力差によっ
て電流のリップル分が検出される。また、第2電流検出
手段により直流−交流変換回路の入力電流が検出されて
負荷の状態が察知され、微分回路により第2電流検出手
段の検出結果を微分すれば、負荷の変動分が検出され
る。
(E) Action The ripple component of the current is detected by the output difference between the first filter circuit and the second filter circuit. Further, the second current detecting means detects the input current of the DC-AC converting circuit to detect the state of the load, and the differentiating circuit differentiates the detection result of the second current detecting means to detect the load variation. It

そして、これらの検出結果に基づいて、リップル成分
の発生を抑制し、且つ波形歪みの発生を抑制するよう
に、パルス幅制御回路による直流−直流変換回路の制御
が行われる。
Then, based on these detection results, the DC-DC conversion circuit is controlled by the pulse width control circuit so as to suppress the generation of ripple components and suppress the generation of waveform distortion.

(ヘ) 実施例 第1図は本発明電力変換装置の一実施例を示す。ここ
では、先に説明した従来例と同一の部分には同一符号を
付して説明を省略し、異なる部分についてのみ説明す
る。
(F) Embodiment FIG. 1 shows an embodiment of the power converter of the present invention. Here, the same parts as those of the conventional example described above are designated by the same reference numerals, and the description thereof will be omitted. Only different parts will be described.

18は直流−交流変換回路7の入力電流を検出する第2
電流検出手段、19は第2電流検出手段18の検出結果を入
力する微分回路である。変更手段としての加算点15は、
微分回路19の出力及び加算点14により生成される第1フ
ィルタ回路12と第2フィルタ回路13との出力差によって
設定手段10の設定値を変更する。そして、比較手段とし
ての加算点16は電圧検出手段9の検出結果を加算点15の
出力と比較し、その比較結果をパルス幅制御回路17に与
える。
18 is a second for detecting the input current of the DC-AC conversion circuit 7
The current detecting means, 19 is a differentiating circuit for inputting the detection result of the second current detecting means 18. Addition point 15 as a change means,
The set value of the setting means 10 is changed according to the output of the differentiating circuit 19 and the output difference between the first filter circuit 12 and the second filter circuit 13 generated by the addition point 14. Then, the addition point 16 as a comparison means compares the detection result of the voltage detection means 9 with the output of the addition point 15 and supplies the comparison result to the pulse width control circuit 17.

而して、急激な負荷変動などがあって電流が急増する
と、第2電流検出手段18により入力電流が検出されて負
荷の状態が察知され、その検出結果は微分回路19により
微分されて負荷の変動分が検出される。そして、かかる
負荷の変動分は、リップル分を除去するための第1フィ
ルタ回路12と第2フィルタ回路13との出力差とともに設
定手段10の設定値を変更するフィードバックに利用され
る。そして、パルス幅制御回路17による制御は、その変
更された設定値と電圧検出手段9の検出結果との比較結
果に基づいて、リップル成分の発生を抑制し、且つ急激
な負荷変動などがあって電流が急増しても、電解コンデ
ンサ6の電圧低下を防いで波形歪みの発生を抑制するよ
うに行われ、波形歪みの少ない出力が得られる。
Then, when the current suddenly increases due to a sudden load change or the like, the input current is detected by the second current detecting means 18 to detect the state of the load, and the detection result is differentiated by the differentiating circuit 19 to detect the load. The fluctuation is detected. The load variation is used as feedback for changing the set value of the setting means 10 together with the output difference between the first filter circuit 12 and the second filter circuit 13 for removing the ripple. The control by the pulse width control circuit 17 is based on the comparison result of the changed set value and the detection result of the voltage detection means 9 to suppress the generation of the ripple component and to cause a sudden load change. Even if the current suddenly increases, the voltage drop of the electrolytic capacitor 6 is prevented so that the generation of the waveform distortion is suppressed, and the output with less waveform distortion is obtained.

(ト) 発明の効果 本発明によれば、第1フィルタ回路と第2フィルタ回
路を出力差によって電流のリップル分が検出され、第2
電流検出手段と微分回路により負荷の変動分が検出され
る。そして、それらの検出結果に基づいて、リップル成
分の発生を抑制し、且つ波形歪みの発生を抑制するよう
に、パルス幅制御回路による直流−直流変換回路の制御
が行われる。従って、定常状態におけるリップル成分の
発生や急激な負荷変動などによる波形歪みの抑制され、
出力の波形歪みの少ない電力変換装置を提供できる。
(G) Effect of the Invention According to the present invention, the ripple component of the current is detected by the output difference between the first filter circuit and the second filter circuit.
The load variation is detected by the current detecting means and the differentiating circuit. Then, based on these detection results, the DC-DC converter circuit is controlled by the pulse width control circuit so as to suppress the generation of ripple components and suppress the generation of waveform distortion. Therefore, the waveform distortion due to the occurrence of ripple components in the steady state and sudden load changes is suppressed,
A power converter with less output waveform distortion can be provided.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の一実施例を示す回路系統図、第2図は
従来例を示す回路系統図である。 1……直流電源、3……直流−直流変換回路、7……直
流−交流変換回路、9……電圧検出手段、10……設定手
段、11……第1電流検出手段、12……第1フィルタ回
路、13……第2フィルタ回路、14,15,16……加算点、17
……パルス幅制御回路。
FIG. 1 is a circuit system diagram showing an embodiment of the present invention, and FIG. 2 is a circuit system diagram showing a conventional example. 1 ... DC power supply, 3 ... DC-DC conversion circuit, 7 ... DC-AC conversion circuit, 9 ... voltage detection means, 10 ... setting means, 11 ... first current detection means, 12 ... first 1 filter circuit, 13 ... 2nd filter circuit, 14, 15, 16 ... addition point, 17
...... Pulse width control circuit.

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】直流電源を昇圧あるは降圧する直流−直流
変換回路と、該直流−直流変換回路の出力を交流に変換
する直流−交流変換回路と、前記直流−直流変換回路の
出力電圧を検出する電圧検出手段と、前記直流−直流変
換回路の出力電圧の目標値を設定する設定手段と、前記
直流−直流変換回路の入力電流を検出する第1電流検出
手段と、該第1電流検出手段の検出結果を入力する第1
及び第2フィルタ回路と、前記直流−交流変換回路の入
力電流を検出する第2電流検出手段と、該第2電流検出
手段の検出結果を入力する微分回路と、該微分回路の出
力及び前記第1及び第2のフィルタ回路の出力差によっ
て前記設定手段の設定値を変更する変更手段と、前記電
圧検出手段の検出結果を前記変更手段の出力と比較する
比較手段と、該比較手段の出力により前記直流−直流変
換回路を制御する制御手段とよりなることを特徴とする
電力変換装置。
1. A DC-DC conversion circuit for stepping up or stepping down a DC power supply, a DC-AC conversion circuit for converting the output of the DC-DC conversion circuit into AC, and an output voltage of the DC-DC conversion circuit. Voltage detecting means for detecting, setting means for setting a target value of the output voltage of the DC-DC converting circuit, first current detecting means for detecting an input current of the DC-DC converting circuit, and the first current detecting First to input the detection result of the means
And a second filter circuit, a second current detection unit that detects an input current of the DC-AC conversion circuit, a differentiation circuit that inputs a detection result of the second current detection unit, an output of the differentiation circuit, and the By changing means for changing the set value of the setting means by the output difference of the first and second filter circuits, comparing means for comparing the detection result of the voltage detecting means with the output of the changing means, and by the output of the comparing means. A power conversion device comprising: a control unit that controls the DC-DC conversion circuit.
JP2125774A 1990-05-15 1990-05-15 Power converter Expired - Fee Related JP2547652B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2125774A JP2547652B2 (en) 1990-05-15 1990-05-15 Power converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2125774A JP2547652B2 (en) 1990-05-15 1990-05-15 Power converter

Publications (2)

Publication Number Publication Date
JPH0421362A JPH0421362A (en) 1992-01-24
JP2547652B2 true JP2547652B2 (en) 1996-10-23

Family

ID=14918506

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2125774A Expired - Fee Related JP2547652B2 (en) 1990-05-15 1990-05-15 Power converter

Country Status (1)

Country Link
JP (1) JP2547652B2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3949350B2 (en) * 2000-04-24 2007-07-25 三菱電機株式会社 Interconnection device
US7710700B2 (en) * 2005-01-10 2010-05-04 Linear Technology Corporation DC/DC converter with current limit protection
KR101228767B1 (en) * 2010-12-24 2013-01-31 삼성전기주식회사 Switching mode power supply with multiple output

Also Published As

Publication number Publication date
JPH0421362A (en) 1992-01-24

Similar Documents

Publication Publication Date Title
JPH0728538A (en) System interconnection type inverter controller
JP4195948B2 (en) Grid interconnection inverter
JP2547652B2 (en) Power converter
JP3196554B2 (en) Current mode switching stabilized power supply
JP2675372B2 (en) Power converter
RU2001102784A (en) RECTIFIER AND METHOD CONCERNING RECTIFIER
JP2990867B2 (en) Forward converter
JP2885610B2 (en) Switching mode rectifier circuit
JP3621926B2 (en) Solar power plant
TWI732841B (en) Power apparatus, and control method of power apparatus
JPH0241778A (en) Inverter welding machine
JPH0549252A (en) Inverter
JP2708861B2 (en) Power converter
JPH08171992A (en) Method and device for controlling power of halogen lamp
JP2838133B2 (en) Power converter
JPH06209572A (en) Device for protecting switching element in power converter
JPH03256592A (en) Pwm power converter
JPH02237469A (en) Pwm controlled power supply
JP2021141737A (en) Switching power supply device
JPS5840202B2 (en) switching regulator
JP3191756B2 (en) Switching power supply
JPH06133553A (en) Control circuit for pwm converter
JP2023128808A (en) synchronous rectifier circuit
JP2003333858A (en) Ac constant-voltage generator
JP2800260B2 (en) Power converter

Legal Events

Date Code Title Description
FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20070808

Year of fee payment: 11

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080808

Year of fee payment: 12

LAPS Cancellation because of no payment of annual fees