JP2546297B2 - Semiconductor memory device - Google Patents

Description

The present invention relates to a semiconductor memory device, and more particularly to the structure of a polysilicon layer used as a resistor or a wiring layer.

[Conventional technology]

The conventional semiconductor memory circuit has a large standby current and a large power consumption. However, by increasing the resistance of the polysilicon layer used as the resistance portion and the wiring portion inside the memory cell, the semiconductor memory circuit with a small power consumption can be obtained. Become.
The first technique for increasing the resistance of this polysilicon layer is
There is a method of reducing the wiring width of the polysilicon layer, and a second method of reducing the film thickness of the polysilicon layer. The first method for increasing the resistance of the polysilicon layer has a certain limit in terms of process. Therefore, it is very important to reduce the thickness of the polysilicon layer.

As a conventional semiconductor memory device, as shown in FIG.
The first polysilicon layer 9 is used as a gate electrode portion and a wiring portion of a transistor. Further, for the connection between the second polysilicon layer 10 used as an internal resistance and wiring and the Al wiring 6, an opening 13 is formed by etching the interlayer film 12 using a contact mask, but the power consumption is small. Therefore, as the thickness of the second polysilicon layer 10 is reduced, it becomes difficult to control etching. That is, when the interlayer film 12 is etched to form the opening 13, the second polysilicon layer 10 is also etched, and the interlayer film 9 of the lower layer is further advanced.
There is a risk of forming an opening reaching

[Problems to be solved by the invention]

As described above, in the conventional semiconductor memory device, when the second polysilicon layer serving as the resistor or the wiring layer is made thin, when the opening is formed in the interlayer film for connection with the Al wiring. Not only the second polysilicon layer but also the underlying interlayer film is etched by the over-etching, and the Al wiring is short-circuited to the substrate, so that the reliability and the manufacturing yield of the semiconductor memory device are reduced.

[Means for solving problems]

A semiconductor memory device of the present invention includes a polysilicon layer formed on a semiconductor substrate via a first interlayer film and serving as a resistor or a wiring layer, and a polysilicon layer provided on the polysilicon layer via a second interlayer film and having an opening. A semiconductor memory device having an aluminum wiring connected to the polysilicon layer via a
A polysilicon layer for short circuit prevention is provided in the first interlayer film below the opening.

〔Example〕

 Next, the present invention will be described with reference to the drawings.

 FIG. 1 is a sectional view of an embodiment of the present invention.

In FIG. 1, a first interlayer film 2 is formed on a semiconductor substrate 1.
A polysilicon layer 4 that forms a resistor is formed through. The Al wiring 6 formed via the second interlayer film 5 is connected to the polysilicon layer 4 through the opening 13 formed in the second interlayer film 5. In particular, in the first interlayer film 2 below the opening 13, a polysilicon layer 7 for short circuit prevention is formed.
Is provided. In FIG. 1, reference numeral 3 is a gate electrode made of polysilicon.

In this embodiment having such a configuration, the Al wiring 6
Even when the polysilicon layer 4 and the underlying first interlayer film 2 are etched by over-etching when the opening 13 is formed in the second interlayer film 5 to connect the polysilicon layer 4 to the polysilicon layer 4, Underneath it is a polysilicon layer 7 for short circuit prevention.
Therefore, the Al wiring 6 and the semiconductor substrate 1 are not short-circuited.

Further, since this short-circuit preventing polysilicon layer 7 can be formed in the same step as the gate electrode 3, no special step is required.

〔The invention's effect〕

As described above, according to the present invention, the opening provided in the second interlayer film in order to connect the polysilicon layer to be the resistance or the wiring layer and the aluminum wiring formed on the polysilicon layer via the second interlayer film. By providing the short-circuit preventing polysilicon layer in the first interlayer film below the portion, a short circuit between the aluminum wiring and the semiconductor substrate is prevented, so that the manufacturing yield and reliability of the semiconductor memory device are improved.

[Brief description of drawings]

FIG. 1 is a sectional view of an embodiment of the present invention, and FIG. 2 is a sectional view of a conventional semiconductor memory device. 1 ... semiconductor substrate, 2 ... first interlayer film, 3 ... gate electrode, 4 ... polysilicon layer, 5 ... second interlayer film, 6 ... Al wiring, 7 ... short-circuit preventing poly Silicon layer, 8 …… Interlayer film, 9 ……
First polysilicon layer, 10 ... Second and polysilicon layer, 12
...... Interlayer film.

Claims (1)

(57) [Claims] 1. A polysilicon layer formed on a semiconductor substrate via a first interlayer film and serving as a resistance or a wiring layer, and a polysilicon layer provided on the polysilicon layer via a second interlayer film and via an opening. In the semiconductor memory device having an aluminum wiring connected to the polysilicon layer, a short-circuit preventing polysilicon layer is provided in the first interlayer film below the opening. apparatus.