JP2541006Y2 - Binary image expansion processing device - Google Patents

Description

[Detailed description of the invention]

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a binary image expansion processing apparatus.

[0002]

2. Description of the Related Art For example, in a visual inspection of a printed circuit board, it is necessary to know a positional shift between a through hole and a pattern. Therefore, these geometric shapes are optically read and image processing is performed. 6 to 9 schematically show the optical reading.

In FIG. 6, a printed circuit board 1 having a copper pattern 2 covering an edge of a through hole 3 is attached to a glass table 4.
Place on top of. Light source 5 is provided on the side of the printed circuit board 1 against the glass table 4 is irradiated with the incident light L ₁ to the printed circuit board 1. The incident light L ₁ is reflected by the printed circuit board 1, the reflected light L ₃ is captured in the light receiving device 7 such as a CCD camera.

[0004] The shape of the printed circuit board thus read is generally converted into a binary image, and the subsequent processing is performed. Usually, two types of threshold values Th1 and Th2 (Th1> Th2) are applied to the conversion of the binary image.

FIG. 7 shows a state of conversion into a binary image. Brightness levels of the received reflected light L ₃ of the light receiving device 7 is discriminated in the region ,, the threshold Th1, Th2, regions or reflected light L ₃ is bright portion when there copper pattern 2, regions or dark areas Is through hole 3
Then, the region at the intermediate level is determined to be the substrate material. Then, a signal S having a value of “1” when an area is detected and a value of “0” when an area is detected is generated.

FIG. 8 shows a case in which a light source 6 is further provided on the glass table 4 on the side opposite to the printed circuit board 1 and irradiated with incident light L ₂ . At this time the light-receiving apparatus 7 receives the combined light L ₄ of the reflected light of the incident light L ₁ and the incident light L ₂ of the transmitted light. Threshold T as combined light L ₄ are shown in FIG. 9 by the level
The brightest area is discriminated by h1 and Th2, and it is determined that the brightest area is the through hole 3, the next bright area is the copper pattern, and the area is the substrate material. In this case, when an area and a region are detected, “1” is set.
And a signal S having a value of “0” when an area is detected.

FIG. 10 shows an example of a binary image of the copper pattern 2 and the through hole 3 obtained as described above. 2a
Is an image representing the copper pattern 2, and 3a is an image representing the through hole 3, respectively. These images 2a and 3a are subjected to subsequent image processing. For example, when inspecting the patterning of a printed circuit board, the image 3a of the through hole 3 is expanded to fill the hole of the image 2a of the copper pattern 2. This is because there are two types of thresholds, so that a gap is generated between the image 2a and the image 3a.

[0008]

When the image 3a of the through hole 3 is expanded, a method using a 4-connection expansion process and an 8-connection expansion process is often used. Fig. 1
If the two-dimensionally expanded pixel group PX as shown in 1 value in the center of the target pixel C ₀ is "1", the pixel C _1, C _2, C ₃ adjacent in contact with this and one side, C _In this method, the value of ₄ is also set to “1”. In other words, as shown in FIG. 12, the pixel C ₁ vertically and horizontally pixels C ₀ originally present,
This is a processing method in which C ₂ , C ₃ and C ₄ are present. In the following, for the sake of simplicity, such a concept will be used. Figure P ₄ refers to performing four-connected expansion process.

[0009] Based on the same concept, the 8-connected expansion processing P ₈
, The pixels C ₁ , C ₂ , C ₃ , and C that are in contact with the originally existing pixels at one side or one vertex as shown in FIG.
_4, C _5, C _6, the image can expand the by the presence of C ₇ and C _8.

[0010] However, the 4-connected expansion processing P ₄ and the 8-connection expansion processing P ₈ have a problem that, although the algorithm is easy, the expanded image is not uniformly expanded with respect to the original image. .

FIGS. 14 and 15 show how one pixel is expanded when the 4-connection expansion processing P ₄ and the 8-connection expansion processing P ₈ are repeated, respectively. It can be seen that each of the four-connection expansion processing P ₄ and the eight-connection expansion processing P ₈ expands into a substantially square shape. This is because the direction of expansion is biased in a specific direction. In the case of 8-connected expansion process P ₈ is also performed in the oblique direction expansion, but the square root of two times the expand against vertical and horizontal directions.

In order to prevent such image distortion during expansion, expansion using the Euclidean distance is also used.
There is a disadvantage that the processing system becomes very complicated as compared with the connection expansion processing P ₄ and the 8-connection expansion processing P ₈ .

The present invention has been made to solve the above problem, and an object of the present invention is to provide an image dilation processing apparatus capable of easily obtaining a dilated image that is uniformly expanded with little distortion.

[0014]

SUMMARY OF THE INVENTION A dilation processing apparatus for a binary image according to the present invention executes dilation processing by a 4-connected dilation processing apparatus and dilation processing by an 8-connected dilation processing apparatus alternately and continuously.

[0015]

In the present invention, the expansion processing by the 4-connection expansion processing apparatus and the expansion processing by the 8-connection expansion processing apparatus are performed alternately and continuously, so that the disadvantages of the respective expansion processing are complemented without accumulating. Dilate the image.

[0016]

[Example] First, each described 4 inflatable connecting process P ₄ and 8 connecting dilation P _8.

FIG. 16 shows an example of an image 3 a of the through hole 3. The circle 8a is a circle inscribed in the vertical and horizontal directions of the image 3a (hereinafter, "inscribed circle"). Therefore, when the image 3a is expanded, it is desirable that the inscribed circle of the expanded image almost becomes the contour of the expanded image.

FIG. 17 shows a case where the four-link expansion processing P ₄ is performed once. The inscribed circle 8b of the expanded image 3b is longer at its radius by one side of the pixel than the circle 8a.
In the following, the image before processing is indicated by oblique lines. If the 4-connected dilation process P ₄ is repeated as it is, the dilated images are 3c, 3d, and 3e in the order of FIGS. 18, 19, and 20, and
The inscribed circle expands as 8c, 8d, 8e. Then 4 in the coupling expansion process P ₄ only four repetitions Figure 20, the contour of the expansion image 3e, a large difference occurs in the inscribed circle 8e.

A similar situation occurs when only the 8-connected expansion processing P ₈ is repeated. Figure 24 shows a case where began to expand at turn 8 inflatable connecting process P ₈ images 3a shown in FIG. 16 from FIG. 21. That is, the expanded image is 3f, 3g, 3
h, and 3i, inscribed circle 8f, 8 g, 8h, and 8i, respectively but slide into inflated sequentially, as shown in FIG. 24, when repeated four times only 8 inflatable connecting process P _8, the dilated image 3i A great difference occurs between the contour and the inscribed circle 8i.

Meanwhile, in the case of using an expansion processing apparatus according to the present invention which will be described later, subjected to 8-connected expansion process P ₈ on the image 3a shown in FIG. 16 by the first 8 inflatable connecting processor, FIG. An expanded image 3j shown in FIG. At this time, the inscribed circle of the image 3j is 8j, which respectively correspond to the image 3f and the inscribed circle 8f of FIG.

[0021] The next 4 inflatable connecting apparatus was subjected to 4 connecting expansion process P ₄ by is the image 3k shown in FIG. 26.
Compared to image 3g of FIG. 22 which has been subjected to two 8-connected expansion process P ₈ is continuously circle 8k is consistent with circles 8 g, it can be seen that the closer the contour of more dilated image. In other words, it can be said that the image 3k is more evenly expanded than the image 3g.

Further, this time, an 8-connected dilation process P ₈ is performed to obtain a dilated image 31 shown in FIG. This inscribed circle 8l is the image 3l
Although slightly deviated from the outline of FIG. 28, the deviation is small as compared with the image 3h of FIG. 23 in which the 8-connection expansion processing P ₈ is performed three times in succession, and the 4-connection expansion processing P ₄ is further performed. As shown, an expanded image 3m having substantially the same contour as the inscribed circle 8m can be obtained.

As described above, by alternately repeating the 4-connection expansion processing P ₄ and the 8-connection expansion processing P ₈ , expansion processing is performed in a complementary direction. Thus if the original image 3a was almost circular, Yuku generally closer to a circle than repeated due to the expansion processing of only four inflatable connecting process P ₄ or 8 linked expansion process P ₈ to obtain an expansion square image.

The alternate processing may be started from the 4-connected expansion processing P ₄ . Figure 29 is one subjected to 4 connecting expansion process P ₄ on the image 3a of FIG. 16, the expansion image 3n, inscribed circle 8n is dilated image 3b, respectively, in FIG 17, consistent with the inscribed circle 8b. When this is further subjected to an 8-connection expansion process P ₈ , FIG.
Thus, a dilated image 3p of 0 and an inscribed circle 8p are obtained, and the outline of the image 3p and the inscribed circle 8p substantially coincide with each other. Incidentally, in the case of performing 4 inflatable connecting process P ₄ and 8 connecting dilation process P ₈ and the once each expansion image obtained regardless of the order is equal. As can be seen by comparing the shaded portions, the dilated image 3j before performing the processing in FIG. 26 is different from the dilated image 3n before performing the processing in FIG. 30, but the dilated image 3p and the dilated image 3k match. This is because the 4-connection expansion processing P ₄ and the 8-connection expansion processing P ₈ complementarily expand the image.

FIG. 31 shows a 4-connected dilation process P for the dilated image 3p.
₄ shows an expanded image 3q subjected to ₄ and an inscribed circle 8q. It is slightly deviated from the inscribed circle 8q the contour of the expansion image 3q, 3 consecutive times 4 inflatable connecting process P ₄ when compared with the image 3d of FIG. 19 which has been subjected to the shift is small, further 8 inflatable connecting process P ₈ , An inflated image 3r whose contour is substantially equal to the inscribed circle 8r can be obtained (FIG. 32).
As described above, the same expanded images 3p and 3k
Since the four-connection expansion processing P ₄ and the eight-connection expansion processing P ₈ are performed once for each, the expanded image 3r and the inscribed circle 8r match the expanded image 3m and the inscribed circle 8m in FIG. 28, respectively.

The structure of a specific apparatus for performing the processing described above to obtain a uniform dilated image will be described. FIG. 3 is a block diagram showing an overall configuration of a printed circuit board inspection apparatus 10 to which the present invention is applied. The stage 20 includes the glass table 4 shown in FIG. 6, and places the printed circuit board 1 thereon, and sends the image in the transport direction Y while reading an image for each line direction X. The movement of the stage 20 is driven by a stage drive system 21. The image of the printed circuit board 1 read for each pixel by the reading device 22 having a configuration as shown in FIG. 6 or FIG. 8 becomes a binarized image by the binarization circuit 23, and the copper pattern as shown in FIG. 2 of image 2 and image 3 of through hole 3
Obtain a. These are sent to the expansion processing circuit 24, and the above-described expansion processing is performed on the image 3a of the through hole 3. This is combined with the image 2a of the copper pattern 2 to obtain data D, and then sent to the defect detection circuit 25. Here, if there is an abnormal pattern, its coordinates are stored as a defect. The stored coordinates are read out by the MPU 26 and the CRT
The defect coordinates are displayed at 27. The coordinates indicating the defect are sent to the defect confirmation device 28, the defect removal device 29, the defect position marking device 30, and the like.

The defect confirmation device 28 is a measure for enlarging and displaying a defect detected on the CRT 27, for example.

The defective product removing device 29 is a device for transporting a defective inspection object to a defective product tray or the like when it is detected.

The defect position marking device 30 is a device for marking a defect directly or on a point on a sheet corresponding to the defect. These devices are installed as needed.

FIG. 1 is a block diagram showing an example of the internal configuration of the expansion processing circuit 24 according to an embodiment of the present invention.
5 to 5 correspond to the procedure shown in FIG. The image 3a of the through hole 3 is serially transferred to the circuit 24 and is developed two-dimensionally in the line memories 60 and 61.
Dilated image 3j is generated 8 inflatable connecting 8 inflatable connecting process P ₈ in block 40 is subjected.

The expansion image 3j but is continuously fed to the next stage of the line memory 60, 61 to receive the next four inflatable connecting process P _4, also sent to the timing adjustment selector block 70, 8 inflatable connecting process dilated image of only P ₈ can also be obtained. Which expansion stage image is output is controlled by the select signal SEL. The same applies to the following dilated images 3k, 3l, 3m.

The expansion image 3j is developed by the line memory 60 as in the case of 8-connected expansion process P ₈ two-dimensionally to obtain a dilated image 3k by 4 inflatable connecting block 50. Thereafter, dilated images 3i and 3m are obtained in the same manner.

The timing adjustment / selector block 70 adjusts the timing deviation due to the expansion processing, and selects an expanded image to be combined with the copper pattern 2 image 2a whose timing has been similarly adjusted. Which image should be selected depends on whether the hole in the image 2a can be filled. The selected dilated image generates combined data D with the image 2a by the OR gate 71.

Further, the process shown in FIG. 32 from FIG. 29, i.e., first 4 inflatable connecting process P ₄ continuously to the next after performing 8
When performing the connection expansion processing P ₈ , the 8-connection expansion block 40 and the 4-connection expansion block 50 in FIG. 1 may be replaced (FIG. 2). That is, in the present invention, it does not matter which process is performed first.

FIG. 4 shows the internal configuration of the 8-connection expansion block 40. 9 D flip-flops F _{1 to} F ₉ and OR
The gate 41 comprises three input terminals I ₁ , I ₂ ,
Provided with the I _3. From these input terminals I ₁ , I ₂ , I ₃ , the pixel data before the expansion processing in the block 40, the pixel data obtained by delaying the pixel data by one column by the line memory 60, and the line memory 61, respectively.
, The data of the pixel delayed by another column is input, and
Dimensionally expanded. The clock CK operates the D flip-flops F _{1 to} F ₉ in synchronization.

Now, from the input terminal I ₁ to the D flip flip F
When the data of a pixel that is input to _one is assumed to be "1", regardless of the other D or data of a pixel in the flip-flop F ₂ to F ₉ is "0" which was either "1", OR gate 41 Outputs “1”.

[0037] In synchronization with the next clock CK, the certain data of a pixel "1" is shifted to D flip-flop F _2. Also at this time, the output of the OR gate 41 is "1".
Similarly, the data “1” of a certain pixel sequentially shifts to the D flip-flops F _{3 to} F ₉ , and during this period, the output of the OR gate 41 is held at “1”.

That is, the 8-connection expansion block 40
Is 3 if the input pixel data is "1".
The data for a total of nine pixels in three columns for each pixel is set to "1", and as a result, expansion as shown in FIG. 13 is performed.

The internal configuration of the 4-connected expansion block 50 is the same, and has input terminals I ₁ , I ₂ , I ₃ as shown in FIG. 5 and comprises D flip-flops F _{10 to} F ₁₆ and an OR gate 51. I have. Clock CK is D flip-flop F ₁₀
Synchronize to F ₁₆ by operating. However D flip-flops F ₁₀ and F ₁₅ are respectively subjected to the delay processing for the next stage of the F ₁₁ and F _16.

The operation of the expansion block 50 is the same as that of the expansion block 40. As a result, the expansion shown in FIG. 12 is performed.

[0041]

As described above, according to the present invention, in the binary image expansion processing apparatus, the expansion processing by the 4-connection expansion processing apparatus and the expansion processing by the 8-connection expansion processing apparatus are alternately and continuously performed. Therefore, even if a plurality of dilation processes are sequentially performed, the image is complementarily dilated without accumulating the respective drawbacks of the 4-link dilation process and the 8-link dilation process,
It is possible to easily obtain an evenly expanded dilated image with little distortion.

[Brief description of the drawings]

FIG. 1 is an expansion processing circuit according to a first embodiment of the present invention;
FIG.

FIG. 2 shows an expansion processing circuit according to a second embodiment of the present invention;
FIG.

FIG. 3 is an overall configuration diagram of a printed circuit board inspection apparatus 10 to which the embodiment of the present invention is applied.

FIG. 4 is a configuration diagram of an 8-connection expansion block 40;

5 is a configuration diagram of a four-connection expansion block 50. FIG.

FIG. 6 is an explanatory diagram of a conventional technique.

FIG. 7 is an explanatory diagram of a conventional technique.

FIG. 8 is an explanatory diagram of a conventional technique.

FIG. 9 is an explanatory diagram of a conventional technique.

FIG. 10 is an explanatory diagram of a conventional technique.

11 is an explanatory view of a four-connected expansion process P _4.

12 is an explanatory view of a four-connected expansion process P _4.

[13] 8 is an explanatory view of the connecting dilation P _8.

FIG. 14 is an explanatory diagram of a conventional technique.

FIG. 15 is an explanatory diagram of a conventional technique.

FIG. 16 is an explanatory diagram of a conventional technique.

FIG. 17 is an explanatory diagram of a conventional technique.

FIG. 18 is an explanatory diagram of a conventional technique.

FIG. 19 is an explanatory diagram of a conventional technique.

FIG. 20 is an explanatory diagram of a conventional technique.

FIG. 21 is an explanatory diagram of a conventional technique.

FIG. 22 is an explanatory diagram of a conventional technique.

FIG. 23 is an explanatory diagram of a conventional technique.

FIG. 24 is an explanatory diagram of a conventional technique.

FIG. 25 is an explanatory diagram of the image expansion processing according to the first embodiment of the present invention;

FIG. 26 is an explanatory diagram of the image expansion processing according to the first embodiment of the present invention;

FIG. 27 is an explanatory diagram of the image expansion processing according to the first embodiment of the present invention;

FIG. 28 is an explanatory diagram of the image expansion processing according to the first embodiment of the present invention;

FIG. 29 is an explanatory diagram of the image expansion processing according to the second embodiment of the present invention;

FIG. 30 is an explanatory diagram of the image expansion processing according to the second embodiment of the present invention;

FIG. 31 is an explanatory diagram of the image expansion processing according to the second embodiment of the present invention;

FIG. 32 is an explanatory diagram of the image expansion processing according to the second embodiment of the present invention.

[Explanation of symbols]

P ₄ 4 connecting dilation P ₈ 8 inflatable connecting process 3a through hole 3 of the image 3j~3n, 3p~3r dilated image 40 8 inflatable connecting block 50 4 inflatable connecting block

Claims (1)

(57) [Scope of request for utility model registration] 1. An expansion processing apparatus for sequentially performing a plurality of expansion processings on an input binary image to expand the binary image, the expansion processing by a 4-connection expansion processing apparatus and the 8-connection expansion. An expansion processing apparatus for a binary image, wherein expansion processing by a processing apparatus is alternately and continuously performed.