JP2531206B2 - Channel device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial field of application] The present invention is used for a channel device of a digital information processing device. In particular, the present invention relates to speeding up a branch command of a channel device connected to an input / output device via a serial interface.

〔Overview〕

According to the present invention, in a channel device, it is determined whether the command read from the main storage device is a transfer command or a branch command. When the command is a branch command, the command next to this branch command and the command next to this branch command are executed. Is sent to the input / output control device so that the branch command can be executed at high speed.

[Conventional technology]

Generally, the channel device and the input / output control device sequentially read each channel command word of the channel program stored in the main storage device, and perform the transfer operation with each other according to this command.

When executing a channel program, select the channel command word to be executed next depending on the execution status of the previous command (in general, skip one channel command word and execute the previous channel command word again. And change the control procedure).

[Problems to be solved by the invention]

However, in such a conventional channel device, when the channel device and the input / output control device are connected by a serial interface, it takes time to perform serial-parallel conversion of signals for mutual communication, and the channel device and the input / output control device It takes time to exchange signals with the device.

For this reason, the operation in which the execution procedure of the channel program is changed depending on the execution result of the command between the I / O device and the channel device as described above (branch operation of the channel program: waiting for disk rotation in data transfer, etc. The instruction procedure of is determined by the execution result of the previous command), it takes time from displaying the execution result of the command from the I / O device on the channel device until receiving the next command from the channel device. It is necessary to fetch the channel program at high speed in order to shorten the response time, and it is necessary to prepare a high-speed fetch circuit in the channel device. For this reason, the channel device is effective. Similarly, in order to reduce the response time delay, the distance between the channel device and the input / output control device is shortened,
The response time needs to be fast. Therefore, there is a drawback that the input / output control device cannot be installed separately from the channel device.

The present invention solves the above drawbacks, and an object of the present invention is to provide a channel device capable of executing a branch command at high speed.

[Means for solving problems]

The present invention comprises means for creating an address for reading a channel command word from the main memory, and means for sending a command read from the main memory to the input / output control device in accordance with the output of the means for creating. In the channel device, means for determining whether or not the command read from the main storage device is a branch command, and when the determination result of the determination means is a branch command, the main storage device outputs the branch command It is characterized in that it further comprises means for reading the next command and the next command for executing this branch command in accordance with the means for creating and giving the means for sending out.

[Operation] The determining means determines whether the command read from the main storage device is a transfer command or a branch command. When the determination result is a branch command, it is given to the means for reading out from the main storage device by the giving means and the output of the means for producing the command next to this branch command and the next command when executing the branch command. With the above operation, the branch command can be executed at high speed.

〔Example〕

Embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram of a channel device according to an embodiment of the present invention. In FIG. 1, the channel device 20 is a main memory device.
An address register 21 that gives an address to 30 to read a channel command word, an adder 22 that inputs the output of the address register 21 and updates the address, and an output of the adder 22 are input to one input and the other A switching circuit 25 that switches the branch destination address of the branch command input to the input and gives it to the address register 21, and a channel command word that is temporarily stored by inputting the channel command word read from the main storage device 30 and storing it in the switching circuit 25. Is a branch command, the register 23 that gives the branch destination address to the switching circuit 25, and the next channel command word when this branch command is executed when the channel command word stored in the register 23 is a branch command is the main memory. Register read and stored from device 30
24, a sending circuit 26 for switching the output of the register 23 and the output of the register 24 to give to the input / output control device 10 via the signal line 201, and whether the command stored by inputting the output of the register 23 is a transfer command. Switch circuit by judging whether it is a branch command 26
A command determination circuit 27 and a control circuit 28 for controlling

Here, the main storage device 30 includes a channel program composed of a plurality of channel command words, and the input / output control device 10 sends the execution result of the command to the channel device 20 via the signal line 141. ₁ to 40 _n are connected.

Here, a feature of the present invention is that the channel device 20
To the register 23, which is a means for judging and a means for giving,
24, switching circuit 25, sending circuit 26, command determination circuit
27 and a control circuit 28 for controlling these.

The operation of the channel device having such a configuration will be described. FIG. 2 is a diagram showing the structure of a channel program of the channel device of the present invention. FIG. 3 is a diagram showing the structure of channel command words of the channel device of the present invention. FIG. 4 is a flow chart showing the operation of the channel device of the present invention.

In FIG. 1, the channel program stored in the main memory device 30 is read by the channel device 20, edited into a command for controlling the input / output device 40, and instructed to the input / output control device 10 via the signal line 201. To be done.

The input / output control device 10 controls the input / output device 40 using this command, and outputs the result via the signal line 141 to the channel device 20.
To send to.

The channel device 20 reads the next channel program from the main memory device 30 based on this information, generates the next command, and similarly sends it to the input / output control device 10 via the signal line 201.

2 and 3, the channel program A
Is composed of channel command words B _{1 to} B _n . Each of the channel command words B _{1 to} B _n is roughly classified into one for instructing data transfer between the channel device 20 and the input / output control device 10, and one for instructing branching. C or a branch command G, flags D and H for controlling the execution of the channel program A, a transfer count E for instructing the data transfer amount, a data address F indicating the transfer position of the main storage device 30, or a branch for executing the branch command. It is composed of the destination address I.

Although the branch command in the channel program A is generally described as an unconditional branch, whether to execute this branch command or the command next to the branch command is determined depending on the execution result of the command executed immediately before.

That is, whether or not to execute the branch command cannot be determined until the execution result of the command immediately before the branch command is determined.

Therefore, generally, the result executed by the input / output control device 10 and the input / output device 40 is sent to the channel device 20, and the channel command word to be executed next is selected by this information. Then, the processing becomes slow, and the input / output control device 10 cannot receive the command made from the next channel command word B within the required time.

The operation of the channel device 20 of this embodiment will be described with reference to FIGS. 1 and 4.

The channel command word stored in the address register 21 is read from the main storage device 30 by the address (), and the read channel command word is stored in the register 23 and given to the command determination circuit 27.

The command judgment circuit 27 judges whether the channel command word stored in the register 23 is a transfer command or a branch command, and (), if this channel command word is a transfer command, input / output via the sending circuit 26. Controller 10
This command is sent to and the execution is instructed (). The content of the address register 21 is updated by the adder 22 to the address of the next channel command word, returned to the address register 21 via the switching circuit 25, and the address of the channel command word to be executed next is prepared ().

When the command determination circuit 27 determines that the command is a branch command (), the content of the address register 21 is updated by the adder 22 to the address of the next channel command word,
It returns to the address register 21 via the switching circuit 25.

Further, depending on the contents of the address register 21, the main memory device
The channel command word is read from 30 and stored in the register 24 ().

In the case of a branch command, the branch destination address of the branch command stored in the register 23 is further stored in the address register 21 via the switching circuit 25, and the channel command word is read from the main memory device 30 by this address to register 23.
Stored in () and passed through the sending circuit 26 to the registers 23 and 24.
The command is sent to the input / output control device 10 (). Prepare the address of the channel command word to be executed next ().

In the input / output control device 10, the command next to the branch destination command or the command next when the branch command is executed is used to determine which is executed by the input / output control device 10 from the channel device. 20 and the channel device will generate the address of the next channel command word based on this report, but this description is omitted in this embodiment.

〔The invention's effect〕

As described above, according to the present invention, when the branch command is executed, the channel device gives two commands to the input / output control device, the command next to the branch command and the next command when the branch command is executed. In addition, the I / O controller does not have to re-receive the command from the channel device regardless of which command is executed, the response between the channel device and the I / O controller is reduced, and the branch command is executed at high speed. There is an excellent effect.

[Brief description of drawings]

FIG. 1 is a block diagram of a channel device according to an embodiment of the present invention. FIG. 2 is a diagram showing the structure of a channel program of the channel device of the present invention. FIG. 3 is a diagram showing the structure of channel command words of the channel device of the present invention. FIG. 4 is a flowchart showing the operation of the channel device of the present invention. 10 …… input / output control device, 20 …… channel device, 21 …… address register, 22 …… adder, 23, 24 …… register,
25 …… Switching circuit, 26 …… Sending circuit, 27 …… Judging circuit, 28
...... Control circuit, 30 …… Main memory, 40 …… I / O device,
A ...... channel program, B ₁ ~B _n ...... channel command word, C ...... commands, D, H ...... control flag, E ......
Transfer count, F ... Data address, G ... Branch command, I ... Branch destination address.

Claims (1)

(57) [Claims] 1. A means (21, 22) for creating an address for reading a channel command word from a main memory (30), and an input / output control for a command read from the main memory according to the output of the means for creating. Means (26, 28) for sending to the device (10), and means (23, 27) for judging whether or not the command read from the main memory device is a branch command in the channel device comprising: When the determination result of this determining means is a branch command, the command next to this branch command and the next command when executing this branch command are read from the main storage device according to the creating means, and are sent to the sending means. And a means (23, 24, 26, 28) for giving the channel device.