JP2527880Y2 - Ignition control circuit - Google Patents

Description

[Detailed description of the invention]

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an inverter, and more particularly to a pole switch ignition control circuit of a pulse width modulation type inverter.

[0002]

2. Description of the Related Art A pulse width modulation type DC-AC inverter switches a pole switch of a power stage at a speed higher than a fundamental sine wave frequency of an AC output to approximate a sine wave output .
You . In pulse width modulated DC-AC inverter design, the switching of the output stage so as to lighten the burden for filtering the output power by reducing the specific harmonic to a low value in order to obtain a sinusoidal voltage It is desirable. Even though the switching time error is fairly small, harmonic voltages can occur many times as much as desired. This usually is done be a considerably larger than the filter circuit theoretical size needed to suppress these harmonics.

For example, in a transistor inverter, it is necessary to generate an underlap state in order to prevent shoot-through during a switching operation. This is for switching output point from one polarity to another polarity is a delay time after the turn-off of the transistor is conducting, the conduction transistors before the other transistor is turned ON longer It is necessary to be out of conduction. Often, depending on the load conditions, the second transistor will not conduct at all because the load current is shunted through the commutation diode, thereby reducing the switching time to the transistor turn-off time. The switching time of the transistor is very variable depending on the instantaneous value of the load current and the turn-off characteristics of the transistor. Therefore, even if the switching schedule is set, it may not be satisfied, which results in unpredictable harmonics.

The present invention predicts a switching time required for each switching point, and adjusts a start time of each switching cycle based on the prediction so that switching is performed according to a schedule. to minimize the distortion of the output by
You . Generally, a reference waveform to be reproduced at the output terminal of the pole switch is provided to the switching control circuit. After the pulse in the reference waveform of a predetermined time interval, out
Should be reproduced on the force terminal . This delayed switching schedule is implemented by measuring the switching time of the pole switch for a given pulse of the output cycle and subtracting the measured switching time from a given time period to obtain a delay time. The switching period of the corresponding pulse of the subsequent output cycle starts after the appropriate reference waveform pulse at a point equal to the delay time obtained in the preceding cycle. This process is repeated for each pole switch output pulse. During steady state operation, it is certain that the switching period is expected to have the same length at the corresponding switching point of each subsequent cycle. Therefore, the pole
The switch is switched after a predetermined time interval following the reference waveform pulse.

[0005]

A circuit for performing the above-described delay pole switching function is disclosed in U.S. Pat. No. 4,443,842 corresponding to Japanese Patent Publication No. 6-85633 (Japanese Patent Application No. 58-34729). (Title of Invention: Inverter ignition control circuit with variable switching delay compensation function)
Is disclosed. This patent discloses a circuit and method for removing inverter distortion due to the variability of the switching delay of a pole switch , and should be referred to in understanding the invention. Tests of the circuit disclosed in the patent have confirmed that operation as described in the specification can be obtained.However, instability occurs randomly, and a temporary disturbance appears in the output voltage of the inverter. Was. The main purpose of the invention is to obtain greater operational stability.

[0006]

Means for Solving the Problems] According to this invention, the pole switch ignition control circuit for controlling the pulse width modulation inverter in accordance with the reference pulse signal, said reference pulse signal in response to a clock signal including a voltage pulse a waveform pattern generation circuit for generating, pole switch of the inverter
A control signal generating circuit for generating a control signal having a transition point for turning on / off, selection of with the control signal
To measure the switching delay time of the pole switches controlled in response to a transition point which is the clock that occur between the transition point between the switching point of the pole switch
First counter and the voltage pulse of the clock <br/> click signal between <br/> is the result counted in the first counter of the preceding inverter output cycle of the pole switch for counting the number of voltage pulses of the signal a storage circuit for storing the number of the serial
The counting can be set in advance so as to start counting from a number equal to the number of voltage pulses of the clock signal stored in the memory circuit , and from a predetermined transition point of the reference pulse signal to a predetermined count. wherein a second counter connected to the voltage pulse to count, generate other transition points in the control signal in response to Carry output pulse from said control signal generating circuit is the second counter occurring It is, have in the pole switch the reference pulse signal the predetermined transition point from a predetermined time ignition control circuit that is characterized in that it is activated after the is provided.

[0007]

The multi-phase inverter can be controlled by a single control circuit by appropriately adjusting the timing of the switching operation. A shift register may be used as a storage unit for storing the number of voltage pulses counted by the first counter, and the shift register may store the preceding inverter output cycle.
During this time, the count of the first counter is stored and the appropriate stored count is sent to a second counter which can be preset at a suitable time to generate the desired inverter output waveform.

The ignition control circuit of the present invention controls the switching of the pole switch of the pulse width modulation type inverter according to the method described below. The method includes counting, by a first counter, a series of clock pulses that occur between a predetermined transition point of a control signal and the actual switching of a pole switch responsive to the transition point. A second counter is set in advance to a count equal to the number of clock pulses obtained, and when a predetermined transition point appears in the reference signal, the second counter is operated to count clock pulses from the preset count, second counter switching Hajime Sase the pole switch to cause a transition point of the other <br/> to the control signal reaches a predetermined count
Consisting of Mel that.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below in detail with reference to the accompanying drawings. 1, the operation of <br/> ignition control circuit of the invention the inverter is a waveform diagram illustrating some of the single transient output cycle of the pulse width modulation type inverter. The waveform A in FIG. 1 shows a pulse wave P which is a part of the reference signal to be reproduced at the output terminal of the pole switch of the inverter.
Is shown. The reference signal may be generated in the inner portion of the ignition control circuit of the inverter, or may be supplied from an external signal source. Shows for a certain time interval T in each transition point of the pulse wave P. The invention is configured such that the pole switch of the inverter is turned on / off at the end of each interval T to reproduce the reference signal at the output terminal of the inverter. To maintain the proper ignition control functions, Lee emissions <br/> interval T has to be long enough pole least maximum switching hours switch.

The waveform B shown in FIG. 1 is composed of, for example, C1, C2 and C
It has a count number which is previously set as 3, the pre-settable second counter which is enabled to start counting past the transition point of the pulse wave P
It represents the cumulative count number of the counted clock pulse . The maximum count of the second counter that can be set in advance is M
C, which corresponds to the desired delay time T.

A waveform C in FIG. 1 represents a control signal CN. The control signal CN has a transition point every time the maximum count number MC is reached in response to the count number of the second counter which can be set in advance. These transition points are used to turn on / off the pole switches of the inverter. During normal operation,
It can be argued that the switching times have the same length at the corresponding switching point of each subsequent cycle. Thus, when an inverter output cycle is started after a delay time TS corresponding to a difference between the switching times of the preceding <br/> cycle and the interval T, the actual switching, after one complete Lee Ntabaru T Should happen in.

The method used to obtain this result is shown by other waveforms in FIG. Waveform D shows an output signal OP representing the inverter output voltage. Switching delay time D1, D
2 and D3 are shown as following each transition point of the control signal CN. Waveform E of Figure 1 is a control signal TC, representing the cumulative number of counts of the timekeeper counter for measuring the switching time of the pole switch. This feature
It is obtained by a first counter that starts counting the number of voltage pulses of the clock signal at the same time as the transition point of the control signal CN occurs. The counting operation stops when the pole switch is switched, and a count number corresponding to the delay time TS is obtained, which is used for pulse control in the next output cycle. This count is stored in the storage device such as random access memory or a shift register.

The waveform F in FIG. 1 is obtained from the first counter.
Represents a pulse wave W for inputting data required for the next output cycle to the storage element, which advances data appropriate for the next switching operation and transfers it to a second counter which can be preset. The number of memory stages, such as shift registers, depends on the pole switches in the inverter output cycle.
Equal to the number of switching operations . Waveform G of FIG. 1, the first
After the counter data is input to the shift register, the first
Represents a pulse wave R for resetting the counter.

The waveforms of FIG. 2 illustrate the operation of the ignition control circuit of the present invention for the inverter output cycle following the transient output cycle represented by the waveform of FIG. When the inverter output cycle, control the transition point of the signal CN is to be counted the second counter capable preset Following the transition point of the pulse wave P of the reference signal from the preset value to its maximum count Delayed by a time equal to the required time. In the steady operation, switching operation time of a predetermined pulse of a certain <br/> cycle should be equal to the switch operation time of the corresponding pulse of the preceding <br/> cycle. Therefore, the inverter output signal OP is switched after the control signal CN first followed transition point delay time D1 of. As a result, the reference signal of the switch operation or after the transition point came <br/> Ntabaru T of the pulse wave P is performed.

Under steady state conditions, the process continues for each pulse of the inverter output cycle, the delay time of the control signal CN and the delay time of switching (D1, D
2, D3 sum) is always equal to y Ntabaru T. When the waveform of FIG. 1 is analyzed, the inverter output signal OP
It is seen that switched after pulse wave Lee Ntabaru T following the transition point P of the signal. It shows a circuit response when the transient state exists immediately before the observed cycles <br/> Le. Upon returning to steady state, the switching schedule will be satisfied.

FIG. 3 shows one embodiment of the ignition control circuit according to the present invention.
It is the schematic of an Example . Only one for ease of illustration
Two output pole switching means 10 are shown. However, it will be appreciated that the invention can be applied to polyphase inverters using known suitable drive circuits. Terminal CT provides a clock signal receiving means consisting of a series of voltage pulses. A desired output switching pattern represented by the pulse P of the reference wave signal is generated by the waveform pattern generation circuit 12 in response to the clock signal pulse . Flip-flop circuit Z such as the D-type flip-flop shown
Reference numeral 1 is used as a control signal generation circuit for generating a control signal CN having transition points as shown in FIGS. The drive circuit 14 can be formed by a known technique, and the control signal C
The output pole switching means 10 is driven according to N. Comparator Z2 generates an inverter output signal OP by comparing the voltage signal extracted from the voltage and the filter 16 at the connection point N.

Flip-flop circuit Z3, inverter Z
4. Use in combination with the AND gate circuit Z5 so that only complete clock pulses are applied to the first counter Z6. The flip-flop circuit Z3 generates an enable signal that causes a clock pulse to be input to the first counter Z6 following the transition point of the control signal CN. The change in the signal at the D input terminal of the flip-flop circuit Z3 is transmitted to the Q output terminal only when the clock signal goes low because the inverted clock signal is applied to the C input terminal of the flip-flop circuit Z3. D input terminal
If the signal at the D input terminal goes high while both the signals at the Q and Q output terminals are at a low level and then the clock pulse is at a high level, the counter input will cause the clock signal to go to a low level. Therefore, it is necessary to maintain a low level until the signal at the Q output terminal becomes a high level. Therefore, the first counter Z6 can receive only the complete first clock pulse. Similarly, the D input terminal and the Q input terminal
When the signal at the output terminal is at a high level and the subsequent clock pulse is at a high level and the signal at the D input terminal goes to a low level , the signal at the Q output terminal can change until the clock pulse goes to a low level. Instead, only the complete clock pulse is input to the first counter Z6 again. The result may be a complete one clock pulse period error in the stored output pole switching time, much less than the difference in counting due to the first counter Z6 counting incomplete clock pulses. It is not considered important. Therefore, when the flip-flop circuit Z3 is added, the first counter Z6
Accurate data transmission is ensured and the cause of malfunction is eliminated.

The pulse wave P of the reference signal , the control signal CN,
As long as all of the inverter output signals OP match, the circuit is at rest. When the pulse wave P changes its state and becomes inconsistent with the control signal CN, the exclusive OR gate Z
7 goes high, and a second counter Z9 whose clock pulse can be preset by the AND gate Z8.
Sent to The second counter Z9 counts up to a predetermined count value, which may be its full capacity, and the carry-out signal goes low as soon as the count value is reached. At the next clock pulse, all counter outputs go to zero and the carry-out signal goes high. Therefore, to change the state of the control signal CN flip-flop circuit Z1 is operated, its status again Pal
The second counter Z9 is stopped in accordance with the wave P.
At this point, the control signal CN is the inverter output signal O
P does not match.

At the transition point of the control signal CN, two operations are started . One is that the drive circuit 14 is an inverter
Switch on / off . Second, the exclusive OR gate Z10 goes high, allowing the clock pulse to reach the first counter Z6 and the first counter Z6.
6 is a pole switch that switches the inverter output signal OP
Resulting transition point, counting clock pulses until the count of the first counter Z6 inverter output signal OP matches the control signal CN is prohibited. When this change occurs in the inverter output signal OP, a monostable
Generating a sequence of two pulses thus generated to the multivibrator Z11 and Z12 is started. The output of the monostable multivibrator Z11 is a pulse wave W in FIGS. This pulse wave W is the first data
The shift register Z13 functions as a storage circuit to shift new data to a second counter Z9 which can be set in advance, and to set the new data before the trailing edge of the pulse wave W. A possible second counter Z9 is set to the new data number.
The pulse wave W is inverted by the inverter Z14 and sent to the monostable multivibrator Z12. The output of the multivibrator Z12 is the pulse shown in FIGS.
Wave R. Pulse wave R resets the first counter Z6, the first counter Z6 to be able to count at the time of switching poles switch next inverter output cycle. The ignition control circuit then goes to sleep until the next transition point of the pulse wave P.

[0020] The length of the shift register Z13 is, the pole switch
Such a length is stored for each switching point of a data word is one inverter output cycle representing the switching time of the switch. Therefore, when the current data equal to the number of clock pulses required for the switching operation of the pole switch just completed is input to the shift register Z13, the second counter capable of presetting the number required for the next switching point is set. Set to Z9. This number represents the switching time of the pole switch at the corresponding switching point of the previous inverter output cycle. Therefore, when the pulse wave P changes next, the second preset counter Z9 starts counting from a number representing the expected switching delay time of the associated pole switch and counts up to its full count.

The pole switch then switches at a time approximately equal to the time of the preceding cycle. As a result, Gokusu
The switching of the switch regenerates a pulse wave P, which is delayed by a predetermined interval T equal to the full count of a second counter Z9 which can be preset.

[0022]

The present invention has the effect of providing an ignition control circuit that minimizes output distortion due to switching errors.

While this invention has been described in what is considered to be the presently preferred embodiment, various modifications will occur to those skilled in the art without departing from the scope of this invention. Accordingly, the claims of the present invention are intended to cover all such modifications within the protection scope of the present invention.

[Brief description of the drawings]

FIG. 1 is a waveform diagram for explaining the operation of the present invention in a transient cycle of an inverter.

FIG. 2 is a waveform diagram for explaining the operation of the present invention in an inverter output cycle following the output cycle shown in FIG. 1;

FIG. 3 is a schematic diagram showing an embodiment of the ignition control circuit of the present invention .

[Explanation of symbols]

 Reference Signs List 10 output pole switching means 12 waveform pattern generation circuit 14 drive circuit 16 filter Z1 control signal generation circuit Z3 flip-flop circuit Z4 inverter Z5 AND gate Z6 first counter Z9 second counter Z11 transfer circuit Z13 storage circuit

Claims (6)

(57) [Scope of request for utility model registration] A pole switch ignition control circuit for controlling a pulse width modulation type inverter according to a reference pulse signal in response to a clock signal (CT) including a voltage pulse.
The reference pulse signal and the waveform pattern generation circuit (12) for generating (P), generates a control signal (CN) having a transition point for the pole switch of the inverter ON / OFF <br/> controlled signal generator a circuit (Z1), for measuring the control signal of selected <br/>-option by the switching delay time of the pole switches controlled in response to the transition point (D), the transition point
Before that occurs between the switching point of the pole switch from
A first counter for counting the number of voltage pulses of the serial clock signal (Z6), preceding inverter of the pole switches
A storage circuit for storing the number of voltage pulses of the thus counted to the first counter between the output cycle the clock signal (Z13), a voltage pulse of the click <br/> lock signal stored in the memory circuit Is set in advance so as to start counting from a number equal to the number of the reference pulse signals, and is connected to count the voltage pulse generated from a predetermined transition point of the reference pulse signal to a predetermined count. and a second counter (Z9), the control signal generation circuit so that generate other transition points in the control signal in response to Carry output pulse from the second counter, with the pole switch said reference An ignition control circuit activated after a predetermined time from the predetermined transition point of the pulse signal. Wherein the number of the stored voltage pulse pole switch selected, the selected pole switch then transferred to the ignited when a pole switch the second counter to be circuit (Z11 ignition control circuitry point of claim 1, characterized in that) are the result sent. Wherein said storage circuit is a shift register,
The transfer circuit includes a monostable multivibrator (Z1) connected to a shift input terminal of the shift register.
1) der ignition control circuit point according to claim 2, characterized in Rukoto. 4. The ignition control circuit according to claim 1, wherein said control signal generation circuit includes a flip-flop circuit. 5. The ignition control circuit according to claim 1, wherein only a complete clock voltage pulse is sent to said first counter. 6. A circuit for sending only a complete clock voltage pulse to said first counter, wherein an output terminal of said first counter is applied to said first counter.
And an AND gate (Z5) connected to the first counter of the two input terminals to receive a clock signal, a clock input terminal, and the two AND gate input terminals. A flip-flop circuit (Z3) having a Q output terminal connected to the second input terminal, an input terminal connected to receive a clock signal, and an output terminal connected to a clock input terminal of the flip-flop circuit. 6. The ignition control circuit according to claim 5, further comprising an inverter (Z4).