JPS6332034B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a control device for a voltage source inverter.

Although the output voltage waveform of a voltage source inverter inevitably includes harmonic components due to the configuration of the inverter, it is preferable to reduce these harmonic components as much as possible.

A method of improving the output voltage waveform by controlling the inverter itself is to perform commutation many times during a half cycle and modulate the pulse width of multiple rectangular pulses obtained by this, so-called pulse A width modulation (hereinafter referred to as PWM) method is common.

Among such PWM methods, the PWM method commonly used in the past compares the levels of the reference signal of the inverter output voltage with a triangular carrier wave, and turns on/off the switching elements of the inverter based on the magnitude relationship of either signal. (hereinafter referred to as ON,
There are some that perform PWM control (denoted as OFF). According to this method, any waveform can be pulse modulated.

On the other hand, in the case of an inverter that only requires the phase of the output voltage to change continuously, it is sufficient to repeatedly output the same PWM control signal waveform in order to output a voltage with a predetermined frequency and a predetermined amplitude. Focusing on this, read-only memory (hereinafter referred to as ROM)
There is a method to obtain a sine wave PWM waveform by using According to this method, the circuit configuration of the control device can be extremely simplified. A basic circuit example of a control system based on this method is shown in FIG.

In FIG. 1, transistor inverter 4
A frequency command signal (a value proportional to the frequency of the output voltage) consisting of a pulse train for instructing the frequency of the AC output voltage of the inverter 4 is input to the counter 1, and the count value is used as the switching electrical angle command signal (of the output pulses of the inverter 4). Hereinafter, it is output as θ (simply referred to as an electrical angle command signal). This electrical angle command signal θ is input to the ROM2. On the other hand, an amplitude command signal v for instructing the amplitude of the AC output voltage of the inverter 4 is input to the ROM 2 as a digital value.

In the ROM 2, an ON/OFF pattern (hereinafter referred to as a switching pattern) of the switching elements of the inverter 4 that is optimal for obtaining a desired output frequency from the inverter 4 is written. The upper address of ROM2 is specified by the amplitude command signal v,
The lower address is specified by the electrical angle command signal θ. Now, assuming that the amplitude command signal v and the frequency command signal are constant, the upper address of the ROM 2 is constant and only the lower address changes. That is, this is because the value of the electrical angle command signal θ increases each time the counter 1 counts the pulse train of the frequency command signal.

Here, the 0 bit of the output data of ROM2 is
Switching elements of inverter 4 shown in Fig. 2
This is a switching signal for UP, and when this signal is logic "0", the switching element UP is turned off, and when it is logic "1", it is turned on. Similarly, 1 bit is WN, 2 bits are VP, 3 bits are UN, 4 bits are WN, 2 bits are VP, 3 bits are UN, 4 bits are
The bit is a switching signal for WP and the 5th bit is a switching signal for VN.

When the electrical angle command signal θ changes, the ROM2 changes each switching element UP to WP, as shown in Figure 2.
The above switching signal (0
~5 bits). These switching signals are applied to an inverter 4 via a base drive circuit 3. When the amplitude command signal v changes, a switching signal having a pattern slightly different in duty cycle from the pattern shown in FIG. 2 is selected by the upper address of the ROM 2.

By storing switching patterns in the ROM 2 in this way, the control circuit can be made very simple.

However, according to the configuration shown in FIG. 1, the storage capacity of the ROM 2 needs to be extremely large in order to control the electrical angle and amplitude with high precision. For example, if we assign the upper 5 bits of the 11 address bits to the amplitude command signal v and the lower 6 bits to the electrical angle command signal θ in an 8-bit x 2048 word ROM, the voltage amplitude will be 1/32 (=3.12%). The electrical angle per bit is 360.
Every degree/64 (= 5.63 degrees). If you want to double the accuracy of electrical angle and voltage amplitude, you will need four times the storage capacity of the ROM. For this reason, in order to obtain sufficient precision in both electrical angle and voltage amplitude, the device becomes extremely expensive.

In addition, in an inverter, if the positive side and negative side switching elements of the same phase of the main circuit are always ON, the other is controlled so that it is OFF.
Also, if a switching pattern of 60 degrees is obtained, a signal can be obtained to control the 360 degree period of all phases using the output of the hexadecimal ring counter using a logic circuit. Although this can be hoped for, there are still limits and it cannot be a substantial improvement.

Therefore, an object of the present invention is to provide a control device that can perform highly accurate control without increasing the storage capacity of the ROM while taking advantage of the PWM control method using a switching pattern using a ROM.

The main feature of the present invention is that when obtaining a sine waveform of a desired amplitude from a DC power supply, the switching pattern itself for the switching element is not written in the ROM, but the address corresponding to the electrical angle to be switched in the output pulse is written. Each
Write fundamental wave amplitude value data of the equivalent sine wave of the inverter output voltage obtained as PWM output, read this written data using the electrical angle command signal, and compare the read amplitude value and the magnitude of the inverter output voltage. The difference is that the inverter is controlled using the comparison result as a PWM control signal.

The present invention will be described in detail below based on illustrated embodiments.

[Basic principle of the present invention]

The basic principle of the control device according to the invention is shown in FIG. However, in order to simplify the explanation, only one phase of the three-phase inverter is illustrated. FIG. 5 is an explanatory diagram of the operation.

In Fig. 4, a ROM (hereinafter simply referred to as ROM) 5 serving as a function generator receives an electrical angle command signal θ.
is input excluding the most significant bit θ _MSB . Based on the input electrical angle command signal θ, the ROM 5 outputs an output signal V _R (solid line) shown in FIG. 5a. That is, in the ROM 5, voltage values that should be the amplitude of the inverter output voltage (sine wave) are written at addresses corresponding to each value of the electrical angle command signal θ. For example, the value written to the ROM 5 shown in FIG. 5a is the equivalent sine wave AC voltage of the voltage obtained as the PWM output, as shown in FIG. 6a for three types of amplitude values as a specific example. Fundamental wave, that is, AC output voltage e ₁ with fundamental wave amplitude value E, AC output voltage e ₂ with fundamental wave amplitude value E2/3, or AC output voltage e ₃ with fundamental wave amplitude value E/3 and carrier wave (triangular wave). It can be determined from.

That is, in FIG. 6, when the amplitude value of the fundamental wave voltage of the inverter is E, the electrical angle to be switched is at the timing marked with a circle. Also, if the amplitude value is 2E/3, the electrical angle will be marked with △,
Further, when the amplitude value is E/3, the electrical angle position marked with a □ is the timing at which switching should be performed.

Therefore, the data corresponding to the amplitude value E is written to the address corresponding to the electrical angle marked with ○, and the amplitude value is written to the address corresponding to the electrical angle marked with △.
Data corresponding to 2E/3 is written, and data corresponding to the amplitude value E/3 is written to the address corresponding to the electrical angle marked □.

In this way, by writing a value corresponding to the amplitude value of the fundamental wave voltage (sine wave) to the address corresponding to the electrical angle to be switched corresponding to each amplitude value, the sixth Figure b will be obtained.

Note that the data written to the ROM 5 is not limited to the waveform shown in FIG. 6, and other appropriate waveforms can be used as the carrier wave.

In this way, the output signal v _R is output at a value corresponding to each electrical angle command signal θ. This output signal v _R is applied to one input terminal of the comparator 6.

The other input terminal of the comparator 6 receives an amplitude command signal v of the inverter output voltage (sine wave) which is provided separately. The amplitude command signal v takes a value in the range of 0 to _vM , as shown in FIG. 5a. If the amplitude command signal v is a high level signal v _H (dotted chain line),
The output voltage of the inverter becomes high, and if the amplitude command signal v is set to a low level signal v _L (dotted chain line), the output voltage of the inverter becomes low. That is, comparator 6
compares the output signal v _R of the ROM 5 and the amplitude command signal v, and outputs logic "0" when v _R ≧v, and outputs logic "1" when v _R <v. Here, the output waveform of comparator 6 is
The comparison between the output signal v _R and the amplitude command signal v in FIG. 5a is shown in FIGS. 5c and 5e, respectively. FIG. 5c shows the comparison output signal waveform when the amplitude command signal is a high level signal _vH . FIG. 5e shows the waveform for the low level amplitude command signal _vL .

The output signal of the comparator 6 is applied to one input terminal of an exclusive OR circuit (hereinafter referred to as an EX-OR circuit) 7. The other input terminal of the EX-OR circuit 7 receives the most significant bit signal θ _MSB of the electrical angle command signal θ. As shown in FIG. 5B, this most significant bit signal θ _MSB is logic "0" when the electrical angle command signal θ is in the period from 0 to 180 degrees, and becomes logic "1" in the period from 180 to 360 degrees. The output signal of the EX-OR circuit 7 is applied as a PWM control signal to the switching element UP-WP (Fig. 2) on the positive side of the inverter via the base drive circuit 8, while it is inverted by the NOT circuit 9. Based on
Through the drive circuit 8, the negative side driving element UN~
given to WN (Figure 2).

As a result, the output voltage (pulse) of the inverter has a waveform as shown in FIG. That is, FIG. 5d shows the inverter output voltage (pulse) waveform when the high level, high voltage amplitude command signal _vH is present. Figure 5 shows the low level voltage amplitude command signal v _L
It shows the inverter output voltage (pulse) waveform when . In the figure, the waveform indicated by the broken line indicates the fundamental wave of the equivalent sine wave AC voltage of the PWM output voltage.
As can be seen from the figure, the duty cycle is approximately 50% and the amplitude is smaller when the command signal is v _L than when the command signal is v _H.

The effects obtained by such a configuration are as follows. In other words, 8 bits x
When using 2048 words, amplitude control can be performed in steps of 1/256 of the maximum amplitude, and the electrical angle is 180/2048 degrees (≈0.088 degrees) per bit, resulting in extremely high precision.

In addition, in the conventional configuration, doubling the voltage adjustment accuracy requires doubling the ROM storage capacity, but according to the present invention, (N+1)/N times (N...
The storage capacity of the ROM (number of data bits) is sufficient.

In this way, while retaining the advantages of switching control using ROM, it is completely synchronous, the minimum interval of switching ON time and OFF time can be created in a pattern that takes into consideration the minimum interval, and these can be combined in a simple circuit configuration. It is possible to secure advantages such as being carried out at

[First Example] This example describes the present invention in a CVCF (Constant-
Voltage Constant-Frequency (constant voltage constant frequency) is applied to inverter control equipment. The configuration of the control device is shown in FIG.

First, CVCF is used as a power supply device for computers, etc., and is a device that always supplies a constant voltage at a constant frequency. Therefore, the voltage amplitude command to the control device of the CVCF is modified by the feedback signal of the detected value of the voltage applied to the load.

Next, the contents will be explained.For convenience of explanation, the block 10 indicated by a broken line in FIG. 7 is called an amplitude command signal generation circuit, and the same block 11 is called an electrical angle command signal generation circuit.

The amplitude command signal generation circuit 10 includes a voltage command device 1 that instructs the voltage (sine wave) that the inverter should output.
After the voltage reference signal given by 2 is corrected by a feedback signal detected from the load of the inverter, an amplitude command signal v is output. That is, the detected load phase voltage V _u ,
V _v and V _w (feedback signals) are input to the voltage detection circuit 13. It goes without saying that the load voltage is a sine wave voltage obtained by removing harmonic components from the pulse voltage of the inverter output by a filter.

The voltage detection circuit 13 adds three phases of the load voltage vectorwise, calculates the vector length of the voltage applied to the load, and outputs an actual load voltage signal. This actual load signal is sent to the voltage command unit 1 in the subtraction circuit 14.
The voltage reference signal from 2 is subtracted. This voltage reference signal indicates the vector length of the voltage to be output from the inverter. Therefore, subtraction circuit 1
The output signal at 4 represents the vector length deviation of the load voltage. This vector length deviation signal is transmitted to the control device 15.
After being amplified at , the signal is input to an adder 16 . In the adder circuit 16, the voltage reference signal and the deviation signal are added again. The output signal of the adder circuit 16 is converted into a digital signal by an A/D converter 17.
As a result, the converted digital signal is input to the comparator as the amplitude command signal v. Note that since the vector length of the voltage reference signal and the amplitude of the load voltage of each phase are in a proportional relationship, the digitized amplitude command signal v can be used as a common amplitude command signal for each phase voltage.

Next, in the electrical angle command signal generation circuit 11,
The output frequency 3 from the oscillator 18 is divided into 1/3 by the frequency dividing circuit 19. The output of the frequency dividing circuit 19 is a frequency pulse signal, which is counted by a counter 20. The count value is the electrical angle command signal θ
The reference signal is input to one input terminal of the adder circuit 21.

On the other hand, a phase shift circuit 22 is connected to the other input terminal of the adder circuit 21, and the electrical angle command signal θ is sent from the phase shift circuit 22 to the three input terminals of the inverter.
A shift signal is input that shifts the phase by 2/3·π (radian) in correspondence to each phase. That is, the phase shift circuit 22 is a switch circuit,
Shift value setters 23 _U and 23 are provided at the input terminals, respectively.
_V , 23 Shift value from _W 0 [rad], 2/3・π
[rad], 4/3・π [rad] are input. Then, the phase shift circuit 22 sequentially switches the shift value at a timing synchronized with the oscillation pulse signal from the oscillator 18. Therefore, the electrical angle command signal θ output from the adder circuit 21 is (θ)→(θ+2/
3・π)→(θ+4/3・π)→(θ), the phase is sequentially shifted by 2/3・π [rad], and the most significant bit θ is input to the ROM 25 with the _MSB removed. Specify the address corresponding to the phase difference between the U phase, V phase, and W phase of the inverter.

Next, based on the electrical angle command signal θ obtained in this manner, the ROM 25 outputs an output signal v _R (FIG. 5a) having a value written in the address corresponding to the instruction content.

The amplitude command signal v outputted from the amplitude command signal generation circuit 10 and the output signal v _R outputted from the ROM 25 are respectively input to the comparator 26. The comparator 26 compares the value of the amplitude command signal v and the value of the output signal v _R , and outputs logic "0" when v _R ≧v, and outputs logic "1" when v _R <v.

The output signal of the comparator 6 is input to one input terminal of the EX-OR circuit 27, and the most significant bit signal θ _MSB (see FIG. 5b) of the electrical angle command signal θ is input to the other input terminal. . The output signals of the EX-OR circuit 27 are applied to latch circuits 28 _U , 28 _V , and 28 _W , respectively.

The latch circuits 28 _U , 28 _V , 28 _W are EX-OR
This is for synchronizing the signal output from the circuit 27 with the phase shift by the shift circuit 22 and applying it to each phase of the inverter. That is, the latch circuits 28 _U , 28 _V , and 28 _W sequentially latch the output signal of the EX-OR circuit 27 every 2/3·π [rad] in response to a latch command signal from the switch circuit 24 .
As this latch command signal, a signal obtained by inverting the output pulse (frequency 3) from the oscillator 18 by the NOT circuit 30 is used. The switch circuit 24 operates in synchronization with the phase shift circuit 22, and sequentially operates 2/3, 2/3,
The latch command signal is switched every π [rad] to latch each of the latch circuits 28 _U , 28 _V , and 28 _W. Therefore, the phase shift circuit 22 is 0 [rad]
is selected, the latch circuit 28 _U is set by the switch circuit 24, and when 2/3・π [rad] is selected, the latch circuit 28 U is set to 28 _V.
However, when the power is 4/3·π [rad], the power is 28 _W , and so on, each latch circuit is sequentially scanned cyclically. To rewrite the latch circuit, the phase shift circuit 22 and the switch circuit 24 select a certain phase with a pulse of frequency 3, and after half a cycle of frequency 3, a latch command is sent to one of the latch circuits via the switch circuit 24. It is done by being given.

Each latch circuit 28 _U obtained in this way,
28 _V , 28 _W output signals are output from each phase of the inverter.
It is output as a PWM control signal to a base drive circuit (not shown). The latch circuit output signal is directly passed through the base drive circuit as a PWM control signal to the switching element U _p on the positive side of the inverter.
given to V _p and W _p . On the other hand, NOT circuit 29 _U ,
29 _V and 29 _W , is inverted via a base drive circuit, and is applied to negative side switching elements U _N , V _N , and W _N via the base drive circuit, respectively.

In this way, even if the power supply voltage fluctuates, even if the load voltage fluctuates due to the fluctuation, it is automatically corrected and controlled to always be equal to the voltage reference given by the voltage command unit 12.

[Second Embodiment] In this embodiment, the present invention is applied to V/F control of an induction motor. The configuration of the control device is shown in FIG. In addition, in FIG. 8, the same parts as in FIG.
The explanation will be omitted.

The feature of this embodiment is that it compensates for the decrease in internal magnetic flux when the induction motor starts to operate at low speed, so that it can be used up to a low speed range. In this embodiment, the difference from FIG. 7 is that the voltage reference (FIG. 7, amplitude command signal generation circuit 1
0) is given. The details will be explained below.

In FIG. 8, 31 indicates an output frequency command device of the inverter. Output frequency signal is V/F
The converter 32 converts the output frequency signal into a pulse signal with a frequency proportional to the voltage. The converted output frequency command pulse signal is input to the frequency dividing circuit 19, and thereafter, the electrical angle command signal θ is input to the ROM-A 37 in the same operation as shown in FIG.

On the other hand, the oscillator 33 generates pulses of extremely narrow width at regular intervals, and these pulses are given to the counter 34 and latch circuit 35 as timing pulse signals. That is, the latch circuit 35 is set at that point in time by the rise of this timing pulse signal. At this time, the counter 34 is constantly counting the output frequency command pulse signal from the V/F converter 32, and therefore the latch circuit 35
A count value of the output frequency command pulse signal counted during a certain period corresponding to the interval between timing pulse signals is set in . Furthermore, the counter 34 is set to NOT by the falling edge of the timing pulse signal.
It is reset via the circuit 36 and starts counting the output frequency command pulse signal again.

The value set in the latch circuit 35 is inputted to the ROM-B 39 with the upper few bits removed. This ROM-B39 has V/F of the induction motor.
A function is written therein, and an amplitude command signal v is output based on the value set in the latch circuit. This signal v is inputted from one input terminal of the comparator 40.

On the other hand, the signals of the higher order bits of the output signal of the latch circuit 35 are inputted to the ROM-A 37 via the pattern switching circuit 38 as a pattern switching signal. Here, the number of pulses in one cycle of the inverter output voltage is written in the ROM-A 37 divided into several patterns, each having a different number of pulses. This is because as the output frequency command of the inverter becomes lower, the number of output pulses of the inverter (in one cycle) needs to be increased, and the inverter generates pulses corresponding to the command frequency. Therefore, the ROM-A 37 outputs a pattern signal θ _p of the number of pulses corresponding to the output frequency specified by the upper few bits of the latch circuit output via the pattern switching circuit 38, and inputs it to the comparator 40. Note that this pulse number pattern may be of several types, and the output of ROM-A37 and the ROM-
By comparing the output of B39 in comparator 40, the inverter output voltage can be finely adjusted according to the output frequency.

Furthermore, if the pattern switching circuit 38 is gate logic, the operation will become unstable at frequencies corresponding to pattern switching points, so it is desirable to provide hysteresis characteristics by using a flip-flop.

As a result of the comparison by the comparator 40, the inverter is thereafter controlled in the same manner as in FIG. A V/F function is written in ROM-B39 so that as the input becomes smaller, the output gradually becomes larger than the input.
This compensates for the voltage drop due to impedance so that even when the induction motor is running at low speed, the internal magnetic flux is equal to the magnetic flux at high speed. Therefore, the induction motor can be used up to a low speed range.

As described above, according to the present invention, an inverter can be controlled with high precision while taking advantage of the PWM control method using a switching pattern using a ROM, and without increasing the storage capacity of the ROM.

[Brief explanation of drawings]

Fig. 1 is a block diagram showing a conventional voltage source inverter control device using ROM, Fig. 2 is a timing chart for explaining its operation, Fig. 3 is a circuit diagram of a voltage source transistor inverter, and Fig. 4 is a block diagram showing a voltage source inverter control device using a conventional ROM. A block diagram showing the basic principle of the control device according to the present invention, FIG. 5 is a timing chart for explaining its operation, FIG. 6 is a timing chart for explaining a specific example of the content written to the ROM, and FIG. 7 8 is a block diagram showing an embodiment in which the present invention is applied to a control device for a CFCV inverter, and FIG. 8 is a block diagram showing an embodiment in which the present invention is applied to a V/F control device for an induction motor. θ...Electrical angle command signal, v _R ...Function signal, v...
...Amplitude command signal, 4...Voltage type inverter, 5...
...ROM (function generator), 6...Comparator, 7...
EX-OR, 8...Base drive circuit, 10...
... Amplitude command signal generation circuit, 11 ... Electrical angle command signal generation circuit, 25 ... ROM (function generator), 26
...Comparator, 37...ROM-A, 39...
ROM-B, 40... Comparator.

Claims (1)

[Claims] 1. In a control device for a voltage source inverter that controls a voltage source inverter using pulse width modulation, when changing the AC output voltage of the inverter using pulse width modulation control, switching electricity according to the AC output voltage with different fundamental wave amplitude values is used. A ROM in which the fundamental wave amplitude value is written in a data area at an address corresponding to each corner, and a value of the ROM read in response to an electrical angle command signal corresponds to the magnitude of the AC output voltage of the inverter. A control device for a voltage source inverter, comprising: comparison means for comparing the pulse width modulation control signal with a desired level to output a pulse width modulation control signal for the voltage source inverter.