JP2517717Y2 - Multilayer wiring board - Google Patents
Multilayer wiring boardInfo
- Publication number
- JP2517717Y2 JP2517717Y2 JP1990112429U JP11242990U JP2517717Y2 JP 2517717 Y2 JP2517717 Y2 JP 2517717Y2 JP 1990112429 U JP1990112429 U JP 1990112429U JP 11242990 U JP11242990 U JP 11242990U JP 2517717 Y2 JP2517717 Y2 JP 2517717Y2
- Authority
- JP
- Japan
- Prior art keywords
- film conductor
- layer
- wiring board
- thin film
- multilayer wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Description
【考案の詳細な説明】 〔産業上の利用分野〕 本考案は、大型コンピュータ等に用いられる電子回路
を構成する多層配線基板に関し、特に多層配線基板のコ
ネクタ端子の多層構造に関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial application] The present invention relates to a multilayer wiring board that constitutes an electronic circuit used in a large computer or the like, and more particularly to a multilayer structure of connector terminals of the multilayer wiring board.
従来、この種の多層配線基板のコネクタ端子構造は、
厚膜導体ペーストの焼結により形成するコネクタ端子、
またはスパッタ金属薄膜上に硬質金めっきを施して形成
するコネクタ端子構造がある。Conventionally, the connector terminal structure of this type of multilayer wiring board is
Connector terminals formed by sintering thick film conductor paste,
Alternatively, there is a connector terminal structure formed by applying hard gold plating on a sputtered metal thin film.
第２図は、厚膜導体ペーストの焼結により形成した従
来の多層配線基板のコネクタ端子である。セラミック基
板１上に内部配線６を持つガラス系誘電体層２の上に厚
膜導体層３によるコネクタ端子を形成していた。FIG. 2 shows a connector terminal of a conventional multilayer wiring board formed by sintering a thick film conductor paste. The connector terminal is formed by the thick film conductor layer 3 on the glass-based dielectric layer 2 having the internal wiring 6 on the ceramic substrate 1.
また、第３図は、スパッタ金属薄膜上に硬質金めっき
を施してコネクタ端子を形成した従来の多層配線基板の
コネクタである。セラミック基板１上に内部配線６を持
つガラス系誘電体層２の上にスパッタ金属薄膜４を下地
膜にし、硬質めっきによる薄膜導体層５を形成してい
た。FIG. 3 shows a conventional multi-layer wiring board connector in which hard gold plating is applied on a sputtered metal thin film to form connector terminals. The sputtered metal thin film 4 is used as a base film on the glass-based dielectric layer 2 having the internal wiring 6 on the ceramic substrate 1 to form the thin film conductor layer 5 by hard plating.
上述した厚膜導体ペーストの焼結により形成したコネ
クタ端子は、焼結膜自体の硬度が低く、要求される耐コ
ネクタ特性が悪い欠点がある。The connector terminal formed by sintering the above-mentioned thick film conductor paste has the drawback that the hardness of the sintered film itself is low and the required connector resistance is poor.
また、下地にスパッタ金属薄膜を持つ硬質金めっきに
より形成したコネクタ端子は、下層がガラス系誘電体層
がある事から、表面粗さが小さくめっき膜の接触強度が
弱く、コネクタボードに実装した際にコネクタ接触によ
り衝撃を受け膜が剥離してしまうという欠点がある。In addition, the connector terminal formed by hard gold plating with a sputtered metal thin film as the base has a glass-based dielectric layer as the lower layer, so the surface roughness is small and the contact strength of the plating film is weak. In addition, there is a drawback in that the film is peeled off when the connector comes into contact with it.
本考案の多層配線基板は、薄膜導体層の上層と、基板
に形成されたガラス系誘電体層上のガラスフリットを含
む厚膜導体ペーストを焼結した厚膜導体層の下層とを有
するコネクタ端子とを含んで構成される。A multilayer wiring board of the present invention has a connector terminal having an upper layer of a thin film conductor layer and a lower layer of a thick film conductor layer obtained by sintering a thick film conductor paste containing glass frit on a glass-based dielectric layer formed on the substrate. It is configured to include and.
次に、本考案について図面を参照して説明する。 Next, the present invention will be described with reference to the drawings.
第１図は、本考案の一実施例の縦断面図である。セラ
ミック基板１上に形成された内部配線６を持つガラス系
誘電体層２にガラスフリットを含む厚膜導体ペーストを
スクリーン印刷した後に焼結させ、厚膜導体層３を形成
する。厚膜導体層３の上層にスパッタ金属薄膜４をめっ
き下地として蒸着し、選択的に硬質めっきにて薄膜導体
層５を形成する。FIG. 1 is a vertical sectional view of an embodiment of the present invention. A thick film conductor paste containing glass frit is screen-printed on the glass-based dielectric layer 2 having the internal wiring 6 formed on the ceramic substrate 1 and then sintered to form the thick film conductor layer 3. The sputtered metal thin film 4 is deposited on the thick film conductor layer 3 as a plating base, and the thin film conductor layer 5 is selectively formed by hard plating.
以上説明した様に本考案は、コネクタ端子が厚膜導体
層と薄膜導体層から構成されている。このことにより、
下層である厚膜導体層は、材料としてガラスフリットを
含む厚膜導体ペーストの焼結体であるため焼結の過程で
ガラス系誘導体層のガラス成分と溶融しコネクタ端子の
接着力強化が得られる。また、上層である薄膜導体層
は、下層が表面粗さの大きい厚膜導体層であるうえ、金
属膜同志の接合であるので強固な接着特性が得られる。
また硬質メッキにより形成する薄膜導体層の特性である
膜硬度が強いため、コネクタボードに実装した際に耐コ
ネクタ性が強いコネクタ端子が得られる。As described above, in the present invention, the connector terminal is composed of the thick film conductor layer and the thin film conductor layer. By this,
The lower thick-film conductor layer is a sintered body of thick-film conductor paste containing glass frit as a material, so it melts with the glass component of the glass-based derivative layer during the sintering process, and strengthens the adhesive strength of the connector terminal. . Further, the thin film conductor layer as the upper layer is a thick film conductor layer having a large surface roughness in the lower layer, and since it is a joint of metal films, a strong adhesive property can be obtained.
Further, since the film hardness, which is a characteristic of the thin film conductor layer formed by hard plating, is strong, a connector terminal having strong connector resistance when mounted on a connector board can be obtained.
第１図は本考案の一実施例である多層配線基板の断面
図、第２図は厚膜導体ペーストを焼結しコネクタ端子を
形成した従来の多層配線基板の断面図、第３図はスパッ
タ金属薄膜を下地とし硬質めっきによりコネクタ端子を
形成した従来の多層配線基板の断面図である。 １……セラミック基板、２……ガラス系誘導体層、３…
…厚膜導体層、４……スパッタ金属薄膜、５……薄膜導
体層、６……内部配線。FIG. 1 is a sectional view of a multilayer wiring board according to an embodiment of the present invention, FIG. 2 is a sectional view of a conventional multilayer wiring board in which a thick film conductor paste is sintered to form connector terminals, and FIG. 3 is a sputter. It is sectional drawing of the conventional multilayer wiring board which formed the connector terminal by hard plating using a metal thin film as a base. 1 ... Ceramic substrate, 2 ... Glass-based dielectric layer, 3 ...
... Thick film conductor layer, 4 ... Sputtered metal thin film, 5 ... Thin film conductor layer, 6 ... Internal wiring.
Claims (1)
ラス系誘電体層上のガラスフリットを含む厚膜導体ペー
スとを焼結した厚膜導体層の下層とを有するコネクタ端
子とを含むことを特徴とする多層配線基板。1. A connector terminal having an upper layer of a thin film conductor layer and a lower layer of a thick film conductor layer obtained by sintering a thick film conductor pace containing a glass frit on a glass-based dielectric layer formed on a substrate. A multi-layer wiring board comprising:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990112429U JP2517717Y2 (en) | 1990-10-25 | 1990-10-25 | Multilayer wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990112429U JP2517717Y2 (en) | 1990-10-25 | 1990-10-25 | Multilayer wiring board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0468583U JPH0468583U (en) | 1992-06-17 |
| JP2517717Y2 true JP2517717Y2 (en) | 1996-11-20 |
Family
ID=31859933
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1990112429U Expired - Lifetime JP2517717Y2 (en) | 1990-10-25 | 1990-10-25 | Multilayer wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2517717Y2 (en) |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5001605A (en) * | 1988-11-30 | 1991-03-19 | Hughes Aircraft Company | Multilayer printed wiring board with single layer vias |
-
1990
- 1990-10-25 JP JP1990112429U patent/JP2517717Y2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0468583U (en) | 1992-06-17 |
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