JP2513416B2 - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JP2513416B2
JP2513416B2 JP5163049A JP16304993A JP2513416B2 JP 2513416 B2 JP2513416 B2 JP 2513416B2 JP 5163049 A JP5163049 A JP 5163049A JP 16304993 A JP16304993 A JP 16304993A JP 2513416 B2 JP2513416 B2 JP 2513416B2
Authority
JP
Japan
Prior art keywords
semiconductor chip
semiconductor device
resin
hole
periphery
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP5163049A
Other languages
Japanese (ja)
Other versions
JPH0722464A (en
Inventor
健二 菅原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP5163049A priority Critical patent/JP2513416B2/en
Publication of JPH0722464A publication Critical patent/JPH0722464A/en
Application granted granted Critical
Publication of JP2513416B2 publication Critical patent/JP2513416B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/50Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はTAB(Tape Au
tomated Bonding)方式の半導体装置に
関し、特に回路配線板にはんだリフローにより実装でき
る構造をもつ半導体装置に関する。
The present invention relates to a TAB (Tape Au).
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device of a tomated bonding type, and particularly to a semiconductor device having a structure that can be mounted on a circuit wiring board by solder reflow.

【0002】[0002]

【従来の技術】従来、このはんだリフローにより回路配
線板に実装可能なTAB方式の半導体装置は、半導体ウ
ェハから切断された状態の半導体チップをTABテープ
の樹脂シートの穴に挿入し、穴の周縁よる外方に伸びる
リードの一端とこのリードに対応する半導体チップの周
縁にあるバンプ形状の電極パッドと接続し、この樹脂シ
ートにリードを介して搭載された半導体チップをケース
に収容し、ケースの外側に導出される外部端子とリード
とを接続した構造であった。
2. Description of the Related Art Conventionally, in a TAB type semiconductor device which can be mounted on a circuit wiring board by this solder reflow, a semiconductor chip cut from a semiconductor wafer is inserted into a hole of a resin sheet of a TAB tape, and a peripheral edge of the hole is formed. Therefore, one end of the lead extending outward is connected to the bump-shaped electrode pad on the periphery of the semiconductor chip corresponding to this lead, and the semiconductor chip mounted on this resin sheet via the lead is housed in the case. It was a structure in which an external terminal led out to the outside and a lead were connected.

【0003】図3は従来の一例を示す半導体装置の断面
図である。この種の半導体装置はその一例として特開昭
63−87730号公報に開示されている。この半導体
装置は、図3に示すように、ケース2に載置された半導
体チップである電子部品1にTABテープから切断成形
されたリードフレーム4の一端を接続し、リードフレー
ム4の他端をケース2外に引き出しケース2の底部にあ
る外部端子6とはんだ7で接続した構造である。また、
ケース2の開口部はキャップ3で閉じ封止用樹脂5で固
定されている。
FIG. 3 is a sectional view of a conventional semiconductor device. This type of semiconductor device is disclosed in, for example, Japanese Patent Laid-Open No. 63-87730. In this semiconductor device, as shown in FIG. 3, one end of a lead frame 4 cut and molded from a TAB tape is connected to an electronic component 1 which is a semiconductor chip placed on a case 2, and the other end of the lead frame 4 is connected. This is a structure in which the external terminal 6 at the bottom of the drawer case 2 is connected to the outside of the case 2 with a solder 7. Also,
The opening of the case 2 is closed with a cap 3 and fixed with a sealing resin 5.

【0004】この半導体装置は、セラミックスなどの内
層配線されたケースの代りに配線のないケース2に電子
部品1を収納し、ケース自体の価格を下げるとともに接
続個所を少なくし組立工数の低減を図ったものであっ
た。
In this semiconductor device, an electronic component 1 is housed in a case 2 having no wiring instead of a case in which inner layers are made of ceramics, etc., thereby reducing the price of the case itself and reducing the number of connection points to reduce the number of assembling steps. It was a thing.

【0005】[0005]

【発明が解決しようとする課題】しかしながら上述した
従来の半導体装置では、ケースに内層配線がなく接続個
所が少なくなるものの、ケースの底部に外部端子を形成
する工程とこの外部端子とTABテープより剥したり、
リードフレームと外部端子とを接続する工程とが必要と
なる。また、上記半導体装置はキャップとケースとで半
導体チップである電子部品を閉鎖する空間を形成するこ
とから半導体チップの表面に空間の水分が付着したり、
あるいはキャップを固定する封止用樹脂とケースとの界
面を通して水分が浸入し、半導体チップの表面に露呈す
る電極パッドなどに腐食をもたらし信頼性を著しく阻害
する問題を含む。
However, in the above-mentioned conventional semiconductor device, although the case has no inner layer wiring and the number of connection points is small, the step of forming the external terminal on the bottom of the case and the step of peeling the external terminal from the TAB tape are performed. Or
A step of connecting the lead frame and the external terminal is required. Further, in the semiconductor device, the cap and the case form a space that closes the electronic component that is the semiconductor chip, so that moisture in the space may adhere to the surface of the semiconductor chip,
Alternatively, there is a problem in that moisture enters through the interface between the sealing resin for fixing the cap and the case, corrodes the electrode pads exposed on the surface of the semiconductor chip, and significantly impairs reliability.

【0006】従って、本発明の目的はより安価で信頼性
の高いTAB方式の半導体装置を提供することにある。
Therefore, an object of the present invention is to provide a cheaper and more reliable TAB semiconductor device.

【0007】[0007]

【課題を解決するための手段】本発明の特徴は、一主面
に集積回路が形成され周縁に複数の電極パッドを有する
半導体チップと、この半導体チップを挿入する第1の
とこの第1の穴の周縁より外方に伸びる複数の導電部材
とが形成されるとともに該導電部材の一端と前記電極パ
ッドと接続して該半導体チップを保持する薄板状樹脂部
材と、この薄板状樹脂部材に保持される前記半導体チッ
プの該一主面のみ覆う樹脂被膜部材と、該一主面が該樹
脂被膜部材で覆われた前記半導体チップの周縁を囲み挿
入しかつ該半導体チップの裏面を露呈する第2の穴を有
するとともに前記薄板状樹脂部材が表上面および側面な
らびに裏面に亘って被着され前記導電部材の他端を該裏
面に露呈する絶縁板部材とを備える半導体装置である。
A feature of the present invention is that a semiconductor chip having an integrated circuit formed on one main surface and a plurality of electrode pads on the periphery, a first hole into which the semiconductor chip is inserted, and the first hole . And a thin plate-shaped resin member for holding the semiconductor chip by connecting one end of the conductive member and the electrode pad with each other, and a plurality of conductive members extending outwardly from the periphery of the hole. a resin coating member covering only said one main surface of the semiconductor chip held, peripheral a circumference seen interpolation of the semiconductor chip in which the one main surface is covered with the resin coating member
Has a second hole that is inserted and exposes the back surface of the semiconductor chip.
In addition, the thin plate resin member is attached to the front and upper surfaces, the side surfaces, and the back surface, and the insulating plate member exposes the other end of the conductive member to the back surface.

【0008】[0008]

【実施例】次に本発明について図面を参照して説明す
る。
The present invention will be described below with reference to the drawings.

【0009】図1(a)および(b)は本発明の一実施
例を示す半導体装置の平面図およびAA断面図である。
この半導体装置は、図1に示すように、一主面に集積回
路が形成され周縁に電極パッドであるバンプ11の複数
個をもつ半導体チップ1aと、この半導体チップ1aを
挿入する穴とこの穴の周縁より外方に伸びる複数のリー
ド9とが形成されるとともにこのリード9の一端とバン
プ11と接続して半導体チップ1aを保持する樹脂シー
ト10と、この樹脂シート10に保持される半導体チッ
プ1aの回路形成面を覆う樹脂被膜部材12と、樹脂被
膜部材12に覆われた半導体チップ1aを囲み表面およ
び側面ならびに裏面に亘って樹脂シート10で覆われる
ように被着されリード9の他端である端子部9aを裏面
に露呈する絶縁板8とを備えている。
1A and 1B are a plan view and a sectional view taken along line AA of a semiconductor device showing an embodiment of the present invention.
In this semiconductor device, as shown in FIG. 1, a semiconductor chip 1a having an integrated circuit formed on one main surface and a plurality of bumps 11 which are electrode pads on the periphery, a hole into which this semiconductor chip 1a is inserted, and this hole A plurality of leads 9 extending outwardly from the peripheral edge of the resin sheet 10 and connecting one end of the leads 9 to the bump 11 to hold the semiconductor chip 1a; and a semiconductor chip held by the resin sheet 10. The resin coating member 12 that covers the circuit forming surface of the resin layer 1a and the other end of the lead 9 that is attached so as to surround the semiconductor chip 1a that is covered with the resin coating member 12 so as to be covered with the resin sheet 10 over the front surface, the side surface, and the back surface. And the insulating plate 8 exposing the terminal portion 9a on the back surface.

【0010】ここで、絶縁板8は半導体チップ1aから
発生する熱を放熱させる機能をもたせるために熱伝導度
の高い窒化アルミナセラミックス材を使用している。し
かし大型の場合は、価格の点を考慮すると、むしろ熱伝
導度の高いアルミニュウムなどの金属に熱伝導度の優れ
た電気絶縁材を塗布したものを用いた方が得策である。
また、樹脂シート10およびそれに被着されるリード9
は、通常のホリイミド樹脂テープにリード部材を被着す
るTABテープを使用している。そして、必要に応じて
絶縁板8と熱圧着するための両面接着テープをTABテ
ープの被着面に貼付ける。なお、この接着テープを貼付
ける工程を省略したい場合は、TABテープ自身に接着
機能をもたせた熱硬化樹脂材と絶縁板の代りに高伝熱度
の金属板を用い直接貼付けて接着と絶縁処理とを同時に
行なった方が、組立工数と資材費の低減の観点から有利
である。
Here, the insulating plate 8 uses an alumina nitride ceramic material having high thermal conductivity in order to have a function of radiating heat generated from the semiconductor chip 1a. However, in the case of a large size, considering the price, it is better to use a metal such as aluminum having a high thermal conductivity coated with an electrically insulating material having a high thermal conductivity.
In addition, the resin sheet 10 and the leads 9 attached to the resin sheet 10
Uses a TAB tape in which a lead member is attached to an ordinary polyimide resin tape. Then, if necessary, a double-sided adhesive tape for thermocompression bonding with the insulating plate 8 is attached to the adhered surface of the TAB tape. If you want to omit the step of attaching this adhesive tape, use a thermosetting resin material that has an adhesive function on the TAB tape itself and a metal plate with high heat conductivity instead of the insulating plate to directly attach and perform the adhesion and insulation treatment. It is more advantageous to carry out the above at the same time from the viewpoint of reducing the number of assembly steps and material costs.

【0011】図2(a)〜(d)は図1の半導体装置の
組立順に示す断面図である。次に、上述した半導体装置
の構造を理解し易いように組立順に従って説明する。ま
ず、図2(a)に示すように、樹脂シート10にリード
9が貼付けられたTABテープを準備する。次に、図2
(b)に示すように、ボンディング装置のステージに位
置決めされた半導体チップ1aにTABテープの穴13
に合せる。そしてサーマツールでリード9をバンプ11
に押し付け接続する。次に、樹脂ポッティング装置に半
導体チップ1aを保持するTABテープを送り、図2
(c)に示すように、ノズルよりフィラー入りエポキシ
樹脂を滴下し樹脂被覆部材12で半導体チップを被せ
る。このとき、TABテープを所要の長さに切断する。
次に、図2(d)に示すように、内径固定保持具に保持
された絶縁板8の上に載置された所要長さに切断された
TABテープは、内径固定保持具の周囲に配置された加
熱された工具で絶縁板8の上面、側面および裏面に樹脂
シート10を押付け仮接着する。そして、このように仮
組立みされた半導体装置をキュア炉に入れ、樹脂材12
および樹脂シート10を接着材を硬化させ組立を完了す
る。
2A to 2D are sectional views showing the semiconductor device of FIG. 1 in the order of assembling. Next, in order to facilitate understanding of the structure of the above-described semiconductor device, description will be given in the order of assembling. First, as shown in FIG. 2A, a TAB tape having leads 9 attached to a resin sheet 10 is prepared. Next, FIG.
As shown in (b), the holes 13 of the TAB tape are formed in the semiconductor chip 1a positioned on the stage of the bonding apparatus.
According to. Then, using a therma tool, bump the lead 9 to the bump 11.
Press to connect. Next, the TAB tape holding the semiconductor chip 1a is fed to the resin potting device,
As shown in (c), epoxy resin containing a filler is dropped from a nozzle to cover the semiconductor chip with the resin coating member 12. At this time, the TAB tape is cut into a required length.
Next, as shown in FIG. 2D, the TAB tape cut on the insulating plate 8 held by the inner diameter fixing holder and cut to a required length is arranged around the inner diameter fixing holder. The resin sheet 10 is pressed and temporarily adhered to the upper surface, the side surface, and the back surface of the insulating plate 8 with the heated tool. Then, the semiconductor device temporarily assembled in this way is put into a curing furnace, and the resin material 12
Then, the resin sheet 10 is cured of the adhesive to complete the assembly.

【0012】[0012]

【発明の効果】以上説明したように本発明は、半導体チ
ップを保持するTABテープを該半導体チップを囲む絶
縁板の外周面に巻き付けるように被着し、TABテープ
のリードの一端を絶縁板の裏面に露呈させ外部端子にす
ることによって、従来のように予め絶縁板に外部端子を
設ける必要はなくなるとともにTABテープから部分的
に絶縁シートを剥したりする工程も無くなる。また、半
導体チップの回路形成面を樹脂被覆部材で覆うことによ
り従来のような半導体チップを閉鎖空間で収納するケー
スが不要になるだけではなく水分を含む閉鎖空間も無く
なる。従って、本発明によれば、資材費および工数を低
減しより安価でより信頼性の高いTAB方式の半導体装
置が得られるという効果がある。
As described above, according to the present invention, the TAB tape for holding the semiconductor chip is attached so as to be wound around the outer peripheral surface of the insulating plate surrounding the semiconductor chip, and one end of the lead of the TAB tape is attached to the insulating plate. By exposing the external terminals to the back surface to form the external terminals, it is not necessary to previously provide the external terminals on the insulating plate as in the conventional case, and the step of partially peeling the insulating sheet from the TAB tape is also eliminated. Further, by covering the circuit forming surface of the semiconductor chip with the resin coating member, not only the conventional case for housing the semiconductor chip in the closed space becomes unnecessary, but also the closed space containing water disappears. Therefore, according to the present invention, there is an effect that a material cost and man-hours can be reduced, and a cheaper and more reliable TAB semiconductor device can be obtained.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例を示す半導体装置の平面図お
よびAA断面図である。
FIG. 1 is a plan view and a sectional view taken along line AA of a semiconductor device showing an embodiment of the present invention.

【図2】図1の半導体装置の組立順に示す断面図であ
る。
2 is a cross-sectional view showing the semiconductor device of FIG. 1 in the assembling order.

【図3】従来の一例を示す半導体装置の断面図である。FIG. 3 is a sectional view of a conventional semiconductor device.

【符号の説明】[Explanation of symbols]

1 電子部品 1a 半導体チップ 2 ケース 3 キャップ 4 リードフレーム 5 封止用樹脂 6 外部端子 7 はんだ 8 絶縁板 9 リード 9a 端子部 10 樹脂シート 11 バンプ 12 樹脂被膜部材 DESCRIPTION OF SYMBOLS 1 Electronic component 1a Semiconductor chip 2 Case 3 Cap 4 Lead frame 5 Sealing resin 6 External terminal 7 Solder 8 Insulating plate 9 Lead 9a Terminal part 10 Resin sheet 11 Bump 12 Resin coating member

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 一主面に集積回路が形成され周縁に複数
の電極パッドを有する半導体チップと、この半導体チッ
プを挿入する第1の穴とこの第1の穴の周縁より外方に
伸びる複数の導電部材とが形成されるとともに該導電部
材の一端と前記電極パッドと接続して該半導体チップを
保持する薄板状樹脂部材と、この薄板状樹脂部材に保持
される前記半導体チップの該一主面のみ覆う樹脂被膜部
材と、該一主面が該樹脂被膜部材で覆われた前記半導体
チップの周縁を囲み挿入しかつ該半導体チップの裏面を
露呈する第2の穴を有するとともに前記薄板状樹脂部材
が表上面および側面ならびに裏面に亘って被着され前記
導電部材の他端を該裏面に露呈する絶縁板部材とを備え
ることを特徴とする半導体装置。
1. A semiconductor chip having an integrated circuit formed on one main surface and having a plurality of electrode pads on the periphery, a first hole into which the semiconductor chip is inserted, and a plurality of holes extending outward from the periphery of the first hole. A thin plate-shaped resin member for holding the semiconductor chip by connecting one end of the conductive member to the electrode pad, and the main part of the semiconductor chip held by the thin plate-shaped resin member. a resin coating member which covers the surface only, the one major surface to the periphery of the insertion enclose the semiconductor chip covered with the resin coating member and the back surface of the semiconductor chip
An insulating plate member having a second hole to be exposed and being covered with the thin plate-shaped resin member over a front surface, a side surface and a back surface, and exposing the other end of the conductive member to the back surface. Semiconductor device.
【請求項2】 前記絶縁板部材は表面が電気絶縁処理さ
れた金属板であることを特徴とする請求項1記載の半導
体装置。
2. The semiconductor device according to claim 1, wherein the insulating plate member is a metal plate whose surface is electrically insulated.
JP5163049A 1993-07-01 1993-07-01 Semiconductor device Expired - Lifetime JP2513416B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5163049A JP2513416B2 (en) 1993-07-01 1993-07-01 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5163049A JP2513416B2 (en) 1993-07-01 1993-07-01 Semiconductor device

Publications (2)

Publication Number Publication Date
JPH0722464A JPH0722464A (en) 1995-01-24
JP2513416B2 true JP2513416B2 (en) 1996-07-03

Family

ID=15766207

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5163049A Expired - Lifetime JP2513416B2 (en) 1993-07-01 1993-07-01 Semiconductor device

Country Status (1)

Country Link
JP (1) JP2513416B2 (en)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04239754A (en) * 1991-01-23 1992-08-27 Ibiden Co Ltd Electronic component package using film base material

Also Published As

Publication number Publication date
JPH0722464A (en) 1995-01-24

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Effective date: 19960312