CN112312678A - Structure and method of non-packaged chip direct-buried printed circuit board and chip packaging structure - Google Patents

Structure and method of non-packaged chip direct-buried printed circuit board and chip packaging structure Download PDF

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Publication number
CN112312678A
CN112312678A CN201910936408.2A CN201910936408A CN112312678A CN 112312678 A CN112312678 A CN 112312678A CN 201910936408 A CN201910936408 A CN 201910936408A CN 112312678 A CN112312678 A CN 112312678A
Authority
CN
China
Prior art keywords
printed circuit
circuit board
chip
packaged chip
packaged
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201910936408.2A
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Chinese (zh)
Inventor
湛伟
丛伟林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Chengdu Sino Microelectronics Technology Co ltd
Original Assignee
Chengdu Sino Microelectronics Technology Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chengdu Sino Microelectronics Technology Co ltd filed Critical Chengdu Sino Microelectronics Technology Co ltd
Priority to CN201910936408.2A priority Critical patent/CN112312678A/en
Publication of CN112312678A publication Critical patent/CN112312678A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit

Abstract

The invention belongs to the field of printed circuit board manufacturing and semiconductor chips. The invention aims to reduce the size of a chip bare chip after being connected with a printed circuit board and solve the problems of chip bare chip packaging and electronic equipment printed circuit board design and manufacture under the highly limited condition. The invention provides a structure of a non-packaged chip direct-buried printed circuit board, which comprises a non-packaged chip and a printed circuit board, wherein a hole for accommodating the non-packaged chip is formed in the printed circuit board, a bonding pad of a wiring layer of the printed circuit board is arranged in the hole, the bonding pad of the non-packaged chip is welded with a bonding pad in a corresponding hole, and insulating glue is filled in a gap between the non-packaged chip and the printed circuit board and covers the non-packaged chip. The invention reduces the height of the device, and is suitable for scenes with strict limitation on the height of the device in the package and the height of the printed circuit board. The circuit has high reliability and low cost, and can reduce the volume of the integrated circuit.

Description

Structure and method of non-packaged chip direct-buried printed circuit board and chip packaging structure
Technical Field
The invention belongs to two fields of printed circuit board manufacturing and semiconductor chip packaging, in particular to a structure and a method for directly embedding a non-packaged chip (bare chip) in a printed circuit board and a chip packaging structure.
Background
The current chip is generally welded to a printed circuit board after being packaged, brings adverse effects to the height and the flatness of the printed circuit board, and is inconvenient to use in the field with strict requirements on the height and the flatness of the structure.
Common package housings for chip dies are ceramic, plastic, metal, etc. The shell plays roles of protecting the chip, dissipating heat and the like. As is conventional. The packaged chip die has a single piece, and also has multiple pieces. A monolithically packaged chip die needs to be routed through the package substrate outside the die to the bond pads as shown in fig. 1. The multiple packaged chip dies can be connected through an internal substrate and then soldered on the package substrate, as shown in fig. 2, there are also methods of direct connection on the package substrate and gold wire bonding. However, the package housing has a limitation on the height of the device on the package substrate, and in addition, the housing also increases the size and height of the chip device, which affects the application of the chip in a scene with strict size limitation.
The non-packaged Chip (die) is used in a manner of attaching the surface of the non-packaged Chip to the printed circuit Board and fixing the Chip with glue, such as a Chip On Board (COB) package, which is commonly called "cow dung package" or "cow dung Chip"), as shown in fig. 3, the COB package is to connect the Chip die to the printed circuit Board through a metal bonding wire and then to drop a thermal glue. Because the surface is pasted on the printed circuit board and the hot glue is dripped, the thickness of the circuit board is increased by the method, in addition, because the metal bonding wire is adopted, the glue with enough thickness is required to protect the bonding wire, and the size after packaging is also increased.
Disclosure of Invention
In view of the above, the present invention is to reduce the size of a chip die after being connected to a printed circuit board, so as to solve the problems of chip die package and printed circuit board design and manufacture of electronic devices under height-limited conditions.
In order to achieve the above object, the present invention provides a structure of a non-packaged chip directly-buried printed circuit board, which is characterized by comprising a non-packaged chip and a printed circuit board, wherein a hole for accommodating the non-packaged chip is formed in the printed circuit board, a pad of a wiring layer of the printed circuit board is arranged in the hole, the pad of the non-packaged chip is welded with a pad in a corresponding hole, and an insulating adhesive fills a gap between the non-packaged chip and the printed circuit board and covers the non-packaged chip.
The invention also provides a method for directly burying the printed circuit board without the packaged chip, which comprises the following steps:
step 1: according to the size of the non-packaged chip, a hole capable of accommodating the non-packaged chip is designed during printed circuit design, and a bonding pad of a routing layer corresponding to the bonding pad of the non-packaged chip is arranged in the hole;
step 2: manufacturing a designed printed circuit board;
and step 3: welding a bonding pad of a non-packaged chip with a corresponding bonding pad in the hole;
and 4, step 4: and filling a gap between the non-packaged chip and the printed circuit board with insulating glue, and covering the non-packaged chip.
The invention also provides a chip packaging structure, wherein the non-packaged chip and the packaging substrate in the packaging structure adopt the structure of the non-packaged chip direct-buried printed circuit board.
Has the advantages that:
the invention reduces the height of the device, can be applied to a substrate packaged by a polycrystalline circle, and is suitable for scenes with strict limitation on the height of the device in the package; the method can also be applied to electronic equipment such as mobile phones, wearable equipment and sensors, and is suitable for scenes with strict limitation on the height of the printed circuit board. The invention increases reliability, reduces cost, can save gold wire bonding, and avoids packaging problems caused by gold wire bonding. The invention can reduce the volume of the chip and the printed circuit board, thereby reducing the volume of the whole product.
Drawings
FIG. 1 is a diagram of a single chip die package structure;
FIG. 2 is a diagram of a multi-chip die package structure;
FIG. 3 is a view showing a structure in which a COB packaged chip is attached to a printed circuit board;
FIG. 4 is a schematic diagram of a non-packaged chip direct-mount PCB according to an embodiment of the present invention; the drawing (a) is a bottom view of the non-packaged chip, (b) is a top view of the printed circuit board, and (c) is a cross-sectional view of the printed circuit board after the non-packaged chip is mounted thereon.
Fig. 5 is a schematic structural diagram of another embodiment of the present invention.
In the drawings, reference numerals denote
1. Non-packaged chip (bare chip, die)
2. Chip bonding pad
3. Opening of printed circuit board
4. Pad of printed circuit board
5. Position of non-packaged chip (bare chip) mounted on printed circuit board
6. Fixing and heat-dissipating glue
7. Metal wiring of printed circuit board
8. Printed circuit board
Detailed Description
To more clearly illustrate the objects, technical solutions and advantages of the present invention, the following specific examples are given to further illustrate the present invention in detail.
The printed circuit board is a layered structure, and the routing layer and the insulating layer are alternately bonded. Fig. 4 is a schematic structural diagram of a direct-buried printed circuit board without a packaged chip according to an embodiment of the invention. As shown, rectangular openings are first made in several layers where it is desired to mount a non-packaged chip (die). The bonding pad of the non-packaged chip (die) is directly butted and welded with the routing layer bonding pad of the printed circuit board, so that the circuit connection effect is achieved. And then, covering the gap between the non-packaged chip (die) and the printed circuit board and the surface of the chip by using insulating thermal adhesive to play roles in fixing, radiating and the like.
The invention relates to a structure of a non-packaged chip direct-buried printed circuit board, which comprises a non-packaged chip and a printed circuit board, wherein a hole for accommodating the non-packaged chip is formed in the printed circuit board, a bonding pad of a wiring layer of the printed circuit board is arranged in the hole, the bonding pad of the non-packaged chip is welded with a bonding pad in a corresponding hole, and a gap between the non-packaged chip and the printed circuit board is filled with insulating thermal adhesive. One unpackaged chip or more than two unpackaged chips may be accommodated in the hole on the printed circuit board. The holes formed in the printed circuit board may be closed-end holes (shown in fig. 4), stepped through holes (shown in fig. 5), or the like, as long as the unpackaged chips can be accommodated. The printed circuit board may be a common printed circuit board or a substrate dedicated for chip packaging.
The invention relates to a method for directly burying a printed circuit board without a packaged chip, which comprises the following steps:
step 1: according to the size of the non-packaged chip, a hole capable of accommodating the non-packaged chip is designed during printed circuit design, and a bonding pad of a routing layer corresponding to the bonding pad of the non-packaged chip is arranged in the hole;
step 2: manufacturing a printed circuit board;
and step 3: welding a bonding pad of a non-packaged chip with a corresponding bonding pad in the hole;
and 4, step 4: and filling the gap between the non-packaged chip and the printed circuit board with insulating hot glue, and covering the non-packaged chip.
According to the invention, the chip bare chip is directly buried in the opening of the printed circuit board, so that the height of the device is reduced, and the chip bare chip can be applied to a substrate packaged by a polycrystalline circle and is suitable for a scene with strict limitation on the height of the device in the package; the method can also be applied to electronic equipment such as mobile phones, wearable equipment and sensors, and is suitable for scenes with strict limitation on the height of the printed circuit board. The invention does not need to be bonded to the printed circuit board by a metal wire, increases the reliability and reduces the cost by directly butting the chip bonding pad with the bonding pad of the printed circuit board, and can save gold wire bonding to avoid the packaging problem caused by the gold wire bonding. The invention can reduce the volume of the chip and the printed circuit board, thereby reducing the volume of the whole product.
The present invention is not limited to the above preferred embodiments, and any modifications, equivalents, improvements, etc. made within the principle of the present invention are included in the scope of the present invention.

Claims (7)

1. The structure of the direct-buried printed circuit board without the packaged chip is characterized by comprising the packaged chip and a printed circuit board, wherein a hole for accommodating the packaged chip is formed in the printed circuit board, a bonding pad of a wiring layer of the printed circuit board is arranged in the hole, the bonding pad of the packaged chip is welded with a bonding pad in a corresponding hole, and an insulating adhesive is used for filling a gap between the packaged chip and the printed circuit board and covering the packaged chip.
2. The structure of the non-packaged-chip-embedded printed circuit board according to claim 1, wherein the number of the holes on the printed circuit board for accommodating the non-packaged chips is one or more than two.
3. The structure of the unpackaged chip direct-burried PCB of claim 1, wherein the hole formed in the PCB is a closed-end hole or a stepped through hole.
4. A method for directly burying a printed circuit board without a packaged chip comprises the following steps:
step 1: according to the size of the non-packaged chip, a hole capable of accommodating the non-packaged chip is designed during printed circuit design, and a bonding pad of a routing layer corresponding to the bonding pad of the non-packaged chip is arranged in the hole;
step 2: manufacturing a designed printed circuit board;
and step 3: welding a bonding pad of a non-packaged chip with a corresponding bonding pad in the hole;
and 4, step 4: and filling a gap between the non-packaged chip and the printed circuit board with insulating glue, and covering the non-packaged chip.
5. The method of claim 4, wherein the number of the unpackaged chips contained in the holes of the PCB is one or more than two.
6. A method for directly burying a printed circuit board without a packaged chip as claimed in claim 4, wherein the hole formed on the printed circuit board is a closed end hole or a step through hole.
7. A chip package structure, wherein the non-packaged chip and the package substrate are as claimed in any one of claims 1 to 3.
CN201910936408.2A 2019-09-29 2019-09-29 Structure and method of non-packaged chip direct-buried printed circuit board and chip packaging structure Pending CN112312678A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201910936408.2A CN112312678A (en) 2019-09-29 2019-09-29 Structure and method of non-packaged chip direct-buried printed circuit board and chip packaging structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201910936408.2A CN112312678A (en) 2019-09-29 2019-09-29 Structure and method of non-packaged chip direct-buried printed circuit board and chip packaging structure

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Publication Number Publication Date
CN112312678A true CN112312678A (en) 2021-02-02

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113194639A (en) * 2021-04-16 2021-07-30 深圳市中腾电子有限公司 Brand-new production method of memory module

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0774888A2 (en) * 1995-11-16 1997-05-21 Matsushita Electric Industrial Co., Ltd Printing wiring board and assembly of the same
CN101236947A (en) * 2008-01-25 2008-08-06 苏州固锝电子股份有限公司 Semiconductor device with novel package structure
CN206413261U (en) * 2017-01-25 2017-08-15 广东欧珀移动通信有限公司 Circuit board assemblies and the terminal with it

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0774888A2 (en) * 1995-11-16 1997-05-21 Matsushita Electric Industrial Co., Ltd Printing wiring board and assembly of the same
CN1156949A (en) * 1995-11-16 1997-08-13 松下电器产业株式会社 PC board and fixing body thereof
CN101236947A (en) * 2008-01-25 2008-08-06 苏州固锝电子股份有限公司 Semiconductor device with novel package structure
CN206413261U (en) * 2017-01-25 2017-08-15 广东欧珀移动通信有限公司 Circuit board assemblies and the terminal with it

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113194639A (en) * 2021-04-16 2021-07-30 深圳市中腾电子有限公司 Brand-new production method of memory module

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Application publication date: 20210202