JP2507970B2 - Method for manufacturing multilayer printed wiring board - Google Patents

Method for manufacturing multilayer printed wiring board

Info

Publication number
JP2507970B2
JP2507970B2 JP5193797A JP19379793A JP2507970B2 JP 2507970 B2 JP2507970 B2 JP 2507970B2 JP 5193797 A JP5193797 A JP 5193797A JP 19379793 A JP19379793 A JP 19379793A JP 2507970 B2 JP2507970 B2 JP 2507970B2
Authority
JP
Japan
Prior art keywords
resin
printed wiring
wiring board
conductor circuit
multilayer printed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP5193797A
Other languages
Japanese (ja)
Other versions
JPH0750485A (en
Inventor
中村  聡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP5193797A priority Critical patent/JP2507970B2/en
Publication of JPH0750485A publication Critical patent/JPH0750485A/en
Application granted granted Critical
Publication of JP2507970B2 publication Critical patent/JP2507970B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0055After-treatment, e.g. cleaning or desmearing of holes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は多層プリント配線板の製
造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a multilayer printed wiring board.

【0002】[0002]

【従来の技術】近年の電子機器の高機能化が進展するの
に伴い、電子部品の外形サイズの小型化、又この電子部
品を搭載保持し部品間を接続するプリント配線板の高密
度化が進んでいる。とくにプリント配線板を高密度化す
るための方法として多層プリント配線板の採用が進んで
いる。この多層プリント配線板の製造は、例えばガラス
繊維強化ポリイミド板よりなる絶縁板の両面に銅箔を形
成した両面銅張積層板をエッチングして導体回路を形成
した複数枚の内層板と外層銅箔との各層間に例えば熱硬
化性樹脂である未硬化のポリイミド樹脂をガラス布に含
浸させて作られたプリプレグを挟み、加熱加圧して熱硬
化性樹脂を硬化させ一体化した後、内層回路と外層銅箔
を接続するためのスルホールをドリリングによる貫通穴
の穴あけ、電解めっきを用いた貫通穴内の銅めっきによ
り形成し、その後サブトラクティブ法により外層回路を
形成する事により行なわれる。
2. Description of the Related Art As electronic devices have become more sophisticated in recent years, the external size of electronic parts has become smaller, and the density of printed wiring boards for mounting and holding the electronic parts and connecting the parts has increased. It is progressing. In particular, multi-layer printed wiring boards are being adopted as a method for increasing the density of printed wiring boards. This multilayer printed wiring board is manufactured by, for example, a plurality of inner-layer boards and outer-layer copper foil in which conductor circuits are formed by etching a double-sided copper-clad laminate in which copper foil is formed on both sides of an insulating board made of glass fiber reinforced polyimide board. Between each of the layers, for example, sandwich a prepreg made by impregnating glass cloth with uncured polyimide resin, which is a thermosetting resin, and heat and pressurize the thermosetting resin to integrate them, and then to form an inner layer circuit. A through hole for connecting an outer layer copper foil is formed by drilling a through hole by drilling, copper plating in the through hole using electrolytic plating, and then an outer layer circuit is formed by a subtractive method.

【0003】図3は従来の製造方法の手順でドリリング
による貫通穴あけを実施した直後の多層プリント配線板
の一例の断面図である。図3に示すように、絶縁板1に
銅箔2を貼付け導体回路3を形成した各内層板4は熱硬
化性樹脂5を含浸させたガラス布6よりなる硬化したプ
リプレグ層7により接着されている。この状態でドリリ
ングにより貫通穴8があけられるがこの穴あけの時に生
ずる応力により、導体回路3とプレプレグの熱硬化性樹
脂5の界面における樹脂と導体回路との剥離9や樹脂の
割れ10が生じる。
FIG. 3 is a cross-sectional view of an example of a multilayer printed wiring board immediately after drilling through holes by drilling in the procedure of a conventional manufacturing method. As shown in FIG. 3, each inner layer plate 4 in which the copper foil 2 is attached to the insulating plate 1 and the conductor circuit 3 is formed is bonded by the cured prepreg layer 7 made of the glass cloth 6 impregnated with the thermosetting resin 5. There is. In this state, the through hole 8 is drilled by drilling, but the stress generated at the time of drilling causes peeling 9 between the resin and the conductor circuit and a crack 10 in the resin at the interface between the conductor circuit 3 and the thermosetting resin 5 of the prepreg.

【0004】この樹脂と導体回路との剥離9や、樹脂の
割れ10を防止する手段を製造方法に持つ多層プリント
配線板の製造方法として以下のようなものが考案されて
いる。まず、導体回路3とプリプレグの樹脂と導体回路
との剥離9を防ぐ方法として特開昭64−53495号
公報では、内層板4の導体回路3表面にトリアジンチオ
ール化合物層を形成して、導体回路3とプリプレグの樹
脂との濡れ性を改善し密着強度を向上させる方法が考案
されている。また、特開平1−255297号公報で
は、内層板4の導体回路3表面に塩素含有量が0〜0.
05重量%の合成樹脂を塗布し、内層板4の導体回路3
とプリプレグ層との接着強度を改善する方法が考案され
ている。樹脂の割れ10を防止する方法として特開昭5
7−186396号公報では、内層板4の導体層に電気
泳動法による樹脂コーティングを行い、樹脂の割れ10
の進行をコーティング層によりブロックする方法が考案
されている。また、特開平3−50795号公報では、
プリプレグと同種の樹脂に粉砕し粉末状にしたガラス維
持を混合したガラス繊維入り樹脂ペーストを内層板4に
コートし、樹脂の割れ10をガラス繊維にてブロックす
る方法が考案されている。このように種々の方法が考案
され、何れも樹脂と導体回路との剥離9や樹脂の割れ1
0の発生を防止する手段が開示されているが、現在、多
層プリント配線板の製造方法においては生産性を上げる
ために貫通穴8の穴あけ加工時に生じる応力は高くなる
傾向にある。このため従来考案されている方法で必ずし
も樹脂と導体回路との剥離9や樹脂の割れ10を防止す
ることが出来なくなっている。
The following has been devised as a method of manufacturing a multilayer printed wiring board having a means for preventing the resin 9 from separating from the conductor circuit and the resin crack 10 as a manufacturing method. First, as a method for preventing peeling 9 between the conductor circuit 3 and the resin of the prepreg and the conductor circuit, in JP-A-64-53495, a triazine thiol compound layer is formed on the surface of the conductor circuit 3 of the inner layer plate 4 to form a conductor circuit. 3 has been devised to improve the wettability between 3 and the resin of the prepreg to improve the adhesion strength. In JP-A-1-255297, the chlorine content on the surface of the conductor circuit 3 of the inner layer plate 4 is 0 to 0.
Applying 05% by weight of synthetic resin, the conductor circuit 3 of the inner layer plate 4
A method for improving the adhesive strength between the prepreg layer and the prepreg layer has been devised. As a method for preventing resin cracking 10, Japanese Patent Laid-Open No. Sho 5
In Japanese Patent Laid-Open No. 7-186396, the conductor layer of the inner layer plate 4 is coated with a resin by an electrophoretic method to break the resin 10.
A method has been devised to block the progress of the coating with a coating layer. Further, in Japanese Patent Laid-Open No. 3-50795,
A method has been devised in which the inner layer plate 4 is coated with a resin paste containing glass fibers, which is obtained by mixing the same kind of resin as the prepreg and pulverized into a powder to maintain the glass, and the resin cracks 10 are blocked by the glass fibers. Various methods have been devised in this way, and all of these methods include peeling 9 between the resin and the conductor circuit and cracking 1 of the resin.
Although a means for preventing the generation of 0 has been disclosed, at present, in the method for manufacturing a multilayer printed wiring board, the stress generated at the time of drilling the through hole 8 tends to increase in order to improve the productivity. Therefore, it is not always possible to prevent the peeling 9 between the resin and the conductor circuit and the crack 10 in the resin by the method devised conventionally.

【0005】[0005]

【発明が解決しようとする課題】この従来の多層プリン
ト配線板の製造方法では、各内層板及び外層板を接着す
る接着層(プリプレグ)が熱硬化性樹脂及びガラス布の
みで構成されているため、積層後穴あけを行なう際に生
ずるドリルの応力に耐えられず、樹脂部や樹脂とガラス
布との境界部に樹脂の割れや樹脂と導体回路との剥離が
生じその後のめっき工程でのめっき液のしみ込みによ
り、スルホールと内層回路との間の絶縁劣化の原因とな
り信頼性の低下をきたすという欠点があった。
In this conventional method for manufacturing a multilayer printed wiring board, the adhesive layer (prepreg) for adhering each inner layer board and outer layer board is composed only of thermosetting resin and glass cloth. , It is not able to withstand the stress of the drill that occurs when drilling after stacking, and the resin cracks or peels between the resin and the conductor circuit at the resin part or the boundary between the resin and the glass cloth, and the plating solution in the subsequent plating process. There is a drawback in that the penetration causes the deterioration of the insulation between the through hole and the inner layer circuit, resulting in a decrease in reliability.

【0006】本発明の目的は、樹脂と導体回路との剥離
や樹脂の割れの発生によるスルーホールと内層回路との
間の絶縁劣化がなく信頼性の高い多層印刷配線板の製造
方法を提供することにある。
An object of the present invention is to provide a highly reliable method for manufacturing a multilayer printed wiring board which does not cause deterioration of insulation between a through hole and an inner layer circuit due to peeling of the resin from a conductor circuit or cracking of the resin. Especially.

【0007】[0007]

【課題を解決するための手段】本発明は、外層板と、あ
らかじめ導体回路を形成した複数枚の内層板とをこの複
数枚の内層板と前記外層板のそれぞれの層間に熱硬化性
樹脂製のプリプレグを挟んで積層し加熱加圧して一体化
し、貫通穴を穴あけした後、スルホール及び外層配線回
路を形成する工程を含む多層プリント配線板の製造方法
において、前記複数枚の内層板のそれぞれと前記外層板
を接着する接着層領域の少くとも一部に熱可塑性樹脂を
配置し積層した後、前記貫通穴の穴あけを行い、その後
加熱加圧する工程を含んでいる。
SUMMARY OF THE INVENTION According to the present invention, an outer layer plate and a plurality of inner layer plates on which conductor circuits are formed in advance are made of a thermosetting resin between each of the plurality of inner layer plates and the outer layer plate. In the method for manufacturing a multilayer printed wiring board including a step of forming a through hole and an outer layer wiring circuit after laminating with sandwiching the prepreg, heating and pressurizing to integrate, and each of the plurality of inner layer boards. The method further includes the steps of arranging and laminating a thermoplastic resin on at least a part of an adhesive layer region for adhering the outer layer plate, punching the through holes, and then heating and pressing.

【0008】[0008]

【作用】上記の手段により多層プリント配線板の穴あけ
の際のドリルの応力により生じた樹脂部や樹脂とガラス
布との境界部に樹脂の割れや樹脂と導体回路との剥離に
熱可塑性樹脂が充填され樹脂の割れや樹脂と導体回路と
の剥離が埋まる。これにより割れや剥離のような欠陥の
無い多層プリント配線板が得られる。
With the above-described means, the thermoplastic resin is used for cracking the resin and for separating the resin from the conductor circuit at the resin portion or the boundary between the resin and the glass cloth caused by the stress of the drill at the time of drilling the multilayer printed wiring board. The cracks of the filled resin and the separation between the resin and the conductor circuit are filled. As a result, a multilayer printed wiring board free from defects such as cracking and peeling can be obtained.

【0009】[0009]

【実施例】次に、本発明の実施例について図面を参照し
て説明する。
Embodiments of the present invention will now be described with reference to the drawings.

【0010】図1(a),(b)は本発明の第1の実施
例を説明する工程順に示した断面図である。第1の実施
例は、まず、図1(a)に示すように、厚み100μm
のガラス繊維強化ポリイミド樹脂の絶縁板1に厚み35
μmの銅箔2を貼付け導体回路3を形成した各内層板4
にポリフェニルサルファイト(PPS)樹脂のような熱
可塑性樹脂11を平均厚み5μmでコーティングする。
次に、この内層板4をポリイミド樹脂が含浸されたガラ
ス布6よりなる厚み200μmのプリプレグの熱硬化性
樹脂を硬化させ硬化したプリプレグ層7を形成すること
により互いに接着する。この状態で、ドリリングにより
貫通穴8をあけるがこの穴あけの時に生ずる応力によ
り、導体回路3とコーティングされた熱可塑性樹脂11
の界面における樹脂と導体回路との剥離9やコーティン
グされた熱可塑性樹脂11の部分に達するような樹脂の
割れ10が生じる。
FIGS. 1 (a) and 1 (b) are sectional views showing a first embodiment of the present invention in the order of steps for explaining the same. In the first embodiment, first, as shown in FIG. 1A, the thickness is 100 μm.
Glass fiber reinforced polyimide resin insulation plate 1 with a thickness of 35
Each inner layer board 4 on which a conductor circuit 3 is formed by attaching a copper foil 2 of μm
Is coated with a thermoplastic resin 11 such as polyphenylsulfite (PPS) resin with an average thickness of 5 μm.
Next, the inner layer plate 4 is adhered to each other by forming a prepreg layer 7 in which a thermosetting resin of a prepreg having a thickness of 200 μm made of a glass cloth 6 impregnated with a polyimide resin is cured to be cured. In this state, the through hole 8 is drilled by drilling, but due to the stress generated during this drilling, the conductor circuit 3 and the thermoplastic resin 11 coated thereon are
Delamination 9 between the resin and the conductor circuit and a crack 10 of the resin reaching the portion of the coated thermoplastic resin 11 occur at the interface.

【0011】次に、図1(b)に示すように、図1
(a)の状態の多層プリント配線板を210℃面圧10
kg/cm2 で加熱加圧する。このとき、熱可塑性樹脂
11は、加熱により再溶融し樹脂と導体回路との剥離9
や樹脂の割れ10を起こしている部分に加圧により充填
される。これにより、樹脂と導体回路との、剥離9や樹
脂の割れ10の欠陥は取り除かれる。
Next, as shown in FIG.
The multilayer printed wiring board in the state of (a) is subjected to a surface pressure of 10 ° C at 210 ° C.
Heat and pressurize at kg / cm 2 . At this time, the thermoplastic resin 11 is remelted by heating to separate the resin from the conductor circuit 9
The portion where the resin crack 10 has occurred is filled by pressure. As a result, defects such as peeling 9 and resin cracks 10 between the resin and the conductor circuit are removed.

【0012】図2(a),(b)は本発明の第2の実施
例を説明する工程順に示した断面図である。第2の実施
例は、まず、図2(a)に示すように、厚み100μm
のガラス繊維強化ポリイミド樹脂板の絶縁板1に厚み3
5μmの銅箔2を貼付け導体回路3を形成した各内層板
4にポリフェニルサルファイト(PPS)のような熱可
塑性樹脂11の粒径約3μmの微粉末を重量%で10%
含有する、いわゆる熱可塑性樹脂の微粉末を含む樹脂1
2を含有するポリイミドの熱硬化性樹脂を含浸させたガ
ラス布6よりなる厚み200μmのプリプレグの熱硬化
性樹脂を硬化させ硬化したプリプレグ層7を形成するこ
とにより接着する。この状態でドリリングにより貫通穴
8をあけるがこの穴あけの時に生ずる応力により、導体
回路3とプリプレグの熱可塑性樹脂の微粉末を含有する
樹脂12の界面における樹脂と導体回路との剥離9や樹
脂の割れ10が生じる。
FIGS. 2A and 2B are sectional views showing the second embodiment of the present invention in the order of steps. In the second embodiment, first, as shown in FIG. 2A, the thickness is 100 μm.
Insulating plate 1 of glass fiber reinforced polyimide resin plate of thickness 3
10% by weight of fine powder of thermoplastic resin 11 such as polyphenylsulfite (PPS) having a particle size of about 3 μm is attached to each inner layer plate 4 on which a copper foil 2 of 5 μm is attached and a conductor circuit 3 is formed.
Resin 1 containing so-called fine powder of thermoplastic resin
The glass cloth 6 impregnated with a thermosetting resin of polyimide containing 2 is hardened with a thermosetting resin of a prepreg having a thickness of 200 μm to form a hardened prepreg layer 7 for adhesion. In this state, the through hole 8 is drilled by drilling, but due to the stress generated at the time of drilling, peeling 9 between the resin and the conductor circuit at the interface between the conductor circuit 3 and the resin 12 containing the fine powder of the thermoplastic resin of the prepreg and the resin A crack 10 occurs.

【0013】次に、図2(b)に示すように、図2
(a)の状態の多層プリント配線板を温度210℃面圧
10kg/cm2 で加熱加圧する。このとき、熱可塑性
樹脂の微粉末を含む樹脂12の微粉末は、加熱により再
溶融し樹脂と導体回路との剥離9や樹脂の割れ10を起
こしている部分に加圧により充填される。これにより、
樹脂と導体回路との剥離9や樹脂の割れ10の欠陥は取
り除かれる。
Next, as shown in FIG.
The multilayer printed wiring board in the state of (a) is heated and pressed at a temperature of 210 ° C. and a surface pressure of 10 kg / cm 2 . At this time, the fine powder of the resin 12 containing the fine powder of the thermoplastic resin is re-melted by heating to fill the portion where the peeling 9 between the resin and the conductor circuit and the crack 10 of the resin are caused by pressure. This allows
Defects such as peeling 9 between the resin and the conductor circuit and cracks 10 in the resin are removed.

【0014】第2の実施例では第1の実施例と異なり樹
脂の割れ10が内層の導体回路3に達しないような小さ
なものでも必ず熱可塑性樹脂の微粉末を含む樹脂12の
微粉末に接することになるので樹脂部に発生する樹脂と
導体回路との剥離9や樹脂の割れ10はすべて充填され
るという利点を有する。
In the second embodiment, unlike the first embodiment, even a small thing such that the resin crack 10 does not reach the conductor circuit 3 in the inner layer is always in contact with the fine powder of the resin 12 containing the fine powder of the thermoplastic resin. Therefore, there is an advantage that the peeling 9 between the resin and the conductor circuit and the crack 10 of the resin generated in the resin portion are all filled.

【0015】[0015]

【発明の効果】以上説明したように本発明は、外層板
と、あらかじめ導体回路を形成した複数枚の内層板と
を、各層間に熱硬化性樹脂製のプリプレグを挟んで積層
し、加熱加圧して一体化し、貫通穴を穴あけした後、ス
ルホール及び外層配線回路を形成する工程を含む多層プ
リント配線板の製造方法において、各内層板及び外層板
を接着する接着層領域の少くとも一部に熱可塑性樹脂を
配置し積層した後、穴あけを行い、その後加熱加圧する
工程を含んでいるため、穴あけの際に樹脂と導体回路と
の剥離や樹脂の割れが生じてもその後の加熱加圧工程で
の熱可塑性樹脂による樹脂と導体回路との剥離や割れへ
の再充填により、信頼性に影響及ぼすような欠陥を修復
できるという効果を有する。
As described above, according to the present invention, an outer layer plate and a plurality of inner layer plates on which conductor circuits are formed in advance are laminated by sandwiching a thermosetting resin prepreg between each layer, and heated. In a method for manufacturing a multilayer printed wiring board including a step of forming a through hole and a through hole after being pressed and integrated to form a through hole, at least a part of an adhesive layer area for adhering each inner layer board and outer layer board. After placing and stacking the thermoplastic resin, it includes a step of punching and then heating and pressing, so even if peeling between the resin and the conductor circuit or cracking of the resin occurs during drilling, the subsequent heating and pressing step By peeling and refilling the resin and the conductor circuit with the thermoplastic resin in step 1, there is an effect that a defect that affects reliability can be repaired.

【0016】従来例の方法で作成した多層プリント配線
板の貫通穴の穴あけ条件は樹脂の割れや剥離を防止する
ため例えば板厚3mm,12層の多層プリント配線板に
直径0.4mmの穴あけを行なう場合、3回のステップ
加工を行なう必要があった。しかし、本実施例では2回
のステップ加工により充分満足できる穴品質が得られ加
工速度は約40%向上した。
In order to prevent the resin from cracking or peeling, the conditions for drilling the through holes of the multilayer printed wiring board prepared by the conventional method are, for example, drilling a 0.4 mm diameter hole in a 12-layer multilayer printed wiring board having a thickness of 3 mm. When carrying out, it was necessary to carry out step processing three times. However, in this embodiment, the hole quality was sufficiently satisfied by performing the step machining twice, and the machining speed was improved by about 40%.

【図面の簡単な説明】[Brief description of drawings]

【図1】(a),(b)は本発明の第1の実施例を説明
する工程順に示した断面図である。
FIGS. 1A and 1B are cross-sectional views illustrating a first embodiment of the present invention in a process order.

【図2】(a),(b)は本発明の第2の実施例を説明
する工程順に示した断面図である。
2A and 2B are cross-sectional views showing a second embodiment of the present invention in the order of steps.

【図3】従来の製造方法の手順でドリリングによる貫通
穴あけを実施した直後の多層プリント配線板の一例の断
面図である。
FIG. 3 is a cross-sectional view of an example of a multilayer printed wiring board immediately after drilling through holes by drilling in the procedure of a conventional manufacturing method.

【符号の説明】[Explanation of symbols]

1 絶縁板 2 銅箔 3 導体回路 4 内層板 5 熱硬化性樹脂 6 ガラス布 7 硬化したプリプレグ層 8 貫通穴 9 樹脂と導体回路との剥離 10 樹脂の割れ 11 熱可塑性樹脂 12 熱可塑性樹脂の微粉末を含む樹脂 DESCRIPTION OF SYMBOLS 1 Insulation plate 2 Copper foil 3 Conductor circuit 4 Inner layer plate 5 Thermosetting resin 6 Glass cloth 7 Cured prepreg layer 8 Through hole 9 Peeling of resin and conductor circuit 10 Cracking of resin 11 Thermoplastic resin 12 Fine thermoplastic resin Resin containing powder

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 外層板と、あらかじめ導体回路を形成し
た複数枚の内層板とをこの複数枚の内層板と前記外層板
のそれぞれの層間に熱硬化性樹脂製のプリプレグを挟ん
で積層し加熱加圧して一体化し、貫通穴を穴あけした
後、スルホール及び外層配線回路を形成する工程を含む
多層プリント配線板の製造方法において、前記複数枚の
内層板のそれぞれと前記外層板を接着する接着層領域の
少くとも一部に熱可塑性樹脂を配置し積層した後、前記
貫通穴の穴あけを行い、その後加熱加圧する工程を含む
ことを特徴とする多層プリント配線板の製造方法。
1. An outer layer plate and a plurality of inner layer plates on which a conductor circuit is formed in advance are laminated by sandwiching a thermosetting resin prepreg between each of the plurality of inner layer plates and the outer layer plate and heating. In a method for manufacturing a multilayer printed wiring board including a step of forming a through hole after pressurizing and integrating to form a through hole, an adhesive layer that bonds each of the plurality of inner layer boards to the outer layer board A method for manufacturing a multilayer printed wiring board, which comprises the steps of arranging and laminating a thermoplastic resin on at least a part of a region, punching the through holes, and then heating and pressing.
JP5193797A 1993-08-05 1993-08-05 Method for manufacturing multilayer printed wiring board Expired - Lifetime JP2507970B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5193797A JP2507970B2 (en) 1993-08-05 1993-08-05 Method for manufacturing multilayer printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5193797A JP2507970B2 (en) 1993-08-05 1993-08-05 Method for manufacturing multilayer printed wiring board

Publications (2)

Publication Number Publication Date
JPH0750485A JPH0750485A (en) 1995-02-21
JP2507970B2 true JP2507970B2 (en) 1996-06-19

Family

ID=16313940

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5193797A Expired - Lifetime JP2507970B2 (en) 1993-08-05 1993-08-05 Method for manufacturing multilayer printed wiring board

Country Status (1)

Country Link
JP (1) JP2507970B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103129090B (en) * 2013-01-30 2016-05-25 广东生益科技股份有限公司 The preparation method of a kind of glass-film base copper-clad plate and prepared copper-clad plate thereof

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61126860A (en) * 1984-11-22 1986-06-14 Canon Inc Photoelectric conversion input device
JPS62285498A (en) * 1986-06-03 1987-12-11 松下電工株式会社 Multilayer printed interconnection board
JPS6324695A (en) * 1986-07-17 1988-02-02 東芝ケミカル株式会社 Manufacture of multilayer interconnection board
JPH0748589B2 (en) * 1990-05-15 1995-05-24 松下電工株式会社 Method for manufacturing multilayer printed circuit board

Also Published As

Publication number Publication date
JPH0750485A (en) 1995-02-21

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