JP2507325B2 - Television signal processor - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a television signal processing device, and particularly to a television signal processing suitable for digital processing of television signals of not only standard system but also non-standard system. Regarding the device.

[Conventional technology]

Attention has been paid to a television receiver which obtains a high quality reproduced image by making maximum use of the NTSC system which is the current standard system of television broadcasting in Japan. In this receiver, the composite video signal is separated into a luminance signal and a chrominance signal using a comb filter, and signal processing is performed. Therefore, the luminance / color signal separation performance of this comb filter achieves high image quality. It will be an important point above.

Conventionally, as this luminance / color signal separation circuit, as shown in, for example, Japanese Patent Laid-Open No. 59-110296, a frame comb filter using a frame memory capable of holding information for one frame of a television signal. The circuit is known.

FIG. 8 is a block diagram of the above conventional frame comb filter circuit, in which 100 is a composite video signal input terminal, 201 is a frame memory capable of storing image data for one frame, 20
2 is an adder, 203 is a subtractor, 105 is a luminance signal output terminal, 106
Is a color signal output terminal.

Further, FIG. 9 is a waveform diagram for explaining an NTSC system signal in which the color subcarrier has a phase inversion between frames.

The operation of FIG. 8 will be described below with reference to the waveform chart of FIG.

The video signals of the (n-1) th frame and the nth frame shown in FIG. 9A are successively input to the composite video signal input terminal 100 of FIG. Since the frame memory 201 gives a delay of one frame, the video signal of (n-1) frames appears at its output. Therefore, the adder 202 adds the (n-1) -frame video signal and the n-frame video signal to obtain the luminance signal shown in FIG. 9C, and the subtracter 203 (n-1) -frame video signal. Video signal and n
The color signal shown in FIG. 9B can be obtained from the output terminals 105 and 106 by subtracting the video signal of the frame.

The above is the operation of the frame comb filter. As described above, when the video signals are correlated between frames, in other words, when the image is a still image, complete luminance / color signal separation can be performed. On the contrary, in the case of a moving image having no correlation between video signals between frames, luminance / color signal separation cannot be performed correctly, resulting in deterioration of image quality.

On the other hand, there is a motion-adaptive comb filter that is also applicable to a moving image using the frame comb filter and the line comb filter that performs luminance / color signal separation by interline calculation. As the conventional example, those described in JP-A-55-123280 can be mentioned.

FIG. 10 is a block diagram of the motion adaptive comb filter circuit, wherein 101 is a frame comb filter circuit similar to that shown in FIG. 8, 102 is a line comb filter circuit, and 403 is motion detection. A circuit, 404, is a selector for selectively switching the output of the frame comb filter circuit 101 and the output of the line comb filter circuit 102, and the same reference numerals as those in FIG. 8 denote the same parts.

In FIG. 10, the video signal input from the composite video signal input terminal 100 is interframe operated in the frame comb filter 101, and the interframe difference signal is obtained from the subtracter 203 shown in FIG.

The motion detection circuit 403 processes this difference signal as motion detection information of the image to detect motion. When it is determined that the image is a moving image, the video signal has no correlation between the frames, and therefore the frame comb filter process using the frame correlation is switched to the line comb filter process using the line correlation. This is performed by the selector 404 selecting the output of the line comb filter circuit 102 by the output control signal of the motion detection circuit 403. When it is determined that the image is a still image in which no motion is detected, the output of the frame comb filter circuit 402 is selected.

FIG. 11 is a configuration diagram showing a conventional example of the line comb filter circuit 102 used in FIG. 10, 501 and 502 are 1H delay lines, 503 to 505 are multipliers, and 506 is an adder. Reference numeral 507 is a band pass filter (BPF), 508 is a subtractor, and the same reference numerals as those in FIG. 10 denote the same parts.

The line comb filter circuit in FIG. 11 uses the fact that the NTSC color subcarrier phase is inverted between lines. That is, when the video signals have a correlation in the vertical direction of the image, the luminance / color signal separation is correctly performed. Therefore, it is used for signal comb-shaped filter processing, such as moving images, which has no correlation between frames.

The above is an example of the conventional comb filter circuit.

[Problems to be solved by the invention]

The above-mentioned conventional technique works well for a standard system signal (standard signal), but cannot expect good operation for a non-standard system signal (non-standard signal) represented by a VTR reproduction signal. Therefore, there is a problem in that high image quality cannot be achieved because no measures are taken for proper luminance / color signal separation processing that can handle both standard and non-standard methods.

 The reason will be described below.

It is generally known that if the video signal input to the composite video signal input terminal 100 shown in FIGS. 8 and 10 is a standard signal, the relationship of the following expression (1) is established.

f _SC = 455/2 · f _H = 455/2 · 525 · f _F (1) where f _SC is the color subcarrier frequency, f _H is the horizontal scanning frequency, and f _F is the frame frequency. In the equation, the color subcarrier frequency f _SC is 1 of the horizontal scanning frequency f _H and the frame frequency f _F.
Since the relationship is an integral multiple of / 2, the color subcarrier phase is inverted between lines and frames.

By the way, the relationship of the above equation (1) does not exist for non-standard signals. That is, there is no so-called frequency interleave relationship between the luminance signal and the color signal.

FIG. 12 is a still image signal waveform diagram of the above-mentioned non-standard signal. In FIG. 12, the video signal is shown with the sync signal as a reference, and (A) shows (n-1) frame and n frame. The video signal of is shown. However, since the video signal does not satisfy the relationship of the expression (1), a phase shift occurs between the luminance signal and the color signal in one frame. When such a signal is processed by the frame comb filter circuit shown in FIG. 8, the signal (B) in which the chrominance signal component remains from the luminance signal output terminal 105 and the chrominance signal output terminal 106 from The remaining signal (C) of the luminance signal component is extracted, and each residual component interferes with the image quality and deteriorates the image.

In addition, the motion adaptive comb filter shown in FIG.
When the non-standard signal shown in Fig. 12 is processed, even if it is a still image, the difference between frames becomes large depending on the state of the phase shift of the luminance and color signals between frames, and it is judged as a moving image and the line comb Shape filtering is performed, or conversely, it is judged as a still image and switched to frame comb filtering, and the accuracy of comb filtering is different even within the same screen, causing unevenness on the screen and deterioration of image quality. Sometimes.

As described above, the conventional comb filter cannot deal with non-standard signals such as VTR reproduction signals, resulting in deterioration of image quality such as dot interference and cross color.

Further, although the above-mentioned conventional example is a comb filter circuit, an interpolation filter for interpolating a scanning line of a video signal similarly has a field interpolation filter and a line interpolation filter, and there is a moving image compatible interpolation filter. This is to switch the field interpolation filter and line interpolation filter according to the motion detection information. Again, when a non-standard signal is input, the motion detection circuit shown in FIG. 10 malfunctions and field / line interpolation is also performed on the same screen. The filter processing is switched improperly, which causes image quality deterioration due to screen unevenness.

As described above, the conventional technique does not consider the processing method for non-standard signals, and therefore, there is a problem in that the circuit as it is cannot achieve high image quality due to image quality deterioration.

SUMMARY OF THE INVENTION It is an object of the present invention to solve the above-mentioned problems of the prior art and to provide a television signal processing device equipped with a signal processing circuit capable of handling non-standard signals.

[Means for solving problems]

In order to detect whether the input television signal is a standard signal or a non-standard signal, the above object is to determine whether the color subcarrier frequency and the frame frequency have a predetermined relationship as shown in the above formula (1). This is achieved by using a means for determining whether or not a line type filter circuit is forcibly selected when a non-standard signal input is determined based on the determination result of this means.

[Action]

The discriminating means separates from the composite video signal the burst lock frame period pulse obtained by dividing the clock phase-synchronized with the burst signal extracted from the composite video signal input by a predetermined number based on the equation (1). The horizontal synchronization signal thus obtained is counted for a frame period, and the period is compared with a horizontal lock frame period pulse obtained. Since the equation (1) is satisfied when the standard signal is input, the comparison results match, and conversely, when the non-standard signal is input, they do not match. This comparison result becomes a filter switching control signal, and when there is a mismatch, the frame or field filter can be switched to a line filter to prevent image quality deterioration when a non-standard signal is input, making it the best choice regardless of the input signal. The image quality of is obtained.

〔Example〕

 Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of a signal processing circuit of a television signal processing apparatus according to the present invention.
Is a composite video signal input terminal, 101 is a frame comb filter circuit, 102 is a line comb filter circuit, 103 and
104 is a signal changeover switch, 105 is a luminance signal output terminal,
106 is a color signal output terminal, 107 is a burst extraction circuit that extracts a burst signal from the composite video signal, 108 is an APC circuit that generates a clock pulse phase-synchronized with the extracted burst, 1
09 is a frequency dividing circuit that divides the clock pulse generated by the APC circuit 108 by n, 110 is a sync separation circuit that obtains a sync signal from the composite video signal, and 111 is frequency-synchronized with the horizontal sync signal obtained by the sync separation circuit 110. AFC circuit that generates horizontal pulse, 1
12 is a frequency dividing circuit that divides the pulse obtained by the AFC circuit 111 by m, 113 is a comparing circuit that compares the pulse periods output from the frequency dividing circuit 109 and the frequency dividing circuit 112, and 114 is the output of the comparing circuit 113. The reference numeral 115 is a motion detection circuit, 116 is an AND circuit, and 117 is an external control signal input terminal for forcibly selecting a comb filter.

In the figure, the composite video signal input from the input terminal 100 is the detection signal generated in the portion for detecting the standard signal and the non-standard signal composed of the circuits of circuit numbers 107 to 114, and the conventional image movement. The motion detection signal detected by the motion detection circuit 115, and the external control signal input terminal 11
The signal changeover switches 103 and 104 are operated by the output of the AND circuit 116 that selects one of the three control signals from the external control signal input from the frame 7, and the frame comb filter circuit 101 and the line comb filter circuit are provided. Select the output of 102. When any one of the above-mentioned three control signals becomes low level, the changeover switches 103 and 104 are line comb-shaped, and the output of the filter circuit 102 is selected. That is, the output of the line comb filter circuit 102 is obtained at the luminance signal output terminal 105 and the color signal output terminal 106 at the time of detecting the nonstandard signal, at the time of detecting the motion of the image, and at the time of inputting the external control signal which can be controlled from the outside.

Next, the operation of the non-standard signal detection unit composed of the circuit numbers 107 to 114 will be described.

A burst extraction circuit 107 extracts only the burst signal from the composite video signal input terminal 100 and supplies it to the APC circuit 108. Usually, the APC circuit 108 is a circuit that generates a color subcarrier required for performing color demodulation, and uses a burst signal to form a loop circuit that controls the phase, and the subcarrier or subcarrier in a fixed phase relationship Generates a clock that is an integral multiple of the carrier wave.

FIG. 2 is a block diagram of the APC circuit, in which 701 is a phase comparator, 702 is a loop filter that smoothes the output of the phase comparator 701, and 703 changes the oscillation frequency according to the output voltage of the loop filter 702. Voltage controlled oscillator (VCO), 704 is VCO703
It is a frequency divider that divides the output clock of.

Now, suppose that the oscillation frequency of VCO703 is the color subcarrier frequency f _SC.
4 times the frequency divider, the frequency divider 704 becomes a frequency divider 4 and its output has the same frequency as f _SC . The output of the frequency divider 704 is compared with the burst signal by the phase comparator 701 to obtain the error voltage. This error voltage is field-backed to VCO703 and VCO703
A stable clock phase-synchronized with the burst signal can be obtained from.

On the other hand, the AFC circuit 111 is a circuit for averaging the sync signals so as not to cause synchronization disturbance due to noise in the sync signals, and generating a stable sync signal from which noise is removed, the details of which are shown in FIG.

FIG. 3 is a block diagram of the AFC circuit, in which 801 is a phase comparator, 802 is a loop filter, 803 is a VCO, and 804 is a frequency divider.

In the figure, the AFC circuit 111 also constitutes a field back loop, and the operation of each part is the same as the operation of each part of the APC circuit 108, but the external input signal of the phase comparator 801 is separated and extracted by the sync separation circuit 110. The error signal output from the phase comparator 801 is converted into the control voltage of the VCO 803 by the loop filter 802. Also, the VCO
The oscillation frequency of 803 is equal to an integer multiple of the color subcarrier frequency, and the output clock of the VCO 803 is divided by the frequency divider 804 to obtain a horizontal pulse of horizontal scanning frequency f _H.

Now, the output clock f _S of the APC circuit 108 is the color subcarrier.
Since it is phase-synchronized with f _SC , the equation (1) is modified to By dividing the output clock f _S by a predetermined amount so that the frame period pulse in the case of the standard signal can be obtained. In other words, if the output clock f _S = kf _SC , then (k × 525 × 45
5/2) A standard signal frame period pulse can be obtained by dividing. The circuit that performs this frequency division is the frequency divider circuit 109.

In addition, the horizontal scanning cycle pulse f _H reproduced by the AFC circuit 111
A frame period pulse synchronized with the composite video signal input from the input terminal 100 is obtained from the frequency dividing circuit 112 that divides the signal by 525.

Here, since the relationship of the equation (1) ′ is not established for the non-standard signal, the period of the standard signal frame period pulse output from the frequency dividing circuit 109 and the period of the frame period pulse of the frequency dividing circuit 112 are compared. Comparing with 113, the standard signal and the non-standard signal can be detected. If the comparison results match, the composite video signal that is the input signal is a standard signal, and if they do not match, it is detected as a non-standard signal. The detection operation of this comparison signal becomes unstable when the input video signal is present near the boundary between the standard signal and the non-standard signal, or when synchronization is lost due to a disturbance.
In step 4, the comparison signal is integrated for a certain period so that a stable detection signal can be obtained.

This detection signal is applied to the signal change-over switches 103 and 104 as a comb-shaped filter changeover control signal. When a non-standard signal is input, the signal control switches 103 and 104 select the output of the line comb filter circuit 102 by this switching control signal.

The above is the outline of the operation of the non-standard signal detection unit. Next, details of this detection unit will be described.

FIG. 4 is a block diagram showing the details of the comparison circuit 113 and the frequency dividing circuits 109 and 112. 901 and 902 are latch circuits, 903 is a NOR circuit, 904 is an enable, a counter with a load, and 905 is a shift register. , 906 is an RS flip-flop, 907 is an AND circuit, 908 is a latch circuit, 909 is an inverter, and the circuits 901 to 904 form the frequency dividing circuit 112,
The circuits 905 to 909 form the comparison circuit 113.

FIG. 5 is an operation waveform diagram of each part of the circuit shown in FIG. 4, and FIGS. 5 (A) to (K) show (A) to (K) in FIG.
Corresponds to (K).

Next, the operation of the circuit shown in FIG. 4 will be described with reference to the waveform chart of FIG.

AFC is the horizontal scanning period pulse (B) coming from the circuit 111
Is a negative signal, and its pulse portion is shown enlarged in FIG. In order to shape the waveform of the horizontal scanning period pulse (B), the waveforms (C) and (D) are obtained through the latch circuits 901 and 902, respectively. The latch lock of the latch circuits 901 and 902 is given from the AFC circuit 111, and in this embodiment, this clock is set to a frequency 4f _SC which is four times the color sub-carrier frequency f _SC .

The latched horizontal scan pulses (C) and (D)
Is processed by the NOR circuit 903 to obtain a horizontal scanning period pulse (E) having a width of 1 clock. The counter 904 is a 525 frequency divider and counts the clock (A) by 525 and outputs a frame cycle pulse (F). The counting is performed during the period when the horizontal scanning cycle pulse (E) is input to the counter 904. After 525 counts, the initial value B is set in the counter 904 by the frame cycle pulse (F), and 525 counts are started again. Therefore, the counter 904 has a 10-bit configuration, and the initial value B is 2
The decimal code is "0111110011". On the other hand, the frequency dividing circuit 109 is a counter circuit similar to the counter 904 and counts the clock (A) by a predetermined value to generate a standard signal frame period pulse. In this embodiment, since the oscillation frequency of the clock (A) = 4f _SC , the count value is Although it is sufficient to count, in practice, in consideration of the influence of clock jitter or the like, the standard signal frame period pulse is given a width of i (positive integer) clocks to prevent detection error.

This corresponds to the signal shown in FIG. 5 (I), which has a standard value of 477,750 ± 3 clock widths, where i = 3. Although i = 3 in the present embodiment, the value of i is appropriately selected.

This frame period pulse (I) is created as follows.

The counter of the frequency dividing circuit 109 uses the output frame cycle pulse (F) of the counter 904 as a set signal to set an initial value A
(Binary code "001011010111001100") is given and 4
f _SC clock (A) and (477.750-4) clocks are counted and a frame cycle pulse is output.

Next, frame period pulses (G) and (H) shifted by 1 to 6 (= 2i) clocks in the shift register 905.
Get. The pulses (G) and (H) operate as a set pulse and a reset pulse of the RS flip-flop 906, respectively, and a standard signal frame pulse (I) desired is created. The product of this pulse (I) and the frame period pulse (F) synchronized with the input video signal is obtained by the AND circuit 907. At this time, if the input video signal is a standard signal, the pulse of FIG. Is obtained. However, when the input video signal is a non-standard signal, the pulse (J) cannot be obtained because the frame period pulse falls outside the range of the standard signal frame pull (F). This non-standard discrimination pulse (J) is applied to the latch circuit.
At 908, the horizontal scanning period pulse (E) is held by the signal inverted by the inverter 909 to obtain a non-standard detection signal (K). In the illustrated embodiment, when the detection signal (K) is at a high level, it is discriminated as a standard signal, and when it is at a low level, it is discriminated as a non-standard signal.

Next, an integrating circuit 1 for stabilizing the detection signal of the comparison circuit 113
14 will be described with reference to the block diagram of FIG.

FIG. 6 is a block diagram of the integrating circuit in FIG. 1, where 1101 is an inverter, 1102 is a NAND circuit, 1103 and 11
05 is an OR circuit, 1104 is an up / down counter, 1106 is R
It is an S flip-flop.

In the figure, the NAND circuit 1102 is the latch circuit 90 of FIG.
The output of 8 and the ripple carry output (F) of the counter circuit 904 are NANDed, and when the comparison circuit 113 detects the standard signal, a pulse is output only once in one frame period, and the up / down counter 1104 is up. Make it count. Similarly, the OR circuit 1103 outputs the output of the latch circuit 908 and the ripple carry output of the counter circuit 904 to the inverter 1101.
The up / down counter 1104 is down-counted when the comparison circuit 113 detects a non-standard signal from the one inverted in step (1).

When the count value of the up / down counter 1104 reaches 2N or zero, N is set as an initial value from the OR circuit 1105 to the counter 1104, and at the same time, ripple carry output (count value = 2N) or borrow output (count (Value = 0) operates the RS flip-flop 1106, and the final standard signal / non-standard signal detection signal is obtained. OR circuit
1105 is a ripple carry output or borrow output,
When the up / down counter 1105 is set to the initial value N, the above operation is repeated again.

In this way, the detection signal obtained by the comparison circuit 113 is used as a more stable detection signal for the changeover switch circuit 10
3, 104, and a comb filter can be connected to the output side of the line comb filter circuit 102 when a nonstandard signal is detected to minimize image interference such as dot interference and cross color.

FIG. 7 is a block diagram of a non-standard signal compatible interpolation filter circuit according to the present invention, in which 121 is a luminance signal input terminal obtained by luminance / color signal separation, 122 is a field type interpolation filter circuit, and 123 is A line type interpolation filter circuit, 124 is a changeover switch, and the same reference numerals as those in FIG. 1 indicate the same parts.

In the figure, the operation of the changeover switch 124 is the same as that in the case of FIG. 1, and when the non-standard signal is input, the line-type interpolation filter circuit 123 is operated by the non-standard signal detection signal regardless of the control signal from the motion detection circuit. To be selected. This allows the interpolation filter to switch between the field method and line method when a non-standard signal still image is input.
There is no deterioration in image quality.

Although the above embodiment is for the NTSC signal, it is needless to say that the non-standard detection circuit of this embodiment can be applied as long as the video signal has a specific frequency relationship between the color subcarrier frequency and the horizontal synchronizing frequency. .

In this case, the set value of each circuit may be changed so as to follow the frequency relationship of the input video signal.

〔The invention's effect〕

As described above, according to the present invention, this is detected so that not only the standard system signal but also the non-standard system signal represented by the VTR reproduction signal is optimally filtered. By providing a circuit and switching between the line type filter and the frame type or field type filter based on the detection information, the image quality interference such as dot interference and cross color interference generated in the conventional circuit at the time of non-standard type signal input is minimized. The circuit of the present invention can be configured with a simple digital circuit while suppressing the limit to improve the image quality, and thus can be easily integrated into an IC. It is possible to provide the television signal processing device.

[Brief description of drawings]

1 is a block diagram showing an embodiment of a signal processing circuit of a television signal processing apparatus according to the present invention, FIG. 2 is a block diagram of an APC circuit in FIG. 1, and FIG. 3 is an AFC in FIG.
FIG. 4 is a block diagram of the circuit, FIG. 4 is a block diagram of the divider circuit in FIG. 1, FIG. 5 is an operation waveform diagram of the circuit shown in FIG. 4, and FIG. 6 is a block diagram of the integrating circuit in FIG. FIG. 7 is a block diagram of an interpolation filter circuit corresponding to a non-standard signal, FIG. 8 is a block diagram of a frame comb filter circuit according to the prior art, FIG. 9 is a waveform diagram for explaining an NTSC system signal, and FIG. Is a block diagram of a conventional example of a motion adaptive comb filter circuit, FIG. 11 is a block diagram of a conventional example of a line filter circuit, and FIG. 12 is a still image signal waveform diagram of a non-standard signal. 101 ... Frame comb filter circuit, 102 ... Line comb filter circuit, 103 and 104 ... Changeover switch, 107 ... Burst extraction circuit, 108 ... APC circuit, 110 ...
… Synchronous separation circuit, 111 …… AFC circuit, 113 …… Comparison circuit, 1
14 …… Integrator circuit.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Toshiyuki Sakamoto 292 Yoshida-cho, Totsuka-ku, Yokohama Inside the Home Appliances Research Laboratory, Hitachi, Ltd. (56) References JP 61-184082 (JP, A) JP 50- 49935 (JP, A) JP 59-110296 (JP, A) JP 55-123280 (JP, A)

Claims (1)

(57) [Claims] Claim: What is claimed is: 1. A television signal processing device for performing processing for separating a luminance signal and a chrominance signal by processing between lines and between frames for a television composite video signal, motion detection for detecting movement of the video signal. Circuit, a sync separation circuit for separating the sync signal from the composite video signal, and an AFC for reproducing the sync signal based on the output of the sync separation circuit
Circuit, a first frequency dividing circuit for dividing the output of the AFC circuit, a color burst signal extracting circuit for extracting a color burst signal from the television composite video signal, and a color burst signal obtained by the extracting circuit. An APC circuit that generates a phase-controlled clock signal, a second divider circuit that divides the clock signal that is the output of the APC circuit, an output signal of the second divider circuit, and the first divider circuit. A comparison circuit for comparing the output signals of the frequency circuit, and when the comparison circuit outputs a coincidence and the motion detection circuit does not detect the motion, the luminance signal color signal separation processing between the frames is selected, When the comparison circuit outputs a disagreement or the motion detection circuit detects a motion, a luminance signal / color signal separation process between the lines is selected. Signal processor.