JPH08340550A - Digital television signal processor - Google Patents

Abstract

PURPOSE: To conduct signal processing including synchronization processing by which excellent image quality is obtained even from a non-standard signal by detecting a standard or a non-standard system of an input television signal and conducting optimum processing based on the result of detection. CONSTITUTION: A frequency divider 135 applies 1/m frequency division (m=1,2,...) to a synchronization separate output fH of an input signal and a frequency divider 126 applies 2/445m frequency division to a color burst signal fSC and a comparator 136 compares a synchronizing signal of an output of the frequency divider 135 and that of the frequency divider 126. When an input TV signal is a standard signal, a comparator 136 provides a coincident output and discriminates the signal to be a standard signal. On the other hand, when the input TV signal is a non-standard signal, the comparator 136 provides a dissidence output and discriminates the signal to be a non-standard signal. Based on the discrimination result, the signal processing conducts processing positions of picture elements are made referenced by using a horizontal synchronizing signal as a time reference so that the picture elements between frames or between fields are corresponded to each other and motion adaptive time space luminance chrominance separate circuits 109, 110 are replaced with a comb-line filter 102 for in-space processing.

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital television signal processing device, and more particularly to N generated by a VTR or the like.
The present invention relates to a digital television signal processing device that performs signal processing including synchronization processing necessary for optimally processing nonstandard signals that do not satisfy the specifications of the TSC system. 2. Description of the Related Art In a conventional television receiver, cross color and dot crawl caused by frequency-multiplexing a color signal with a luminance signal, and line flicker and scanning line caused by interlaced scanning. It is known that image quality deterioration such as interference occurs. In order to remove such a factor of image quality deterioration and to achieve high image quality, a Y-comb filter using a semiconductor memory and digital signal processing technology and a frame comb filter using the temporal correlation (frame correlation, field correlation) of an image is used. It has been considered to introduce a time axis processing technique such as / C separation (luminance / chromaticity separation), doubling the scanning line density by inter-field interpolation, and sequential scan conversion (Japanese Patent Laid-Open Nos. 58-115959 and 58-15995). -793
79). However, as is well known, these means for improving the image quality exert an effect only on a still image having a strong frame correlation and a strong field correlation, but rather cause a disturbance on a moving image. Therefore, the motion of the image is detected by taking the difference between the frames, and when it is determined as a still image, a frame comb filter and inter-field interpolation processing on the time axis, while when it is determined as a moving image Is known that aims to put it into practical use by introducing so-called motion adaptive processing, which is switched to spatial processing within a field (Japanese Patent Laid-Open No. 59-45770). [0003] The above-mentioned techniques are based on a color subcarrier frequency f _SC , a horizontal scanning frequency f _H , and a vertical scanning frequency f _V.
But accurately manage television signal in a predetermined frequency relationship (hereinafter, standard signal hereinafter) but its effect on can be expected, f _SC as household VTR or personal computers, f _H, f _V However, there is a problem that the effect cannot be obtained with respect to a television signal (hereinafter, referred to as a non-standard signal) which does not have a predetermined frequency relationship. For example, in the case of the NTSC system, f _SC and f _H have a relationship of f _SC = (455/2) · f _H ───── (1), and f _H and f _V Between them, a relationship of f _H = (525/2) · f _V = (262 + 1/2) · f _V ─ (2) is defined. The equation (2) indicates that the scanning lines are interlaced. Considering the pixels on two adjacent scanning lines of the current field, the pixel of the scanning line of the previous field corresponds to the middle of the pixels. . on the other hand,
From Equations (1) and (2), f _SC = (119347 + ／) · f _V / 2────── (3) is obtained, which is obtained when the phase of the chrominance subcarrier is changed for one frame period (frequency f _V / 2) indicates that the signals are out of phase with each other. As described above, since the above relationship is established in the standard signal, frame comb processing and inter-field interpolation can be performed. However, in a non-standard signal in which the frequencies f _SC , f _H , and f _V do not satisfy the above equations (1) and (2), the correspondence between pixels between fields and the inversion of color subcarriers between frames are caused. Since it does not hold, inter-field scanning line interpolation and separation of a luminance signal and a chrominance signal by a frame comb cannot be performed accurately. Therefore, when it is determined that the image is a still image, the image quality is significantly deteriorated by the above processing.
As described above, in the related art, the characteristics of standard / nonstandard signals are not taken into consideration, and it is difficult to perform appropriate processing on nonstandard signals. On the other hand, in order to perform a scanning line interpolation process, play the double horizontal scanning frequency 2f _H relative to the horizontal scanning frequency f _H of the input signal, thereby necessary to drive deflection circuit of the display-side (Japanese Patent Laid-Open No. 57-15
2279, JP-A-58-79379). Conventionally, to realize this, a PLL is used after extracting a synchronization signal from an input signal.
Generate 2f _H by the circuit and use it as a reference for signal processing.
Further, based on this 2f _H , it is general that the AFC circuit on the deflection side reproduces the synchronizing signal. In this case, when viewed from the input signal, the first and second two PLLs connected in cascade
Since the sync signal of 2f _H is reproduced through the circuit, the VTR for home use which contains a lot of jitter and skew.
With respect to such non-standard signals, there is a problem that the stability of the reproduced sync signal is poor. That is, if there is a skew (step-like phase change) in the input signal, the first PL
L responds oscillatory to follow it. Next, the second PLL operates more oscillatingly to follow the output of the first PLL, so that the delay time until completely following the phase change of the input becomes longer. Considering the jitter that occurs randomly, each PLL
Operates as described above, so that the fluctuation may be increased depending on the situation of the jitter and the response to the jitter. As described above, in the related art, the home VT
There is also a problem that the stability of a reproduced synchronization signal with respect to a non-standard signal such as R is poor. An object of the present invention is to provide a digital television signal processing device for performing signal processing including synchronization processing which can obtain good image quality even for non-standard signals. In order to achieve the above object, the present invention separates a synchronizing signal from an input television signal and generates a first pulse based on the separated synchronizing signal. A means for generating a second pulse synchronized with a color burst signal included in an input television signal, and first and second frequency dividers for frequency-dividing the first and second pulses by a predetermined number, respectively. And a comparison means for comparing the outputs of the first and second frequency dividers to detect whether the input television signal is a standard signal or a non-standard signal, and based on the detection result, the input television signal is converted into an input television signal. Correspondingly, the horizontal synchronization signal is used as a time reference so that pixels are associated with each other between frames and between fields, and optimal processing such as switching the luminance / chromaticity separation circuit to processing in space is performed. Further, in order to ensure the detection operation, for a non-standard signal which is very close to the standard signal such as the still mode of the optical video disc player, the disturbance of the burst reproduction control voltage at the time of color demodulation is detected. Disturbance detection means is provided to determine whether the signal is a standard signal or a non-standard signal. On the other hand, regarding the reproduction of the horizontal synchronizing signal, 1
I tried to reproduce this with one PLL. That is,
The voltage-controlled oscillator was controlled by directly comparing the phase of the sync separation output with that obtained by dividing the flyback pulse, and the sync signal having a double horizontal frequency was reproduced by dividing the frequency by a predetermined number. The output of the voltage controlled oscillator is also used as an optimum signal processing clock for processing non-standard signals. The above object is achieved by the above means. The first frequency divider divides the synchronization separation output f _H by m (m = 1, 2,...), While the second frequency divider divides the color burst signal f _SC by m. Is divided by 455 m / 2, and the comparing means compares the periods of both outputs. If the input television signal is a standard signal, the equation (1) is satisfied, so that the comparing means outputs a coincidence output and determines that the signal is a standard signal. On the other hand, if the input television signal is a non-standard signal, the equation (1) does not hold, so the comparison means outputs a non-matching signal and determines that it is a non-standard signal. Next, in the still mode of the optical video disc player, the phase of the color subcarrier of the output video signal becomes the same between frames. For this reason, a frame comb filter using an inverse phase relationship cannot be used, and becomes a non-standard signal. In this case, the color subcarrier is one in one frame.
At this point, the control voltage for color burst reproduction is disturbed. Therefore, the control voltage disturbance detecting means sets a predetermined threshold value, and when the threshold value is exceeded, determines that the signal is a non-standard signal. Based on the above detection results, at least non-standard signals are processed so that the pixel positions are associated with each other by using the horizontal synchronization signal as a time reference so that pixels are associated with each other between frames and between fields. , Non-standard signal motion adaptive spatio-temporal luminance / chromaticity separation circuit is switched to processing in space. Further, the voltage controlled oscillator, the frequency divider and the phase comparison means constitute a PLL circuit, which uses the input horizontal synchronizing signal as a direct reference to generate a flyback pulse having a frequency twice as high as that of the horizontal synchronizing signal and deflects it. Drive the system directly. As described above, optimal processing can be performed on non-standard signals, and good image quality can be provided. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of a signal and synchronization processing circuit according to the digital television signal processing apparatus of the present invention will be described below with reference to FIG. Also, all explanations below are N
The TSC method is used as an example. In FIG. 1, 101 is a video signal input terminal, 102 is a line comb filter, 103 and 104 are switches, 105 is a band pass filter (BPF), 10
6 is a color demodulation circuit, 107 and 108 are A / D converters for luminance signal and chrominance signal respectively, 109 is a motion adaptive luminance (Y) separation circuit (frame comb filter and line comb filter), and 110 is motion Adaptive color (C) separation circuit (same as above), 111 and 112 are switches, 113 is a noise reducer for luminance signal, 114 is a noise reducer for color signal, 115 is a motion adaptive scanning line interpolation circuit for luminance signal, 11
Reference numeral 6 denotes a color signal scanning line interpolation circuit, 117 and 118 denote luminance signal and color signal D / A converters, and 119 denotes RG.
B conversion circuit, 120 is a cathode ray tube, 121 is a burst signal extraction circuit, 122 is a phase comparator, 123 is a low-pass filter (LPF), 124 is a voltage controlled oscillator, 125,
126 is a frequency divider, 127 is a sync separation circuit, 128 is a phase comparator, 129 is an LPF, 130 is a voltage controlled oscillator, 1
31 is a frequency divider, 132 is a horizontal excitation / output circuit, 133 is a flyback transformer, 134 and 135 are frequency dividers, 13
6 is a period comparator, 137 is an integrator, 138 is a switch,
139 is a frequency divider. 140 is a pre-processing unit, 141 is a horizontal synchronous reproduction unit, 142 is a control voltage disturbance detection circuit, 14
3 is an OR circuit. First, an outline of the operation of the signal processing system will be described. When a standard signal is input, switches 103 and 1
04, 111, 112, and 138 are closed on the opposite side of the figure. The input signal is directly input to the luminance signal A / D converter 107. On the other hand, for color signals, BPF1
In 05, only the color signal band is extracted, and the color demodulation circuit 10
A color difference signal is obtained at 6. Color signal A / D converter 10
8 receives this and converts it into a digital signal. Hereinafter, for a luminance signal, a spatio-temporal luminance separation circuit 1 for motion adaptation
09, a luminance signal without crosstalk from the color signal is obtained, noise is reduced by the noise reducer 113, the scanning line is interpolated by the motion adaptive space-time scanning line interpolation circuit 115, and the horizontal signal is output by the D / A converter 117. A double speed luminance signal whose period is reduced to 1/2 is obtained. As for the color signal, a color signal without crosstalk from the luminance signal is obtained by the motion-adaptive color separation circuit 110, the noise is reduced by the noise reducer 114, and the scanning line interpolation circuit 116 is used.
The D / A converter 118 outputs a double-speed color signal whose horizontal cycle has been reduced to に て. D / A
The double-speed luminance signal / color difference signal outputs of the converters 117 and 118 are converted into RGB signals by the RGB conversion circuit 119 and drive the cathode ray tube 120. Next, the operation when a non-standard signal is input will be described. When a non-standard signal is input, the switches 103, 104, 111, 112, and 138 are closed as shown. First, an input video signal is separated into a luminance signal and a chrominance signal by a line comb filter 102 for in-space processing, and the chrominance signal becomes a color difference signal via a BPF 105 and a color demodulation circuit 106. The luminance signal and the color difference signal thus obtained are converted into digital signals by A / D converters 107 and 108, respectively. A / D converter 107
And 108 output jump the Y separation and C separation circuits 109 and 110 in FIG.
It is input to 3,114, and the noise in the low frequency range is reduced. Hereinafter, after the scanning lines are interpolated by the scanning line interpolation circuits 115 and 116, the D / A converters 117 and 118 and the RGB conversion circuit 11
The cathode ray tube 120 is driven via 9. Next, a method of generating a clock used for signal processing will be described. In this embodiment, a clock signal created with the color burst signal included in the input signal as a reference and a clock signal created with the horizontal synchronization signal included in the input signal as the reference are prepared. The former and the latter are used for non-standard signals. Here, the former is called a burst lock clock, and the latter is called a line lock clock. A burst signal extracting circuit 121 extracts a color burst signal (frequency f _SC ) from the input video signal. Voltage controlled oscillator 124
Oscillates at a frequency of 8f _SC, is frequency-divided by a frequency divider 125, and is phase-compared by a phase comparator 122 with a color burst signal and is supplied with an error voltage thereof. On the other hand, the sync separation circuit 127 extracts a sync signal from the input video signal and inputs the sync signal to the phase comparator 128. The voltage controlled oscillator 130 still oscillates at a frequency of 8 f _SC , and the frequency divider 131 divides the frequency by 910 and the frequency divider 134 by 2 (total 1820) to compare the phase with the sync separation output. , Receives the error voltage. The outputs of the voltage controlled oscillators 124 and 130 become a burst lock clock and a line lock clock, respectively. This clock is directly supplied to the D / A converters 117 and 118 and the frequency divider 13.
The A / D converters 107 and 108 are driven via 9. The reason why the signal processing system and the clock are switched between the standard signal and the non-standard signal as described above will be described below. FIG. 2 shows (a) a color burst signal, (b) a horizontal synchronization signal, (c) a burst lock clock, and (d) a line lock clock for the standard signal and the non-standard signal. First, regarding the standard signal, since the color burst signal f _SC exists in 455/2 cycles in one horizontal synchronization period ((a) in FIG. 4), the burst lock clock and line lock clock of 4 f _SC have one horizontal cycle period. To 9
There are 10 cycles (Figs. (C) and (d)). The comb filter separates a luminance signal and a chrominance signal by performing an operation between signals separated by a predetermined period such as one frame period or one line period. In this figure, no matter which clock is used, the color burst phase of the signal separated by 910 clocks is inverted, while the luminance signal is in phase, so if the sum of the signals separated by the predetermined interval is taken, the difference is taken. A color signal can be obtained. Next, regarding the scan line interpolation, the scan line of the current field (for example, the scan line immediately before) or the scan line of the previous field is fitted between adjacent scan lines of the current field. Even if a clock is used, the information of the signals separated by the number of clocks still corresponds exactly, so that the scanning line can be correctly interpolated. The noise reducer reduces noise by calculating corresponding pixels between frames. However, no matter which clock is used, information of a signal separated by a predetermined number of clocks can be accurately obtained. No problem is obtained because of the correspondence. Next, the case of inputting a non-standard signal will be described. As shown in the figure, the non-standard signal does not have a color burst signal of 455/2 cycles in one horizontal synchronizing period (Fig. (A)). Now, it is assumed that 455/2 cycles or more exist in one horizontal synchronization period. Therefore, in this case, the burst lock clock exists for 910 cycles or more in one horizontal synchronization period (FIG. 10C), while the line lock clock exists for exactly 910 cycles (FIG. 10D). However, considering a signal 910 cycles apart from the burst lock clock, the phase of the color burst signal is inverted. Therefore, if the high-frequency component of the luminance is small, the color signal can be extracted by taking the difference between the signals separated by the predetermined period, and the luminance signal can be obtained by subtracting this signal from the input video signal. it can. When the luminance signal has a high frequency component, the calculation is performed at the point where the pixels of the luminance signal differ according to the above sum, so this component is missing and leaks to the color signal, but when looking between the scanning lines Since the pixel difference is small, the influence is small.
However, when a frame comb filter is adopted, the pixel difference between frames is the accumulation of the difference between scanning lines, so that the error is large and the separation performance of the comb filter is greatly deteriorated. Therefore, a frame comb filter cannot be used. On the other hand, for scanning line interpolation, a luminance signal,
And the scanning line is fitted to the demodulated color signal, but since the scanning is performed with the horizontal synchronizing signal as a reference,
It is preferable that the clock used for the scanning line interpolation be associated with the pixels based on the horizontal synchronization signal. Therefore, the line lock clock should be used for the scan line interpolation. In this case, as shown in FIG. 5B, since a color burst signal exists for 455/2 cycles or more in one horizontal synchronization period, a difference between a luminance signal and a chrominance signal occurs near the end of horizontal scanning. Originally, it is a property that exists in the input signal, not a disturbance that occurs on the receiving side. As for the noise reducer, the line lock clock is preferable because the correspondence of pixels between frames is still important. This is because the line lock clock is also synchronized with the vertical synchronization signal when viewed on a field or frame basis. As described above, the clock used may be either a burst lock clock or a line lock clock for a standard signal, and a burst lock for a non-standard signal in a comb filter. A line lock clock is preferable for the clock and scanning line interpolation. However, comparing the burst lock clock and the line lock clock, the former often uses a crystal oscillator and the latter often uses an oscillator with an LC filter.
Comparing N (clock jitter, etc.), the former is superior. Therefore, it is possible to obtain better characteristics by using the burst lock clock for the standard signal. Also, it has been stated that the burst lock clock is good for non-standard signals, but this is for calculating signals at pixels separated by 63.5 μsec. A comb filter with a delay line) is equivalent to this. Therefore, in this embodiment, an analog delay line is provided in the comb filter in order to avoid using two clocks, a burst lock clock for the comb filter and a line lock clock for the scanning line interpolation. Next, a method of detecting a standard signal or a non-standard signal will be described. As a first means for this detection, the pulses related to the burst lock clock and line lock clock generated by the above-mentioned method are used. First, the output of the frequency divider 125 is used as a pulse related to the burst lock clock as shown in FIG. The frequency of this output is f _SC , but if this frequency is divided by the frequency divider 126 by, for example, 455 · 525/4, a pulse corresponding to the vertical frequency can be obtained from the equations (1) and (2). (For the frequency division of 455/525/4, the clock signal of 4f _SC may be obtained by frequency division of 455/525). On the other hand, the output of the frequency divider 134 is used as a pulse related to the line lock clock. Since the frequency of this output is f _H , if this is frequency-divided by, for example, 525/2 by the frequency divider 135, a pulse corresponding to the vertical frequency can also be obtained. For these two pulses,
As shown in FIG. 1, for example, when the frequency divider 126 is reset by the output of the frequency divider 135, the output of each frequency divider becomes as shown in FIG. That is, in FIG. 3, the frequency divider 135 generates a reset output as shown in FIG. 3A and an output having a predetermined width which rises before this reset pulse and falls later as shown in FIG. I do. The former reset pulse operates as a reset pulse for the frequency divider 126, and the frequency divider 126 starts frequency division based on the reset pulse. It occurs at different timings depending on whether the signal is a standard signal or a non-standard signal as described below. That is, if the input signal is a standard signal,
Since the expressions (1) and (2) are satisfied, the timings of the output of the frequency divider 126 and the reset output of the frequency divider 135 are substantially the same, as shown in FIG. Therefore, the frequency divider 12
The 6 outputs are included in the output of the frequency divider 135. The comparator 136 confirms the coincidence by, for example, taking a logical product of the two, and determines that the signal is a standard signal. However, if the input signal is a non-standard signal, equations (1) and (2) do not hold, so that the output of the frequency divider 126 is the frequency divider 1 as shown in FIG.
Not included in the output of 35. The comparator 136 detects this mismatch and determines that the input signal is a non-standard signal. The pulse width of the frequency divider 135 output determines the standard and non-standard detection sensitivities. That is, if the pulse width is wide, the non-standard signal is easily detected as a standard signal, and if the pulse width is narrow, the standard signal is also determined as a non-standard signal. Further, it is assumed that the comparator 136 operates every vertical period, and the frequency divider 126 sets f _SC to 455 · 525/4.
The frequency division and the frequency divider 135 have been described as dividing the frequency by 525525/2. However, the determination period is not limited to one vertical period, and may be one scanning period or one frame period, and may be selected to an arbitrary value. it can. In the case of determining whether the signal is a standard signal or a non-standard signal in this way, if impulse noise is mixed, malfunction of the sync separation circuit 127 will frequently occur. Therefore, the output of the frequency divider 134 cannot be obtained at normal timing, and the output of the frequency divider 135 also malfunctions.
In this case, even if the input signal is a standard signal, it is determined to be a non-standard signal.
7 is added. FIG. 4 is a block diagram showing this detail. In the figure, 401 is an up / down counter, 402 is an OR circuit, and 403 is an RS flip-flop. The match output of the comparator 136 is input to the up count terminal of the up / down counter 401, and the mismatch output is input to the down count terminal. Now, let us say that the initial value of the up / down counter 401 is N, and the carry output and the borrow output are obtained when the count values are 2N and 0, respectively. Further, the OR circuit 402 creates a load pulse for the counter 401 in response to the generation of these pulses, and the initial value N is set by this. In this case, since either a match or a mismatch input can be obtained every vertical cycle, the up / down counter 401
Performs an up-count or a down-count, but a carry output or a borrow output is generated only when one input becomes N times greater than the other input, and the RS flip-flop is set or reset. Therefore, even if the sync separation circuit 127 malfunctions, the standard / non-standard determination is not affected. Next, a method for detecting the disturbance of the control voltage used for the color burst reproduction for color demodulation, which is the second detecting means for the non-standard signal, will be described. In FIG. 1, the frequency divider 125
Output is a color burst reproduction output having a frequency f _SC , so that color demodulation can be performed by applying this to the color demodulation circuit 106. By the way, in a home optical video disc player, still mode, quick play,
Alternatively, it can be said that the signal reproduced by the special reproduction such as the slow mode is a kind of non-standard signal because the signal phase of the color burst becomes discontinuous with the track jump of the disc. At the discontinuous point of the burst signal phase, the burst phase input to the phase comparator 122 changes suddenly, so that the output of the phase comparator 122 is disturbed. As a result, during the period until the phase is synchronized again, the voltage control oscillator 124 The output clock frequency is also disturbed. Therefore, even if the clock is counted a predetermined number and delayed by one frame, an error corresponding to the disturbance of the clock occurs, and the pixels do not correspond between frames or fields. When you do
On the contrary, the image quality is deteriorated. That is, such signals are non-standard signals. In this case, since the expression (3) is not satisfied, the first detecting means can detect the error. However, since the error is very small, it is necessary to increase the detection sensitivity or perform counting for a long time. . Each of these methods has a problem of erroneous determination and a long detection time, and is not practical. Therefore, in the present embodiment, the disturbance detection circuit 142 for detecting the disturbance of the control voltage of the voltage controlled oscillator 124 at the discontinuity point of the color burst signal determines that it is a non-standard signal. , Its output and the output of the integration circuit 137 are OR'ed by the OR circuit 143.
In this way, comprehensive judgment is performed. FIG. 5 shows the configuration of the disturbance detection circuit 142.
In the figure, 151 is an amplifier circuit, 152 is an absolute value circuit, 153 is a comparator, and 154 is an RS flip-flop. The amplifier 151 includes the LPF shown in FIG.
The output of 123 is input. The amplifier 151 amplifies this and sends it to the absolute value conversion circuit 152. Absolute value conversion circuit 152
Rectifies this only in the positive direction and sends it to the comparator 153, as shown in FIG. The comparator 153 has a predetermined threshold and generates an output as shown in FIG.
4 is set as shown in FIG. Thereby, it can be determined as a non-standard signal. When the RS flip-flop 154 is reset with a pulse of one vertical cycle from the frequency divider 135, for example, a signal can be determined on a field basis. Next, the reproduction of horizontal synchronization will be described.
As described above, the voltage controlled oscillator 130 oscillating at the frequency of 8f _SC in FIG.
0 min is peripheral, generates a horizontal deflection pulse frequency is 2f _H. This output drives a deflection yoke (not shown) and a flyback transformer 133 via a horizontal excitation / horizontal output circuit 132. The deflection yoke performs horizontal scanning of the cathode ray tube, and the flyback transformer 133 produces various high-voltage power supplies for driving the television receiver. The output pulse of the flyback transformer 133 is applied to the frequency divider 1
An output pulse having a frequency f _H is generated by being divided by 2 by 34 and supplied to the phase comparator 128. As described above, the horizontal synchronizing signal can be reproduced by one PLL circuit with reference to the output of the sync separation circuit 127. Further, as is apparent, in this embodiment, the PLL is used to generate the line lock clock and the detection pulse of the standard / non-standard signal, and the hardware is efficiently used. ing. Although the present embodiment has been described as a curved example of the present invention, the following modifications are possible. FIG. 7 shows a second embodiment of the preprocessing section 140 of FIG. In FIG. 7, reference numeral 501 denotes an LPF, and other parts are the same as those described above. In this embodiment, a normal frequency separation method is used for separating a luminance signal and a chrominance signal when a nonstandard signal is determined without using a comb filter. The operation when the standard signal is input is exactly the same as described above. When a non-standard signal is input, the video input signal is input to the LPF 501. This is because the most typical video source as a non-standard signal is a home VTR, but since this signal is originally low in the high frequency component of the luminance, even if only the low frequency component of the input video signal is regarded as the luminance signal, This is because there are many cases where it cannot be determined. Of course, when a non-standard signal is received, subsequent motion adaptation YC
The separation circuits 109 and 110 jump. FIG. 8 shows the second part of the horizontal sync reproducing unit 141 of FIG.
FIG. In FIG. 8, 601 is a phase comparator, 602 is an LPF, 603 is a voltage controlled oscillator, and 604 is a frequency divider, and the same parts as those described above are denoted by the same reference numerals. In this embodiment, a PLL for generating a pulse related to a line lock clock for detecting a standard signal or a non-standard signal with respect to the output of the sync separation circuit 127 is described.
, A sampling clock for sampling a non-standard signal, and a horizontal synchronous reproduction unit configured by separate PLL circuits. In many cases, there is no problem if the configuration shown in FIG. 1 is used, but the following problem may occur depending on the television receiver. That is, the flyback transformer 133 receives a pulse from the horizontal excitation / horizontal output circuit 132 on the primary side and generates a high voltage on the secondary side. The high voltage is used as the anode voltage of the cathode ray tube 120. If the video signal reproduces a relatively bright screen, a large beam current flows from the anode to the cathode of the cathode ray tube 120, and as a result, the high voltage fluctuates. Appear on the next side. Therefore, the pulse width and peak value of the input pulse to the frequency divider 134 (the output pulse of the flyback transformer 133) change. This means the following: That is, even if the input video signal is a regular NTSC signal and has no horizontal frequency shift or jitter, depending on the brightness of the video signal,
An error voltage is generated at the output of the phase comparator 128 with respect to the voltage controlled oscillator 130. Therefore, even if the input signal is a normal standard signal, it may be determined as a non-standard signal depending on the magnitude of the error voltage. However, if the configuration as shown in FIG. 8 is adopted, the standard / non-standard detection circuit is composed of the PLL system which does not include the flyback transformer 133, so that stable detection which does not depend on the video signal content is performed. It becomes possible to perform an operation. In FIG. 8, the oscillation frequency of the voltage controlled oscillator 603 does not need to be set to 8f _SC , for example, 2f _{SC.
If the} frequency is set to a low value of _{H and the} frequency is divided by 525 in the frequency divider 135, a comparison pulse having one vertical cycle can be obtained. Further, in this embodiment, at the time of non-standard input,
Although the comb filter is switched to processing in space, the noise reducer and the scanning line interpolation circuit may be switched to processing in space (between scanning lines). FIG. 9 shows a second embodiment of the signal and synchronization processing circuit of the digital television receiver according to the present invention. This embodiment, as compared to FIG. 1, no scanning line interpolation circuit, thus deflection frequency of the horizontal has a f _H.
Therefore, the frequency divider 134 (frequency divider 2) in FIG. 1 is deleted, and the output of the flyback transformer 133 is directly input to the phase comparator 128. Similar to FIG. 1, modifications of FIGS. 7 and 8 are possible. FIG. 10 shows a third embodiment of the signal and synchronization processing circuit of the digital television receiver according to the present invention. Compared to FIG. 9, this embodiment does not have a noise reducer and has only a comb filter. Therefore, only a burst lock clock may be used as a sampling clock for signal processing. Therefore, no analog line comb filter is required. In this case, the detection result of the non-standard signal causes the control so that the motion-adaptive comb filter selects the line comb filter. As described above, according to the present invention, it is automatically detected whether the input signal is a normal standard signal or a non-standard signal, and based on the detected result, the signal processing system or the clock is selected. Alternatively, both of them can be switched, and the horizontal synchronization signal can be used as a time reference to perform signal processing in correspondence with the pixels. As a result, optimum processing can be performed even for non-standard signals, and good image quality can be provided.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing a first embodiment of the present invention. FIG. 2 is a waveform diagram showing a standard signal and a non-standard signal. FIG. 3 is a block diagram showing the operation of a standard / non-standard signal detection circuit. FIG. 4 is a block diagram showing details of an integrating circuit. FIG. 5 is a block diagram showing a control voltage disturbance detection circuit. FIG. 6 is an operation waveform diagram thereof. FIG. 7 is a block diagram showing a first modification example of FIG. FIG. 8 is a block diagram showing a second modified example of FIG. FIG. 9 is a block diagram showing a second embodiment of the present invention. FIG. 10 is a block diagram of a third embodiment of the present invention. [Description of Codes] 102 ... Comb Filter, 109 ... Motion Adaptive Y Separation, 113 ... Noise Reducer, 115 ... Motion Adaptive Scan Line Interpolation, 121 ... Burst Extraction, 127 ... Synchronous Separation, 128 ... Phase Comparator, 130 ... Voltage Control oscillator, 133 ... Flyback transformer, 142 ... Disturbance detection circuit, 401 ... Up-down counter, 402 ... OR circuit, 403 ... RS flip-flop, 501 ... LPF, 601 ... Phase comparator, 602 ... LPF, 603 ... Voltage control Oscillator, 604 ... Divider.

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Kazuo Nakagawa             Stock, 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa             Home Appliance Research Laboratory, Hitachi, Ltd.

Claims (1)

[Claims] 1. In a television signal processing device for digitally processing a television input signal, a spatio-temporal signal processing circuit including a luminance / chromaticity separation circuit for performing motion-adaptive time processing spatial processing; and whether the input signal is a standard signal A detection means for detecting whether or not the signal is a non-standard signal, and the output signal from the luminance / chromaticity separation circuit is taken out in association with the position of a pixel with the horizontal synchronizing signal as a time reference, and the detection means detects the non-standard signal. When detected, the brightness
A digital television signal processing device, characterized in that the chromaticity separation circuit is switched to processing in space. 2. The output signal from the luminance / chromaticity separation circuit is extracted by associating a pixel position for each line, each field, or each frame with a horizontal synchronizing signal as a time reference. The described digital television signal processing device. 3. 2. The digital television according to claim 1, wherein the output signal from the luminance / chromaticity separation circuit is read out by using a clock synchronized with a horizontal synchronization signal, and is taken out in association with a pixel. Signal processing device.