JPS6251392A - Television signal processing circuit - Google Patents

Television signal processing circuit

Info

Publication number
JPS6251392A
JPS6251392A JP60189656A JP18965685A JPS6251392A JP S6251392 A JPS6251392 A JP S6251392A JP 60189656 A JP60189656 A JP 60189656A JP 18965685 A JP18965685 A JP 18965685A JP S6251392 A JPS6251392 A JP S6251392A
Authority
JP
Japan
Prior art keywords
signal
circuit
signal processing
processing circuit
television signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60189656A
Other languages
Japanese (ja)
Other versions
JP2507301B2 (en
Inventor
Masahiko Achiha
征彦 阿知葉
Himio Nakagawa
一三夫 中川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP60189656A priority Critical patent/JP2507301B2/en
Priority to KR1019860006553A priority patent/KR900006475B1/en
Priority to US06/895,841 priority patent/US4739390A/en
Priority to CA000517188A priority patent/CA1264372A/en
Publication of JPS6251392A publication Critical patent/JPS6251392A/en
Application granted granted Critical
Publication of JP2507301B2 publication Critical patent/JP2507301B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Synchronizing For Television (AREA)
  • Color Television Systems (AREA)
  • Processing Of Color Television Signals (AREA)

Abstract

PURPOSE:To expand the application range of a signal processing circuit by arranging the 1st signal processing circuit having a picture memory and the 2nd signal processing circuit not having a picture memory in parallel and providing a changeover means for selecting the 2nd signal processing circuit in processing a signal not in compliance with the standard color television system. CONSTITUTION:A television signal to be processed is inputted to the 1st and 2nd signal processing circuits and inputted to a decision circuit 7 deciding whether or not the signal is the standard color television signal. The decision circuit 7 decides whether or not the signal is in compliance with the standard television system based on whether or not a chrominance subcarrier signal and a scanning frequency are in a prescribed offset or whether or not a field period and a frame period have timewise fluctuation. When the decision circuit 7 decides that the signal is not in compliance with the standard color television system, its output signal controls a changeover circuit 4 and an output of the 2nd signal processing circuit is obtained at a terminal 6.

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明はテレビジョン信号の処理回路に係り、特に標準
カラーテレビジョン信号のみならずこれから外れたテレ
ビジ讐ン信号をも処理するに好適なテレビジョン信号処
理回路に関する。
[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a television signal processing circuit, and particularly to a television signal suitable for processing not only standard color television signals but also television signals that deviate from the standard color television signals. Related to signal processing circuits.

〔発明の背景〕[Background of the invention]

カラーテレビジョン信号をフレームメモリを用いて輝度
信号と色差信号に分離したり、インタレース走査のテレ
ビジョン信号をフィールドメモリを用いて走査線補間し
順次走査信号に変換したりする信号処理方式が知られて
いる。(4?開昭58−129892号公報、特開昭5
8−77373号公報) フィールドメモリやフレームメモリのようにテレビジ璽
ン信号の垂直走査周期あるいはその整数倍にほぼ等しい
遅延を有する画像メモリを用いた信号処理回路では、入
力されるテレビジラン信号が標準カラーテレビジョン方
式に則った信号である場合には高品質の出力信号が得ら
れる。しかし広く普及している家庭用VTR等の出力信
号を処理する場合、これらの信号は時間軸が大幅に変動
したり1色副搬送波周波数と走査周波数が所定の関係に
なっていない等のように標準カラーテレビジョン信号か
らはずれた信号となっている。従ってフィールド周期や
フレーム周期の遅延を利用した上記信号処理では正しい
処理が行なえない。例えば、フレームメモリを用いた輝
度と色の分離においては、1フレ一ム周期前の信号とは
本来色副搬送波の位相が反転している(180異なって
いる)べきであるが、家庭用VTR等の信号はそうでな
いためフレーム間の演算からは正しい輝度信号と色信号
の分離が行なえない。また、フィールドメモリを用いた
走査線補間では、フィールド周期が一定せず、正しい補
間信号が得られない。ここれらの結果、フィールドメモ
リやフレームメモリ等の画像メモリを持った処理回路で
は家庭用VTRの信号を処理すると、得られた信号は非
常に劣化した信号しか得られないという問題があったQ 〔発明の目的〕 本発明の目的は標準カラーテレビジョン方式に則ってい
ないテレビジラン信号をも正しく扱いつる画像メモリを
持った信号処理回路を提供することにある。
Signal processing methods are known in which a color television signal is separated into a luminance signal and a color difference signal using a frame memory, and an interlaced scanning television signal is converted into a progressive scanning signal by interpolating scanning lines using a field memory. It is being (4? Publication No. 129892/1989, Japanese Patent Application Publication No. 58/1973)
8-77373)) In a signal processing circuit using an image memory such as a field memory or a frame memory that has a delay approximately equal to the vertical scanning period of the television program signal or an integral multiple thereof, the input television program signal is standard. If the signal conforms to the color television system, a high quality output signal can be obtained. However, when processing the output signals of widely used home VTRs, etc., these signals may have significant fluctuations in the time axis, or the subcarrier frequency of one color and the scanning frequency may not have a predetermined relationship. The signal deviates from the standard color television signal. Therefore, the above-mentioned signal processing using delays in the field period or frame period cannot perform correct processing. For example, when separating luminance and color using a frame memory, the phase of the color subcarrier should originally be inverted (180 degrees different) from the signal one frame period before, but in a home VTR, Since this is not the case for signals such as , it is not possible to correctly separate the luminance signal and chrominance signal from interframe calculations. Furthermore, in scanning line interpolation using a field memory, the field period is not constant and a correct interpolation signal cannot be obtained. As a result, when a processing circuit with an image memory such as a field memory or a frame memory processes a signal from a home VTR, the resulting signal is a very degraded signal. OBJECTS OF THE INVENTION It is an object of the present invention to provide a signal processing circuit having an image memory that can correctly handle television signals that do not conform to the standard color television system.

〔発明の概要〕[Summary of the invention]

本発明は上記目的を達成するため、フィールドメモリや
フレームメモリ等の画像メモリを持った第1の信号処理
回路と上述の画像メモリを持たない第2の信号処理回路
とを並置し、標準カラーテレビジョン方式に則らない信
号を処理する場合は上記第2の信号処理回路を選択する
切換手段を持つことを特徴とする。
In order to achieve the above object, the present invention juxtaposes a first signal processing circuit having an image memory such as a field memory or a frame memory and a second signal processing circuit having no image memory, and The present invention is characterized in that it has a switching means for selecting the second signal processing circuit when processing a signal that does not conform to the John system.

第1図は本発明の原理構成図を示す。同図において、端
子lに入力された処理されるべきテレビジラン信号は画
像メモリを有する第1の信号処理回路及び画像メモリを
持たない第2の信号処理回路に入力される。夫々の信号
処理回路の出力は切換回路4により切換選択され、もし
標準カラーテレビジョン信号に則とらない信号を処理す
る場合には端子5に印加される制御信号により切換回路
4を制御して、上記第2の信号処理回路3の出力が選択
され、端子6に出力される。
FIG. 1 shows a basic configuration diagram of the present invention. In the figure, a televised signal to be processed that is input to terminal l is input to a first signal processing circuit having an image memory and a second signal processing circuit having no image memory. The output of each signal processing circuit is switched and selected by a switching circuit 4, and if a signal not conforming to the standard color television signal is to be processed, the switching circuit 4 is controlled by a control signal applied to a terminal 5. The output of the second signal processing circuit 3 is selected and output to the terminal 6.

〔発明の実施例〕[Embodiments of the invention]

以下、本発明の実施例を図を用いて説明する。 Embodiments of the present invention will be described below with reference to the drawings.

第2図は本発明の一実施例を示す。同図において、第1
1第2の信号処理回路2,3及び切換回路4は第1図と
同じである。本実施例では、処理されるべきテレビジラ
ン信号は第1.第2の信号処理回路に入力されるはかC
ζ、この信号が標準カラーテレビジョン信号か否かを判
定する判定回路7に入カキられる。判定回路7では1色
副搬送液化号と走査周波数とが所定のオフセットの関係
にあるか否か、あるいはフィード周期、フレーム周期に
時間的変動があるか否か等により、標準カラーテレビジ
ョン方式に則っているか否かを判定する。判定回路7で
標準カラーテレビジョン方式に則っていないと判定され
た場合には、その出力信号により切換回路4を制御し、
第2の信号処理回路の出力が端子6に得られる。
FIG. 2 shows an embodiment of the invention. In the same figure, the first
1. The second signal processing circuits 2, 3 and switching circuit 4 are the same as in FIG. In this embodiment, the televised signals to be processed are first . The signal input to the second signal processing circuit is C.
ζ is input to a determination circuit 7 which determines whether this signal is a standard color television signal or not. The determination circuit 7 determines whether the standard color television system is selected depending on whether there is a predetermined offset relationship between the one-color subcarrier liquefaction signal and the scanning frequency, or whether there are temporal fluctuations in the feed cycle or frame cycle. Determine whether the rules are met. If the determination circuit 7 determines that the standard color television system is not followed, the switching circuit 4 is controlled by the output signal,
The output of the second signal processing circuit is obtained at terminal 6.

第3図は本発明の他の実施例を示す。同図において、2
,3は第1図、第2図と同じ第1及び第2の信号処理回
路である。本実施例では第1.第2の信号処理回路2.
3の出力は係数回路8.9に入力され、夫々に倍及び(
1−k)倍されて、加算回路11で加え合わされて、端
子6に出力される。ここにkは動きの有無により0〜1
の間を変化する動き係数を示す。動き係数には動き検出
回路10により、テレビジlン信号に含まれている動き
情報として抽出される。動きかな 静止画像の部分では
、kはlに近ずき、画像メモリを利用した第1の信号処
理回路の出力信号の割合が大きくなり、激しく動く変化
の大きい部分では、kは0に近ずき、第2の信号処理回
路の出力信号の割合が大きくなる。処理すべきテレビジ
ョン信号が標準カラーテレビ信号に則っていない信号の
場合には、端子12に現われた制御信号により、動き検
出回路を制御して、動き係数kを強制的に0にして、第
2の信号処理回路3の出力が端子6に得られるようにす
る。なお端子12に現われる信号はマニユアルに指令さ
れた信号あるいは入力テレビジ曹ン信号が特定端子から
入力されたものに動する信号さらには第2図に示した判
定回路7の出力信号でもよい。これは第1回の端子5に
印加される信号も同様である。
FIG. 3 shows another embodiment of the invention. In the same figure, 2
, 3 are the same first and second signal processing circuits as in FIGS. 1 and 2. In this embodiment, the first. Second signal processing circuit 2.
The output of 3 is input to the coefficient circuit 8.9, and is multiplied and (
1-k), are added together in an adder circuit 11, and are output to a terminal 6. Here, k is 0 to 1 depending on the presence or absence of movement.
indicates a motion coefficient that varies between . The motion coefficient is extracted by the motion detection circuit 10 as motion information included in the television signal. Is it movement? In the still image part, k approaches l, and the ratio of the output signal of the first signal processing circuit using the image memory increases, and in the part of the image that moves rapidly and has large changes, k approaches 0. As a result, the proportion of the output signal of the second signal processing circuit increases. If the television signal to be processed does not conform to the standard color television signal, the control signal appearing at terminal 12 controls the motion detection circuit to force the motion coefficient k to 0 and The output of the signal processing circuit 3 of No. 2 is made available to the terminal 6. The signal appearing at the terminal 12 may be a manually commanded signal, a signal that changes the input television signal from a specific terminal, or an output signal from the determination circuit 7 shown in FIG. 2. This also applies to the signal applied to the terminal 5 for the first time.

第4図はNT8C方式のカラーテレビジ曹ン信号フレー
ムメモリとラインメモリを用いて輝度信号Yと搬送色信
号Cとに分離する動き適応形YC分離回路に本発明を適
用した場合の詳細ブロック構成図の一例を示す。
FIG. 4 shows a detailed block configuration when the present invention is applied to a motion adaptive YC separation circuit that separates a luminance signal Y and a carrier color signal C using an NT8C color television signal frame memory and line memory. An example of a diagram is shown.

NTSC方式カラーテレビジ四ン信号では水平走査周期
H毎に搬送色信号Cの極性が反転しており、1フレーム
(525H)遅延した1フレーム前の画面上同じ位置の
走査線の信号においてもCの極性は反転している。入カ
テレビジ田ン信号をXo、これをラインメモリでIH遅
らせた信号X−□、フレームメモリで525H遅らせた
信号をX−5□5とすると、 第1の信号処理回路では
搬送色信号C1は として抽出できる。ここに% HBPFは搬送色信号帯
域の信号を抽出する帯域通過フィルタの伝達特性を示す
。一方、第2の信号処理回路では、搬送色信号C2は として抽出できる。従って、C1,C2を動き係数kに
より混合して得た所望の搬送色信号Cは式(1) 、 
(2)を次のように変形することにより、C=に−C,
+(1−k)C2 と求められる。第4図は式(3)を具体的に演算するこ
とにより、搬送色信号を求め、これを元のNT8C信号
から減算することにより輝度信号Yを得るものである。
In the NTSC system color television signal, the polarity of the carrier color signal C is reversed every horizontal scanning period H, and even in the signal of the scanning line at the same position on the screen one frame (525H) delayed, the C The polarity of is reversed. Assuming that the input television digital signal is Xo, the signal delayed by IH in the line memory is X-□, and the signal delayed by 525H in the frame memory is X-5□5, the carrier color signal C1 in the first signal processing circuit is as follows. Can be extracted. Here, %HBPF represents the transfer characteristic of a bandpass filter that extracts a signal in the carrier color signal band. On the other hand, in the second signal processing circuit, the carrier color signal C2 can be extracted as follows. Therefore, the desired carrier color signal C obtained by mixing C1 and C2 using the motion coefficient k is expressed by the formula (1):
By transforming (2) as follows, C= becomes −C,
It is calculated as +(1-k)C2. In FIG. 4, a carrier color signal is obtained by specifically calculating equation (3), and a luminance signal Y is obtained by subtracting this from the original NT8C signal.

すなわち、端子13に入力端子13に入力されたNTS
C信号X0はラインメモリ14でIH遅延した信号X−
8を、 フレームメモリ15で525H遅延した信号X
−525を得る。
That is, the NTS input to the input terminal 13
The C signal X0 is the signal X- delayed by IH in the line memory 14.
8, signal X delayed by 525H in frame memory 15
-525 is obtained.

ラインメモリ14、フレームメモリ15の出力を減算回
路16で減算し、減算結果を係数回路17でに倍し加算
回路18でラインメモリ14の出力と加算すると、式(
3)のカッコ()の部分の演算が実現できる。従って、
減算回路19で加算回路18の出力を入力信号X0から
減算し、係数回路20で1/2倍し、帯域通過フィルタ
21に入力し、搬送色信号帯域の成分だけを抽出すれば
、式(3)の演算になる所望の搬送色信号Cが得られる
The outputs of the line memory 14 and frame memory 15 are subtracted by the subtraction circuit 16, the subtraction result is multiplied by the coefficient circuit 17, and the addition circuit 18 adds it to the output of the line memory 14.
The operation in parentheses () in 3) can be realized. Therefore,
The output of the addition circuit 18 is subtracted from the input signal X0 by the subtraction circuit 19, multiplied by 1/2 by the coefficient circuit 20, and inputted to the bandpass filter 21 to extract only the components of the carrier color signal band. ) can be used to obtain the desired carrier color signal C.

さらに入力NTSC信号を遅延回路22で帯域通過フィ
ルタ21の演算遅延時間に等しい時間だけ遅延した信号
からC信号を減算回路23で減算すると、動き適応 処
理された所望の輝度信号Yが得られる。
Further, when the C signal is subtracted by the subtraction circuit 23 from a signal obtained by delaying the input NTSC signal by a time equal to the calculation delay time of the bandpass filter 21 in the delay circuit 22, a desired luminance signal Y subjected to motion adaptive processing is obtained.

動き係数には、本実施例においてはフレーム間の差信号
を減算回路26で得、これの被周波成分を低域通過フィ
ルタ27で抽出し、絶対値回路28でその絶対値をとる
とテレビジ嘗ン信号中の動き情報が、静止画部分でO1
動画部分ではフレーム間の輝度変化に比例した振幅で得
られる。この動き情報信号を読出専用メモIJ(ROM
)等で構成された変換回路29に入力すると、レジスタ
30に動き係数kを得る。
In this embodiment, a difference signal between frames is obtained by a subtraction circuit 26, a frequency component of this is extracted by a low-pass filter 27, and the absolute value is taken by an absolute value circuit 28. The motion information in the signal is O1 in the still image part.
In the video part, the amplitude is proportional to the brightness change between frames. This motion information signal is stored in a read-only memory IJ (ROM).
) etc., a motion coefficient k is obtained in a register 30.

入力端子13に入力される信号が家庭用VTR等からの
信号の場合、vT几のメカニカルな時間変動により信号
にはジッタがあり、lフレーム前の信号では正しい送位
相関係ではなくなる。従って、バースト部分のフレーム
間の和信号を観測し、信号がなければNTSCの標準カ
ラーテレビジョン方式に則った信号が入力されているこ
とが判り、和信号に有意の信号があれば、則とう家庭用
VTR等の信号であることが判定できる。第4図実施例
では、加算回路31でフレーム間の和信号を算出し、こ
れを帯域通過フィルタ32に入力し、副搬送波信号成分
を抽出し、入力信号中のバースト−信号期間を示すゲー
ト信号を抽出する抽出回路37で得られたゲート信号に
よりゲート回路33でバースト部分のみをゲートし、そ
の絶対値を絶対値回路34でとり、累算回路35でバー
スト期間累算し、その値をしきい値回路36で所定値と
比較することにより、有意の信号があれば、レジスタ3
0をリセットし、動き係数kを強制的に0にする。これ
によりフレームメモリの出力を利用しないYC分離の演
算が実現できる。
When the signal input to the input terminal 13 is a signal from a home VTR or the like, there is jitter in the signal due to mechanical time fluctuations in the vT, and a signal one frame before will not have a correct transmission phase relationship. Therefore, by observing the sum signal between the frames of the burst part, if there is no signal, it can be determined that a signal conforming to the NTSC standard color television system has been input, and if there is a significant signal in the sum signal, it is possible to It can be determined that the signal is from a home VTR or the like. In the embodiment shown in FIG. 4, an adder circuit 31 calculates a sum signal between frames, inputs this into a band pass filter 32, extracts a subcarrier signal component, and generates a gate signal indicating a burst signal period in an input signal. The gate circuit 33 gates only the burst portion using the gate signal obtained by the extraction circuit 37, the absolute value of which is taken by the absolute value circuit 34, the accumulation circuit 35 accumulates the burst period, and the value is calculated. By comparing with a predetermined value in the threshold circuit 36, if there is a significant signal, the register 3
Reset to 0 and force the motion coefficient k to 0. This makes it possible to perform YC separation calculations without using the output of the frame memory.

第5図はインタレース走査のテレビジョン信号を動き適
応形走査線補間して順次走査のテレビジョン信号に変換
する信号処理回路に本発明を適用した場合の実施例の他
の一例を示す。同図において、端子38に入力されたイ
ンタレース走査されているテレビジョン信号はIH遅延
させるラインメモリ39及び263H遅延させるフィー
ルドメモリ42に入力され、現信号ZQlこ対し、画面
上で直上の補間走査線の信号2′をつぎのような動き適
応形の演算で求める。すなわち、第1の信号処理回路で
は補間信号Ztを同じ位置の走査線である263H遅延
した前フィールドの信号Z−263で作成する。
FIG. 5 shows another example of the embodiment in which the present invention is applied to a signal processing circuit that performs motion adaptive scanning line interpolation on an interlace scan television signal to convert it into a progressive scan television signal. In the same figure, the interlace-scanned television signal input to the terminal 38 is input to the line memory 39 for IH delay and the field memory 42 for 263H delay, and in contrast to the current signal ZQl, the interlace scanned television signal directly above the screen is The line signal 2' is obtained by the following motion-adaptive calculation. That is, the first signal processing circuit generates the interpolation signal Zt using the signal Z-263 of the previous field delayed by 263H, which is the scanning line at the same position.

z’  ヨz(4) 一方、第2の信号処理回路では、補間信号2/2を現信
号Z0とIH遅延した信号Z−1の平均値で作成する。
z' yoz (4) On the other hand, the second signal processing circuit creates an interpolated signal 2/2 using the average value of the current signal Z0 and the signal Z-1 delayed by IH.

求める補間信号Z′は、Z′1とZ′2を第4図実施例
で説明した動き係数にで混合し、次式のように求める。
The interpolated signal Z' to be obtained is obtained by mixing Z'1 and Z'2 with the motion coefficient explained in the embodiment of FIG. 4 as shown in the following equation.

Z’ =kZ’1+(1−k )Z’2第5図における
加算回路40,1/2の係数回路41、減算回路43、
係数回路44、加算回路45は式(6)の演算を行なっ
て補間信号2′を得る回路を示す。現走査線の信号z0
と補間走査線の信号2′は時間圧縮回路46.47で時
間軸を1/2に圧縮されて、時間圧縮された走査線単位
に切換回路48を切換えて、端子49に水平走査周期が
1/2になり、入カテレビジ目ン信号のフィールド周期
の間に全走査線を走査する順次走査の信号が得られる。
Z'=kZ'1+(1-k)Z'2 In FIG. 5, the addition circuit 40, 1/2 coefficient circuit 41, subtraction circuit 43,
A coefficient circuit 44 and an adder circuit 45 represent circuits that perform the calculation of equation (6) to obtain an interpolated signal 2'. Current scanning line signal z0
The time axis of the interpolated scanning line signal 2' is compressed to 1/2 by the time compression circuits 46 and 47, and the switching circuit 48 is switched for each time-compressed scanning line, and the horizontal scanning period is set to 1 at the terminal 49. /2, and a progressive scanning signal is obtained in which all the scanning lines are scanned during the field period of the input television picture signal.

端子38に入力されたテレビジョン信号が家庭用VTR
等からの時間軸の変動した信号である場合にはレジスタ
50をリセットし、動き係数を強制的に0とし、ライン
平均補間の信号が補間信号として得られるようにする。
The television signal input to terminal 38 is connected to a home VTR.
If it is a signal whose time axis has fluctuated from, etc., the register 50 is reset, the motion coefficient is forced to 0, and a line average interpolation signal is obtained as an interpolation signal.

時間軸変動の有無は、本実施例では、テレビジョン信号
Z0の垂直同期のスタート信号を抽出回路51で抽出し
、標本周波数のクロック信号で動作するカウンタ52で
垂直同期信号の周期を計測し、ゲート回路53で垂直周
期の計測値を判定回路54に供給する。判定回路54で
は、計測値が所定の値に等しければ、標準テレビジョン
方式に則った信号であると判定する。もし等しくなけれ
ば、標準方式に則らない時間軸変動の大きい信号である
と判定し、レジスタ50をリセットする。
In this embodiment, the presence or absence of time axis fluctuation is determined by extracting the vertical synchronization start signal of the television signal Z0 with an extraction circuit 51, and measuring the period of the vertical synchronization signal with a counter 52 that operates with a clock signal of the sampling frequency. The gate circuit 53 supplies the measured value of the vertical period to the determination circuit 54 . The determination circuit 54 determines that the signal conforms to the standard television system if the measured value is equal to a predetermined value. If they are not equal, it is determined that the signal does not conform to the standard method and has large time axis fluctuations, and the register 50 is reset.

上述した第5図実施例の判定方法では、NTSC等の標
準方式のカラーテレビジョン信号の他にモノクロテレビ
ジ曹ンや他の方式のカラーテレビジョン信号(例えばコ
ンポーネント信号や色差信号を時間圧縮して輝度信号に
時間多重した信号)にも適用できる。
In the above-described determination method of the embodiment shown in FIG. 5, in addition to color television signals of standard formats such as NTSC, monochrome television signals and color television signals of other formats (for example, component signals and color difference signals are time-compressed). It can also be applied to signals that are time-multiplexed with luminance signals).

また、第4図実施例の判定回路と第5図実施例の判定回
路を並置し、両方の判定結果のいずれかで標準方式に則
らない信号であると判定した場合は第2の処理方式に切
換えるようにすれば、より広範囲の信号源に対応できる
信号処理回路が得られる。
In addition, when the judgment circuit of the embodiment shown in FIG. 4 and the judgment circuit of the embodiment shown in FIG. By switching to , a signal processing circuit that can handle a wider range of signal sources can be obtained.

なお、実施例の構成で明らかなように、第1及び第2の
信号処理回路はその共通部分は共用して実質的に異なっ
た部分のみを並置し、回路の簡易化を図ることの出来る
ことは明らかであり、具体的構成は実施例に限定される
ものではない。
Note that, as is clear from the configuration of the embodiment, the first and second signal processing circuits can share their common parts and arrange only substantially different parts side by side, thereby simplifying the circuit. is clear, and the specific configuration is not limited to the example.

また、第2図、第4、第5図の実施例では判定回路を設
は入カテレビジッン信号から、標準方式に則った信号で
あるか否かを自動判定しているが、その他に、入力端子
を複数組設け、特定の端子に入力された信号は標準方式
に則っとらない信号であるとしたり、外部からマニアル
に切換信号を印加する方法であってもよい。
In addition, in the embodiments shown in Figs. 2, 4, and 5, a judgment circuit is provided to automatically judge whether the input television signal conforms to the standard system or not. A method may be adopted in which a plurality of sets are provided and the signal input to a specific terminal is a signal that does not conform to the standard method, or a switching signal is manually applied from the outside.

画像メモリを有する信号処理回路の具体的実施例として
本発明ではYC分離回路とインタレース走査信号の順次
走査信号への変換回路のを示したが、本発明はこれに限
定されることなく、フレーム間符号化やフィールド間符
号化等の符号化装置や、雑音除去回路等一般に画像メモ
リを有して信号処理する回路一般に適用可能である。
Although the present invention has shown a YC separation circuit and a conversion circuit from an interlaced scanning signal to a sequential scanning signal as a specific example of a signal processing circuit having an image memory, the present invention is not limited thereto, It can be applied to encoding devices such as inter-coding and inter-field encoding, and to general circuits that generally have an image memory and perform signal processing, such as noise removal circuits.

本発明の実施例(第4、第5図)ではNTSC方式テレ
ビジ璽ン信号について述べたが、他方式(PAL%セカ
ム等)でも適用可能なことは明らかである。
In the embodiments of the present invention (FIGS. 4 and 5), the NTSC television signal has been described, but it is obvious that other systems (PAL% SECAM, etc.) are also applicable.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、フィールドメモリやフレームメモリ等
の画像メモリを有した信号処理回路に標準方式に則っと
らない信号が入力されても冗乱を引起すことなく信号処
理できるので、画像メモリを持った信号処理回路の適用
範囲を大幅に拡げることができる効果を有する。
According to the present invention, even if a signal that does not conform to a standard method is input to a signal processing circuit having an image memory such as a field memory or a frame memory, the signal can be processed without causing redundancy. This has the effect of greatly expanding the scope of application of signal processing circuits.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の原理を示す構成図、第2図〜第5図は
いずれも本発明の実/i?i例の構成図を示す。 2.3・・・信号処理回路、4,33,48.53・・
・切、換(ゲート)回路、7・・・判定回路、10・・
・動き検出回路、14.39・・・ラインメモ1ハ 1
5・・・フレームメモリ、16.18.19.23,2
6゜31.40,43.45・・・加(減)算回路、1
7゜20.41.44・・・係数回路、21.32・・
・帯域通過フィルタ、22・・・遅延回路、28.34
・・・絶対値回路、29・・・変換回路、30.50・
・・レジスタ、35・・・累算回路、36・・・しきい
値回路、37゜51・・・抽出回路、42・・・フィー
ルドメモリ、46゜47・・・時間圧縮回路、52・・
・カウンタ、54・・・判定回路。 7り
FIG. 1 is a block diagram showing the principle of the present invention, and FIGS. 2 to 5 are the actual embodiments of the present invention. A configuration diagram of example i is shown. 2.3...Signal processing circuit, 4,33,48.53...
・Switching, switching (gate) circuit, 7...judgment circuit, 10...
・Motion detection circuit, 14.39...Line memo 1c 1
5...Frame memory, 16.18.19.23,2
6゜31.40,43.45...addition (subtraction) circuit, 1
7゜20.41.44...Coefficient circuit, 21.32...
・Band pass filter, 22...Delay circuit, 28.34
... Absolute value circuit, 29 ... Conversion circuit, 30.50.
...Register, 35...Accumulation circuit, 36...Threshold circuit, 37°51...Extraction circuit, 42...Field memory, 46°47...Time compression circuit, 52...
-Counter, 54...judgment circuit. 7ri

Claims (1)

【特許請求の範囲】 1、テレビジョン信号の垂直走査周期あるいはその整数
倍にほぼ等しい遅延時間を有する画像メモリを持った信
号処理回路において、該画像メモリを持った第1の信号
処理回路と該画像メモリを持たない第2の信号処理回路
とを並置し、処理すべきテレビジョン信号が標準カラー
テレビジョン方式でない場合には該第2の信号処理回路
の出力を選択する切換手段とを有して成ることを特徴と
するテレビジョン信号処理回路。 2、処理すべきテレビジョン信号が標準カラーテレビジ
ョン信号であるか否かを判定する判定回路を設け、該判
定回路の出力により切換手段を制御することを特徴とす
る特許請求の範囲第1項に記載のテレビジョン信号処理
回路。 3、特許請求の範囲第1項あるいは第2項において、切
換手段が係数生成回路と係数乗算回路と加算回路とから
構成され、処理すべきテレビジョン信号が標準カラーテ
レビジョン信号でない場合には該係数生成回路出力の係
数値を所定値に強制的にセットし、該第2の信号処理回
路の出力が得られるようにしたことを特徴とするテレビ
ジョン信号処理回路。
[Claims] 1. In a signal processing circuit having an image memory having a delay time approximately equal to the vertical scanning period of a television signal or an integral multiple thereof, a first signal processing circuit having the image memory; a second signal processing circuit having no image memory, and a switching means for selecting the output of the second signal processing circuit when the television signal to be processed is not in a standard color television format. A television signal processing circuit comprising: 2. Claim 1, characterized in that a determination circuit is provided to determine whether or not the television signal to be processed is a standard color television signal, and the switching means is controlled by the output of the determination circuit. The television signal processing circuit described in . 3. In claim 1 or 2, if the switching means is comprised of a coefficient generation circuit, a coefficient multiplication circuit, and an addition circuit, and the television signal to be processed is not a standard color television signal, this applies. A television signal processing circuit characterized in that the coefficient value of the coefficient generation circuit output is forcibly set to a predetermined value so that the output of the second signal processing circuit can be obtained.
JP60189656A 1985-08-30 1985-08-30 Television signal processing circuit Expired - Lifetime JP2507301B2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP60189656A JP2507301B2 (en) 1985-08-30 1985-08-30 Television signal processing circuit
KR1019860006553A KR900006475B1 (en) 1985-08-30 1986-08-08 Television signal processing circuit
US06/895,841 US4739390A (en) 1985-08-30 1986-08-12 Television signal processing circuit
CA000517188A CA1264372A (en) 1985-08-30 1986-08-29 Television signal processing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60189656A JP2507301B2 (en) 1985-08-30 1985-08-30 Television signal processing circuit

Publications (2)

Publication Number Publication Date
JPS6251392A true JPS6251392A (en) 1987-03-06
JP2507301B2 JP2507301B2 (en) 1996-06-12

Family

ID=16244967

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60189656A Expired - Lifetime JP2507301B2 (en) 1985-08-30 1985-08-30 Television signal processing circuit

Country Status (1)

Country Link
JP (1) JP2507301B2 (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02135895A (en) * 1988-11-16 1990-05-24 Sanyo Electric Co Ltd Y/c separation circuit
JPH03143089A (en) * 1989-10-27 1991-06-18 Sanyo Electric Co Ltd Standard/non-standard detection circuit
JPH0856368A (en) * 1995-09-25 1996-02-27 Hitachi Ltd Digital television signal processor
JPH08340549A (en) * 1996-07-15 1996-12-24 Hitachi Ltd Digital television signal processor
JPH08340550A (en) * 1996-07-15 1996-12-24 Hitachi Ltd Digital television signal processor

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61184082A (en) * 1985-02-04 1986-08-16 アールシーエー トムソン ライセンシング コーポレーシヨン Video signal processing system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61184082A (en) * 1985-02-04 1986-08-16 アールシーエー トムソン ライセンシング コーポレーシヨン Video signal processing system

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02135895A (en) * 1988-11-16 1990-05-24 Sanyo Electric Co Ltd Y/c separation circuit
JPH03143089A (en) * 1989-10-27 1991-06-18 Sanyo Electric Co Ltd Standard/non-standard detection circuit
JPH0856368A (en) * 1995-09-25 1996-02-27 Hitachi Ltd Digital television signal processor
JPH08340549A (en) * 1996-07-15 1996-12-24 Hitachi Ltd Digital television signal processor
JPH08340550A (en) * 1996-07-15 1996-12-24 Hitachi Ltd Digital television signal processor

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JP2507301B2 (en) 1996-06-12

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