JP2502187B2 - Method for manufacturing lead frame for semiconductor device - Google Patents
Method for manufacturing lead frame for semiconductor deviceInfo
- Publication number
- JP2502187B2 JP2502187B2 JP28902590A JP28902590A JP2502187B2 JP 2502187 B2 JP2502187 B2 JP 2502187B2 JP 28902590 A JP28902590 A JP 28902590A JP 28902590 A JP28902590 A JP 28902590A JP 2502187 B2 JP2502187 B2 JP 2502187B2
- Authority
- JP
- Japan
- Prior art keywords
- lead
- lead frame
- semiconductor device
- connection support
- frame
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置用リードフレームの製造方法に関
し、特にトランジスタ,FETなどの３端子素子用の自立型
半導体装置用リードフレーム及び表面実装型半導体装置
用リードフレームの製造方法に関する。The present invention relates to a method for manufacturing a lead frame for a semiconductor device, and more particularly to a lead frame for a self-standing semiconductor device and a surface mount semiconductor for a three-terminal element such as a transistor and a FET. The present invention relates to a method for manufacturing a lead frame for a device.
従来この種の自立型半導体装置用リードフレームは第
９図，第10図，第11図に示すように第１リード2,第２リ
ード３および第３リード４が独立しており、リード配置
をコレクタセンタ、エミッタセンタ又はベースセンタに
するために３種類のリードフレームが必要であり、３種
類のプレス金型を作成しリードフレームを製造してい
る。又、表面実装型半導体装置においては第12図に示す
タイプのリードフレームしかなくリード配置を変えられ
ない。又、リード配置を変えようとした場合、まずプレ
ス金型を作成し、更にリードフレームを製造する必要が
ある。Conventionally, in this type of lead frame for a self-standing semiconductor device, the first lead 2, the second lead 3 and the third lead 4 are independent as shown in FIG. 9, FIG. 10 and FIG. Three types of lead frames are required to make the collector center, the emitter center, or the base center, and three types of press dies are produced to manufacture the lead frames. Further, in the surface mount type semiconductor device, there is only a lead frame of the type shown in FIG. 12, and the lead arrangement cannot be changed. Further, when it is attempted to change the lead arrangement, it is necessary to first create a press die and then manufacture a lead frame.
〔発明が解決しようとする課題〕 上述した従来の半導体装置用リードフレームの製造方
法ではリード配置の異なるものを製造するためにはそれ
ぞれ別の金型が必要であり、使用量の少ないリード配置
の半導体装置用リードフレームはリードフレーム自体の
価格が高くなり、又、使用量に応じた発注段階からの管
理工数が大となりコスト高になるという問題点があっ
た。[Problems to be Solved by the Invention] In the above-described method for manufacturing a lead frame for a semiconductor device, different molds are required to manufacture different lead arrangements, and lead arrangements with a small usage amount are used. As for the lead frame for a semiconductor device, there are problems that the price of the lead frame itself becomes high, and the management man-hours from the ordering stage corresponding to the usage amount become large and the cost becomes high.
本発明の半導体装置用リードフレームの製造方法は、
フレームに連結された第１リード，第２リードおよび第
３リードと、前記第１リード，第２リードおよび第３リ
ードのそれぞれ先端に設けられたボンディング領域と、
前記第１リード，第２リードおよび第３リードの各ボン
ディング領域とアイランドとをそれぞれつなぐ第１連結
支，第２連結支および第３連結支とを有するリードフレ
ームの半製品を作成する工程と、前記第１連結支，第２
連結支および第３連結支のうちの２つを選択して除去す
る工程とを有するというものである。A method of manufacturing a lead frame for a semiconductor device according to the present invention,
A first lead, a second lead and a third lead connected to the frame, and a bonding area provided at each tip of the first lead, the second lead and the third lead,
Creating a semi-finished product of a lead frame having a first connection support, a second connection support and a third connection support that respectively connect the bonding regions of the first lead, the second lead and the third lead to the island, and The first connection support, the second
And selecting and removing two of the connection support and the third connection support.
次に本発明について図面を参照して説明する。 Next, the present invention will be described with reference to the drawings.
まず、第１の実施例として自立型半導体装置用リード
フレームの製造方法について説明する。厚さ0.12mm程度
の帯状のFe−Ni−Co合金板を用意し、プレス加工により
第１図に示すようなリードフレームの半製品を作成す
る。この半製品は、帯状のフレーム５に連結された第１
リード2,第２リード３および第３リード４と第１リード
2,第２リード３および第３リード４のそれぞれ先端に設
けられたボンディング領域21,31,41と、第１リード，第
２リードおよび第３リードの各ボンディング領域21,31,
41とアイランド１とをそれぞれつなぐ第１連結支6,第２
連結支７および第３連結支８とを有している。First, a method for manufacturing a lead frame for a self-standing semiconductor device will be described as a first embodiment. A band-shaped Fe-Ni-Co alloy plate having a thickness of about 0.12 mm is prepared and a lead frame semi-finished product as shown in Fig. 1 is prepared by press working. This semi-finished product has a first frame connected to a strip-shaped frame 5.
Lead 2, 2nd lead 3 and 3rd lead 4 and 1st lead
2, bonding regions 21, 31, 41 provided at the tips of the second lead 3 and the third lead 4, and bonding regions 21, 31, for the first lead, the second lead, and the third lead, respectively.
1st connection support 6 and 2 which connect 41 and island 1 respectively
It has a connecting support 7 and a third connecting support 8.
次に、第２図に示すように、第１連結支６および３連
結支８を切断して除去することで、中央端子コレクタの
自立型半導体装置用リードフレームが得られる。又、第
３図に示すように、第２連結支７および第３連結支８を
切断して除去することで左端子コレクタ対応の自立型半
導体装置用リードフレームが得られ、更に第４図に示す
ように、第１連結支６および第２連結支７を切断するこ
とで右端子コレクタ対応の自立型半導体装置用リードフ
レームが得られる。この連結支除去作業は、パンチング
で簡単に行なうことができる。Next, as shown in FIG. 2, the first connection support 6 and the third connection support 8 are cut and removed to obtain a lead frame for a self-standing semiconductor device having a center terminal collector. Further, as shown in FIG. 3, by cutting and removing the second connecting support 7 and the third connecting support 8, a lead frame for a self-standing semiconductor device corresponding to the left terminal collector is obtained. As shown, by cutting the first connection support 6 and the second connection support 7, a lead frame for a self-standing semiconductor device corresponding to the right terminal collector can be obtained. This connection support removing work can be easily performed by punching.
次に、第２の実施例として表面実装型半導体装置用リ
ードフレームの製造方法について説明する。Next, as a second embodiment, a method for manufacturing a lead frame for a surface mount semiconductor device will be described.
第１の実施例と同様にして第５図に示すようなリード
フレームの半製品を作成する。この半製品では、フレー
ムの一鹸分が口の字形になっていること、第２リード３
がフレームの下側に連結され、第１フレーム２、第３フ
レーム４がフレームの上側に連結されていることが、第
１の実施例のものと異なっている。Similar to the first embodiment, a semi-finished lead frame product as shown in FIG. 5 is prepared. In this semi-finished product, one portion of the frame has a square shape, the second lead 3
Is connected to the lower side of the frame, and the first frame 2 and the third frame 4 are connected to the upper side of the frame, which is different from the first embodiment.
次に、第６図に示すように、第１連結支6,第３連結支
８を切断することで中央端子コレクタ対応のリードフレ
ームが得られ、第７図に示すように、第２連結支7,第３
連結支８を切断することで左端子コレクタ対応のものが
得られ、更に第８図に示すように、第１連結支3,第２連
結支８を切断することで右端子コレクタ対応の表面実装
型半導体装置用リードフレームが得られる。Next, as shown in FIG. 6, the lead frame corresponding to the central terminal collector is obtained by cutting the first connecting support 6 and the third connecting support 8, and as shown in FIG. 7, third
By cutting the connection support 8, one corresponding to the left terminal collector can be obtained. Further, as shown in FIG. 8, by cutting the first connection support 3 and the second connection support 8, surface mounting compatible with the right terminal collector. A lead frame for a semiconductor device is obtained.
以上説明したように本発明はアイランド１と３本のリ
ードをそれぞれ連結支を介して一体にしたリードフレー
ムの半製品を作成し、所要に応じ２本の連結支を自由に
切断することで、リードフレーム製造工程の統一化が図
れ量産性が上がり、リードフレームのコストダウン及び
デリバリーの短縮が図れるという効果がある。As described above, according to the present invention, the semi-finished product of the lead frame in which the island 1 and the three leads are integrated via the connection supports is produced, and the two connection supports are freely cut as required. This has the effects of unifying the lead frame manufacturing process, improving mass productivity, and reducing lead frame costs and delivery.
第１図，第２図，第３図，第４図は本発明を自立型半導
体装置用リードフレームの製造に適用した第１の実施例
の説明に使用する平面図、第５図，第６図，第７図，第
８図は本発明を表面実装型半導体装置用リードフレーム
の製造に適用した第２の実施例の説明に使用する平面
図、第９図，第10図，第11図は自立型半導体装置用リー
ドフレームの平面図、第12図は表面実装型半導体装置用
リードフレームの平面図である。 １……アイランド、２……第１リード、３……第２リー
ド、４……第３リード、６……第１連結支、７……第２
連結支、８……第３連結支。FIGS. 1, 2, 3, and 4 are plan views, FIG. 5, and FIG. 6 used for explaining the first embodiment in which the present invention is applied to manufacture of a lead frame for a self-standing semiconductor device. FIGS. 7, 7 and 8 are plan views used to explain a second embodiment in which the present invention is applied to the manufacture of a lead frame for a surface-mount type semiconductor device, FIGS. 9, 10 and 11. FIG. 12 is a plan view of a lead frame for a self-standing semiconductor device, and FIG. 12 is a plan view of a lead frame for a surface mount semiconductor device. 1 ... Island, 2 ... First lead, 3 ... Second lead, 4 ... Third lead, 6 ... First connection support, 7 ... Second
Connection support, 8 ... 3rd connection support.
Claims (1)
ードおよび第３リードと、前記第１リード，第２リード
および第３リードのそれぞれ先端に設けられたボンディ
ング領域と、前記第１リード，第２リードおよび第３リ
ードの各ボンディング領域とアイランドとをそれぞれつ
なぐ第１連結支，第２連結支および第３連結支とを有す
るリードフレームの半製品を作成する工程と、前記第１
連結支，第２連結支および第３連結支のうちの２つを選
択して除去する工程とを有することを特徴とする半導体
装置用リードフレームの製造方法。1. A first lead, a second lead, and a third lead connected to a frame, bonding regions provided at the respective tips of the first lead, the second lead, and the third lead, and the first lead. A step of producing a semi-finished product of a lead frame having a first connection support, a second connection support and a third connection support that respectively connect the bonding regions of the second lead and the third lead to the island, and the first connection support,
2. A method of manufacturing a lead frame for a semiconductor device, comprising the step of selecting and removing two of the connection support, the second connection support, and the third connection support.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28902590A JP2502187B2 (en) | 1990-10-26 | 1990-10-26 | Method for manufacturing lead frame for semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP28902590A JP2502187B2 (en) | 1990-10-26 | 1990-10-26 | Method for manufacturing lead frame for semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH04162758A JPH04162758A (en) | 1992-06-08 |
| JP2502187B2 true JP2502187B2 (en) | 1996-05-29 |
Family
ID=17737854
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP28902590A Expired - Lifetime JP2502187B2 (en) | 1990-10-26 | 1990-10-26 | Method for manufacturing lead frame for semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2502187B2 (en) |
-
1990
- 1990-10-26 JP JP28902590A patent/JP2502187B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH04162758A (en) | 1992-06-08 |
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