JP2024076530A - Semiconductor Module - Google Patents

Abstract

[Problem] To provide a semiconductor module capable of suppressing current variation. [Solution] A semiconductor module according to an embodiment has a first metal member, a second metal member, and a semiconductor package. The first metal member and the second metal member are arranged facing each other. A plurality of semiconductor packages are arranged between the first metal member and the second metal member. At least one of the first metal member and the second metal member includes an insulating portion. The insulating portion diverts the current path of a semiconductor package in the vicinity of a power terminal among the plurality of semiconductor packages when current is passed from one of the first metal member and the second metal member to the other. [Selected Figure] Figure 1

Description

An embodiment of the present invention relates to a semiconductor module.

For example, to build a MW-class power converter with a breakdown voltage of several kV, it is necessary to increase the current capacity of the semiconductor elements. For this purpose, semiconductor modules in which multiple semiconductor elements are mounted in parallel have been proposed. However, if there is variation in the current flowing through the semiconductor elements, there is a possibility that the semiconductor elements will break down due to heat generation in the semiconductor elements where the current is concentrated. For this reason, it is necessary to suppress the variation in current.

JP 2022-162191 A

The problem that this invention aims to solve is to provide a semiconductor module that can suppress current variation.

The semiconductor module of the embodiment has a first metal member, a second metal member, and a semiconductor package. The first metal member and the second metal member are arranged facing each other. A plurality of semiconductor packages are arranged between the first metal member and the second metal member. At least one of the first metal member and the second metal member has an insulating portion. The insulating portion diverts the current path of the semiconductor package near the power terminal among the plurality of semiconductor packages when current is passed from one of the first metal member and the second metal member to the other.

FIG. 2 is a top view of the semiconductor module according to the embodiment. FIG. 2 is a side view of the semiconductor module according to the embodiment taken along line II in FIG. 1 . FIG. 3 is a side view of the semiconductor module according to the embodiment taken along line III in FIG. 1 . FIG. 6 is an explanatory diagram of the minimum length of a first notch in the embodiment. 5A to 5C are diagrams illustrating the effect of a notch according to the embodiment. FIG. 13 is a diagram showing the relationship between the length of the first notch and the maximum current value in the embodiment. FIG. 13 is a diagram showing an area above the average current in a comparative example (without a notch). FIG. 13 is a diagram showing an area above the average current in the embodiment (with a notch). 13 is a diagram showing the relationship between the length of the first notch and the number of semiconductor elements with a current equal to or greater than the average current according to the embodiment. FIG. FIG. 13 is an explanatory diagram of the load from a short-circuited upper metal block to surrounding upper metal blocks. FIG. 13 is a top view of a semiconductor module according to a first modified example. FIG. 13 is a top view of a semiconductor module according to a second modified example.

The semiconductor module of the embodiment will be described below with reference to the drawings.

Fig. 1 is a top view of a semiconductor module 1 according to an embodiment. Fig. 2 is a side view of the semiconductor module 1 according to an embodiment taken along line II in Fig. 1. Fig. 3 is a side view of the semiconductor module 1 according to an embodiment taken along line III in Fig. 1. In each drawing, components of the semiconductor module 1 may be shown in a see-through manner.
The semiconductor module 1 of the embodiment includes a top plate 2 (an example of a first metal member), a bottom plate 3 (an example of a second metal member), an insulating case 4, and a semiconductor package P.

The top plate 2 and the bottom plate 3 are disposed opposite each other. For example, the top plate 2 and the bottom plate 3 are formed of a material with excellent electrical and thermal conductivity. For example, the top plate 2 and the bottom plate 3 contain copper or aluminum as a main component. For example, the top plate 2 and the bottom plate 3 are formed of a metal such as copper, a copper alloy, aluminum, or an aluminum alloy.

The top plate 2 and bottom plate 3 are formed into a plate shape that follows a horizontal plane. The top plate 2 is disposed above the bottom plate 3. The top plate 2 has a uniform thickness (length in the vertical direction) along the horizontal plane. For example, the thickness of the top plate 2 is 2 mm or more and 12 mm or less.

The top plate 2 is connected to the bottom plate 3 via the insulating case 4. The insulating case 4 is fixed perpendicularly to the lower surface (rear surface) of the top plate 2 and the upper surface (front surface) of the bottom plate 3. For example, the insulating case 4 is connected to the top plate 2 and the bottom plate 3 by an adhesive or a fastening member. For example, the insulating case 4 is formed of an insulating material having electrical insulation properties such as resin. The upper end of the insulating case 4 is connected to the lower surface of the top plate 2. The lower end of the insulating case 4 is connected to the upper surface of the bottom plate 3. As a result, the space surrounded by the bottom plate 3, the top plate 2, and the insulating case 4 is made into an airtight space.

In this embodiment, the upper part of the insulating case 4 is fastened to the top plate 2. Hereinafter, the screw 11 that fastens the upper part of the insulating case 4 to the top plate 2 is also referred to as the "insulating top plate fastening screw 11." In the figure, the outer shape of the insulating top plate fastening screw 11 when viewed from above is shown as a circle.

In this embodiment, the multiple semiconductor packages P are fastened to the top plate 2. Hereinafter, the screws 12 that fasten the semiconductor packages P to the top plate 2 are also referred to as "semiconductor top plate fastening screws 12." In the drawings, the outer shape of the semiconductor top plate fastening screws 12 when viewed from above is shown as a rectangle.

The illustrated example shows an example of fastening the top of the semiconductor package P to the top plate 2, but is not limited to this. For example, if a metal block (an example of a first conductive member) protrudes from the side of the semiconductor package P, the end of the metal block may be fastened to the top plate 2. For example, the manner in which the semiconductor package P is fastened to the top plate 2 can be changed according to the design specifications.

In this embodiment, the power terminal 5 and the notch 30 (an example of an insulating part) are provided in the top plate 2. The notch 30 is not formed in the bottom plate 3.

The bottom plate 3 has a connection terminal 5 (hereinafter also referred to as “lower connection terminal 6 ”) that protrudes laterally beyond the insulating case 4 .
The power terminal 5 extends upward from a portion of the top plate 2 that protrudes laterally beyond the insulating case 4. The power terminal 5 corresponds to a connection terminal (upper connection terminal) on the top plate 2 side. In the embodiment, electricity is passed from the lower connection terminal 6 to the upper connection terminal (power terminal 5).

Multiple semiconductor packages P are arranged between the top plate 2 and the bottom plate 3. The multiple semiconductor packages P are mounted in parallel within the semiconductor module 1. The multiple semiconductor packages P are arranged in the internal space (sealed space) of the insulating case 4. The multiple semiconductor packages P are arranged in a matrix (row and column) when viewed from above.

Each of the multiple semiconductor packages P includes an upper metal block 21 (an example of a first conductive member), a lower metal block 22 (an example of a second conductive member), a semiconductor element 23, and a sealing member 24.

The upper metal block 21 is a rectangular parallelepiped (block-shaped) member that functions as an upper electrode of the semiconductor element 23. The shape of the upper metal block 21 is not limited to a block shape. For example, the shape of the upper metal block 21 may be another shape, such as a crank shape. For example, the shape of the upper metal block 21 can be changed according to the design specifications.

The lower metal block 22 is a rectangular parallelepiped (block-shaped) member that functions as the lower electrode of the semiconductor element 23. For example, the upper metal block 21 and the lower metal block 22 are formed of a metal material with low electrical resistance, such as copper. The upper metal block 21 is connected to the top plate 2. The lower metal block 22 is connected to the bottom plate 3. The semiconductor element 23 is disposed between the upper metal block 21 and the lower metal block 22. The semiconductor element 23 is connected to the upper metal block 21 and the lower metal block 22.

For example, the semiconductor element 23 is a power semiconductor element used for power conversion. For example, the semiconductor element 23 is a switching element having a control electrode, such as an IGBT (Insulated Gate Bipolar Transistor) or a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor). For example, the semiconductor element 23 may be a diode, such as an FRD (Fast Recovery Diode).

The semiconductor package P includes multiple semiconductor elements 23. For example, when multiple semiconductor elements 23 are mounted on one semiconductor package P, the multiple semiconductor elements 23 do not all need to be identical. For example, a single semiconductor package P may contain a mixture of switching elements such as IGBTs and diodes such as FRDs.

The top surface of the semiconductor element 23 is connected to the upper metal block 21. For example, an emitter electrode, a source electrode, and a cathode electrode are formed on the other surface (top surface) of the semiconductor element 23. These electrodes are connected to the upper metal block 21 by, for example, solder, conductive adhesive, silver paste, etc.

The bottom surface of the semiconductor element 23 is connected to the lower metal block 22. For example, a collector electrode, a drain electrode, and an anode electrode are formed on one surface (bottom surface) of the semiconductor element 23. These electrodes are connected to the lower metal block 22 by, for example, solder, conductive adhesive, silver paste, etc.

The semiconductor element 23 is covered with a sealing member 24. For example, the sealing member 24 is formed of an insulating material having electrical insulation properties, such as resin. For example, the sealing member 24 is formed in a rectangular parallelepiped shape (hexahedral shape) that covers the semiconductor element 23, etc.

One upper metal block 21 and one lower metal block 22 are provided for each semiconductor package P. The upper metal block 21 and the lower metal block 22 protrude from the outside of the semiconductor package P through one of the six faces of the sealing member 24. The sealing member 24 covers the upper metal block 21 and the lower metal block 22 except for the parts that protrude from the inside of the semiconductor package P to the outside.

The upper metal block 21 protrudes from the upper surface of the sealing member 24 (the surface facing the underside of the top plate 2) to the outside of the semiconductor package P and is connected to the top plate 2. In this embodiment, the end of the upper metal block 21 is fastened to the underside of the top plate 2. The upper metal block 21 is connected to the top plate 2 by the semiconductor top plate fastening screws 12. The upper metal block 21 is placed in a state where a load is applied in the direction (upward) of the top plate 2 by the semiconductor top plate fastening screws 12. This load generates an initial stress in the semiconductor element 23.

In the example shown in the figure, the upper metal block 21 protrudes from the top surface of the sealing member 24 to the outside of the semiconductor package P and is connected to the top plate 2, but this is not limiting. For example, if the metal block protrudes from the side of the semiconductor package P, the end where the metal block protrudes may be connected to the top plate 2. For example, the side of the semiconductor package P may be the external exit. For example, the manner in which the semiconductor package P is connected to the top plate 2 can be changed according to the design specifications.

The lower metal block 22 extends from the lower surface of the sealing member 24 (the surface facing the upper surface of the bottom plate 2) to the outside of the semiconductor package P and is connected to the bottom plate 3. In this embodiment, the end of the lower metal block 22 is fastened to the upper surface of the bottom plate 3. The lower metal block 22 may be connected to the upper surface of the bottom plate 3 by, for example, solder, conductive adhesive, silver paste, etc.

The semiconductor package P is electrically connected to the top plate 2 and bottom plate 3 by the upper metal block 21 and the lower metal block 22. A plurality of semiconductor packages P are electrically connected in parallel between the top plate 2 and the bottom plate 3 via the upper metal block 21 and the lower metal block 22. In the embodiment, electricity is applied from the lower connection terminal 6. The current flows in the vertical direction of the semiconductor package P.

During normal operation (normal operation), current is divided into the lower metal blocks 22 of each semiconductor package P. In the example shown in the figure, during normal operation, current is divided into each of the multiple semiconductor packages P. The current then flows along the top plate 2 toward the power terminals 5.

For example, heat generated by the semiconductor element 23 during normal operation is thermally conducted to the top plate 2 and bottom plate 3 on both sides of the semiconductor module 1. This allows the semiconductor element 23 to be cooled. For example, compared to a configuration in which only one side of the semiconductor package P is connected to a metal member, the cooling performance can be improved. For example, the bottom plate 3 may also function as a cooler.

Next, the configuration of the top board 2 side will be described.
The top plate 2 is a rectangular plate (one example of an outer shape including four sides) when viewed from above. The power terminal 5 is provided on one of the four sides of the top plate 2 when viewed from above. The power terminal 5 is provided on one of the two short sides of the top plate 2 when viewed from above.

In the example shown in the figure, the tabletop 2 is rectangular when viewed from above, but is not limited to this. For example, the tabletop 2 may be square when viewed from above. For example, the shape of the tabletop 2 when viewed from above can be changed according to design specifications.

In the example shown in the figure, the power terminal 5 is provided on one short side of the top plate 2 when viewed from above, but this is not limited to this. For example, the power terminal 5 may be provided on one long side of the top plate 2 when viewed from above. For example, if the top plate 2 is square when viewed from above, the power terminal 5 may be provided on one side of the top plate 2 when viewed from above. For example, the installation mode of the power terminal 5 can be changed according to the design specifications.

For example, the power terminal 5 is formed of a material with excellent electrical conductivity and thermal conductivity. For example, the power terminal 5 contains copper or aluminum as a main component. For example, the power terminal 5 is formed of a metal such as copper, a copper alloy, aluminum, or an aluminum alloy. For example, the power terminal 5 may have fastening holes (two in the example of FIG. 3) whose number corresponds to the number of fastening parts with the external conductors (the number of external conductors).

The top plate 2 has a notch 30 that functions as an insulating section. The notch 30 is a hole that penetrates the top plate 2 from the upper surface to the lower surface. The notch 30 diverts the current path of the semiconductor package P near the power terminal 5 among the multiple semiconductor packages P when electricity is applied (when electricity is applied from the bottom plate 3 to the top plate 2).

The semiconductor packages P near the power terminal 5 include the semiconductor package closest to the power terminal 5 among the multiple semiconductor packages P (hereinafter also referred to as the "closest semiconductor package") and the semiconductor package next closest to the power terminal 5 after the closest semiconductor package. The notch 30 only needs to divert the current path of at least the closest semiconductor package among the multiple semiconductor packages P when current is applied.

The notches 30 are shaped to follow three of the four sides of the tabletop 2 when viewed from above. The notches 30 are shaped to follow two long sides and one short side of the tabletop 2 when viewed from above. The notches 30 are composed of two types of notches: two first notches 31 and one second notch 32. The notches 30 include a pair of first notches 31 arranged parallel to each other when viewed from above, and a second notch 32 intersecting the pair of first notches 31. The notches 30 are formed in a U-shape by combining the first notches 31 and the second notches 32 when viewed from above.

The first notch 31 is parallel to the side (long side) of the top plate 2 that is perpendicular to the power terminal 5 in top view. The second notch 32 is parallel to the side (short side) of the top plate 2 that is parallel to the power terminal 5 in top view. The two first notches 31 have the same shape as each other in top view. The two first notches 31 are symmetrical with respect to a center line that is perpendicular to the side (short side) of the top plate that is parallel to the power terminal 5 in top view.

The first notch 31 extends linearly in the opposite direction to the power terminal 5 (direction away from the power terminal 5) from a position C (hereinafter also referred to as "notch intersection C") where the first notch 31 and the second notch 32 intersect in a top view. The length of the first notch 31 can be changed from the notch intersection C in the opposite direction to the power terminal 5. No notch 30 is formed on the side of the top plate 2 opposite the side on which the power terminal 5 is provided.

When viewed from above, notches 30, insulating top plate fastening screws 11, and semiconductor top plate fastening screws 12 are present on the inside of the four sides of the top plate 2. Hereinafter, the portion where the upper part of the insulating case 4 and the top plate 2 are fastened is referred to as the insulating fastening portion. The insulating fastening portion corresponds to the portion where the insulating top plate fastening screws 11 are present when viewed from above. Hereinafter, the portion where the multiple semiconductor packages P and the top plate 2 are fastened is referred to as the semiconductor fastening portion. The semiconductor fastening portion corresponds to the portion where the semiconductor top plate fastening screws 12 are present when viewed from above. The insulating fastening portion (insulating top plate fastening screws 11) is positioned inside the notches 30 and outside the semiconductor fastening portion (semiconductor top plate fastening screws 12) when viewed from above.

In this embodiment, the power terminal 5 is arranged parallel to the second notch 32 when viewed from above. The length of the power terminal 5 is shorter than the length of the second notch 32 when viewed from above. The longitudinal center position of the power terminal 5 is the same as the longitudinal center position of the second notch 32 when viewed from above.

FIG. 4 is an explanatory diagram of the minimum length Lmin of the first notch 31 in the embodiment.
For example, in order to obtain the effect of balancing the currents, it is preferable that the first notch 31 extends as long as possible in a direction perpendicular to the power terminal 5 and away from the power terminal 5 in a top view. In this embodiment, the minimum length Lmin of the first notch 31 in a top view exceeds the length from the notch intersection C to the position of the nearest upper metal block 21. In the example of Fig. 4, the minimum length Lmin of the first notch 31 exceeds the length from the notch intersection C to the semiconductor top plate fastening screw 12 to which the nearest upper metal block 21 is fastened.

FIG. 5 is an explanatory diagram of the effect of the notch according to the embodiment.
The arrows in the figure indicate the current path from the upper metal block 21 (corresponding to the semiconductor top plate fastening screw 12 to which the upper metal block 21 is fastened) to the power terminal 5. Each arrow indicates a current path without a notch, a current path with a notch (near the power terminal), and a current path with a notch (far from the power terminal), respectively. The dashed arrow is a current path near the power terminal 5 when the notch 30 is not present. The solid arrow is a current path near the power terminal 5 when the notch 30 is present. The dashed-dotted arrow is a current path far from the power terminal 5 when the notch 30 is present.

The presence of notch 30 prevents current from flowing along the dashed arrow. Current that is cut off from the path of the dashed arrow takes a detour and flows along the solid arrow due to the presence of first notch 31. The current flow along the solid arrow becomes closer to the current flow along the dash-dotted arrow. This makes it possible to suppress current imbalance.

The reasons for the above are as follows. Due to the presence of the notch 30, the inductance of the current path of the solid arrow becomes larger than the inductance of the current path of the dashed arrow, and approaches the inductance of the current path of the dashed arrow. By making the first notch 31 even longer, the inductance of the current path of the solid arrow becomes even larger, and approaches the inductance of the current path of the dashed arrow. This is because the inductance of the current path of the solid arrow and the current path of the dashed arrow are essentially the same, and the current balance is also the same.

Figure 6 is a diagram showing the relationship between the length of the first notch 31 and the maximum current value in the embodiment. The vertical axis of Figure 6 corresponds to the maximum value (maximum current) of the current flowing through all upper metal blocks 21 when the rated current is applied. The horizontal axis of Figure 6 corresponds to the ratio of the length of the first notch 31 to one side of the top plate 2 (corresponding to the length of one long side of the top plate 2). In the figure, dashed lines linearly indicate multiple notch design values.

The relationship between the length of the first notch 31 and the maximum current value is negatively correlated. Increasing the length of the first notch 31 increases the inductance, which makes it possible to suppress the maximum current value. Increasing the inductance near the power terminal 5 brings it closer to the inductance farther from the power terminal. This makes the inductance at all positions equal (effectively uniform). When the inductance is equalized, the current near the power terminal 5 is suppressed (the current becomes smaller). Then, current begins to flow in the upper metal block 21 in positions where little current was flowing. This improves the current balance.

Figure 7 shows the area where the current is greater than the average current in a comparative example (without notches). Figure 8 shows the area where the current is greater than the average current in an embodiment (with notches). The hatched areas in the figure indicate the area where the current is greater than the average current. In the figure, the top surface of the top plate 2 and the semiconductor top plate fastening screws 12 are shown, and notches and the like are omitted.

Without the notch, a current greater than the average current is concentrated at the position of the upper metal block 21 (corresponding to the semiconductor top plate fastening screw 12 to which the upper metal block 21 is fastened) near the power terminal 5. With the notch, a current greater than the average current also flows at positions other than the upper metal block 21 near the power terminal 5. This is because a portion of the large current, such as current magnitudes 1 and 2, is sequentially added to current magnitudes 3 and onwards, increasing the number of positions where the current exceeds the average current. Current magnitudes 3 and onwards are an example of a current smaller than current magnitudes 1 and 2.

When a notch is present, even if the number of positions where the average current is exceeded increases, the current values of the first and second largest currents become smaller, and current concentration can be eliminated. When a notch is present, current concentration is eliminated, and the risk of short circuit failure due to heat generation in the semiconductor element 23 can be reduced.

Figure 9 is a diagram showing the relationship between the length of the first notch 31 in the embodiment and the number of semiconductor elements 23 with an average current or higher. The vertical axis of Figure 9 corresponds to the ratio of the number of semiconductor elements with an average current or higher to the total number of semiconductor elements. The horizontal axis of Figure 9 corresponds to the ratio of the length of the first notch 31 to one side of the top plate 2 (corresponding to the length of one long side of the top plate 2). In the figure, dashed lines linearly indicate multiple notch design values.

The relationship between the length of the first notch 31 and the number of semiconductor elements with a current equal to or greater than the average is positively correlated. The longer the length of the first notch 31, the greater the number of semiconductor elements with a current equal to or greater than the average. By increasing the number of semiconductor elements with a current equal to or greater than the average, current concentration is eliminated as described above, thereby reducing the risk of short circuit failure due to heat generation in the semiconductor element 23.

The semiconductor module 1 of this embodiment does not have a structure that causes magnetic flux to act on the same plane of the upper metal block 21 (corresponding to a conductor). Therefore, the inductance between the upper metal block 21 and the power terminal 5 can be adjusted by the length of the first notch 31. Therefore, the action of the notch 30 can improve the balance of the current without complicating the upper metal block 21.

As described above, the semiconductor module 1 of this embodiment has a top plate 2, a bottom plate 3, and a semiconductor package P. The top plate 2 and the bottom plate 3 are disposed opposite each other. A plurality of semiconductor packages P are disposed between the top plate 2 and the bottom plate 3. The top plate 2 has a notch 30. The notch 30 diverts the current path of the semiconductor package P in the vicinity of the power terminal 5 among the plurality of semiconductor packages P when current is passed from the bottom plate 3 to the top plate 2. The above configuration provides the following effects.
When electricity is passed from the bottom plate 3 to the top plate 2, the notch 30 diverts the current path of the semiconductor package P near the power terminal 5 among the multiple semiconductor packages P. As a result, the current path of the semiconductor package P near the power terminal 5 among the multiple semiconductor packages P becomes closer to the current paths of the other semiconductor packages P. Therefore, it is possible to provide a semiconductor module 1 capable of suppressing current variations.

For example, in a semiconductor module applied to a power converter for large-capacity applications, multiple semiconductor elements are arranged on the same plane to obtain a sufficient current capacity. This causes variations in the current flowing through the semiconductor elements, and if no measures are taken, the semiconductor elements where the current is concentrated will heat up and break down. Generally, the problem of current concentration is solved by improving the busbar that connects the semiconductor elements and the capacitor. However, improvements to the busbar include reducing and aligning the inductance. In this case, the busbar becomes complicated and the cost increases. On the other hand, if costs are reduced, it becomes difficult to improve the busbar shape, and it becomes difficult to solve the problem of current concentration. In other words, there is a trade-off between cost and performance, and it is necessary to resolve the trade-off. For example, if there are multiple conductors (metal blocks) that serve as current paths on the top plate, it is difficult to reduce the variation in current.

In contrast, in this embodiment, in order to suppress the variation in current, a notch 30 is provided in the top plate 2 to make the inductance uniform. The notch 30 has the effect of increasing the inductance at the position where the current was concentrated. By increasing the inductance, the variation in current can be suppressed. Because the notch 30 is a processed portion of the top plate 2, the number of processes and materials can be reduced, and costs can be reduced. In other words, according to this embodiment, the notch 30 makes it possible to achieve both high performance and low cost. Therefore, the trade-off between cost and performance can be eliminated.

10 is an explanatory diagram of a load from a short-circuited upper metal block 21A to a surrounding upper metal block 21B. The hatched area in the figure indicates the surrounding area of the short-circuited upper metal block 21A.
For example, if a short circuit occurs in the semiconductor element 23 due to some factor, the semiconductor element 23 may generate heat (e.g., Joule heat). Then, the components (e.g., silicon, a semiconductor material) of the semiconductor element 23 where the short circuit occurs (hereinafter also referred to as the "faulty chip") may melt and vaporize. Then, the upper metal block 21 is pushed up toward the top plate due to an increase in pressure inside the semiconductor package P. The top plate 2 is deformed upward by the upper metal block 21 being pushed up by the increase in pressure. The deformation of the top plate 2 transmits a load to the upper metal block 21B (hereinafter also referred to as the "surrounding block 21B") around the upper metal block 21A (hereinafter also referred to as the "starting block 21A") that is directly connected to the faulty chip. This induces a short circuit in the semiconductor elements 23 (hereinafter also referred to as the "healthy chip") other than the faulty chip.

For example, when the surrounding block 21B is pulled up, additional stress is generated in the semiconductor element 23 that is directly connected to the surrounding block 21B. The initial stress and additional stress cause a crack to occur in the semiconductor element 23. This causes a short circuit between the collector and emitter electrodes of the semiconductor element 23 (short circuit failure). Hereinafter, a short circuit failure in a semiconductor element 23 other than the semiconductor element 23 that has experienced an initial failure due to the occurrence of additional stress or the like is also referred to as a "concomitant short circuit failure."

For example, a notch 30 may be provided between two adjacent upper metal blocks 21. However, the load transmitted from the starting block 21A to the surrounding block 21B is reduced, making it less likely that a concomitant short-circuit failure will occur. For example, a surrounding block 21B that has experienced a short-circuit failure may push up the top plate 2 under the load and jump out from the top plate 2. In this case, the short circuit cannot be maintained, so it is necessary to hold it down so that it does not jump out from the top plate 2. For example, if the insulating top plate fastening screw 11 is positioned outside the notch 30 when viewed from above, it becomes difficult to hold down the upper metal block 21 that is under load.

In contrast, in this embodiment, a notch 30 is provided to surround all of the multiple upper metal blocks 21. This makes it possible to increase the load transmitted to the other upper metal block 21B (semiconductor element 23) when a short circuit failure occurs on one upper metal block 21A side (semiconductor element 23). This makes it easier for accompanying short circuit failures to occur.

Furthermore, in this embodiment, insulating top plate fastening screws 11 are provided between the outer sides of all of the multiple upper metal blocks 21 and the notches 30. This makes it easier to hold the upper metal blocks 21 under load against the top plate 2. This reduces the possibility of a faulty chip flying out of the top plate 2.

In this way, this embodiment also makes it possible to maintain a short circuit in the event of a failure. Maintaining a short circuit in the event of a failure is a necessary function in semiconductor module 1 that is applied to power converters for large-capacity applications, and therefore can be suitably applied.

For example, when the longitudinal center position of the power terminal 5 is located toward one end of one side of the top plate 2 in a top view, current concentrates in the upper metal block 21 on the side toward the one end closer to the power terminal 5. As a result, current is less likely to flow in the upper metal block 21 on the side toward the other end farther from the power terminal 5. In this way, depending on the positional relationship between the power terminal 5 and the notch 30, it becomes difficult to suppress the variation in current.
In contrast, in this embodiment, the longitudinal center position of the power terminal 5 in top view is the same as the longitudinal center position of the second notch 32. This is therefore preferable in terms of suppressing current variations.

The top plate 2 in this embodiment is disposed above the bottom plate 3. The semiconductor module 1 further includes an insulating case 4 that connects the top plate 2 and the bottom plate 3. An upper portion of the insulating case 4 is fastened to the top plate 2. A plurality of semiconductor packages P are fastened to the top plate 2. The power terminals 5 and the notches 30 are provided on the top plate 2. The above-described configuration provides the following effects.
By fastening the multiple semiconductor packages P to the top plate 2, a load is applied in the direction of the top plate 2. This load generates an initial stress in the semiconductor element 23. Therefore, the initial stress can be generated in the semiconductor element 23 with a simple fastening structure.
In addition, by raising the upper end of the insulating case 4, a preload can be applied to the multiple semiconductor packages P during assembly to eliminate play.

The top plate 2 of this embodiment has a plate-like outer shape including four sides when viewed from above. The notch 30 has a shape that extends along three of the four sides of the top plate 2 when viewed from above. The above-described configuration provides the following effects.
The notch 30 can be formed by simply processing the top plate 2 into a shape that follows three sides of the top plate 2. This reduces the number of steps and materials, and reduces costs. In other words, the notch 30 makes it possible to achieve both high performance and low cost. This eliminates the trade-off between cost and performance.

In this embodiment, a portion where the upper part of the insulating case 4 and the top plate 2 are fastened is defined as an insulating fastening portion. A portion where the multiple semiconductor packages P and the top plate 2 are fastened is defined as a semiconductor fastening portion. The insulating fastening portion is disposed on the inside of the notch 30 and on the outside of the semiconductor fastening portion when viewed from above. The above configuration provides the following effects.
In comparison with a case where the insulating fastening portion is disposed outside the notch 30 in a top view, it is easier to hold down the semiconductor element 23 under load. Therefore, it is possible to reduce the possibility that a defective chip will fly out from the top plate 2.

The semiconductor package P of the present embodiment includes an upper metal block 21 extending from the inside to the outside of the semiconductor package P. The end of the upper metal block 21 is fastened to the underside of the top plate 2. The above-described configuration provides the following effects.
Inside the semiconductor package P, a load is applied in the direction of the top plate 2 due to the fastening of the extension of the upper metal block 21 to the underside of the top plate 2. This load generates an initial stress in the semiconductor element 23. Therefore, with a simple structure in which the extension of the upper metal block 21 is fastened, it is possible to generate an initial stress in the semiconductor element 23.

The semiconductor package P of the present embodiment includes a lower metal block 22 extending from the inside to the outside of the semiconductor package P. The end of the extension of the lower metal block 22 is fastened to the upper surface of the bottom plate 3. The above-described configuration provides the following effects.
Inside the semiconductor package P, a load is applied in the direction of the bottom plate 3 due to the fastening of the extension of the lower metal block 22 to the upper surface of the bottom plate 3. This load generates an initial stress in the semiconductor element 23. Therefore, with a simple structure in which the extension of the lower metal block 22 is fastened, it is possible to generate an initial stress in the semiconductor element 23.

In this embodiment, the plurality of semiconductor packages P are arranged in a matrix when viewed from above. The above-described configuration provides the following advantages.
In a semiconductor module applied to a power converter for large-capacity applications, this arrangement is suitable for obtaining a current capacity.

The notch 30 of this embodiment includes a pair of first notches 31 arranged parallel to each other in a top view, and a second notch 32 intersecting the pair of first notches 31. A minimum length Lmin of the first notches 31 in a top view exceeds the length from the notch intersection point C to the closest position of the upper metal block 21. The above configuration provides the following effects.
The effect of balancing the current is more easily obtained compared to a case where the minimum length Lmin of the first notch 31 in top view is equal to or shorter than the length from the notch intersection C to the closest position of the upper metal block 21. Therefore, this is preferable in terms of suppressing the variation in the current.

The power terminal 5 of this embodiment is disposed parallel to the second notch 32 in a top view. The length of the power terminal 5 in a top view is shorter than the length of the second notch 32. The longitudinal center position of the power terminal 5 in a top view is the same as the longitudinal center position of the second notch 32. The above configuration provides the following effects.
In comparison with a case where the longitudinal center position of the power terminal 5 in top view is different from the longitudinal center position of the second notch 32, the effect of aligning the inductance by the notch 30 can be increased. In other words, the effect of balancing the current flowing from the semiconductor element 23 to the power terminal 5 can be easily obtained. Therefore, it is preferable in suppressing the variation in the current.

The semiconductor package P of this embodiment includes a plurality of semiconductor elements 23 disposed inside the semiconductor package P, an upper metal block 21 whose end extends from the inside to the outside of the semiconductor package P and is fastened to the underside of the top plate 2, and a lower metal block 22 whose end extends from the inside to the outside of the semiconductor package P and is fastened to the upper surface of the bottom plate 3. The upper surfaces of the semiconductor elements 23 are connected to the upper metal block 21. The lower surfaces of the semiconductor elements 23 are connected to the lower metal block 22. The above configuration provides the following effects.
In a semiconductor module applied to a power converter for large-capacity applications, this can be a suitable configuration for obtaining a current capacity.

Next, a modification of the embodiment will be described.
The power terminal in the embodiment is disposed at the center of one side of the top plate. However, the power terminal does not have to be disposed at the center of one side of the top plate.
Fig. 11 is a top view of the semiconductor module of the first modification. For example, as shown in Fig. 11, the power terminal 5 may be disposed near one end of one side of the top plate 2. In this case, the first notch 31B on the opposite side to the side where the terminal is brought closer may be shorter than the first notch 31A on the side where the terminal is brought closer. This provides the same effect as that of Fig. 1.
Fig. 12 is a top view of a semiconductor module of a second modified example. For example, as shown in Fig. 12, the power terminal 5 may be disposed near the other end of one side of the top plate (opposite side from Fig. 11). In this case, the first notch 31B on the opposite side to the side where the terminal is brought closer may be shorter than the first notch 31A on the side where the terminal is brought closer. This allows the same effect as Fig. 1 to be obtained.
For example, the layout of the power terminals can be changed according to design specifications.

In the embodiment, the top plate (first metal member) is disposed above the bottom plate (second metal member). In contrast, the top plate (first metal member) does not have to be disposed above the bottom plate (second metal member). For example, the first metal member may be disposed below or to the left or right of the second metal member. For example, each metal member may be block-shaped rather than plate-shaped. For example, the arrangement and shape of each metal member can be changed according to the design specifications.

The power terminal and insulating portion in the embodiment are provided on the first metal member. In contrast, the power terminal and insulating portion do not have to be provided on the first metal member. For example, the power terminal and insulating portion may be provided on the second metal member. For example, the power terminal may be provided on at least one of the first metal member and the second metal member. For example, the insulating portion may be provided on at least one of the first metal member and the second metal member. For example, the installation mode of the power terminal and insulating portion can be changed according to the design specifications.

The first metal member in the embodiment has a rectangular plate shape when viewed from above. However, the first metal member may have other shapes (e.g., a polygon other than a rectangle). For example, the first metal member may have a circular shape when viewed from above. For example, the shape of the first metal member can be changed according to design specifications.

The insulating portion of the embodiment has a shape (U-shape) that follows three of the four sides of the first metal member when viewed from above. In contrast, the insulating portion may have other shapes (e.g., J-shape, L-shape, U-shape). For example, the insulating portion does not have to be a notch (space). For example, the insulating portion may be an insulator provided in the space inside the notch. For example, the insulating portion may be composed of an insulating material. For example, the form of the insulating portion can be changed according to the design specifications.

The insulating fastening portion of the embodiment is disposed inside the insulating portion and outside the semiconductor fastening portion when viewed from above. In contrast, the insulating fastening portion does not have to be disposed inside the insulating portion and outside the semiconductor fastening portion when viewed from above. For example, the insulating fastening portion may be disposed outside the insulating portion when viewed from above. For example, the arrangement of the insulating fastening portion can be changed according to the design specifications.

In the embodiment, the end of the first conductive member is fastened to the underside of the first metal member. In contrast, the end of the first conductive member does not have to be fastened to the underside of the first metal member. For example, the end of the first conductive member may be connected to the underside of the first metal member by solder or the like. For example, the manner in which the end of the first conductive member is connected to the underside of the first metal member can be changed according to the design specifications.

In the embodiment, the end of the second conductive member is fastened to the upper surface of the second metal member. In contrast, the end of the second conductive member does not have to be fastened to the upper surface of the second metal member. For example, the end of the second conductive member may be connected to the upper surface of the second metal member by solder or the like. For example, the connection mode between the end of the second conductive member and the upper surface of the second metal member can be changed according to the design specifications.

In the embodiment, the multiple semiconductor packages are arranged in a matrix when viewed from above. In contrast, the multiple semiconductor packages do not have to be arranged in a matrix when viewed from above. For example, the multiple semiconductor packages may be arranged in a line (in only one direction) when viewed from above. For example, the arrangement of the multiple semiconductor packages can be changed according to the design specifications.

In the embodiment, the minimum length of the first notch in top view exceeds the length from the notch intersection to the position of the closest first conductive member. In contrast, the minimum length of the first notch in top view may be equal to or less than the length from the notch intersection to the position of the closest first conductive member. For example, the relationship between the minimum length of the first notch in top view and the length from the notch intersection to the position of the closest first conductive member can be changed according to the design specifications.

The power terminal in the embodiment is arranged parallel to the second notch when viewed from above. In contrast, the power terminal does not have to be arranged parallel to the second notch when viewed from above. For example, the power terminal may be arranged diagonally with respect to the second notch when viewed from above. For example, the positional relationship between the power terminal and the second notch can be changed according to the design specifications.

In the embodiment, the length of the power terminal in a top view is shorter than the length of the second notch. In contrast, the length of the power terminal in a top view may be longer than the length of the second notch. For example, the relationship between the length of the power terminal in a top view and the length of the second notch can be changed according to the design specifications.

In the embodiment, the longitudinal center position of the power terminal in a top view is the same as the longitudinal center position of the second notch. In contrast, the longitudinal center position of the power terminal in a top view may be different from the longitudinal center position of the second notch. For example, the relationship between the longitudinal center position of the power terminal in a top view and the longitudinal center position of the second notch can be changed according to the design specifications.

The semiconductor package of the embodiment includes multiple semiconductor elements inside the semiconductor package. In contrast, the semiconductor package does not have to include multiple semiconductor elements inside the semiconductor package. For example, the semiconductor package may include one semiconductor element inside the semiconductor package. For example, the number of semiconductor elements arranged inside the semiconductor package (configuration of the semiconductor package) can be changed according to the design specifications.

In the semiconductor module of the embodiment, electricity flows from the bottom plate (second metal member) to the top plate (first metal member). In contrast, electricity does not have to flow from the bottom plate (second metal member) to the top plate (first metal member). For example, electricity may flow from the top plate (first metal member) to the bottom plate (second metal member). For example, the direction of electricity flow in the semiconductor module can be changed according to the design specifications.

According to at least one of the embodiments described above, the insulating portion diverts the current path of the semiconductor package in the vicinity of the power terminal among the multiple semiconductor packages when current is passed from one of the first metal member and the second metal member to the other. This makes it possible to provide a semiconductor module that can suppress current variation.

Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the gist of the invention. These embodiments and their modifications are within the scope of the invention and its equivalents as set forth in the claims, as well as the scope and gist of the invention.

(Appendix 1)
A first metal member and a second metal member arranged opposite to each other;
a plurality of semiconductor packages disposed between the first metal member and the second metal member;
At least one of the first metal member and the second metal member includes an insulating portion that diverts a current path of a semiconductor package in the vicinity of a power terminal among the plurality of semiconductor packages when current is passed from one of the first metal member and the second metal member to the other.
Semiconductor module.

(Appendix 2)
the first metal member is disposed above the second metal member,
an insulating case connecting the first metal member and the second metal member;
an upper portion of the insulating case is fastened to the first metal member;
the plurality of semiconductor packages are fastened to the first metal member;
The power terminal and the insulating portion are provided on the first metal member.
2. The semiconductor module of claim 1.

(Appendix 3)
The first metal member has a plate shape having an outer shape including four sides when viewed from above,
The insulating portion has a shape that follows three of four sides of the first metal member when viewed from above.
3. The semiconductor module of claim 2.

(Appendix 4)
a portion where an upper portion of the insulating case and the first metal member are fastened to each other is an insulating fastening portion,
a semiconductor fastening portion where the plurality of semiconductor packages and the first metal member are fastened to each other;
The insulating fastening portion is disposed on the inner side of the insulating portion and on the outer side of the semiconductor fastening portion in a top view.
4. The semiconductor module according to claim 2 or 3.

(Appendix 5)
the semiconductor package includes a first conductive member extending from an interior to an exterior of the semiconductor package;
An extension of the first conductive member is fastened to a lower surface of the first metal member.
5. The semiconductor module according to claim 2 .

(Appendix 6)
the semiconductor package includes a second conductive member extending from an interior to an exterior of the semiconductor package;
The end of the second conductive member is fastened to the upper surface of the second metal member.
6. The semiconductor module according to claim 2 .

(Appendix 7)
The plurality of semiconductor packages are arranged in a matrix form when viewed from above.
7. The semiconductor module of claim 2 .

(Appendix 8)
the semiconductor package includes a first conductive member extending from an interior to an exterior of the semiconductor package;
the insulating portion includes a pair of first notches arranged parallel to each other in a top view, and a second notch intersecting the pair of first notches,
a minimum length of the first notch in a top view exceeds a length from a position where the first notch and the second notch intersect to a position of the first conductive member that is closest to the first notch;
8. The semiconductor module of claim 2 .

(Appendix 9)
the insulating portion includes a pair of first notches arranged parallel to each other in a top view, and a second notch intersecting the pair of first notches,
the power terminal is disposed parallel to the second notch in a top view,
A length of the power terminal is shorter than a length of the second notch in a top view,
A longitudinal center position of the power terminal is the same as a longitudinal center position of the second notch when viewed from above.
9. The semiconductor module of claim 2 .

(Appendix 10)
The semiconductor package includes:
A plurality of semiconductor elements disposed within the semiconductor package;
a first conductive member having an end extending from the inside to the outside of the semiconductor package and fastened to a lower surface of the first metal member;
a second conductive member having an end extending from the inside to the outside of the semiconductor package and fastened to an upper surface of the second metal member;
a top surface of the semiconductor element is connected to the first conductive member;
The bottom surface of the semiconductor element is connected to the second conductive member.
10. The semiconductor module of claim 2.

1...semiconductor module, 2...top plate (first metal member), 3...bottom plate (second metal member), 4...insulating case, 5...power terminal, 11...insulating top plate fastening screw (insulating fastening part), 12...semiconductor top plate fastening screw (semiconductor fastening part), 21...upper metal block (first conductive member), 22...lower metal block (second conductive member), 23...semiconductor element, 30...notch (insulating part), 31...first notch, 32...second notch, C...notch intersection (position where the first notch and the second notch intersect), P...semiconductor package, Lmin...minimum length of the first notch

Claims (10)

A first metal member and a second metal member arranged opposite to each other;
a plurality of semiconductor packages disposed between the first metal member and the second metal member;
At least one of the first metal member and the second metal member includes an insulating portion that diverts a current path of a semiconductor package in the vicinity of a power terminal among the plurality of semiconductor packages when current is passed from one of the first metal member and the second metal member to the other.
Semiconductor module. the first metal member is disposed above the second metal member,
an insulating case connecting the first metal member and the second metal member;
an upper portion of the insulating case is fastened to the first metal member;
the plurality of semiconductor packages are fastened to the first metal member;
The power terminal and the insulating portion are provided on the first metal member.
The semiconductor module according to claim 1 . The first metal member has a plate shape having an outer shape including four sides when viewed from above,
The insulating portion has a shape that follows three of four sides of the first metal member when viewed from above.
The semiconductor module according to claim 2 . a portion where an upper portion of the insulating case and the first metal member are fastened to each other is an insulating fastening portion,
a semiconductor fastening portion where the plurality of semiconductor packages and the first metal member are fastened to each other;
The insulating fastening portion is disposed on the inner side of the insulating portion and on the outer side of the semiconductor fastening portion in a top view.
The semiconductor module according to claim 2 or 3. the semiconductor package includes a first conductive member extending from an interior to an exterior of the semiconductor package;
An extension of the first conductive member is fastened to a lower surface of the first metal member.
The semiconductor module according to claim 2 or 3. the semiconductor package includes a second conductive member extending from an interior to an exterior of the semiconductor package;
The end of the second conductive member is fastened to the upper surface of the second metal member.
The semiconductor module according to claim 2 or 3. The plurality of semiconductor packages are arranged in a matrix form when viewed from above.
The semiconductor module according to claim 2 or 3. the semiconductor package includes a first conductive member extending from an interior to an exterior of the semiconductor package;
the insulating portion includes a pair of first notches arranged parallel to each other in a top view, and a second notch intersecting the pair of first notches,
a minimum length of the first notch in a top view exceeds a length from a position where the first notch and the second notch intersect to a position of the first conductive member that is closest to the first notch;
The semiconductor module according to claim 2 or 3. the insulating portion includes a pair of first notches arranged parallel to each other in a top view, and a second notch intersecting the pair of first notches,
the power terminal is disposed parallel to the second notch in a top view,
A length of the power terminal is shorter than a length of the second notch in a top view,
A longitudinal center position of the power terminal is the same as a longitudinal center position of the second notch when viewed from above.
The semiconductor module according to claim 2 or 3. The semiconductor package includes:
A plurality of semiconductor elements disposed within the semiconductor package;
a first conductive member having an end extending from the inside to the outside of the semiconductor package and fastened to a lower surface of the first metal member;
a second conductive member having an end extending from the inside to the outside of the semiconductor package and fastened to an upper surface of the second metal member;
a top surface of the semiconductor element is connected to the first conductive member;
The bottom surface of the semiconductor element is connected to the second conductive member.
The semiconductor module according to claim 2 or 3.

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