JP2024061418A - Wiring Board - Google Patents

Abstract

[Problem] Relieving stress on an insulating layer and suppressing the occurrence of cracks. [Solution] A wiring board (1) of an embodiment includes an insulating layer (113), a conductor layer (123) formed on the surface of the insulating layer (113), and a solder resist layer (114) formed on the surface of the insulating layer (113) and on the conductor layer (123). The conductor layer (123) includes a conductor pad (P1), the solder resist layer (114) has an opening (114a) that exposes the surface of the conductor pad (P1) facing away from the insulating layer (113) and the entire side surface of the conductor pad (P1), and a first portion (114a1) that is a portion of the inner side surface of the opening (114a) of the solder resist layer (114) on the insulating layer side includes a portion that forms a first angle of 30° or more and 75° or less with respect to the surface exposed in the opening (114a) of the insulating layer (113). [Selected Figure] Figure 2

Description

The present invention relates to a wiring board.

Patent document 1 discloses a wiring board in which a solder resist layer has an opening that exposes the entire surface and side of a conductor pad formed on an insulating layer. The inner surface of the opening is formed so as to expand toward the opposite side to the insulating layer.

JP 2004-22713 A

In the wiring board disclosed in Patent Document 1, stress applied to the wiring board may concentrate near the contact portion of the insulating layer that comes into contact with the inner surface of the solder resist. This concentrated stress may cause cracks to occur in the insulating layer near the contact portion.

The wiring board of the present invention includes an insulating layer, a conductor layer formed on the surface of the insulating layer, and a solder resist layer formed on the surface of the insulating layer and on the conductor layer. The conductor layer includes a conductor pad, the solder resist layer has an opening that exposes the surface of the conductor pad facing away from the insulating layer and the entire side of the conductor pad, and a first portion of the inner side of the opening of the solder resist layer that is on the insulating layer side includes a portion that forms a first angle of 30° or more and 75° or less with respect to the surface exposed in the opening of the insulating layer.

According to an embodiment of the present invention, stress on the insulating layer can be alleviated, and the occurrence of cracks can be suppressed.

FIG. 1 is a cross-sectional view showing an example of a wiring board according to an embodiment of the present invention. An enlarged view of part II in FIG. FIG. 4 is an enlarged cross-sectional view showing another example of the wiring board according to an embodiment of the present invention. 5A to 5C are cross-sectional views showing an example of a manufacturing process for the wiring board according to the embodiment of the present invention. 5A to 5C are cross-sectional views showing an example of a manufacturing process for the wiring board according to the embodiment of the present invention 5A to 5C are cross-sectional views showing an example of a manufacturing process for the wiring board according to the embodiment of the present invention 1 is a cross-sectional photograph of a wiring board showing an example of a wiring board according to an embodiment of the present invention.

A wiring board according to one embodiment of the present invention will be described with reference to the drawings. FIG. 1 shows a cross-sectional view of wiring board 1, which is an example of a wiring board according to one embodiment, and FIG. 2 shows an enlarged view of part II of wiring board 1 surrounded by a dashed line in FIG. 1, turned upside down. Note that the drawings referred to below are not intended to show the exact ratio of each component, but are drawn so that the characteristics of the embodiment can be easily understood. The illustrated wiring board 1 is merely an example of the wiring board according to this embodiment. The laminated structure of the wiring board according to the embodiment, and the number of each of the conductor layers and insulating layers are not limited to the laminated structure of wiring board 1 shown in the drawings, and the number of each of the conductor layers and insulating layers included in wiring board 1.

1, the wiring board 1 has a first main surface 1F and a second main surface 1S, and includes a conductor layer 123 having a first conductor pad P1 (also simply referred to as "conductor pad P1") and a solder resist layer 114 having an opening 114a on at least one side of the first main surface 1F and the second main surface 1S (the first main surface 1F side in the example of FIG. 1). In particular, in the wiring board 1 of this embodiment, as will be described in detail later, the opening 114a of the solder resist layer 114 has a predetermined shape, thereby exposing the entire surface and side surface of the first conductor pad P1. In the example of FIG. 1, the wiring board 1 is a so-called multilayer wiring board. However, the wiring board of the embodiment may be a so-called double-sided wiring board.

In the example of FIG. 1, the wiring board 1 includes a core substrate 100, a first wiring structure 10 formed on one main surface (first surface 100F described below) of the core substrate 100, and a second wiring structure 20 formed on the other main surface (second surface 100S described below) of the core substrate 100.

In the description of the wiring board of this embodiment, the side farther from the core substrate 100 is referred to as "top", "upper side", "outside", or "outer", and the side closer to the core substrate 100 is referred to as "bottom", "lower side", "inside", or "inner". In addition, in each component, the surface facing away from the core substrate 100 is also referred to as the "top surface", and the surface facing the core substrate 100 is also referred to as the "bottom surface".

In the example of FIG. 1, the core substrate 100 includes an insulating layer (core insulating layer) 101 and a conductor layer (core conductor layer) 102 formed on both sides of the core insulating layer 101. The core conductor layer 102 is patterned to have a predetermined conductor pattern. The core insulating layer 101 of the core substrate 100 is formed with a through-hole conductor 103 that connects the conductor pattern of the conductor layer 102 constituting the first surface 100F of the core substrate 100 to the conductor pattern of the conductor layer 102 constituting the second surface 100S. The inside of the cylindrical through-hole conductor 103 is filled with a resin body 104 containing any resin such as an epoxy resin.

In the example of FIG. 1, the first wiring structure 10 includes insulating layers 11 and conductor layers 12 that are alternately stacked on the first surface 100F of the core substrate 100. Specifically, the first wiring structure 10 has a multilayer wiring structure in which an insulating layer 111, a conductor layer 121, an insulating layer 112, a conductor layer 122, an insulating layer 113, a conductor layer 123, and a solder resist layer 114 are stacked in this order from the first surface 100F side of the core substrate 100. The conductor layers 121, 122, and 123 of the first wiring structure 10 and the core conductor layer 102 of the core substrate 100 are connected to each other by a connection conductor (so-called via conductor) 13 included in the insulating layers 111, 112, and 113 interposed between the conductor layers 121, 122, 123, and 102. The first main surface 1F of the wiring substrate 1 is constituted by the exposed surfaces of the outermost conductor layer 123 and the solder resist layer 114 of the first wiring structure 10.

In the example of FIG. 1, the second wiring structure 20 includes an insulating layer 21 and a conductor layer 22 that are alternately stacked on the second surface 100S of the core substrate 100. Specifically, the second wiring structure 20 has a multilayer wiring structure in which an insulating layer 211, a conductor layer 221, an insulating layer 212, a conductor layer 222, an insulating layer 213, a conductor layer 223, and a solder resist layer 214 are stacked in this order from the second surface 100S side of the core substrate 100. The conductor layers 221, 222, and 223 of the second wiring structure 20 and the core conductor layer 102 of the core substrate 100 are connected to each other by a connection conductor (so-called via conductor) 23 included in the insulating layers 211, 212, and 213 interposed between the conductor layers 221, 222, 223, and 102. The second main surface 1S of the wiring substrate 1 is constituted by the exposed surfaces of the outermost conductor layer 223 and the solder resist layer 214 of the second wiring structure 20.

The conductor layers 12, 22, the via conductors 13, 23, and the through-hole conductors 103 are formed using any metal such as copper or nickel, and may be composed of, for example, a metal foil such as copper foil, and/or a metal film formed by plating or sputtering. The conductor layers 12, 22, the via conductors 13, 23, and the through-hole conductors 103 are shown as single-layer structures in FIG. 1, but may have a multi-layer structure having two or more metal layers. For example, the conductor layer 102 formed on the surface of the insulating layer 101 may include a metal foil (preferably copper foil), an electroless plating film (preferably electroless copper plating film), and an electrolytic plating film (preferably electrolytic copper plating film). The conductor layers 12, 22, the via conductors 13, 23, and the through-hole conductors 103 may also include, for example, an electroless plating film and an electrolytic plating film.

Each of the conductor layers 121, 122, and 123 in the first wiring structure 10 is patterned to have a predetermined conductor pattern. In particular, the outermost conductor layer 123 in the first wiring structure 10 has a first conductor pad P1. The first conductor pad P1 can be electrically connected to a connection pad E1p of an external element (external element) E1 that can be connected to the wiring board 1 when the wiring board 1 is used. Also, in the example of FIG. 1, the outermost conductor layer 223 in the second wiring structure 20 has a second conductor pad P2. The second conductor pad P2 can be connected to a connection pad E2p of the external element E2.

The first conductor pad P1 may be electrically and mechanically connected to the connection pad E1p of the external element E1 by, for example, a bonding material such as solder. The external element E1 is not particularly limited, but may be, for example, a motherboard or any electronic component having a size larger than the wiring board 1. That is, in this case, the first surface 1F is a connection surface connected to the external element E1. The second conductor pad P2 may also be electrically and mechanically connected to the connection pad E2p of the external element E2 by, for example, a bonding material such as solder. The external element E2 is not particularly limited, but may be, for example, a semiconductor element or any electronic component having a size smaller than the wiring board 1. That is, in this case, the second surface 1S is a component mounting surface on which components are mounted. In the example of FIG. 1, the first conductor pad P1 is larger than either of the second conductor pads P2. There are cases in which the external element E1 larger than the external element E2 and the wiring board 1 are firmly connected over a larger area.

1, the first conductor pad P1 is connected to the conductor pattern of the core conductor layer 102 through a plurality of via conductors 13 arranged at the same position in a plan view. In other words, in the example of FIG. 1, the via conductors 13 are so-called stacked via conductors. Here, "plan view" means viewing an object with a line of sight parallel to a direction perpendicular to the first main surface 1F or the second main surface 1S of the wiring board 1. In this case, it is considered that the conductor patterns of the conductor layers 102, 121, 122, and 123 are easily connected to each other through a short path, so that the intended electrical characteristics are easily obtained. However, the first conductor pad P1 may be connected to the conductor pattern of the core conductor layer 102 through a plurality of via conductors 13 arranged at different positions in a plan view. Also, in the example of FIG. 1, the second conductor pad P2 is connected to the conductor pattern of the core conductor layer 102 through the via conductor 23.

Although omitted in FIG. 1, the first conductor pad P1 and the second conductor pad P2 may include a surface treatment layer (see the surface treatment layer P11 of the first conductor pad P1 in FIG. 2) on their surfaces. The surface treatment layer P11 is, for example, a coating formed by anticorrosion treatment and/or antirust treatment of the exposed parts of the first conductor pad P1 and the second conductor pad P2. The surface treatment layer P11 can prevent corrosion and oxidation of the core parts of the conductor pads P1 and P2. The surface treatment layer P11 is, for example, a metal coating containing a metal different from the core parts of the conductor pads P1 and P2, or an organic coating containing an organic substance such as an imidazole compound. When the core parts of the conductor pads P1 and P2 are formed of copper, the surface treatment layer P11 can be formed of nickel, palladium, silver, gold, or an alloy thereof, or solder, etc.

The insulating layers 101, 11, 21 constituting the wiring board 1 may each be formed using an insulating resin such as an epoxy resin, a bismaleimide triazine resin (BT resin), or a phenolic resin. Each insulating layer 101, 11, 21 may contain a reinforcing material (core material) such as glass fiber, and/or an inorganic filler such as silica or alumina. The solder resist layers 114, 214 may be formed using, for example, a photosensitive epoxy resin or a polyimide resin.

In the wiring board 1 of the embodiment, the solder resist layer 114 in the first wiring structure 10 has an opening 114a that exposes the first conductor pad P1. Specifically, the opening 114a exposes the surface (top surface) of the first conductor pad P1 facing away from the insulating layer 113 and the entire side surface of the first conductor pad P1. That is, the entire top surface and side surface of the first conductor pad P1 are exposed in the opening 114a. On the other hand, in the example of FIG. 1, the solder resist layer 214 in the second wiring structure 20 covers the peripheral portion of the second conductor pad P2, and the opening 214a exposes only the portion other than the peripheral portion of the second conductor pad P2 (part of the top surface). However, like the opening 114a of the solder resist layer 114 in the first wiring structure 10, the opening 214a of the solder resist layer 214 in the second wiring structure 20 may also expose the surface (upper surface) of the second conductor pad P2 facing away from the insulating layer 213 and the entire side surface of the second conductor pad P2.

As shown in FIG. 2, in the wiring board 1 of the embodiment, in particular, the first portion 114a1 (e.g., the lower half of the solder resist layer 114), which is the portion of the inner surface of the opening 114a of the solder resist layer 114 facing the insulating layer 113, includes a portion that is at a first angle θ1, for example, greater than or equal to 30° and less than or equal to 75°, with respect to the surface exposed in the opening 114a of the insulating layer 113.

When the solder resist layer 114 has an opening 114a exposing the top and side surfaces of the first conductor pad P1, as described above, the insulating layer 113 may be subjected to stress due to, for example, the difference in thermal expansion coefficient between the insulating layer 113 and the solder resist layer 114, or an external force acting on the first conductor pad P1 and the solder resist layer 114. In such a case, the stress may be concentrated on the contact portion A1 on the surface of the insulating layer 113 with the inner side surface of the opening 114a of the solder resist layer 114. Then, the contact portion A1 on the insulating layer 113 side may be unable to withstand the concentrated stress and may crack.

In the wiring board 1 of the embodiment, as described above, the first portion 114a1 includes a first angle θ1 that is 30° or more and 75° or less with respect to the surface exposed to the opening 114a of the insulating layer 113. In this case, for example, compared to a case in which the portion of the inner surface of the opening on the insulating layer side is composed only of a portion with an angle θ of approximately 90° with respect to the surface exposed to the opening of the insulating layer, the stress applied to the insulating layer 113 may be alleviated by the presence of the portion with the angle θ. This may suppress the occurrence of cracks in the insulating layer 113. It is more preferable that the first angle θ1 is 35° or more and 70° or less, and even more preferable that it is 45° or more and 70° or less. The angle of the inner surface of the opening 114a can be adjusted, for example, by the exposure conditions or development conditions of the solder resist layer 114, as described later.

2, the first conductor pad P1 is connected to a via conductor 13 that connects the other conductor layers 121 and/or conductor layers 122 (see FIG. 1) other than the conductor layer 123 in which the first conductor pad P1 is included. In other words, in the example of FIG. 2, the first conductor pad P1 is a so-called via pad. By using the first conductor pad P1 as a via pad, an external force that may be applied to the first conductor pad P1 is distributed to the via conductor 13, which may further suppress the occurrence of cracks in the insulating layer 113. However, the first conductor pad does not have to be directly connected to the other conductor layers and/or conductor layers. In other words, the first conductor pad may be a so-called independent pad.

The portion of the first angle θ1 may be a part of the first portion 114a1, and is preferably 50% or more of the first portion 114a1 in the thickness direction of the wiring board 1. The portion of the first angle θ1 may be a portion of the first portion 114a1 that is away from the contact portion between the solder resist layer 114 and the insulating layer 113.

The portion other than the portion of the first angle θ1 may have an angle different from the portion of the first angle θ1 with respect to the surface exposed to the opening 114a of the insulating layer 113. In the example of FIG. 2, the second portion (e.g., the upper half of the solder resist layer 114) 114a2, which is the portion of the inner surface of the opening 114a of the solder resist layer 114 opposite the insulating layer 113, includes a portion of the second angle θ2 (in the example of FIG. 2, the second angle θ2 is approximately 90°) that is an angle larger than the first angle θ1 with respect to the surface exposed to the opening 114a of the insulating layer 113. In this case, since the width of the opening 114a is wider in the second portion 114a2, it is considered that the first conductor pad P1 of the wiring board 1 and the connection pad E1p of the external element E1 (see FIG. 1) can be connected by a bonding material such as a larger solder or conductive adhesive. Therefore, it is considered that the connection reliability between the wiring board 1 and the external element E1 is improved. However, as shown in FIG. 3, the second portion 114a2 may be at the same angle as the first portion 114a1 with respect to the surface exposed in the opening 114a of the insulating layer 113.

The second portion 114a2 may be connected to the first portion 114a1 via a curved surface. In this case, it is considered that the bonding material connecting the first conductor pad P1 of the wiring board 1 and the connection pad E1p of the external element E1 (see FIG. 1) is likely to have a curved shape at the contact portion where the first portion 114a1 and the second portion 114a2 come into contact. Therefore, at the contact portion, the internal stress of the bonding material is relaxed without concentrating, and it is considered that cracks, etc. are less likely to occur in the bonding material.

The wiring board of the embodiment can be manufactured by any general method for manufacturing a wiring board. With reference to FIG. 1 and FIG. 4A to FIG. 4D, etc., the method for manufacturing the wiring board of the embodiment will be described using an example in which the wiring board 1 shown in FIG. 1 and FIG. 2 (or FIG. 3) is manufactured. Note that in FIG. 4A to FIG. 4D, part II in FIG. 1 is shown upside down and enlarged, similar to FIG. 2.

First, a core substrate 100 as shown in FIG. 1 is prepared. In preparing the core substrate 100, for example, a double-sided copper-clad laminate having a metal foil provided on the surface of the core insulating layer 101 is prepared. A through hole 101h is formed in the double-sided copper-clad laminate by, for example, drilling, and an electroless plating film is formed on the inner wall of the through hole 101h and the upper surface of the metal foil, and an electrolytic plating film is formed on the electroless plating film using the electroless plating film as a power supply layer.

The inside of the through-hole conductor 103 formed on the inner wall of the through hole 101h is filled with a resin body 104 by, for example, injecting epoxy resin. After the filled resin body 104 is solidified, an electroless plating film and an electrolytic plating film are further formed on the upper surface of the resin body 104 and the electrolytic plating film. As a result, a conductor layer 102 having a five-layer structure of a metal foil, an electroless plating film, an electrolytic plating film, an electroless plating film, and an electrolytic plating film is formed on both sides of the insulating layer 101. Then, the conductor layer 102 is patterned by a subtractive method to obtain a core substrate 100 with a predetermined conductor pattern.

Next, as shown in FIG. 1, a plurality of insulating layers 11 and conductor layers 12 are alternately laminated on the first surface 100F of the core substrate 100, and a plurality of insulating layers 21 and conductor layers 22 are alternately laminated on the second surface 100S. For example, each of the insulating layers 111, 112, and 113 on the first surface 100F of the core substrate 100 and each of the insulating layers 211, 212, and 213 on the second surface 100S can be formed by sequentially thermocompressing a film-like insulating resin onto the core substrate 100.

The conductor layers 12, 22 are formed using any conductor pattern forming method such as a semi-additive method at the same time as the via conductors 13, 23 that fill the openings that can be formed in the insulating layers 11, 21, for example, by laser light. The formation of multiple insulating layers 11, 21 and conductor layers 12, 22 is repeated, and as shown in the figure, the outermost insulating layer 113 on the first surface 100F side and the outermost insulating layer 213 on the second surface 100S side are stacked.

Next, as shown in FIG. 4A, a conductor layer (outermost conductor layer) 123 including a first conductor pad P1 is formed on the surface of the outermost insulating layer 113. Also, a conductor layer (outermost conductor layer) 223 including a second conductor pad P2 is formed on the surface of the outermost insulating layer 213 (see FIG. 1). A surface treatment layer P11 may be formed on the surface and side of the first conductor pad P1. For example, an organic coating including an organic substance such as an imidazole compound may be formed by applying a heat-resistant organic substance by spraying. Alternatively, a metal coating may be formed by depositing a metal such as nickel, palladium, or gold by electroless plating, for example. Although not shown, a surface treatment layer may also be formed on the surface and side of the second conductor pad P2 (see FIG. 1).

Next, as shown in FIG. 4B, a photosensitive film 114p is formed on the surfaces of the insulating layer 113 and the conductor layer 123. The photosensitive film 114p is made of, for example, a photosensitive epoxy resin, and can be formed by spray coating, curtain coating, lamination, or the like.

Next, as shown in FIG. 4C, a film-like mask M having a predetermined pattern corresponding to the shape of the opening 114a (see FIG. 2) is placed above the photosensitive film 114p, and exposure light L is irradiated onto the photosensitive film 114p through the mask M. The photosensitive film 114p may be directly drawn by the exposure light L without using a mask. In the exposure of the photosensitive film 114p, the portion 114p1 of the photosensitive film 114p on the insulating layer 113 side may be less likely to be cured by exposure than the portion 114p2 of the photosensitive film 114p on the opposite side to the insulating layer 113. Due to this difference in the progress of exposure, by appropriately selecting the conditions during development, it may be possible to remove more of the portion 114p1 on the insulating layer 113 side by the developer than the portion 114p2 on the opposite side to the insulating layer 113. Examples of such development conditions include the intensity of the exposure light L, the development ability of the developer, or the development temperature. This results in the formation of a solder resist layer 114 having an opening 114a shaped as shown in FIG. 2 (or FIG. 3).

Although not shown, the solder resist layer 214 (see FIG. 1) on the second surface 100S side of the core substrate 100 is also formed by any general method for forming the solder resist layer 214, such as exposing and developing a photosensitive film. If the solder resist layer 214 on the second surface 100S side of the core substrate 100 has a shape similar to that of the solder resist layer 114 on the first surface 100F side of the core substrate 100, the solder resist layer 214 can be formed by a method similar to the method for forming the solder resist layer 114 described above. Through the manufacturing process described above, the wiring substrate 1 shown in FIG. 1 can be manufactured.

Figure 5 shows a cross-sectional photograph of the wiring board of the embodiment taken with an optical microscope. As shown in Figure 5, the first portion 114a1 includes a portion that has a first angle of 30° or more and 75° or less with respect to the surface exposed in the opening 114a of the insulating layer 113.

The wiring board of the embodiment is not limited to those having the structure illustrated in each drawing, and the structure, shape, and material illustrated in this specification. In the wiring board of the embodiment, the shape of the opening of the solder resist layer on at least one of the first and second main surfaces includes a portion on the insulating layer side that is angled at 30° to 75° with respect to the surface exposed in the opening of the insulating layer. For example, in the wiring board of the embodiment, the opening of the solder resist layer can have any shape, such as being formed from a continuous curved surface over the entire length of the wiring board in the thickness direction.

REFERENCE SIGNS LIST 1 wiring board 100 core board 101 core insulating layer 102 core conductor layer 103 through-hole conductor 11, 111 to 113 insulating layer 114 solder resist layer 114a opening 114a1 first portion 114a2 second portion 12, 121 to 123 conductor layer 13 via conductor A1 contact portion P1 (first) conductor pad θ1 first angle θ2 second angle

Claims (6)

An insulating layer;
a conductor layer formed on a surface of the insulating layer;
a solder resist layer formed on the surface of the insulating layer and on the conductor layer;
A wiring board comprising:
the conductor layer includes a conductor pad;
the solder resist layer has an opening that exposes a surface of the conductor pad facing away from the insulating layer and an entire side surface of the conductor pad;
A first portion, which is the portion of the inner surface of the opening of the solder resist layer facing the insulating layer, includes a portion that forms a first angle of 30° or more and 75° or less with respect to the surface of the insulating layer exposed in the opening. 2. The wiring board according to claim 1,
The first angle is greater than or equal to 45° and less than or equal to 70°. 2. The wiring board according to claim 1,
A second portion of the inner surface of the opening of the solder resist layer, which is the portion opposite the insulating layer, includes a portion that forms a second angle greater than the first angle with respect to the surface of the insulating layer exposed in the opening. 4. The wiring board according to claim 3,
The second angle portion is connected to the first angle portion by a curved surface. 4. The wiring board according to claim 3,
The second angle is approximately 90 degrees. 2. The wiring board according to claim 1,
the wiring board has a first surface and a second surface opposite to the first surface,
The second surface is a component mounting surface on which components are mounted, and the conductor layer is formed on the first surface side.

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