JP2024044051A5 - - Google Patents

Download PDF

Info

Publication number
JP2024044051A5
JP2024044051A5 JP2022149365A JP2022149365A JP2024044051A5 JP 2024044051 A5 JP2024044051 A5 JP 2024044051A5 JP 2022149365 A JP2022149365 A JP 2022149365A JP 2022149365 A JP2022149365 A JP 2022149365A JP 2024044051 A5 JP2024044051 A5 JP 2024044051A5
Authority
JP
Japan
Prior art keywords
memory
memory device
transferred
data item
transfer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2022149365A
Other languages
English (en)
Japanese (ja)
Other versions
JP2024044051A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP2022149365A priority Critical patent/JP2024044051A/ja
Priority claimed from JP2022149365A external-priority patent/JP2024044051A/ja
Priority to US18/337,137 priority patent/US12327044B2/en
Priority to CN202311057950.3A priority patent/CN117746936A/zh
Priority to TW112131731A priority patent/TWI897014B/zh
Publication of JP2024044051A publication Critical patent/JP2024044051A/ja
Publication of JP2024044051A5 publication Critical patent/JP2024044051A5/ja
Priority to US19/181,699 priority patent/US20250244915A1/en
Pending legal-status Critical Current

Links

JP2022149365A 2022-09-20 2022-09-20 メモリシステム Pending JP2024044051A (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2022149365A JP2024044051A (ja) 2022-09-20 2022-09-20 メモリシステム
US18/337,137 US12327044B2 (en) 2022-09-20 2023-06-19 Memory system
CN202311057950.3A CN117746936A (zh) 2022-09-20 2023-08-22 存储器系统
TW112131731A TWI897014B (zh) 2022-09-20 2023-08-23 記憶體系統
US19/181,699 US20250244915A1 (en) 2022-09-20 2025-04-17 Memory system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2022149365A JP2024044051A (ja) 2022-09-20 2022-09-20 メモリシステム

Publications (2)

Publication Number Publication Date
JP2024044051A JP2024044051A (ja) 2024-04-02
JP2024044051A5 true JP2024044051A5 (enExample) 2025-04-15

Family

ID=90245072

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2022149365A Pending JP2024044051A (ja) 2022-09-20 2022-09-20 メモリシステム

Country Status (4)

Country Link
US (2) US12327044B2 (enExample)
JP (1) JP2024044051A (enExample)
CN (1) CN117746936A (enExample)
TW (1) TWI897014B (enExample)

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9508437B2 (en) 2014-01-30 2016-11-29 Sandisk Technologies Llc Pattern breaking in multi-die write management
US20190214087A1 (en) 2018-01-09 2019-07-11 Western Digital Technologies, Inc. Non-volatile storage system with decoupling of write transfers from write operations
KR102537373B1 (ko) * 2018-09-10 2023-05-30 에스케이하이닉스 주식회사 메모리 시스템에서의 데이터 전달 방법 및 장치
TWI780653B (zh) * 2019-11-08 2022-10-11 大陸商合肥沛睿微電子股份有限公司 識別快閃記憶體類型的方法及其裝置
TWI740268B (zh) * 2019-11-08 2021-09-21 大陸商合肥沛睿微電子股份有限公司 自我調整識別快閃記憶體類型方法及裝置
US11354041B2 (en) * 2020-06-12 2022-06-07 Western Digital Technologies, Inc. Read latency reduction through command and polling overhead avoidance
US11681467B2 (en) * 2020-07-09 2023-06-20 Micron Technology, Inc. Checking status of multiple memory dies in a memory sub-system
US11693798B2 (en) * 2020-07-10 2023-07-04 Samsung Electronics Co., Ltd. Layered ready status reporting structure
JP7500365B2 (ja) 2020-09-14 2024-06-17 キオクシア株式会社 メモリシステム
US11687237B2 (en) * 2021-08-04 2023-06-27 Micron Technology, Inc. Memory device status push within memory sub-system
US12050773B2 (en) * 2021-08-12 2024-07-30 Micron Technology, Inc. Completion flag for memory operations

Similar Documents

Publication Publication Date Title
US11397638B2 (en) Memory controller implemented error correction code memory
CN105702277B (zh) 存储器系统和存储器控制器
US11620066B2 (en) Storage device with expandible logical address space and operating method thereof
CN110727617B (zh) 同时通过PCIe EP和网络接口访问双线SSD装置的方法和系统
US10642496B2 (en) Out of order read transfer with host memory buffer
US12079506B2 (en) Memory expander, host device using memory expander, and operation method of sever system including memory expander
USRE49117E1 (en) Switch module and storage system
US10339079B2 (en) System and method of interleaving data retrieved from first and second buffers
US20160203091A1 (en) Memory controller and memory system including the same
KR20200108768A (ko) 연산 처리를 수행하는 메모리 장치 및 메모리 장치의 동작방법
US20200159584A1 (en) Storage devices including heterogeneous processors which share memory and methods of operating the same
JP2015036982A5 (enExample)
JP2005519360A5 (enExample)
US10338813B2 (en) Storage controller and using method therefor
CN109213687A (zh) 数据储存装置、存储器操作方法及操作指令执行方法
US10268416B2 (en) Method and systems of controlling memory-to-memory copy operations
JP2019133662A (ja) キーバリューアクセスを含むマシンラーニングのためのシステム及び方法
JP2017191603A5 (enExample)
US12164919B2 (en) Memory mapping for memory, memory modules, and non-volatile memory
US9158676B2 (en) Nonvolatile memory controller and a nonvolatile memory system
JP2024044051A5 (enExample)
US9286253B2 (en) System and method for presenting devices through an SAS initiator-connected device
US20220137998A1 (en) Storage virtualization device supporting virtual machine, operation method thereof, and operation method of system having the same
CN107533526A (zh) 经由具有完全连接网格拓扑的pci express结构向存储写入数据
US20090282175A1 (en) System and Method for Enabling Multiple Processors to Share Multiple SAS Wide Ports