TWI897014B - 記憶體系統 - Google Patents

記憶體系統

Info

Publication number
TWI897014B
TWI897014B TW112131731A TW112131731A TWI897014B TW I897014 B TWI897014 B TW I897014B TW 112131731 A TW112131731 A TW 112131731A TW 112131731 A TW112131731 A TW 112131731A TW I897014 B TWI897014 B TW I897014B
Authority
TW
Taiwan
Prior art keywords
memory
data
determined
plane
transmit data
Prior art date
Application number
TW112131731A
Other languages
English (en)
Chinese (zh)
Other versions
TW202414187A (zh
Inventor
庄野温夫
岩崎清隆
Original Assignee
日商鎧俠股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日商鎧俠股份有限公司 filed Critical 日商鎧俠股份有限公司
Publication of TW202414187A publication Critical patent/TW202414187A/zh
Application granted granted Critical
Publication of TWI897014B publication Critical patent/TWI897014B/zh

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0658Controller construction arrangements
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061Improving I/O performance
    • G06F3/0611Improving I/O performance in relation to response time
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0659Command handling arrangements, e.g. command buffers, queues, command scheduling
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0673Single storage device
    • G06F3/0679Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0604Improving or facilitating administration, e.g. storage management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Read Only Memory (AREA)
  • Memory System (AREA)
TW112131731A 2022-09-20 2023-08-23 記憶體系統 TWI897014B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2022149365A JP2024044051A (ja) 2022-09-20 2022-09-20 メモリシステム
JP2022-149365 2022-09-20

Publications (2)

Publication Number Publication Date
TW202414187A TW202414187A (zh) 2024-04-01
TWI897014B true TWI897014B (zh) 2025-09-11

Family

ID=90245072

Family Applications (1)

Application Number Title Priority Date Filing Date
TW112131731A TWI897014B (zh) 2022-09-20 2023-08-23 記憶體系統

Country Status (4)

Country Link
US (2) US12327044B2 (enExample)
JP (1) JP2024044051A (enExample)
CN (1) CN117746936A (enExample)
TW (1) TWI897014B (enExample)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110888825A (zh) * 2018-09-10 2020-03-17 爱思开海力士有限公司 在存储器系统中处理数据的设备和方法
TW202119216A (zh) * 2019-11-08 2021-05-16 大陸商合肥沛睿微電子股份有限公司 自我調整識別快閃記憶體類型方法及裝置
TW202132996A (zh) * 2019-11-08 2021-09-01 大陸商合肥沛睿微電子股份有限公司 識別快閃記憶體類型的方法及其裝置
US20210389878A1 (en) * 2020-06-12 2021-12-16 Western Digital Technologies, Inc. Read Latency Reduction through Command and Polling Overhead Avoidance
US20220011970A1 (en) * 2020-07-09 2022-01-13 Micron Technology, Inc. Checking status of multiple memory dies in a memory sub-system

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9508437B2 (en) 2014-01-30 2016-11-29 Sandisk Technologies Llc Pattern breaking in multi-die write management
US20190214087A1 (en) 2018-01-09 2019-07-11 Western Digital Technologies, Inc. Non-volatile storage system with decoupling of write transfers from write operations
US11693798B2 (en) * 2020-07-10 2023-07-04 Samsung Electronics Co., Ltd. Layered ready status reporting structure
JP7500365B2 (ja) 2020-09-14 2024-06-17 キオクシア株式会社 メモリシステム
US11687237B2 (en) * 2021-08-04 2023-06-27 Micron Technology, Inc. Memory device status push within memory sub-system
US12050773B2 (en) * 2021-08-12 2024-07-30 Micron Technology, Inc. Completion flag for memory operations

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110888825A (zh) * 2018-09-10 2020-03-17 爱思开海力士有限公司 在存储器系统中处理数据的设备和方法
TW202119216A (zh) * 2019-11-08 2021-05-16 大陸商合肥沛睿微電子股份有限公司 自我調整識別快閃記憶體類型方法及裝置
TW202132996A (zh) * 2019-11-08 2021-09-01 大陸商合肥沛睿微電子股份有限公司 識別快閃記憶體類型的方法及其裝置
US20210389878A1 (en) * 2020-06-12 2021-12-16 Western Digital Technologies, Inc. Read Latency Reduction through Command and Polling Overhead Avoidance
US20220011970A1 (en) * 2020-07-09 2022-01-13 Micron Technology, Inc. Checking status of multiple memory dies in a memory sub-system

Also Published As

Publication number Publication date
CN117746936A (zh) 2024-03-22
US12327044B2 (en) 2025-06-10
US20240094947A1 (en) 2024-03-21
JP2024044051A (ja) 2024-04-02
US20250244915A1 (en) 2025-07-31
TW202414187A (zh) 2024-04-01

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