JP2023503668A - Display panel, flexible display, electronic device and display panel manufacturing method - Google Patents

Abstract

A display panel, a flexible display, an electronic device and a method of manufacturing the display panel are provided. The display panel includes a substrate, a thin film transistor layer, a pixel defining layer (412), at least two encapsulation structures, and at least two pixel units. At least two encapsulation structures encapsulate at least two pixel units. The substrate, thin film transistor layer and pixel defining layer are laminated. The pixel definition layer has a pixel region (4121) and side encapsulation regions (4122) arranged around the pixel units encapsulated by the encapsulation structure. The OLED light emitting components of the pixel unit are arranged in the pixel area (4121). A first encapsulation layer (410) of the encapsulation structure is located on the side of the OLED light emitting component closer to the thin film transistor layer. A second encapsulation layer (420) of the encapsulation structure is located on the side of the OLED light emitting component remote from the thin film transistor layer and the first encapsulation layer (410) in the lateral encapsulation region (4121). and sealing contact. The at least two encapsulation structures are arranged to encapsulate the pixel unit so that the bending process can prevent the encapsulation structures from cracking, thereby implementing a water-oxygen barrier. do.

Description

CROSS REFERENCE TO RELATED APPLICATIONS This application is filed with the State Intellectual Property Office of China on November 29, 2019, entitled "Display Panels, Flexible Displays, Electronic Devices and Displays The priority of Chinese Patent Application No. 201911205774.7 entitled "Manufacturing Method of Panel" is claimed.

The present application relates to the field of display technology, in particular to display panels, flexible displays, electronic devices, and methods of manufacturing display panels.

Organic light-emitting diode (OLED) display devices are thin, lightweight, wide viewing angle, active emission, continuously adjustable emission color, low cost, fast response, low energy consumption, low driving voltage, and wide operation. It has been identified as a promising next-generation display technology due to its features such as temperature range, simple manufacturing process, high luminous efficiency and flexible display.

The OLED light emitting component in an OLED display device needs to inject electrons from the cathode during operation and thus requires a lower cathode work function. However, cathodes are usually made of metallic materials such as aluminum, magnesium, calcium, etc., which have relatively aggressive chemistries and tend to react with infiltrating water vapor and oxygen. Therefore, water vapor, oxygen, etc. in the air greatly affect the lifetime of the OLED light emitting component. Also, water vapor and oxygen can further react with the hole-transporting and electron-transporting layers of the OLED light-emitting component, causing failure of the OLED light-emitting component. Therefore, strict water-oxygen encapsulation must be provided for the OLED light-emitting component so that each functional layer of the OLED light-emitting component is completely isolated from water vapor, oxygen, etc. in the atmosphere. This greatly extends the life of the OLED light-emitting component and extends the life of the OLED display device.

Currently, display panels of OLED display devices are usually encapsulated by using TFE (thin film encapsulation) technology during manufacturing. Display panels using TFE for full surface encapsulation are prone to cracking when subjected to pressure or impact. In this case, water vapor and oxygen enter the cathode of the OLED light-emitting component (the cathode material is usually MgAl) and another vapor-deposited layer along the cracks. As a result, the cathode loses its electrode function and the luminous efficiency of the light-emitting layer of the OLED light-emitting component gradually decreases until the light-emitting layer can no longer emit light. As a result, dark dots or black spots will occur, affecting the display effect of the OLED display device.

The technical solution of the present application provides a display panel, a flexible display, an electronic device, and a manufacturing method of the display panel to improve the encapsulation characteristics of the display panel.

According to a first aspect, the technical solution of the present application provides a display panel. A display panel includes a substrate used as a substrate, a thin film transistor layer disposed on the substrate, a pixel defining layer, at least two encapsulation structures, and at least two pixel units. The at least two encapsulation structures are configured to encapsulate at least two pixel units. A thin film transistor layer is disposed on the substrate, a pixel defining layer is disposed on the thin film transistor layer and has a pixel region and a side encapsulation region, the side encapsulation region being a pixel unit encapsulated by the encapsulation structure. and the pixel area and the side encapsulation areas are through-holes disposed on the pixel definition layer. The OLED light emitting component of the pixel unit can be partially or completely located within the pixel area.

Where the encapsulation structure is specifically arranged, the encapsulation structure includes a first encapsulation layer and a second encapsulation layer. A first encapsulation layer is disposed on the side of the OLED light emitting component closer to the thin film transistor layer, the first encapsulation layer being further exposed from the side encapsulation regions. A second encapsulation layer is positioned on a side of the OLED light emitting component remote from the thin film transistor layer, the second encapsulation layer being in sealing contact with the first encapsulation layer within the side encapsulation regions. through the side encapsulation regions. By encapsulating at least two pixel units using at least two encapsulation structures, a large encapsulation layer can be prevented from being formed on the display panel, thereby including the display panel. It can effectively avoid the water-oxygen intrusion that occurs when the encapsulation layer cracks in scenarios such as when the flexible display is bent, rolled, and deformed freely.

In a possible implementation of the present application, the number of encapsulation structures may be the same as the number of pixel units, each encapsulation structure being configured to encapsulate one pixel unit. This implements independent encapsulation of each pixel unit, improving the bending properties of the display panel.

Further, the first encapsulation layer may have a single-layer structure of inorganic material layers, or the first encapsulation layer may have a multi-layer structure in which inorganic material layers and organic material layers are alternately laminated. and the second encapsulation layer may be, but is not limited to, a single layer structure formed by an inorganic material layer, or the second encapsulation layer may be a layer of inorganic material and an organic material. It may be a multilayer structure formed by alternately stacking layers. The inorganic material layer may be formed by using silicon dioxide, silicon nitride, aluminum oxide, etc. to achieve a relatively good water-oxygen barrier effect.

In possible implementations of the present application, the display panel may further include metal lines, the metal lines may be located on the side of the pixel defining layer remote from the substrate, or the metal lines may be , is disposed on the first encapsulation layer, or the metal line is disposed on the layer structure of the substrate. The cathodes of the OLED light emitting components may be connected to metal wires such that all OLED light emitting components are associated with each other. This facilitates control of the display of the entire display panel.

In a possible implementation of the present application, a photospacer is additionally arranged on the side of the pixel defining layer remote from the substrate. In the process of vapor-depositing the OLED light-emitting component, the photospacer effectively prevents the vapor deposition mask for vapor-depositing each functional layer of the OLED light-emitting component from contacting the display panel, thereby improving the product yield of the display panel. can be improved.

In a possible implementation of the present application, a planarization layer may further be arranged on the side of the second encapsulation layer remote from the thin film transistor layer. The planarization layer may be arranged to provide a flat machined surface for subsequent processing. The planarization layer may also cover foreign matter to prevent foreign matter from penetrating other film layers disposed on the planarization layer.

Moreover, a third encapsulation layer can further be disposed on the planarization layer, the third encapsulation layer being a full surface structure capable of covering the at least two encapsulation structures. This improves the water-oxygen barrier encapsulation effect of the display panel. The third encapsulation layer may have a single-layer structure of inorganic material layers, or may have a multi-layer structure in which inorganic material layers and organic material layers are alternately laminated.

According to a second aspect, the technical solution of the present application further provides a flexible display. A flexible display may comprise a protective cover, a polarizer, a touch panel, and the display panel according to the first aspect. The polarizer is fixed to the protective cover and the touch panel is placed between the polarizer and the display panel, or the touch panel is fixed to the protective cover and the polarizer is placed between the touch panel and the display panel. . Further, a heat dissipation layer may be further arranged on the side of the display panel away from the touch panel, and a protective layer may be arranged on the heat dissipation layer.

Since at least two pixel units on the display panel of the flexible display are encapsulated by at least two encapsulation structures, a large encapsulation layer can be prevented from being formed on the display panel, thereby To effectively avoid the water-oxygen intrusion caused when the encapsulation layer is cracked in scenarios such as the flexible display being bent, rolled, and deformed freely, and avoid the display failure problem of the flexible display.

According to a third aspect, the technical solution of the present application further provides an electronic device. An electronic device comprises an intermediate frame, a rear housing, a printed circuit board and a flexible display according to the second aspect. The intermediate frame is configured to support the printed circuit board and flexible display. A printed circuit board and a flexible display are placed on two sides of the intermediate frame. A rear housing is positioned on the side of the printed circuit board remote from the intermediate frame.

The flexible display of the electronic device in this application has relatively good bending properties. The process by which the flexible display is folded or bent presents a relatively low risk of cracking of the encapsulation layer of the display panel of the flexible display, thereby reducing the flexibility of the electronic device when water and oxygen penetrate through the encapsulation layer. The display failure problem is avoided.

According to a fourth aspect, the technical solution of the present application further provides a method of manufacturing a display panel. The display panel includes a substrate, a thin film transistor layer, a pixel defining layer, at least two encapsulation structures, and at least two pixel units. The at least two encapsulation structures are configured to encapsulate at least two pixel units, the encapsulation structures including a first encapsulation layer and a second encapsulation layer, the pixel units comprising an OLED Contains light-emitting components. The method is
manufacturing a substrate;
forming a thin film transistor layer over a substrate and providing a first via on the thin film transistor layer, the first via extending to a drain of the thin film transistor layer;
forming a full-surface first encapsulation structure layer on the thin film transistor layer and patterning the full-surface first encapsulation structure layer to obtain a plurality of independent first encapsulation layers; When,
forming a pixel defining layer and patterning the pixel defining layer to form a pixel region and a side encapsulation region on each of the first encapsulation layers, the side encapsulation regions a step used to expose one encapsulation layer;
forming an OLED light emitting component within the pixel area, the OLED light emitting component being connected to the drain through the first via;
forming a second encapsulation structure layer on the entire surface corresponding to the thin film transistor layer on the side of the OLED light emitting component remote from the thin film transistor layer to obtain a plurality of independent second encapsulation layers; wherein the second encapsulation layer and the first encapsulation layer are in sealing contact within the side encapsulation regions. .

In a possible implementation, the step of forming the first encapsulation layer specifically includes SiO ₂ , SiNx, or Al ₂ in the thin film transistor layer to form a full surface first encapsulation structure layer. depositing one or more of O3 and patterning the _first encapsulation structure layer on the whole surface to obtain at least two first encapsulation layers, coating , including one or more of exposing, developing, etching, or stripping.

In a possible implementation, before the pixel defining layer is formed, the method includes forming an anode on the first encapsulation layer, the anode being connected to the drain through the first via. further comprising the step of: The step of forming the anode specifically comprises sequentially depositing ITO, Ag, and ITO on the first encapsulation layer to form an anode material layer; and patterning, including one or more of coating, exposing, developing, etching, or stripping.

Additionally, the method may further include forming a photospacer on the pixel defining layer after the pixel defining layer is formed and before the OLED light emitting component is formed.

In a possible implementation, metal lines are further added on the pixel definition layer such that the cathode of each OLED light emitting component is connected to the metal line to associate all the OLED light emitting components and control the display of the entire display panel. can be formed. Alternatively, the metal lines may be formed on the first encapsulation layer or may be formed on the layer structure of the thin film transistor layer. Specifically, the step of forming the metal lines includes depositing Ti, Al, and Ti in sequence to form a metal layer after the pixel defining layer is formed; including one or more of coating, exposing, developing, etching, or stripping.

In a possible implementation, the step of forming a second encapsulation layer specifically comprises SiO 2 over the pixel defining layer and the OLED light-emitting component to form a full-surface second encapsulation structure layer. ₂ , SiNx, or _Al2O3 and patterning the second encapsulation structure layer on the whole surface to obtain at _least two second encapsulation layers. comprising one or more of coating, exposing, developing, etching, or stripping.

After the second encapsulation layer is formed, a planarization layer may further be formed on the second encapsulation layer to provide a flat surface for subsequent layer structure processing. The planarization layer may also cover foreign matter to prevent foreign matter from penetrating other film layers disposed on the planarization layer.

In a possible implementation, the manufacturing method may further comprise forming a third encapsulation layer over the planarization layer, the third encapsulation layer covering the plurality of encapsulation units. . In this way, a full surface encapsulation layer is formed on the display panel, which improves the water-oxygen barrier effect of the display panel.

According to a fifth aspect, the technical solution of the present application further provides a display panel. A display panel includes a substrate used as a substrate, a thin film transistor layer, a pixel defining layer, at least two encapsulation structures, and at least two pixel units. The at least two encapsulation structures may be configured to encapsulate at least two pixel units. A thin film transistor layer is disposed on the substrate and a pixel defining layer is disposed on the thin film transistor layer, the pixel defining layer having a pixel region and a side encapsulation region, the side encapsulation regions being covered by the encapsulation structure. Disposed around the encapsulated pixel unit, the pixel region and the side encapsulation regions are through-holes disposed in the pixel definition layer. A pixel unit includes an OLED light-emitting component, which is partially or wholly located within the pixel area. The thin film transistor layer includes an inorganic material layer with vias corresponding to the side encapsulation regions, the vias exposing the inorganic material layer.

The inorganic material layer of the thin film transistor layer is used as an encapsulation layer to implement the pixel unit encapsulation, because the thin film transistor layer includes an inorganic material layer, and the inorganic material layer can achieve a good water-oxygen barrier effect. can be

If the encapsulation structure is specifically arranged, the encapsulation structure is arranged on the side of the OLED light emitting component remote from the thin film transistor layer. The encapsulation structure may extend through the side encapsulation regions and the vias and is in sealing contact with the inorganic material layer exposed from the vias of the thin film transistor layer in the side encapsulation regions. In the technical solution of the present application, by using at least two encapsulation structures to encapsulate at least two pixel units, a large encapsulation layer can be prevented from forming, and can effectively avoid the water-oxygen infiltration that occurs when the encapsulation layer cracks in scenarios such as the flexible display including the display panel being bent, rolled, and deformed freely. In addition, by using the inorganic material layer of the thin film transistor layer as an encapsulation layer for encapsulating the encapsulation part, the steps for processing the display panel can be effectively reduced, and the bending characteristics of the display panel are improved. Manufacturing difficulty and manufacturing costs are reduced. Additionally, in this embodiment of the present application, in addition to encapsulating the OLED light emitting component, the encapsulating structure includes planarization layers, sources, drains, interlevel dielectric layers, intermetallic dielectric layers, gates, and the like. One or more of the structures can be further encapsulated. This protects the encapsulation structure.

In a possible implementation of the present application, the number of encapsulation structures may be the same as the number of pixel units, each encapsulation structure being configured to encapsulate one pixel unit. This implements independent encapsulation of each pixel unit, improving the bending properties of the display panel.

The encapsulation structure may have a single-layer structure of inorganic material layers, or may have a multi-layer structure in which inorganic material layers and organic material layers are alternately laminated. The inorganic material layer may be formed by using silicon dioxide, silicon nitride, aluminum oxide, etc. to achieve a relatively good water-oxygen barrier effect.

In possible implementations of the present application, the display panel may further include metal lines, the metal lines may be located on the side of the pixel defining layer remote from the substrate, or the metal lines may be , is disposed on the layer structure of the thin film transistor layer. The cathodes of the OLED light emitting components may be connected to metal wires such that all OLED light emitting components are associated with each other. This facilitates control of the display of the entire display panel.

In a possible implementation of the present application, a photospacer is additionally arranged on the side of the pixel defining layer remote from the substrate. In the process of vapor-depositing the OLED light-emitting component, the photospacer effectively prevents the vapor deposition mask for vapor-depositing each functional layer of the OLED light-emitting component from contacting the display panel, thereby improving the product yield of the display panel. can be improved.

In a possible implementation of the present application, a planarization layer may also be arranged on the side of the encapsulation structure remote from the thin film transistor layer. The planarization layer may be arranged to provide a flat machined surface for subsequent processing. The planarization layer may also cover foreign matter to prevent foreign matter from penetrating other film layers disposed on the planarization layer.

Moreover, a third encapsulation layer can further be disposed on the planarization layer, the third encapsulation layer being a full surface structure capable of covering the at least two encapsulation structures. This improves the water-oxygen barrier encapsulation effect of the display panel. The third encapsulation layer may have a single-layer structure of inorganic material layers, or may have a multi-layer structure in which inorganic material layers and organic material layers are alternately laminated.

According to a sixth aspect, the technical solution of the present application further provides a flexible display. A flexible display may include a protective cover, a polarizer, a touch panel, and a display panel according to the fifth aspect. The polarizer is fixed to the protective cover and the touch panel is placed between the polarizer and the display panel, or the touch panel is fixed to the protective cover and the polarizer is placed between the touch panel and the display panel. . Further, a heat dissipation layer may be further arranged on the side of the display panel away from the touch panel, and a protective layer may be arranged on the heat dissipation layer.

Since at least two pixel units on the display panel of the flexible display are encapsulated by at least two encapsulation structures, a large encapsulation layer can be prevented from being formed on the display panel, thereby It effectively avoids the water-oxygen intrusion that occurs when the encapsulation layer cracks in scenarios such as when the flexible display is bent, rolled, and deformed freely, and alleviates the display failure problem of the flexible display.

According to a seventh aspect, the technical solution of the present application further provides an electronic device. An electronic device comprises an intermediate frame, a rear housing, a printed circuit board and the flexible display of the sixth aspect. The intermediate frame is configured to support the printed circuit board and flexible display. A printed circuit board and a flexible display are placed on two sides of the intermediate frame. A rear housing is positioned on the side of the printed circuit board remote from the intermediate frame.

The flexible display of the electronic device in this application has relatively good bending properties. The process by which the flexible display is folded or bent presents a relatively low risk of cracking of the encapsulation layer of the display panel of the flexible display, thereby reducing the flexibility of the electronic device when water and oxygen penetrate through the encapsulation layer. The display failure problem is avoided.

According to an eighth aspect, the technical solution of the present application further provides a manufacturing method of a display panel. The display panel includes a substrate, a thin film transistor layer, a pixel defining layer, at least two encapsulation structures, and at least two pixel units. The at least two encapsulation structures are configured to encapsulate at least two pixel units, the pixel units including OLED light emitting components. The method is
manufacturing a substrate;
forming a thin film transistor layer over a substrate and providing a first via on the thin film transistor layer, the first via extending to a drain of the thin film transistor layer;
providing a second via on the thin film transistor layer, the second via extending to the inorganic material layer of the thin film transistor layer;
forming a pixel defining layer and patterning the pixel defining layer to form a pixel region and a side encapsulation region, wherein the side encapsulation region is used to expose an inorganic material layer of the thin film transistor layer; is performed, a step
forming an OLED light emitting component within the pixel area, the OLED light emitting component being connected to the drain through the first via;
forming a full surface encapsulation structure layer corresponding to the thin film transistor layer on the side of the OLED light emitting component remote from the thin film transistor layer to obtain at least two independent encapsulation structures; wherein the encapsulation structure and the inorganic material layer of the thin film transistor layer are in sealing contact within the side encapsulation regions.

In a possible implementation, before the pixel defining layer is formed, the method includes forming an anode on the first encapsulation layer, the anode being connected to the drain through the first via. further comprising the step of: The step of forming the anode specifically comprises sequentially depositing ITO, Ag, and ITO on the first encapsulation layer to form an anode material layer; and patterning, including one or more of coating, exposing, developing, etching, or stripping.

Additionally, the method may further include forming a photospacer on the pixel defining layer after the pixel defining layer is formed and before the OLED light emitting component is formed.

In a possible implementation, metal lines are further added on the pixel definition layer such that the cathode of each OLED light emitting component is connected to the metal line to associate all the OLED light emitting components and control the display of the entire display panel. can be formed. Alternatively, the metal lines may be formed on the first encapsulation layer or may be formed on the layer structure of the thin film transistor layer. Specifically, the step of forming the metal lines includes depositing Ti, Al, and Ti in sequence to form a metal layer after the pixel defining layer is formed; including one or more of coating, exposing, developing, etching, or stripping.

In a possible implementation, forming the encapsulation structure specifically comprises depositing one or more of _{SiO2 ,} SiNx, or _Al2O3 over the pixel defining layer and the OLED light emitting component, forming an all-surface encapsulation structure layer; and patterning the all-surface encapsulation structure layer to obtain at least two independent encapsulation structures, comprising coating, exposing, and developing. including one or more of the steps of: removing, etching, or stripping.

After the encapsulation structure is formed, a planarization layer may further be formed on the second encapsulation layer to provide a planar surface for subsequent layer structure processing. The planarization layer may also cover foreign matter to prevent foreign matter from penetrating other film layers disposed on the planarization layer.

In a possible implementation, the manufacturing method may further comprise forming a third encapsulation layer over the planarization layer, the third encapsulation layer covering the plurality of encapsulation units. . In this way, a full surface encapsulation layer is formed on the display panel, which improves the water-oxygen barrier effect of the display panel.

According to a ninth aspect, the technical solution of the present application further provides a display panel. A display panel includes a substrate used as a substrate, a thin film transistor layer, a pixel defining layer, at least two encapsulation structures, and at least two pixel units. The at least two encapsulation structures may be configured to encapsulate at least two pixel units. A thin film transistor layer is disposed on the substrate and a pixel defining layer is disposed on the thin film transistor layer, the pixel defining layer having a pixel region and a side encapsulation region, the side encapsulation regions being covered by the encapsulation structure. Disposed around the encapsulated pixel unit, the pixel region and the side encapsulation regions are through-holes disposed in the pixel definition layer. A pixel unit includes an OLED light-emitting component, which is partially or wholly located within the pixel area. The substrate includes an inorganic material layer, and vias are provided at locations corresponding to the side encapsulation regions, the vias exposing the inorganic material layer.

Since the inorganic material layer can achieve a good water-oxygen barrier effect, the inorganic material layer of the substrate can be used as the encapsulation layer for encapsulating the encapsulation unit.

If the encapsulation structure is specifically arranged, the encapsulation structure is arranged on the side of the OLED light emitting component remote from the thin film transistor layer. The encapsulation structure may extend through the side encapsulation regions and the vias and is in sealing contact with the inorganic material layer exposed from the vias of the substrate in the side encapsulation regions.

In the technical solution of the present application, by using at least two encapsulation structures to encapsulate at least two pixel units, a large encapsulation layer can be prevented from forming, and can effectively avoid the water-oxygen infiltration that occurs when the encapsulation layer cracks in scenarios such as the flexible display including the display panel being bent, rolled, and deformed freely. In addition, by using the inorganic material layer of the substrate as an encapsulation layer for encapsulating the encapsulation part, the steps of processing the display panel can be effectively reduced, the bending properties of the display panel are improved, and the manufacturing Difficulty and manufacturing costs are reduced. Additionally, in this embodiment of the present application, in addition to encapsulating the OLED light emitting component, the encapsulating structure includes planarization layers, sources, drains, interlevel dielectric layers, intermetallic dielectric layers, gates, and the like. One or more of the structures can be further encapsulated. This protects the encapsulation structure.

1 is a schematic diagram of the structure of an electronic device according to an embodiment of the present application; FIG. 1 is a schematic diagram of the structure of a flexible display according to an embodiment of the present application; FIG. 1 is a schematic diagram of the structure of a display panel according to an embodiment; FIG. 1 is a schematic diagram of the structure of a display panel according to an embodiment of the present application; FIG. 1 is a schematic diagram of the structure of an OLED light-emitting component according to an embodiment of the present application; FIG. 1 is a schematic diagram of the structure of an encapsulation structure according to an embodiment of the present application; FIG. FIG. 7 is a cross-sectional view taken along the line AA of FIG. 6; FIG. 7 is a cross-sectional view taken along the line BB of FIG. 6; 1 is a schematic diagram of the structure of an LTPS-TFT substrate according to an embodiment of the present application; FIG. 1 is a top view of a display panel with a first encapsulation layer formed thereon, according to an embodiment of the present application; FIG. 1 is a cross-sectional view of a display panel with a first encapsulation layer formed thereon, according to an embodiment of the present application; FIG. 1 is a cross-sectional view of a display panel with an anode formed in accordance with an embodiment of the present application; FIG. 1 is a cross-sectional view of a display panel having a pixel defining layer formed thereon according to an embodiment of the present application; FIG. FIG. 4 is a schematic diagram of the structure of the connection between the third metal gridline and the cathode according to an embodiment of the present application; FIG. 15 is a cross-sectional view taken along line CC of FIG. 14; FIG. 15 is a cross-sectional view taken along line DD of FIG. 14; 1 is a cross-sectional view of a display panel having photospacers formed thereon according to an embodiment of the present application; FIG. 1 is a cross-sectional view of a display panel with OLEDs formed thereon, in accordance with an embodiment of the present application; FIG. FIG. 3 is a cross-sectional view of a display panel with a second encapsulation layer formed thereon, according to an embodiment of the present application; FIG. 4 is a cross-sectional view of a display panel with a second encapsulation layer formed thereon, according to another embodiment of the present application; FIG. 4 is a cross-sectional view of a display panel with a second planarization layer formed thereon according to an embodiment of the present application; FIG. 3 is a cross-sectional view of a display panel with a third encapsulation layer formed thereon, according to an embodiment of the present application; FIG. 4 is a schematic diagram of the structure of a display panel according to another embodiment of the present application;

To facilitate understanding of the display panels provided in the embodiments of the present application, the following first describes the application scenarios of the display panels provided in the embodiments of the present application. Display panels can be placed in electronic devices such as mobile phones, tablet computers, wearable devices, or palmtop computers (personal digital assistants (PDAs)). As shown in FIG. 1, an electronic device may generally include a display 101, an intermediate frame 102, a rear housing 103, and a printed circuit board (PCB 104). Intermediate frame 102 may be configured to support printed circuit board and display 101 . The display 101 and printed circuit board are located on either side of the intermediate frame 102 . A rear housing 103 is located on the side of the printed circuit board remote from the intermediate frame 102 . Additionally, the electronic device may further include components 1041 located on the PCB 104 . The component 1041 may be placed on the side of the PCB 104 facing the intermediate frame 102, but is not so limited. The display panels provided in the embodiments of the present application are specifically placed within the display of an electronic device. The display may be a flexible display or a rigid display. The flexible display may be an OLED flexible display or a quantum dot light emitting diode (QLED) flexible display. In the following embodiments of the present application, the example in which the display is an OLED flexible display is used for illustration, and the method of arranging the OLED flexible display is similar to that of other forms of display.

As shown in FIG. 2, the OLED flexible display in this embodiment of the present application can include, but is limited to, a protective cover 201, a polarizer 202, a touch panel 203, a display panel 204, a heat dissipation layer 205, and a protective layer 206. not. Please refer to FIG. 2 for the specific layout of the OLED flexible display. The polarizer 202 is fixed to the protective cover 201 and the touch panel 203 is arranged between the polarizer 202 and the display panel 204 . Alternatively, the polarizer 202 may be placed between the touch panel 203 and the display panel 204 after the touch panel 203 is fixed to the protective cover 201 .

The protective cover 201 can be a transparent glass cover or a cover made of organic materials such as polyimide to implement protective functions and reduce the impact on the display effect of the display. Polarizer 202 may be a circular polarizer to avoid reflection of anode light. The touch panel 203 may be arranged independently, or may be integrated with the display panel 204 . The heat dissipation layer 205 may be made of copper foil for heat dissipation. Protective layer 206 may be a protective foam. The layered structure of the flexible display may be adhered together using an optically clear adhesive or an opaque pressure sensitive adhesive (not shown). Furthermore, although a plurality of pixel units (not shown) are arranged in the display panel 204, the plurality of pixel units may be of any shape, and the arrangement method of the plurality of pixel units is not limited in the present application. Water vapor, oxygen, etc. in the air greatly affect the lifetime of the OLED light emitting components of the pixel unit. Therefore, rigorous water-oxygen encapsulation needs to be performed on the pixel unit on the display panel so that all functional layers of the OLED light-emitting component are completely isolated from atmospheric water vapor, oxygen, etc. There is

FIG. 3 shows a display panel of a typical OLED flexible display. The display panel has an upper encapsulation layer 301 and a lower encapsulation layer 302 . In this embodiment, the "top" of the display panel means the side closer to the user when the display panel is in use. The upper encapsulation layer 301 is a unitary structure that covers the entire display panel, and includes a first inorganic layer 3011, a second inorganic layer 3012, and between the first inorganic layer 3011 and the second inorganic layer 3012. and a flexible sandwich layer 3013 disposed thereon. The first inorganic layer 3011 and the second inorganic layer 3012 may be _SiO2 layers or SiNx layers manufactured by chemical vapor deposition (CVD) method. The flexible sandwich layer 3013 may be a cured polyester polymer organic layer formed using polyimide (PI) or ink jet print (IJP) technology. The _SiO2 or SiNx layer is mainly configured to implement a water-oxygen barrier, and the flexible sandwich layer 3013 is used to release stress, improve flexibility, and reduce encapsulation failure caused by foreign matter. , to some extent a water-oxygen buffer can be implemented. The upper encapsulation layer 301 is a full surface structure and the structure is a rigid structure. When the upper encapsulation layer is bent, the stress on the upper encapsulation layer is relatively large and cracks are likely to occur. In this case, if cracks occur in the first inorganic layer 3011 or the second inorganic layer 3012, regardless of whether cracks occur in the organic layer between the two inorganic layers, the pixel units of the display panel and the Water and oxygen penetrate the OLED light-emitting component of the cathode layer. As a result, the OLED light-emitting component fails or the cathode loses its electrical characteristics, resulting in black spots on the OLED flexible display. In addition, since the upper encapsulation layer 301 has a full surface structure, water and oxygen that enter the display panel through cracks diffuse between adjacent pixel units. As a result, multiple OLED light emitting components fail, or the cathodes of multiple OLED light emitting components lose their electrical characteristics, and seriously, the entire OLED flexible display fails to display.

In addition, the lower encapsulation layer 302 is generally the first substrate material layer PI 1 and the second substrate material layer PI 2 (first substrate material layer PI 1 and second substrate material layer PI 1 and second substrate material layer PI 2) in the substrate of the display panel. Both layers PI2 may be polyimide polymer organic layers) and a barrier layer 3021 disposed between the first substrate material layer PI1 and the second substrate material layer PI2. is. The barrier layer 3021 is typically a _SiO2 or SiNx layer. The lower encapsulation layer 302 is a full surface structure and the structure is also a rigid structure. If the lower encapsulation layer is flexed, it is also prone to cracking. When a crack occurs in the lower encapsulation layer 302, water and oxygen also enter the OLED light emitting component along the crack. As a result, block spots occur on the OLED flexible display. In addition, since the lower encapsulation layer 302 has a full surface structure, water and oxygen that enter the display panel through the cracks diffuse between adjacent pixel units. As a result, multiple OLED light emitting components fail, or the cathodes of multiple OLED light emitting components lose their electrical characteristics, and seriously, the entire OLED flexible display fails to display.

Therefore, when the OLED flexible display is bent or folded, water and oxygen can enter through the cracks and cause corrosion of the OLED light emitting components. As a result, the OLED light emitting component cannot be powered up or deteriorated so that it cannot emit light.

To solve the above problems, one embodiment of the present application prevents water-oxygen ingress that occurs when the encapsulation layer cracks in scenarios such as when the display panel is bent, rolled, and deformed freely. To solve and reduce defect problems such as black spots on flexible displays, a display panel is provided. The structure of the display panel will be described in detail below with reference to the accompanying drawings.

As shown in FIG. 4, one embodiment of the present application provides a display panel. The display panel includes a substrate, a thin film transistor layer, a pixel defining layer 412, pixel units and an encapsulation structure. A thin film transistor layer is disposed on the substrate. A pixel defining layer is disposed on the thin film transistor layer. As shown in FIG. 4, in this embodiment of the application, the substrate can provide a flexible bearer for each upper layer, such as a thin film transistor layer. The substrate may include, but is not limited to, a first substrate material layer PI1, a barrier layer 402, and a second substrate material layer PI2 stacked in order from bottom to top (in this embodiment, the display panel , means the side closer to the user when the display panel is in use). Specifically, the material of the first substrate material layer PI1 may be a flexible polyimide substrate material, or a flexible material such as polyethylene terephthalate (PET), paper, metal, or ultra-thin glass. the barrier layer 402 may be configured to perform a water and oxygen barrier, the material of the second substrate material layer PI2 may also be a flexible polyimide substrate material, Flexible materials such as polyethylene terephthalate (PET), paper, metal, and ultra-thin glass may also be used. In some embodiments of the present application, the barrier layer 402 in the substrate or the second substrate material layer PI2 may alternatively be omitted to simplify the structure of the substrate.

When the thin film transistor layer is specifically arranged, the thin film transistor layer includes a buffer layer 403, an active layer, a gate insulator layer 405, a gate G, a first metal grid line M1, an inter-metal insulating layer 406, a metal capacitor 407, an inter-layer insulating layer. 408 , source S, drain D, second metal gridline M 2 , and first planarization layer 409 . This is not a limitation in this embodiment of the application.

Optionally, in this embodiment of the present application, low temperature poly silicon (LTPS) thin film transistors (TFTs) are used as an example. The thin film transistor layers may include a gate insulator layer 405 , an intermetal dielectric layer 406 , an interlevel dielectric layer 408 and a first planarization layer 409 . Optionally, the thin film transistor layers may include a buffer layer 403 , a gate insulator layer 405 , an inter-metal dielectric layer 406 , an inter-layer dielectric layer 408 and a first planarization layer 409 . Optionally, the thin film transistor layers include a buffer layer 403, an active layer, a gate insulator layer 405, a gate G, an intermetal dielectric layer 406, an interlevel dielectric layer 408, a source S, a drain D, and a first planarization layer 409. may include In this embodiment of the present application, the thin film transistor layers include a buffer layer 403, an active layer, a gate insulator layer 405, a gate G, a first metal grid line M1, an inter-metal dielectric layer 406, a metal capacitor 407, and an inter-layer dielectric layer 408. , the source S, the drain D, the second metal gridline M2, and the first planarization layer 409. FIG. Please refer to FIG. Hereinafter, each layer structure of the thin film transistor layer in this embodiment of the present application will be described in detail.

A buffer layer 403 prevents impurity ions from affecting the characteristics of thin film transistor layers disposed on the substrate and may also be configured to perform a water-oxygen barrier.

The active layer is mainly composed of P--Si and LTPS. The active layer is the TFT semiconductor layer, and the semiconductor switches and conductive lines may be formed based on different dopings. As shown in FIG. 4, the P--Si in the middle of the active layer in FIG. 4 is used to represent a semiconductor switch, and two points on either side of the P--Si connect the source S and drain D to the P--Si. It is a conductor that becomes a conductive line for connection.

A gate insulator layer 405 may isolate the active layer from the gate G. FIG.

A gate G is formed on the gate insulator layer 405 and used as a TFT component switch. For example, in the case of a P-type TFT, when a negative voltage is applied to the gate, there is relatively large current in the source and drain, and the TFT exhibits an ON state, or when a positive voltage is applied to the gate, There is only a weak leakage current on the source and drain, the TFT exhibits an off state, for N-type TFTs, when a negative voltage is applied to the gate, there is only a weak leakage current on the source and drain, and the TFT presents an off state, or when a positive voltage is applied to the gate, there is a relatively large current in the source and drain and the TFT presents an on state.

A first metal grid line M1 is formed on the gate insulator layer 405 and may be formed with the gate G, which typically serves as a scan line. Since the screen display is a progressive scanning display, in order to turn on the TFT gate switches row by row, the scanning line connects the TFT switch gates of all rows, and the data line signal and power line signal refresh the information of each row. make it possible.

An inner metal dielectric (IMD) layer 406 is used as an insulator layer between the first metal grid line M1 and a metal capacitor (MC) 407 and as an insulator layer for the metal capacitor 407. good too.

The metal capacitor 407 may be used as a capacitive power-on plate and other drive lines, and the first metal gridline M1 may be used as a capacitive power-down plate.

An inner layer dielectric (ILD) layer 408 is used as an insulator layer between the gate G and the source and drain.

A source S is formed on the interlayer insulating layer 408 and connected to the active layer. After the source S is connected to the active layer, ohmic contacts are formed to implement circuit connections.

A drain D is formed on the interlayer insulating layer 408 and connected to the active layer. After the drain D is connected to the active layer, ohmic contacts are formed to implement circuit connections.

A second metal grid line M2 is connected to the metal capacitor 407 through the via 4081 in the interlayer insulating layer 408 . An interlayer dielectric layer 408 may be used as an insulator layer between M2 and structures such as metal capacitors 407 . Also, the second metal grid line M2 may be formed together with the source S and the drain D, and is used as a drive line for the source S and the drain D to transmit data signals, power signals, and the like. Specifically, data and power signals are provided via an integrated circuit chip (IC) and are typically transmitted via a second metal grid line M2. The transmission direction is usually perpendicular to the scanline direction of column transmission. Each column of pixels has an independent data line connected to the TFT source S or drain D in the column for transmission. Power signals are also accessed to the TFT sources S or drains D of each column for transmission. However, unlike data lines, power signals are relatively simple DC signals or fixed value pulse signals. Therefore, all power lines are normally short-circuited and transmitted uniformly.

A first planarization (PLN) layer 409 has the functions of planarization, isolation, and phase protection against variations in the substrate electrode.

When the pixel definition layer 412 is specifically provided, the pixel definition layer 412 may be a layer structure formed by coating a photoresist-based organic material on the thin film transistor layer through a slit coat. In addition, the pixel region 4121 and the side encapsulation regions 4122 can be obtained by processing the pixel definition layer 412, such as exposure or development. The pixel region 4121 and the side encapsulation region 4122 may each be a hole structure through the pixel definition layer 412, the side encapsulation region 4122 surrounding the pixel unit encapsulated by the encapsulation structure. placed.

A pixel unit is the smallest unit for implementing the display function of a display panel and includes OLED light emitting components. The OLED light emitting component may be arranged within the pixel area. FIG. 5 is a schematic diagram of a layer structure of an OLED light-emitting component according to one embodiment of the present application. The OLED light emitting components are sequentially stacked anode 411 , hole injection layer (HIL) 414 , hole transport layer (HTL) 415 , emission layer (EL) 416 . , an electron transport layer (ETL) 417 , a cathode 418 , and a capping layer (CPL) 419 . See also FIGS. 4 and 5. FIG. In the process of manufacturing each layer structure of the OLED light-emitting component, the materials used to form each layer structure are fluids, so some materials are used as pixel It will be appreciated that although extending outside region 4121, the light emitting effect of the OLED light emitting component is not affected. It should be noted that in this embodiment of the application, the example in which the OLED light-emitting component is partially disposed within the pixel area is used for illustration. Alternatively, the OLED light-emitting component may be located entirely within the pixel area. This is not a limitation in this embodiment of the application.

If the encapsulation structure is specifically arranged, the encapsulation structure may correspond one-to-one with the pixel unit. For example, each pixel unit is encapsulated by one encapsulation structure. Specifically, the encapsulation structure includes a first encapsulation layer 410 and a second encapsulation layer 420 . A first encapsulation layer 410 is disposed between the OLED light emitting component and the thin film transistor layer and may be exposed from the side encapsulation regions 4122 of the pixel defining layer 412 . From FIG. 4 , the second encapsulation layer 420 covers the pixel units, and the second encapsulation layer 420 penetrates the side encapsulation regions 4122 to make sealing contact with the first encapsulation layer 410 . I understand. In this manner, each pixel unit is encapsulated by a first encapsulation layer 410 and a second encapsulation layer 420 such that each pixel unit is encapsulated independently. Additionally, a pixel defining layer 412 is formed between two adjacent encapsulation structures. The material of the pixel defining layer 412 is an organic material and a flexible material, so that adjacent encapsulation structures can be flexibly connected. Therefore, the technical solution in the present application can prevent the formation of a large encapsulation layer on the display panel, and the OLED flexible display including the display panel can be bent, rolled and deformed freely. It can effectively avoid the water-oxygen ingress that occurs when the encapsulation layer cracks in such scenarios. In this embodiment, the material of the first encapsulation layer 410 can be, but is not limited to, an inorganic material such as SiO ₂ , SiNx, or Al ₂ O ₃ , and the second encapsulation layer 420 The material of may also be an inorganic material such as, but not limited to, _{SiO2 ,} SiNx, or _Al2O3 . A relatively good water-oxygen barrier effect is thereby achieved. The first encapsulation layer 410 and the second encapsulation layer 420 may be single-layer inorganic encapsulation layers, or encapsulation layers having a multi-layer structure in which inorganic layers and organic layers are alternately laminated. For example, it may be a three-layer structure in which an inorganic layer, an organic layer, and an inorganic layer are laminated in order, or a four-layer structure in which an inorganic layer, an organic layer, and an inorganic layer are laminated in order. It will be understood that there may be one or a five-layer structure with five or more stacked layers.

Since each pixel unit is independently encapsulated by one encapsulation structure, formation of a large encapsulation layer on the display panel can be avoided. Encapsulation structures are independent of each other. When the display panel is applied to the OLED flexible display, even if the OLED flexible display is bent more than 100,000 times in any direction, the display panel can still have a good encapsulation function. Therefore, the display panel in this embodiment of the present application can reduce the crack risk of the encapsulation layer in application scenarios such as the OLED flexible display being bent, rolled, and deformed freely, thereby And the display failure problem of the flexible display caused when oxygen permeates through the encapsulation layer and enters the display panel can be avoided. In addition, since each pixel unit is independently encapsulated, water and oxygen entering any encapsulation structure can be further prevented from diffusing between adjacent OLED light-emitting components, thereby It can prevent the luminous performance of the luminous component from being affected.

Additionally, note that multiple pixel units (where the number of multiple pixel units is less than the total number of pixel units on the display panel) may alternatively be encapsulated by one encapsulation structure. want to be The encapsulating structure may be of any shape. See FIG. For example, for a display panel with a fixed single folding direction (curves with arrows in the figure indicate the folding direction), all pixel units are either column-wise or row-wise to implement pixel unit encapsulation. may be grouped into columns or rows along the folding direction to form an encapsulating structure of . This can effectively improve the folding performance of the display panel in a fixed single folding direction of the display panel. In addition, the present embodiment of forming column-like or row-like encapsulation structures to implement pixel unit encapsulation reduces manufacturing difficulty and Manufacturing costs can be effectively reduced. Please continue to refer to FIG. In some other embodiments of the present application, several adjacent pixel units may be encapsulated by one encapsulation structure (see dashed-dotted rectangular box in the figure). Generally, there is a relatively large amount of pixel units on a display panel, and the area of an encapsulation structure for encapsulating several adjacent pixel units is smaller than the area of the entire display panel. Therefore, the encapsulation method in this embodiment can also meet the bending requirements of the display panel and implement good encapsulation characteristics. Each pixel unit is encapsulated independently, or multiple pixel units less than the total number of pixel units on the display panel are encapsulated by one encapsulation structure. A pixel unit is described. Therefore, in this application, both of the aforementioned two encapsulation structures are referred to as pixel-level encapsulation structures.

Additional metal lines are placed on the display panel to implement electrical connections between the OLED light emitting components encapsulated by the pixel-level encapsulation structures on the display panel to control the display of the entire display panel. be able to. If a metal line is specifically arranged, the metal line may be the third metal grid line M3 of FIG. Referring to FIG. 6, the cathode 418 of the OLED light emitting component of each pixel unit is connected to the third metal gridline M3. Thus, as shown in FIG. 5, holes use anode 411 to sequentially penetrate hole-injecting layer 414 and hole-transporting layer 415 of each OLED light-emitting component and then to light-emitting layer 416. can be reached. Electrons can reach the light-emitting layer 416 from the cathode 418 through the electron-transporting layer 417 . On the light-emitting layer 416, holes and electrons combine with each other to form excited state excitons. The excitons transfer energy to the organic light emitting molecules on the light emitting layer 416 and excite the electrons of the organic light emitting molecules to transition from the ground state to the excited state. The electron beam in the excited state is deactivated to generate photons for light emission. Since the cathodes 418 of all the OLED light emitting components are connected via the third metal grid line M3, the third metal grid line M3 simultaneously transmits the cathode drive signal to the cathodes 418 of all the OLED light emitting components. synchronous cathode signal control can be implemented. The material of the third metal grid lines M3 may be titanium aluminum alloy, molybdenum, or the like. Also, if the third metal grid line M3 is specifically arranged, please continue to refer to FIG. A third metal grid line M3 is disposed on the side of the pixel defining layer 412 remote from the thin film transistor layer. Alternatively, see FIGS. 7 and 8. FIG. 7 is a cross-sectional view taken along line AA in FIG. 6, which is a cross-sectional view of the display panel at a position where the third metal grid line M3 is not connected to the cathode 418. FIG. 8 is a cross-sectional view taken along line BB in FIG. 6, which is a cross-sectional view of the display panel at the position where the third metal grid line M3 is connected to the cathode 418. FIG. In the embodiments shown in FIGS. 7 and 8, a third metal gridline M3 may be disposed on the first encapsulation layer 410. In the embodiment shown in FIGS. Alternatively, in other embodiments, the third metal gridline M3 may be disposed on the layer structure of the thin film transistor layer (eg, planarization layer 409, inter-layer dielectric 408, or inter-metal dielectric layer 406).

Please continue to refer to FIG. The display panel in this embodiment of the present application may further include a photo-spacer 413 disposed on the pixel defining layer 412, and the photo-spacer 413 may be a photo-spacer. By placing the photospacer 413 on the pixel defining layer 412, in the process of forming the OLED light emitting component by vapor deposition, the deposition mask for forming each functional layer of the OLED light emitting component by vapor deposition is in contact with the display panel. It can effectively prevent it and improve the product yield of the display panel.

In addition to the above structures, the display panel may further include a second planarization layer 421 . A second planarization layer 421 is disposed on the side of the second encapsulation layer 420 remote from the thin film transistor layer. By depositing a second planarization layer 421, subsequent processing can provide a flat working surface. In addition, the second planarization layer 421 may cover foreign matter to prevent the foreign matter from entering other film layers disposed on the second planarization layer 421 . In addition, please continue to refer to FIG. A full surface third encapsulation layer 422 may further be provided on the second planarization layer 421 . In this application, a full-surface encapsulation structure located on a display panel is referred to as a panel-level encapsulation structure. Therefore, the display panel has both a pixel level encapsulation structure and a panel level encapsulation structure to help improve the water-oxygen barrier effect of the display panel. In addition, the third encapsulation layer 422 may be a single-layer inorganic encapsulation layer, or may be an encapsulation layer having a multi-layer laminated structure in which an inorganic layer and an organic layer are alternately laminated. For example, it may have a three-layer structure in which an inorganic layer, an organic layer, and an inorganic layer are laminated in order, or a four-layer structure in which an inorganic layer, an organic layer, an inorganic layer, and an organic layer are laminated in order. , may be a structure of five or more layers formed by lamination.

The display panel in this embodiment of the present application comprises both a pixel-level encapsulation structure and a panel-level encapsulation structure to provide double protection of the pixel units. In this case, even if water and oxygen enter the display panel through the panel-level encapsulation structure, they cannot enter the OLED light-emitting component due to the barrier of the pixel-level encapsulation structure. . Therefore, this solution can help improve the water-oxygen barrier effect of the display panel.

An embodiment of the present application further provides a flexible display. Flexible displays can include, but are not limited to, protective covers, polarizers, touch panels, display panels, heat dissipation layers, and protective layers. When the flexible display is specifically arranged, the polarizer is fixed to the protective cover and the touch panel is arranged between the polarizer and the display panel. Alternatively, a polarizer may be placed between the touch panel and the display panel after the touch panel is fixed to the protective cover. The display panel may be the display panel of any one of the above embodiments.

The protective cover may be a transparent glass cover or a cover made of organic materials such as polyimide to implement a protective function and reduce the impact on the display effect of the display. The polarizer may be a circular polarizer to avoid reflection of anode light. The touch panel may be arranged independently, or may be integrated with the display panel. The heat dissipation layer may be copper foil for heat dissipation. The protective layer may be protective foam. The layered structure of the flexible display may be adhered together using an optically clear adhesive or an opaque pressure sensitive adhesive.

When a display panel is specifically arranged, the display panel includes a substrate, a thin film transistor layer, a pixel defining layer, at least two encapsulation structures, and at least two pixel units. The at least two encapsulation structures are configured to encapsulate at least two pixel units. A thin film transistor layer is disposed on the substrate. A pixel defining layer is disposed on the thin film transistor layer. In this embodiment of the application, the substrate can provide a flexible bearer for each upper layer, such as a thin film transistor layer. The substrate can include, but is not limited to, a first substrate material layer, a barrier layer, and a second substrate material layer stacked in order from bottom to top. In some embodiments of the present application, the barrier layer in the substrate or the second substrate material layer may be omitted to simplify the structure of the substrate.

When the thin film transistor layer is specifically arranged, the thin film transistor layer includes a buffer layer, an active layer, a gate insulator layer, a gate, a first metal grid line, an inter-metal dielectric layer, a metal capacitor, an inter-layer dielectric layer, a source, a drain, a second two metal grid lines, and one or more of the first planarization layer. This is not a limitation in this embodiment of the application.

When the pixel definition layer is specifically arranged, the pixel region and the side encapsulation regions are arranged on the pixel definition layer. The pixel region and the side encapsulation regions may be hole structures through the pixel definition layer, the side encapsulation regions being arranged around the pixel units encapsulated by the encapsulation structure. A pixel unit is the smallest unit for implementing the display function of a display panel and includes OLED light emitting components. The OLED light-emitting component is located partially or completely within the pixel area.

If the encapsulation structure is specifically arranged, the encapsulation structure may correspond one-to-one with the pixel unit. For example, each pixel unit is encapsulated by one encapsulation structure. Specifically, the encapsulation structure includes a first encapsulation layer and a second encapsulation layer. A first encapsulation layer may be disposed between the OLED light emitting component and the thin film transistor layer and exposed from the side encapsulation regions of the pixel defining layer. A second encapsulation layer covers the pixel units, and the second encapsulation layer penetrates the side encapsulation regions in sealing contact with the first encapsulation layer. In this manner, each pixel unit is encapsulated by the first encapsulation layer and the second encapsulation layer such that each pixel unit is encapsulated independently.

In a possible embodiment, multiple pixel units (where the number of multiple pixel units is less than the total number of pixel units on the display panel) may alternatively be encapsulated by one encapsulation structure. . The encapsulating structure may be of any shape. For example, for a display panel with a fixed single folding direction, all pixel units are arranged in the folding direction so as to form a column-like or row-like encapsulation structure for implementing pixel unit encapsulation. may be grouped into columns or rows along the

Even if the flexible display in this embodiment is bent more than 100,000 times in any direction, the display panel can still have good encapsulation characteristics. This can avoid water-oxygen ingress caused by cracking of the encapsulation layer in application scenarios where the flexible display is bent, rolled, or deformed freely, thereby allowing water and It can avoid the display failure problem of the flexible display caused by oxygen permeating through the encapsulation layer into the display panel. In addition, because each pixel unit is either independently encapsulated or encapsulated by grouping, water and oxygen entering any encapsulation structure are prevented from diffusing between adjacent encapsulation structures. It can prevent further, thereby avoiding the luminous failure of the entire flexible display.

An embodiment of the present application further provides an electronic device. An electronic device includes an intermediate frame, a rear housing, a printed circuit board, and a flexible display according to any one of the above embodiments. An intermediate frame may be configured to support the printed circuit board and the OLED flexible display. An OLED flexible display and a printed circuit board are arranged on both sides of the intermediate frame. A rear housing is positioned on the side of the printed circuit board remote from the intermediate frame.

The electronic device in this embodiment of the application may be a foldable device. In the process of folding an OLED flexible display of an electronic device, the risk of cracking of the encapsulation layer of the display panel of the flexible display is relatively low, thereby allowing water and oxygen to permeate through the encapsulation layer and enter the display panel. The resulting display failure problem of the OLED flexible display is avoided.

To further understand the structure of the display panel in the present application, one embodiment of the present application further provides a process of manufacturing the display panel. The manufacturing process includes the following detailed steps.

Step 001: Fabricate a substrate. In this embodiment of the present application, a top-gate low temperature poly-silicon (LTPS) thin film transistor (TFT) substrate may be used as an example. See FIG. 9 for the method of setting the layer structure of the substrate. The substrate may be formed on a bearer layer 401, which may be a bearer glass layer, to provide support in the display panel manufacturing process. In addition, vias 4091 should be reserved on the first planarization layer 409 to facilitate subsequent electrode connections. Since the process of manufacturing the LTPS-TFT substrate is relatively mature, the process of manufacturing the LTPS-TFT substrate will not be described in detail in this application.

Step 002: Fabricate a first encapsulation layer 410; In this step, a _SiO2 , SiNx _, or _Al2O3 deposited layer is formed by chemical vapor deposition (CVD), atomic layer deposition (ALD), etc. to form the first encapsulation. It can function as layer 410 . Then, the first encapsulation layer 410 is patterned by application of photoresist, exposure, development, etching, stripping of the photoresist, and the like. Therefore, the first encapsulation layer 410 is cut corresponding to each region for forming a pixel unit, and an independent first encapsulation layer 410 corresponding to each pixel unit is formed. See FIG. 10 for the pattern of the first encapsulation layer 410 formed in step 002 . The dashed lines represent the regions forming the pixel units 43 and the solid lines represent the independently formed first encapsulation layer 410 . 11 is a cross-sectional view of the display panel after manufacturing the first encapsulation layer 410. As shown in FIG. As can be seen, the independent first encapsulation layer 410 corresponding to each pixel unit avoids the reserved vias 4091 on the first planarization layer 409 to facilitate subsequent electrode connections. formed by

Step 003: Fabricate the anode 411; Generally, indium tin oxide (ITO), Ag, and ITO are sequentially deposited by physical vapor deposition (PVD) to fabricate the anode 411 of the OLED light emitting component. Anode 411 may then be patterned by photoresist coating, exposure, development, etching, photoresist stripping, etc. to form anode 411 shown in FIG. Anode 411 is connected in contact with drain D through via 4091 to allow encapsulation to be implemented.

Step 004: Fabricate a pixel definition layer (PDL) 412 . First, a structure formed after step 003, such as the first planarization layer 409, the first encapsulation layer 410, or the anode 411, is coated with a photoresist-based organic material by slit coating. good too. After that, the patterned pixel definition layer 412 can be obtained by performing exposure, development, or the like. As shown in FIG. 13, patterned pixel definition layer 412 has formed thereon pixel region 4121 and side encapsulation regions 4122 formed around pixel region 4121 . The OLED light emitting component of the pixel unit may be formed within the pixel area 4121, and the side encapsulation areas 4122 are for exposing the first encapsulation layer 410 for implementing subsequent pixel unit encapsulation. used for

Step 005: Fabricate a third metal grid line M3 connected to the cathode so as to then electrically connect the cathodes of the OLED light emitting components of all pixel units. Additionally, some third metal grid lines M3 may also be used as data lines for transmitting data signals.

Generally, when the third metal grid lines M3 are manufactured, materials such as Ti, Al, and Ti may be deposited in sequence first to form a metal layer on the pixel defining layer 412, or Mo materials such as may be deposited by PVD. The metal layer is then patterned to form a third layer by one or more of photoresist coating, exposing, developing, etching, and photoresist stripping, such as by photoresist coating, exposing, developing, etching, and photoresist stripping. A metal grid line M3 can be formed. FIG. 14 shows a wiring solution for the third metal gridline M3 (the figure includes the pattern of the third metal gridline M3 and subsequently formed cathode 418).

15 is a cross-sectional view taken along the line CC of FIG. 14. FIG. FIG. 15 is a cross-sectional view of the display panel at a position where the third metal grid line M3 is not connected to the cathode 418 after step 005. FIG. 16 is a cross-sectional view taken along line DD of FIG. 14. FIG. FIG. 16 is a cross-sectional view of the display panel at the position where the third metal grid line M3 is connected to the cathode 418 after step 005. FIG.

In a possible embodiment of the present application, after step 005 the manufacturing process may optionally include step 006: fabricating photo spacers (PS) 413 . When specifically forming the photospacers 413, it is common to first apply a photoresist by slit coating, and then obtain the photospacers 413 by exposure, development, and the like. See FIG. 17 for the stacking relationship between the fabricated photospacer 413 and the fabricated pixel definition layer 412 . As shown in FIG. 17, the cross-sectional shape of the photospacer 413 may be trapezoidal, or other shapes such as rectangular. The location of placing the photospacer 413 may also be selected according to the particular situation. Fabricating the photospacer 413 on the pixel defining layer 412 can effectively prevent the mask from contacting the surface of the display panel in the subsequent process of forming the OLED light emitting component by vapor deposition.

Step 007: Fabricate a patterned OLED light-emitting component. The OLED light-emitting component comprises a hole injection layer (HIL) 414, a hole transport layer (HTL) 415, an emission layer (EL) 416, an electron transport layer (electron transport layer) 415, which are stacked in order. transport layer (ETL) 417 , cathode 418 , and capping layer (CPL) 419 .

See FIGS. 17 and 18. FIG. When the OLED light emitting component is formed within the pixel region 4121 defined by the pixel defining layer 412, each layer structure of the OLED light emitting component uses the edge thickness mismatch and undercut of another film layer. and patterned by fine metal mask (FFM) deposition, printing, film lift off, and laser etching. In FIG. 18, hole-injection layer 414, hole-transport layer 415, light-emitting layer 416, electron-transport layer 417, cathode 418, and cap layer 419 are all deposited layer patterning designs of an OLED light-emitting component implemented by FFM. is used as an example to present the

It should be noted that in this embodiment of the application, the example in which the OLED light-emitting component is partially disposed within the pixel area is used for illustration. Alternatively, the OLED light-emitting component may be located entirely within the pixel area. This is not a limitation in this embodiment of the application.

Step 008: Fabricate a second encapsulation layer 420; Please refer to FIG. When specifically manufacturing the second encapsulation layer 420, first, _SiO2 , SiNx, _Al2O3 may be deposited as the _second encapsulation layer 420 using CVD or ALD methods. The second encapsulation layer 420 is then patterned by photoresist coating, exposure, development, etching, photoresist stripping, etc. to form a separate second encapsulation over each pixel unit and corresponding to each pixel unit. A protective layer 420 may be formed. The second encapsulation layer 420 and the first encapsulation layer 410 of the pixel unit are also side encapsulations of the pixel definition layer 412 because the first encapsulation layer 410 between adjacent pixel units is also independently disposed. Sealing contact may also be made by using a masking region 4122 . FIG. 19 illustrates pixel encapsulation at locations where the third metal gridline M3 is not connected to the cathode 418. FIG. FIG. 20 illustrates pixel encapsulation at the location where the third metal gridline M3 is connected to the cathode 418. FIG.

In the aforementioned processing steps of manufacturing a display panel, a corresponding second encapsulation layer 420 and a corresponding first encapsulation layer 410 are formed for each pixel unit, thereby encapsulating each pixel unit independently. In other words, a pixel-level encapsulation structure of the display panel is formed. By breaking the encapsulation connection between the pixel units in this way, it is possible to prevent the formation of a large encapsulation layer, which causes the OLED flexible display including the display panel to be bent and rolled. , it can effectively avoid the water-oxygen intrusion that occurs when the encapsulation layer cracks in scenarios such as being deformed freely. Moreover, OLED flexible displays can further implement true multidirectional folding, curling, free deformation, and small radius bending, thereby implementing true free flexible encapsulation.

Additionally, the pixel defining layer 412 is provided with grooves and protrusions, which may be transferred to the second encapsulation layer 420 . However, to facilitate subsequent processing, please refer to FIG. A second planarization layer 421 can be further formed on the display panel formed after step 008 . In addition, the second planarization layer 421 may cover foreign matter to prevent the foreign matter from entering other film layers disposed on the second planarization layer 421 .

Additionally, see FIG. A full-surface third encapsulation layer 422 may be further formed on the second planarization layer 421 to form a full-surface water-oxygen barrier encapsulation on the display panel. Encapsulation layer 422 may be deposited of _{SiO2 ,} SiNx, or _Al2O3 . Therefore, an encapsulation mode that combines both the pixel-level encapsulation structure and the panel-level encapsulation structure is formed on the display panel to further improve the water-oxygen barrier encapsulation effect of the display panel.

At the end of the display panel manufacturing process in this application, a laser can be used to irradiate the contact surface between the bearer layer 401 and the first substrate material layer PI1, so that the bearer layer 401 is 1 loses its adhesion to the substrate material layer PI 1 and thus the bearer layer 401 is removed. A flexible display panel is thus obtained.

After the display panel is processed, the display panel may be cut based on the specific size requirements of the OLED flexible display. The touch panel and polarizers are then attached and the bonding processes necessary to implement the electrical connections are performed. A flexible cover, a copper foil for heat dissipation, a protective film, etc. are attached. Finally, the OLED flexible display is assembled with customized functionality and the necessary performance checks are performed to complete the fabrication of the OLED flexible display.

Please refer to FIG. A display panel is further provided in some embodiments of the present application. The display panel includes a substrate, a thin film transistor layer, a pixel defining layer 412, pixel units and an encapsulation structure. The encapsulation structure is configured to encapsulate the pixel unit. The pixel definition layer 412 has a pixel region and side encapsulation regions arranged around the pixel units encapsulated by the encapsulation structure. The pixel defining layer 412 may be formed by coating a photoresist-based organic material on the thin film transistor layer through a slit coat, or by exposing, developing, or the like to obtain a pixel region or a side encapsulation region.

The thin film transistor layers may include, but are not limited to, a stacked buffer layer 403 , an active layer, a gate insulator layer 405 , an inter-metal dielectric layer 406 , an interlayer dielectric layer 408 and a first planarization layer 409 . The buffer layer 403, the gate insulator layer 405, the intermetallic insulating layer 406, and the interlayer insulating layer 408 generally have inorganic layer structures made of inorganic materials such as _SiO2 , SiNx, _{Al2O3 ,} etc., and are relatively good. A water-oxygen barrier effect can be obtained. Therefore, in this embodiment, the aforementioned inorganic layer structure of the thin film transistor layer can be used as the first encapsulation layer. In addition, in this embodiment, vias are further provided on the thin film transistor layer at locations corresponding to the side encapsulation regions, and the vias are connected to the inorganic layer structure of the thin film transistor layer (e.g. Layer 406, gate insulator layer 405, buffer layer 403) are exposed. For example, in FIG. 23, the interlayer dielectric layer 408 is exposed by vias on the thin film transistor layer.

In this embodiment of the application, the pixel unit may include, but is not limited to, an OLED light emitting component. The OLED light-emitting component is located partially or completely within the pixel area. When the encapsulation structure is specifically arranged, the encapsulation structure used as the second encapsulation layer 420 covers each pixel unit in a one-to-one correspondence. In other words, each pixel unit is encapsulated by one encapsulation structure. The second encapsulation layer 420 penetrates the side encapsulation regions and vias on the thin film transistor layer to make sealing contact with the inorganic layer structure (e.g., the interlayer insulating layer 408) of the thin film transistor layer, thereby providing each pixel unit is wrapped by the inorganic layer structure (e.g., the interlayer insulating layer 408) of the thin film transistor layer and the second encapsulation layer 420 to encapsulate each pixel unit independently, in other words, form a pixel-level encapsulation structure. do. This can prevent the formation of a large encapsulation layer, thereby preventing the encapsulation layer from forming in scenarios where the OLED flexible display including the display panel is bent, rolled, or deformed freely. It can effectively avoid the water-oxygen intrusion that occurs when cracking occurs.

Note that FIG. 23 is an example. In this embodiment, the pixel unit includes an OLED light emitting component, a planarization layer 409, a source S and a drain D. FIG. Optionally, the pixel unit may further include an interlayer insulating layer 408 . Optionally, the pixel unit may further include an inter-metal insulating layer 406 and a gate G.

In addition, in this embodiment, multiple pixel units (the number of multiple pixel units is less than the total number of pixel units on the display panel) are alternatively encapsulated by one encapsulation structure as a whole. may be The encapsulating structure may be of any shape. See FIG. For example, for a display panel with a fixed single folding direction (curves with arrows in the figure indicate the folding direction), all pixel units can be grouped into columns or rows to form column-like or row-like capsules. An encapsulation structure can be formed to implement pixel unit encapsulation. This improves the bending properties of the display panel and reduces manufacturing difficulties and manufacturing costs. Please continue to refer to FIG. In some other embodiments of the present application, several adjacent pixel units may be encapsulated by one encapsulation structure (see dashed-dotted rectangular box in the figure). Each pixel unit is encapsulated independently, or multiple pixel units less than the total number of pixel units on the display panel are encapsulated by one encapsulation structure. A pixel unit is described. Therefore, in this application, both of the aforementioned two encapsulation structures are referred to as pixel-level encapsulation structures.

In this embodiment, the pixel units on the display panel are encapsulated independently, so that each pixel unit or n (n<total number of pixel units on the display panel) pixel units are one encapsulation structure. Encapsulated by a body (pixel-level encapsulation structure). This can effectively improve the bending properties of the display panel, reduce the possibility of damage to the encapsulation structure in the process of bending the display panel, alleviate problems such as failure of the OLED light-emitting components, and The lifetime of OLED flexible displays including panels can be extended. Additionally, in this embodiment of the present application, in addition to encapsulating the OLED light emitting component, the encapsulation structure includes planarization layer 409, source S, drain D, inter-layer dielectric 408, inter-metal dielectric 406. , and gate G may be further encapsulated. This protects the encapsulation structure. In addition, because existing structures are used as part of the encapsulation structure, processing steps are eliminated, reducing cost and manufacturing time.

Moreover, a third metal grid line M3 may be further disposed on the display panel, and the cathode 418 of the OLED light emitting component of each pixel unit is connected to the third metal grid line M3. The material of the third metal grid lines M3 may be titanium aluminum alloy, molybdenum, or the like. If the third metal grid line M3 is specifically arranged, see FIG. A third metal grid line M3 may be disposed on the side of the pixel defining layer 412 remote from the thin film transistor layer. Alternatively, the third metal gridline M3 may be disposed on a layer structure of a thin film transistor layer (eg, planarization layer 409, interlayer dielectric layer 408, or inter-metal dielectric layer 406).

Please continue to refer to FIG. The display panel in this embodiment of the present application may further include a photo-spacer 413 disposed on the pixel defining layer 412, and the photo-spacer 413 may be a photo-spacer. By placing the photospacer 413 on the pixel defining layer 412, in the process of forming the OLED light emitting component by vapor deposition, the deposition mask for forming each functional layer of the OLED light emitting component by vapor deposition is in contact with the display panel. It can effectively prevent it and improve the product yield of the display panel.

In addition to the above structures, the display panel may further include a second planarization layer 421 . A second planarization layer 421 is disposed on the side of the second encapsulation layer 420 remote from the thin film transistor layer. By depositing a second planarization layer 421, subsequent processing can provide a flat working surface. In addition, the second planarization layer 421 may cover foreign matter to prevent the foreign matter from entering other film layers disposed on the second planarization layer 421 . In addition, please continue to refer to FIG. A full surface third encapsulation layer 422 may further be provided on the second planarization layer 421 . In this embodiment, the full-surface encapsulation structure placed on the display panel is called the panel-level encapsulation structure. Therefore, the display panel has both a pixel level encapsulation structure and a panel level encapsulation structure to help improve the water-oxygen barrier effect of the display panel.

The manufacturing process for manufacturing the display panel in this embodiment is the same as the process for manufacturing the display panel shown in FIGS. Details are not explained here again. The difference between the process of manufacturing the display panel in this embodiment and the process of manufacturing the display panel described above is that in this embodiment, the inorganic layer structure (eg, the interlayer insulating layer 408) of the thin film transistor layer is configured to be exposed. The vias should be provided at locations corresponding to the side encapsulation regions of the pixel definition layer above the thin film transistor layer, so that when the second encapsulation layer 420 is formed, the second encapsulation layer 420 is formed. The layer 420 and the inorganic layer structure of the thin film transistor layer (eg, the interlayer insulating layer 408) can be in sealing contact through vias, thereby realizing pixel-level encapsulation of the display panel. One process of manufacturing the display panel in this embodiment includes, for example, the following steps.

Step 001: Fabricate a substrate. For example, the substrate includes a first substrate material layer, a barrier layer, and a second substrate material layer laminated in order.

Step 002: Forming a thin film transistor layer on the substrate, the thin film transistor layer including one or more of inorganic material layers, such as a buffer layer, a gate insulator layer, an inter-metal dielectric layer, and an inter-layer dielectric layer.

Step 003: Provide a first via and a second via on the thin film transistor layer. The first via is configured to expose the drain of the thin film transistor layer and the second via extends to any one of the aforementioned inorganic layer structures of the thin film transistor layer.

Step 004: Fabricate the anode. For the specific process of manufacturing the anode, refer to the process of manufacturing the display panel in the previous embodiments. Details are not explained here again. The anode may be in contact with and connected to the drain through the first via to implement encapsulation.

Step 005: Fabricate the pixel defining layer. For the specific process of manufacturing the pixel defining layer, please refer to the process of manufacturing the display panel in the previous embodiments. Details are not explained here again. The formed pixel definition layer has a pixel region and side encapsulation regions. The OLED light emitting component of the pixel unit may be formed within the pixel area. A side encapsulation region is positioned opposite the second via to expose the inorganic layer of the thin film transistor layer for subsequent pixel unit encapsulation.

Step 006: Fabricate a third metal grid line connected to the cathode so as to then electrically connect the cathodes of the OLED light emitting components of all pixel units. For the specific process of manufacturing the third metal grid lines, please refer to the process of manufacturing the display panel in the previous embodiment. Details are not explained here again.

Step 007: Manufacture of photospacers For specific processing of manufacturing photospacers, refer to the processing of manufacturing a display panel in the above embodiment. Details are not explained here again. Fabricating the photospacer on the pixel defining layer can effectively prevent the mask from contacting the surface of the display panel in the subsequent process of forming the OLED light emitting component by vapor deposition.

Step 008: Fabricate a patterned OLED light emitting component. When the OLED light emitting component is formed in the pixel region of the pixel defining layer, the OLED light emitting component may be partially disposed within the pixel region, or the OLED light emitting component may be disposed completely within the pixel region. This is not a limitation in this embodiment of the application. Also, for the layer structure and specific manufacturing process of the OLED light-emitting component, please refer to the manufacturing process of the display panel in the above embodiments. Details are not explained here again.

Step 009: Fabricate an encapsulation structure. First, _SiO2 , SiNx _, or _Al2O3 can be deposited by CVD, ALD, etc. to form a full surface encapsulating structure layer. The entire surface encapsulation structure layer is then patterned by photoresist coating, exposure, development, etching, photoresist stripping, etc. to form an independent encapsulation structure overlying each pixel unit and corresponding to each pixel unit. can be formed. The encapsulating structure of the thin film transistor layer and the inorganic material layer may be in sealing contact through the side encapsulating regions of the pixel defining layer.

Additionally, the pixel defining layer may be provided with grooves and protrusions, and the grooves and protrusions may be transferred to the encapsulation structure. However, a planarization layer can be additionally formed on the display panel formed after step 009 to facilitate subsequent processing. The planarization layer may also cover foreign matter to prevent foreign matter from penetrating other film layers disposed on the planarization layer. Additionally, a full surface third encapsulation layer may be formed over the planarization layer.

Further, in some embodiments of the present application, the substrate may include a first substrate material layer PI1, a barrier layer 402, and a second substrate material layer PI2 stacked together. The barrier layer 402 generally has an inorganic layer structure made of an inorganic material such as SiO ₂ , SiNx, Al ₂ O ₃ or the like, and can provide a relatively good water-oxygen barrier effect. Therefore, in some embodiments of the present application, the inorganic layer structure of the substrate (eg, barrier layer 402) can be used as the first encapsulation layer. In this case, vias may be provided on the substrate at locations corresponding to the side encapsulation regions on the thin film transistor layer, the vias being connected to the inorganic layer structure (e.g., barrier layer 402) of the substrate. may be exposed. Pixel unit encapsulation is similar to previous embodiments. Details are not explained here again.

An embodiment of the present application further provides a flexible display. Flexible displays can include, but are not limited to, protective covers, polarizers, touch panels, display panels, heat dissipation layers, and protective layers. When the flexible display is specifically arranged, the polarizer is fixed to the protective cover and the touch panel is arranged between the polarizer and the display panel. Alternatively, a polarizer may be placed between the touch panel and the display panel after the touch panel is fixed to the protective cover. The display panel may be the display panel of any one of the above embodiments.

In this embodiment, the thin film transistor layer may include, but is not limited to, a stacked buffer layer, an active layer, a gate insulator layer, an intermetal dielectric layer, an interlayer dielectric layer, and a first planarization layer. The buffer layer, gate insulator layer, intermetallic insulating layer, and interlayer insulating layer are generally inorganic layer structures made of inorganic materials such as SiO ₂ , SiNx, Al ₂ O ₃ , and have relatively good water-oxygen barrier properties. effect can be obtained. Therefore, in this embodiment, the aforementioned inorganic layer structure of the thin film transistor layer can be used as the first encapsulation layer.

When the encapsulation structure is specifically arranged, the encapsulation structure used as the second encapsulation layer covers each pixel unit in a one-to-one correspondence. In other words, each pixel unit is encapsulated by one encapsulation structure. The second encapsulation layer penetrates the side encapsulation regions and vias on the thin film transistor layer to make sealing contact with the inorganic layer structure (e.g., the interlayer insulating layer) of the thin film transistor layer, whereby each pixel unit: Encased by the inorganic layer structure (eg, interlayer insulating layer) of the thin film transistor layer and the second encapsulation layer, encapsulating each pixel unit independently, in other words, forming a pixel-level encapsulation structure. Note that in this embodiment, a pixel unit includes an OLED light emitting component, a planarization layer, a source and a drain. Optionally, the pixel unit may further include an interlayer insulating layer. Optionally, the pixel unit may further include an inter-metal dielectric layer and a gate.

In a possible embodiment, multiple pixel units (where the number of multiple pixel units is less than the total number of pixel units on the display panel) may alternatively be encapsulated by one encapsulation structure. . The encapsulating structure may be of any shape. For example, for a display panel with a fixed single folding direction, all pixel units are arranged in the folding direction so as to form a column-like or row-like encapsulation structure for implementing pixel unit encapsulation. may be grouped into columns or rows along the

Even if the flexible display in this embodiment is bent more than 100,000 times in any direction, the display panel can still have good encapsulation characteristics. This can avoid water-oxygen ingress caused by cracking of the encapsulation layer in application scenarios where the flexible display is bent, rolled, or deformed freely, thereby allowing water and It can avoid the display failure problem of the flexible display caused by oxygen permeating through the encapsulation layer into the display panel. In addition, because each pixel unit is either independently encapsulated or encapsulated by grouping, water and oxygen entering any encapsulation structure are prevented from diffusing between adjacent encapsulation structures. It can prevent further, thereby avoiding the luminous failure of the entire flexible display.

An embodiment of the present application further provides an electronic device. An electronic device includes an intermediate frame, a rear housing, a printed circuit board, and a flexible display according to any one of the above embodiments. The intermediate frame may be configured to support the printed circuit board and flexible display. A flexible display and a printed circuit board are placed on either side of the intermediate frame. A rear housing is positioned on the side of the printed circuit board remote from the intermediate frame.

The electronic device in this embodiment of the application may be a foldable device. In the process of folding the flexible display of the electronic device, the crack risk of the encapsulation layer of the display panel of the flexible display is relatively low, thereby caused by water and oxygen permeating through the encapsulation layer into the display panel. The display defect problem of the flexible display is avoided.

The foregoing descriptions are merely specific implementations of the present application and do not limit the protection scope of the present application. Any variation or replacement readily figured out by a person skilled in the art within the technical scope disclosed in the present application shall fall within the protection scope of the present application. Therefore, the protection scope of this application shall be subject to the protection scope of the claims.

101 Display 102 Intermediate Frame 103 Rear Housing 104 PCB
1041 Component 301 Upper encapsulation layer 3011 First inorganic layer 3012 Second inorganic layer 3013 Flexible sandwich layer 302 Lower encapsulation layer 201 Protective cover 202 Polarizer 203 Touch panel 204 Display panel 205 Heat dissipation layer 206 Protective layer 401 Bearer layer 3021 Barrier layer 402 barrier layer 403 buffer layer 404 active layer 405 gate insulator layer 406 intermetal dielectric layer 407 metal capacitor 408 interlevel dielectric layer 409 first planarization layer 4081 via 4091 via PI 1 first substrate material layer PI 2 second G gate M1 first metal grid line M2 second metal grid line M3 third metal grid line S source D drain 410 first encapsulation layer 411 anode 412 pixel defining layer 4121 pixel region 4122 side encapsulation region 413 photospacer 414 hole injection layer 415 hole transport layer 416 light emitting layer 417 electron transport layer 418 cathode 419 cap layer 420 second encapsulation layer 421 second planarization layer 422 third encapsulation layer 43 pixel unit.

Generally, when the third metal grid lines M3 are manufactured, materials such as Ti, Al, and Ti may be deposited in sequence first to form a metal layer on the pixel defining layer 412, or Mo materials such as may be deposited by PVD. The metal layer may then be patterned to form third metal gridlines M3 by one or more of photoresist coating, exposure, development, etching, and photoresist stripping. FIG. 14 shows a wiring solution for the third metal gridline M3 (the figure includes the pattern of the third metal gridline M3 and subsequently formed cathode 418).

Claims (19)

A display panel comprising a substrate, a thin film transistor layer, a pixel defining layer, at least two encapsulation structures, and at least two pixel units, wherein the at least two encapsulation structures define the at least two pixels. configured to encapsulate the unit,
the thin film transistor layer is disposed on the substrate;
The pixel, wherein the pixel definition layer is disposed over the thin film transistor layer, the pixel definition layer including a pixel region and a side encapsulation region, the side encapsulation region being encapsulated by the encapsulation structure. disposed about the unit, the pixel region and the side encapsulation region being through holes disposed on the pixel definition layer;
wherein the pixel unit includes an OLED light emitting component, the OLED light emitting component being partially or completely disposed within the pixel area;
The encapsulation structure includes a first encapsulation layer and a second encapsulation layer, the first encapsulation layer disposed on a side of the OLED light-emitting component proximate to the thin film transistor layer, and two encapsulation layers are disposed on a side of the OLED light-emitting component remote from the thin film transistor layer, the first encapsulation layer and the second encapsulation layer encapsulating within the side encapsulation regions; stop contact,
display panel. 2. The display panel of claim 1, wherein the number of encapsulation structures is the same as the number of pixel units, each of said encapsulation structures being configured to encapsulate one pixel unit. wherein the first encapsulation layer has a single-layer structure consisting of an inorganic material layer, or a multilayer structure in which an inorganic material layer and an organic material layer are alternately laminated;
The second encapsulation layer has a single-layer structure consisting of an inorganic material layer, or a multilayer structure in which an inorganic material layer and an organic material layer are alternately laminated,
3. The display panel according to claim 1 or 2. 4. A display panel according to any one of claims 1 to 3, wherein said display panel further comprises a metal line, and cathodes of all OLED light emitting components are connected via said metal line. The metal line is disposed on a side of the pixel defining layer remote from the thin film transistor layer, or the metal line is disposed on the first encapsulation layer, or the metal line is disposed on the layer structure of the thin film transistor layer. A flexible display comprising a protective cover, a polarizer, a touch panel, and the display panel according to any one of claims 1 to 8, wherein the polarizer is fixed to the protective cover and the touch panel. is positioned between the polarizer and the display panel, or the touch panel is fixed to the protective cover, and the polarizer is positioned between the touch panel and the display panel. , flexible display. An electronic device comprising an intermediate frame, a rear housing, a printed circuit board and a flexible display according to claim 6,
the intermediate frame is configured to support the printed circuit board and the flexible display, the printed circuit board and the flexible display being disposed on opposite sides of the intermediate frame;
An electronic device, wherein the rear housing is located on the side of the printed circuit board remote from the intermediate frame. A method of manufacturing a display panel, wherein the display panel comprises a substrate, a thin film transistor layer, a pixel defining layer, at least two encapsulation structures, and at least two pixel units, wherein the at least two encapsulations a structure configured to encapsulate the at least two pixel units, the encapsulating structure comprising a first encapsulation layer and a second encapsulation layer, the pixel units comprising an OLED light emitting component; wherein the method includes
manufacturing the substrate;
forming the thin film transistor layer on the substrate and providing a first via on the thin film transistor layer, the first via extending to a drain of the thin film transistor layer;
forming a full surface first encapsulation structure layer on the thin film transistor layer and patterning the full surface first encapsulation structure layer to obtain at least two independent first encapsulation layers; do, step and
forming the pixel definition layer and patterning the pixel definition layer to form a pixel region and a side encapsulation region on each of the first encapsulation layers, the side encapsulation an area is used to expose the first encapsulation layer;
forming the OLED light emitting component within the pixel area, wherein the OLED light emitting component is connected to the drain through the first via;
forming a full-surface second encapsulation structure layer corresponding to the thin film transistor layer on a side of the OLED light emitting component remote from the thin film transistor layer to obtain at least two independent second encapsulation layers; and patterning the full surface second encapsulation structure layer, wherein the second encapsulation layer and the first encapsulation layer are in sealing contact within the side encapsulation regions. are, steps and
A manufacturing method, including: Specifically, the step of forming the first encapsulation layer comprises:
depositing one or more of SiO ₂ , SiNx, or Al ₂ O ₃ on the thin film transistor layer to form the full surface first encapsulation structure layer;
patterning the full surface first encapsulation structure layer to obtain the first encapsulation layer by coating, exposing, developing, etching or stripping; 9. The method of manufacturing of claim 8, comprising one or more of the steps. forming an anode on the first encapsulation layer before the pixel defining layer is formed, the anode being connected to the drain through the first via; 10. A method of manufacturing according to claim 8 or 9, comprising: Specifically, the step of forming the anode comprises:
sequentially depositing ITO, Ag, and ITO on the first encapsulation layer to form an anode material layer;
patterning the layer of anode material to obtain the anode, comprising one or more of coating, exposing, developing, etching or stripping. 11. The manufacturing method according to claim 10, comprising: 12. The manufacturing method according to any one of claims 8 to 11, further comprising forming metal lines, wherein the cathode of each said OLED light emitting component is connected to said metal lines. Specifically, the step of forming a metal line comprises:
depositing Ti, Al, and Ti sequentially to form a metal layer after the pixel defining layer is formed;
patterning the metal layer to obtain the metal lines, comprising one or more of coating, exposing, developing, etching or stripping. When,
13. The manufacturing method of claim 12, comprising: Specifically, said step of forming a second encapsulation layer comprises:
depositing one or more of SiO ₂ , SiNx, or Al ₂ O ₃ on the pixel defining layer and the OLED light emitting component to form the full surface second encapsulation structure layer; and,
patterning the entire surface second encapsulation structure layer to obtain the second encapsulation layer by coating, exposing, developing, etching or stripping. a step comprising one or more of the steps;
14. The manufacturing method according to any one of claims 8 to 13, comprising A display panel comprising a substrate, a thin film transistor layer, a pixel defining layer, at least two encapsulation structures, and at least two pixel units, wherein the at least two encapsulation structures define the at least two pixels. configured to encapsulate the unit,
the thin film transistor layer is disposed on the substrate;
The pixel, wherein the pixel definition layer is disposed over the thin film transistor layer, the pixel definition layer including a pixel region and a side encapsulation region, the side encapsulation region being encapsulated by the encapsulation structure. disposed about the unit, the pixel region and the side encapsulation region being through holes disposed on the pixel definition layer;
wherein the thin film transistor layer comprises a layer of inorganic material, and a via is provided at a position corresponding to the side encapsulation region, the via exposing the layer of inorganic material;
wherein the pixel unit includes an OLED light emitting component, the OLED light emitting component being partially or completely disposed within the pixel area;
The encapsulation structure is located on a side of the OLED light emitting component remote from the thin film transistor layer, and the encapsulation structure and the inorganic material layer are in sealing contact within the side encapsulation regions. ,
display panel. 16. The display panel of claim 15, wherein the number of encapsulation structures is the same as the number of pixel units, each encapsulation structure being configured to encapsulate one pixel unit. 17. The display panel according to claim 15 or 16, wherein the encapsulation structure is a single-layer structure of inorganic material layers or a multi-layer structure of alternately laminated inorganic material layers and organic material layers. 18. A display panel according to any one of claims 15 to 17, wherein said display panel further comprises metal lines, and cathodes of all OLED light emitting components are connected via said metal lines. 19. The metal line of claim 18, wherein the metal line is arranged on a side of the pixel defining layer remote from the thin film transistor layer, or wherein the metal line is arranged on a layer structure of the thin film transistor layer. display panel.

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