CN109037285B

CN109037285B - Display panel and manufacturing method thereof, display device and mask assembly

Info

Publication number: CN109037285B
Application number: CN201810835903.XA
Authority: CN
Inventors: 陈亮; 王磊
Original assignee: BOE Technology Group Co Ltd
Current assignee: BOE Technology Group Co Ltd
Priority date: 2018-07-26
Filing date: 2018-07-26
Publication date: 2020-11-27
Anticipated expiration: 2038-07-26
Also published as: CN109037285A

Abstract

Some embodiments of the application provide a display panel and a manufacturing method thereof, a display device and a mask assembly, relate to the technical field of display, and are used for solving the problem that a touch blind area is generated due to the fact that a touch trace occupies a large display space. The display panel comprises a TFT backboard, and a touch wire and an organic functional layer which are positioned on the TFT backboard. The organic functional layer is provided with a plurality of through holes, and each through hole exposes one part of the touch-control wiring. The display panel further includes a first electrode layer covering the organic functional layer. The first electrode layer comprises a plurality of mutually insulated self-capacitance electrodes, and each self-capacitance electrode is contacted with the touch-control wiring exposed from one through hole.

Description

Display panel and manufacturing method thereof, display device and mask assembly

Technical Field

The invention relates to the technical field of display, in particular to a display panel, a manufacturing method of the display panel, a display device and a mask assembly.

Background

Organic Light Emitting Diodes (OLEDs), which are current type Light Emitting devices, are increasingly used in high performance display fields due to their characteristics of self-luminescence, fast response, wide viewing angle, and being fabricated on flexible substrates. The OLED can be divided into two types, i.e., a PMOLED (Passive Matrix Driving OLED) and an AMOLED (Active Matrix Driving OLED), according to a Driving method, and is expected to become a next-generation new flat panel display replacing an LCD (liquid crystal display) because the AMOLED display has advantages of low manufacturing cost, high response speed, power saving, direct current Driving applicable to portable devices, large working temperature range, and the like.

In order to integrate a touch function In the OLED display device, In-Cell (In-Cell) technology may be employed. The In-Cell technologies are Hybrid In-Cell (HIC) and Full In-Cell (FIC), respectively. Compared with the HIC structure, the FIC structure is simpler. In the prior art, the FIC structure has a plurality of touch electrodes disposed on the same layer, and the touch trace connected to the touch electrodes and the touch electrodes are disposed on the same layer. In this case, when the size of the display device is large and the touch accuracy is high, the number of the touch electrodes and the number of the touch traces are also increased, and thus, the display space occupied by the positions of the touch traces is large, thereby generating a touch blind area.

Disclosure of Invention

The embodiment of the invention provides a display panel, a manufacturing method thereof, a display device and a mask assembly, which are used for solving the problem that touch blind areas are generated due to the fact that touch wires occupy a large display space.

In order to achieve the above purpose, the embodiment of the invention adopts the following technical scheme:

in one aspect of the embodiments of the present application, a display panel is provided, which includes a TFT backplane, and a touch trace and an organic functional layer located on the TFT backplane; the organic functional layer is provided with a plurality of through holes, and each through hole exposes one part of the touch wire; the display panel further includes a first electrode layer covering the organic functional layer; the first electrode layer comprises a plurality of self-capacitance electrodes which are insulated from each other; each self-capacitance electrode is in contact with the touch-control trace exposed out of one through hole.

In some embodiments of the present application, an insulating layer is disposed between the hole wall of the via hole and the touch trace.

In some embodiments of the present application, the display panel further comprises insulating spacers on the TFT backplane; the insulation isolation column is arranged between two adjacent self-capacitance electrodes and is used for insulating the two adjacent self-capacitance electrodes.

In some embodiments of the present application, the insulating isolation pillar includes a first sub-isolation pillar and a second sub-isolation pillar that are arranged in a stack; the first sub isolation column is close to the TFT backboard, and the vertical section of the first sub isolation column is trapezoidal; the second sub isolation column is far away from the TFT backboard, and the shape of the vertical section of the second sub isolation column is an inverted trapezoid; the vertical cross section is perpendicular to the TFT backplane.

In some embodiments of the present application, the TFT backplane comprises a substrate base plate, a driving circuit structure located on the substrate base plate, and a pixel defining layer covering the driving circuit structure; the touch wire is positioned on the surface of one side of the pixel defining layer, which is far away from the substrate base plate.

In some embodiments of the present application, the display panel includes insulating spacers; the insulating isolation column and the touch wire are positioned on the surface of one side, away from the substrate, of the pixel defining layer.

In some embodiments of the present application, the display panel further comprises a second electrode located on a side of the organic functional layer adjacent to the substrate; the pixel defining layer comprises pixel separators which are crossed transversely and longitudinally and openings surrounded by the pixel separators; the second electrode is positioned in the opening; the organic functional layer includes an organic light emitting layer, which is located within the opening.

In another aspect of the embodiments of the present application, a method for manufacturing any one of the above display panels is provided, where the method includes a method for manufacturing a TFT backplane; the method further comprises the following steps: manufacturing a touch wire on the TFT backboard; forming an organic functional layer on the TFT backboard on which the touch wiring is manufactured; the method for forming one organic thin film layer in the organic functional layer comprises the following steps: evaporating an organic material on the TFT backboard with the touch wiring manufactured by adopting a first mask; evaporating the organic material on the TFT backboard evaporated with the organic material again by adopting a second mask; after the first mask and the second mask are superposed, a first shielding part of the first mask and a second shielding part of the second mask are provided with an overlapping area; the organic material is not evaporated at the position, corresponding to the overlapping area, on the TFT backboard, and a via hole is formed on the organic functional layer; the via hole exposes a part of the touch routing; and forming a plurality of mutually insulated self-capacitance electrodes on the TFT backboard on which the organic functional layer and the touch-control wires are manufactured, wherein each self-capacitance electrode is contacted with the touch-control wire exposed out of one through hole.

In another aspect of the embodiments of the present application, a mask assembly used in the manufacturing method of the display panel as described above is provided, where the mask assembly includes a first mask and a second mask; the first mask is provided with a plurality of first shielding parts and first transmission parts, and the first shielding parts and the first transmission parts are alternately arranged; the first shielding part comprises a main shielding part and a plurality of convex sub shielding parts positioned on the main shielding part; the second mask is provided with a plurality of second shielding parts and second transmission parts, and the second shielding parts and the second transmission parts are alternately arranged; after the first mask and the second mask are superposed, the main shielding part in the first shielding part corresponds to the second transmission part in position; the sub shielding part in the first shielding part and the second shielding part have an overlapping region.

In another aspect of the embodiments of the present application, there is provided a display device including any one of the display panels described above.

To sum up, in the display panel provided in the embodiment of the present application, a self-capacitance electrode that realizes the touch function contacts with a touch trace exposed through a via hole on the organic functional layer, so the touch trace can be located below the self-capacitance electrode, that is, located on one side of the self-capacitance electrode close to the substrate, so that the touch trace and the self-capacitance electrode electrically connected to the touch trace are arranged in different layers. Therefore, the problem that touch blind areas occur due to the fact that the touch wires occupy large display space when the touch wires and the self-capacitance electrodes are arranged on the same layer can be solved.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.

Fig. 1 is a schematic structural diagram of a display panel according to some embodiments of the present application;

FIG. 2 is a schematic diagram of another display panel according to some embodiments of the present disclosure;

FIG. 3 is a schematic structural diagram of the pixel defining layer shown in FIG. 2;

FIG. 4 is a schematic structural view of the organic functional layer of FIG. 2;

fig. 5 is a schematic structural diagram of a touch electrode according to some embodiments of the present disclosure;

fig. 6 is a schematic diagram illustrating connection between a touch electrode and a touch lead according to some embodiments of the present disclosure;

fig. 7 is a schematic diagram illustrating connection between another touch electrode and a touch lead according to some embodiments of the present disclosure;

FIG. 8 is a schematic view of another display panel according to some embodiments of the present disclosure;

FIG. 9 is a schematic structural view of an insulation isolation pillar according to some embodiments of the present application;

fig. 10 is a schematic structural diagram of a display panel according to some embodiments of the present application;

fig. 11 is a schematic structural diagram of a display panel according to some embodiments of the present application;

fig. 12 is a flowchart of a method for manufacturing a display panel according to an embodiment of the present disclosure;

FIG. 13a, FIG. 13b, FIG. 13c and FIG. 13d are schematic structural diagrams corresponding to some steps of the manufacturing method of FIG. 12;

FIG. 14a is a schematic diagram of a reticle structure provided in some embodiments of the present application;

FIG. 14b is a schematic diagram of a reticle structure provided in some embodiments of the present application;

FIG. 14c is a schematic view of an overlap region formed by the masks of FIGS. 14a and 14 b;

FIG. 14d is a schematic view of the reticle shown in FIGS. 14a and 14b superimposed;

fig. 15 is a schematic structural diagram of another display panel according to some embodiments of the present disclosure.

Reference numerals:

01-a display panel; 10-a TFT backplane; 100-substrate base plate; 101-a drive circuit configuration; 102-a pixel defining layer; 1021-an opening; 1022-pixel separators; 110-a first electrode layer; 111-a second electrode; 20-touch routing; 30-an organic functional layer; 301-hole injection layer; 302-a hole transport layer; 303 — an organic light emitting layer; 304-an electron transport layer; 310-a via hole; 40-self-capacitance electrodes; 50-an insulating layer; 60-insulating isolation columns; 601-a first sub-isolation column; 602-a second sub-isolation column; 70-a first mask; 701-a first shielding part; 7011 — a primary shield; 7012-sub occlusion; 702 — a first transmissive portion; 71-a second mask; 711-a second shielding section; 712-a second transmission; 72-an overlap region; 80-a package; 801-inorganic thin film layer; 802-organic thin film layer.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Some embodiments of the present application disclose a display panel 01, as shown in fig. 1, the display panel 01 includes a TFT backplane 10, and a touch trace 20 and an organic functional layer 30 located on the TFT backplane 10.

As shown in fig. 2, the TFT backplane 10 includes a substrate 100, and a driving circuit structure 101 disposed on the substrate 100. The driving circuit structure 101 includes TFT driving circuits arranged in an array and a pixel defining layer 102 covering the driving circuit structure 101.

The display panel is provided with a plurality of sub-pixels arranged in an array, and each sub-pixel is provided with one TFT driving circuit. The TFT drive circuit includes a plurality of TFTs and a capacitor. Each TFT driving circuit is connected with a light emitting device to constitute a pixel circuit. The light emitting device may be an OLED, an LED, or a micro LED. For convenience of description, the light emitting device is described by taking an OLED as an example.

The OLED comprises a first electrode, and the first electrodes of the plurality of OLEDs are connected to form a first electrode layer 110 as shown in fig. 2. In addition, the OLED further includes a second electrode 111 disposed opposite to the first electrode layer 110.

The first electrode may be an anode, and the second electrode 111 may be a cathode; or the first electrode is a cathode and the second electrode 111 is an anode. For convenience of explanation, the first electrode is used as a cathode, and the second electrode 111 is used as an anode.

Based on this, as shown in fig. 3, the pixel defining layer 102 includes pixel partitions 1022 crossing in the horizontal and vertical directions and an opening 1021 surrounded by the pixel partitions 1022. In this case, the second electrode 111 is located in the opening 1021 in the pixel defining layer 102, and is electrically connected to a source or a drain of at least one Thin Film Transistor (TFT) in one TFT driving circuit in the driving circuit structure 101.

The organic functional layer 30 is disposed between the first electrode layer 110 and the second electrode 111. As shown in fig. 4, the organic functional layer 30 includes: a hole injection layer 301, a hole transport layer 302, an organic light emitting layer 303, and an electron transport layer 304. The hole injection layer 301, the hole transport layer 302, and the electron transport layer 304 may cover all the sub-pixels, and the sub-pixels with different light emitting colors have different organic light emitting layers 303, that is, as shown in fig. 2, the organic light emitting layers 303 of different sub-pixels are located in different openings 1021.

In addition, as shown in fig. 2, the touch trace 20 is located on a side surface of the pixel partition 1022 of the pixel defining layer 102, which is away from the substrate 100.

On this basis, as shown in fig. 1, the organic functional layer 30 has a plurality of via holes 310, and each via hole exposes a portion of the touch trace 20.

In addition, the display panel 01 further includes a first electrode layer 110 covering the organic functional layer 30. As shown in fig. 5, the first electrode layer 110 includes a plurality of self-capacitance electrodes 40 insulated from each other. As shown in fig. 1, each self-capacitance electrode 40 contacts the touch trace 20 exposed by one via 310.

It should be noted that the size of the one self-capacitance electrode 40 is in the order of millimeters.

To sum up, in the display panel 01 provided in the embodiment of the present application, one self-capacitance electrode 40 that realizes the touch function contacts the touch trace 20 exposed from one via hole 310 on the organic functional layer 30, so as shown in fig. 6, the touch trace 20 may be located below the self-capacitance electrode 40, that is, located on one side of the self-capacitance electrode 40 close to the substrate 100, so that the touch trace 20 and the self-capacitance electrode 40 electrically connected to the touch trace 20 are arranged in different layers. Thus, the problem of a touch blind area caused by the touch trace 20 occupying a large display space when the touch trace 20 and the self-capacitance electrode 40 are disposed on the same layer (as shown in fig. 7) can be avoided.

As can be seen from the above, the first electrode layer 110 includes a plurality of self-capacitance electrodes 40 insulated from each other. The first electrode layer 110 can be used as a cathode of the OLED, and the self-capacitance electrode 40 can be used as a touch electrode. In this case, the display panel 01 may provide the same voltage to the self-capacitance electrodes 40 during the display phase, so as to be used as the cathodes of the OLEDs to drive the OLEDs to emit light. In the touch stage, the self-capacitance electrodes 40 are multiplexed as touch electrodes, and when a user touches the display panel 01, the capacitance value in the self-capacitance formed by the self-capacitance electrodes 40 and the ground terminal is changed, and the capacitance value is used as a touch signal and transmitted to the processor through the touch trace 20 connected to the self-capacitance electrodes 40.

It should be noted that the display stage and the touch stage are two independent stages, and do not interfere with each other. For example, an image frame may be used as a display stage, and a touch stage is inserted between two adjacent image frames. In this way, the display panel 01 provided in the embodiment of the present application reuses the first electrode layer 11 as a cathode as a Touch electrode, so that it is not necessary to additionally fabricate a Touch Sensor (Touch Sensor) in the display panel, and the purpose of simplifying the fabrication process can be achieved.

In addition, in order to improve the side leakage of the touch trace 20 caused by the direct contact between the exposed portion of the via 310 and the organic functional layer 30, in some embodiments of the present disclosure, as shown in fig. 8, an insulating layer 50 is disposed between the hole wall of the via 310 and the touch trace 20.

In some embodiments of the present application, in order to form the plurality of mutually insulated self-capacitance electrodes 40, when the material of the first electrode layer 110 is evaporated by using Open Mask, the first electrode layer 110 may be divided by using a plurality of insulating isolation pillars 60 as shown in fig. 9. Adjacent ones of the insulating spacers 60 enclose a closed frame-like structure. The frame-like structure defines therein the size of the cut self-capacitance electrode 40.

In the case of the display panel 01 having the pixel defining layer 102, the insulating isolation pillar 60 is located on a surface of the pixel partition 1022 facing away from the substrate 100 in the pixel defining layer 102.

In this case, as shown in fig. 10, the insulating isolation pillar 60 is disposed between two adjacent self-capacitance electrodes 40, and the insulating isolation pillar 60 is made of an insulating material for insulating the two adjacent self-capacitance electrodes 40.

In some embodiments of the present application, the insulating spacers 60 may have an inverted trapezoidal shape in a vertical cross-section, as illustrated in fig. 10. In this case, when the material of the first electrode layer 110 is deposited by Open Mask, the formed thin film layer cannot be attached to the boundary position between the upper surface and the side surface of the insulating isolation pillar 60, and the first electrode layer 110 can be divided into a plurality of insulated self-capacitance electrodes 40.

The vertical cross section is perpendicular to the TFT backplane 10.

In other embodiments of the present application, as shown in fig. 11, the insulating isolation pillar 60 includes a first sub-isolation pillar 601 and a second sub-isolation pillar 602 which are stacked.

The first sub-isolation pillar 601 is close to the TFT backplane 10, and the vertical cross section of the first sub-isolation pillar 601 is trapezoidal.

The second sub-isolation pillar 602 is far away from the TFT backplane 10, and the vertical cross section of the second sub-isolation pillar 602 is in the shape of an inverted trapezoid.

In this case, on the one hand, a material having a better insulation property may be selected as the material constituting the first sub-isolation pillar 601 than the material constituting the second sub-isolation pillar 602. Thus, the first sub-isolating pillar 601 mainly serves to insulate the adjacent two self-capacitance electrodes 40.

On the other hand, since the vertical cross section of the second sub-isolation pillars 602 is inverted trapezoid, when the material of the first electrode layer 110 is deposited by Open Mask, the formed thin film layer cannot be attached to the boundary position between the upper surface and the side surface of the second sub-isolation pillars 602, and the first electrode layer 110 can be divided into a plurality of insulated self-capacitance electrodes 40.

Some embodiments of the present application provide a method for manufacturing any one of the display panels described above.

The above method, as shown in fig. 12, includes:

s101, manufacturing the TFT backboard 10 shown in FIG. 13 a.

The S101 may include: first, a TFT driving circuit is fabricated on a substrate 100 by a patterning process. A plurality of the above-described TFT driving circuits constitute a driving circuit structure 101.

The substrate 100 may be a transparent glass substrate without limitation, or when the display panel is a flexible display panel, the substrate 100 may be made of a transparent resin material, for example, Polyimide (PI).

Next, a pixel defining layer 102 covering the driving circuit structure 101 is formed on the substrate 100 on which the driving circuit structure 101 is formed by using a patterning process. The pixel defining layer 102 has pixel spacers 1022 and openings 1021 as shown in FIG. 3.

In this embodiment, the patterning process may be an inkjet printing process, a photolithography process, or the like. The photoetching process comprises the following steps: masking, exposing, etching, etc.

S102, the second electrode 111 shown in FIG. 13b is fabricated.

Illustratively, the second electrode 111 is formed in the opening 1021 of the pixel defining layer 102 by a patterning process.

S103, fabricating the touch trace 20 on the TFT backplane 10 as shown in fig. 13 c.

Specifically, the touch trace 20 is formed on a surface of the pixel partition 1022 of the pixel defining layer 102, which is opposite to the substrate 100, by the above-mentioned patterning process.

In addition, in order to improve the side leakage of the touch trace 20 caused by the direct contact between the exposed portion of the through hole 310 of the organic functional layer 30 and the organic functional layer 30, an insulating material layer may be formed on the TFT backplane 10 on which the touch trace 20 is formed, and then the insulating material covering the surface of the touch trace 20 on the side away from the substrate 100 is removed to form the insulating layer 50 on the side of the touch trace 20, so as to prevent the touch trace 20 from directly contacting the hole wall of the through hole 310.

S104, fabricating the insulating isolation pillars 60 on the TFT backplane 10 as shown in fig. 13 c.

The material for forming the insulating isolation pillar 60 may include an insulating inorganic material, such as at least one of silicon nitride, silicon carbide, and silicon oxide; or an organic polymer material such as at least one of polyimide, polytetrafluoroethylene, or a photoresist.

When the insulating isolation pillar 60 includes a first sub-isolation pillar 601 and a second sub-isolation pillar 602, which are stacked as shown in fig. 11, the manufacturing method of the insulating isolation pillar 60 may be:

first, a first layer of photosensitive organic insulating material, for example, photosensitive PI, is spin-coated on the TFT backplane 10. The film thickness is 0.5-5 um. And pre-baking and post-exposing the film layer to form a strip-shaped or net-shaped structure. After development, a first sub-isolation column 601 is formed, the line width of the first sub-isolation column 601 is 10um to 50um, and then post-baking is performed.

And then, spin-coating a second layer of photosensitive insulating organic material on the TFT back plate with the structure, wherein the film thickness is 0.5-5 um. And pre-baking and post-exposing the film layer to form a strip-shaped or net-shaped structure, and developing to form a second sub-isolation column 602, wherein the width of the second sub-isolation column 602 is 5-45 um. In order to make the vertical sectional shape of the second sub-isolation pillar 602 an inverted trapezoid, the material constituting the second sub-isolation pillar 602 may be negative glue.

S105, forming an organic functional layer 30 as shown in fig. 13d on the TFT backplane 10 with the touch trace 20.

A plurality of via holes 310 need to be formed in the organic functional layer 30, so that the self-capacitance electrode 40 can contact the touch trace 20 leaking from the via holes 310 through the via holes 310.

In some embodiments of the present application, the above-mentioned via 310 may be formed on the fabricated organic functional layer 30 by using a photolithography process. However, the material constituting the organic functional layer 30 is not resistant to water and oxygen, and moisture or oxygen is likely to enter the display panel, which affects the quality of the display panel.

In order to solve the above problems, in some embodiments of the present application, a method of forming one organic thin film layer of the organic functional layer 30 includes:

first, using the first mask 70 as shown in fig. 14a, an organic material is evaporated on the TFT backplane 10 on which the touch trace 20 is fabricated.

Next, the organic material is again vapor-deposited on the TFT backplane 10 on which the organic material is vapor-deposited, using the second mask 71 as shown in fig. 14 b.

After the first reticle 70 and the second reticle 71 are overlapped, the first shielding portion 701 of the first reticle 70 and the second shielding portion 711 of the second reticle have an overlapping area 72 as shown in fig. 14 c.

In this case, the organic material is not evaporated on the TFT backplane 10 at a position corresponding to the overlapping area 72, so as to form a via hole 310 on the organic functional layer 30, and a portion of the touch trace 20 is exposed through the via hole 310.

In view of the above, some embodiments of the present disclosure provide a reticle assembly for fabricating the organic functional layer 30. The reticle assembly includes a first reticle 70 as shown in fig. 14a and a second reticle 71 as shown in fig. 14 b.

As shown in fig. 14a, the first mask 70 includes a plurality of first shielding portions 701 and a plurality of first transmission portions 702. The first shielding portions 701 are alternately arranged with the first transmission portions 702. Further, the first shielding portion 701 includes a main shielding portion 7011 and a plurality of convex sub shielding portions 7012 located on the main shielding portion 7011.

As shown in fig. 14b, the second mask 71 has a plurality of second blocking portions 711 and second transmission portions 712. The second blocking parts 711 and the second transmitting parts 712 are alternately disposed.

In this case, after the first reticle 70 and the second reticle 71 are superimposed, the primary shielding portion 7011 corresponds to the position of the second transmission portion 712 in the first shielding portion 70 as shown in fig. 14 d. The sub-shielding portion 7012 and the second shielding portion 711 in the first shielding portion 70 have an overlapping region 72 as shown in fig. 14 c.

In addition, the manufacturing method further comprises the following steps:

s106, forming a plurality of mutually insulated self-capacitance electrodes 40 as shown in fig. 15 on the TFT backplane 10 with the organic functional layer 30 and the touch traces 20 fabricated thereon, wherein each self-capacitance electrode 40 contacts the touch trace 20 exposed from one via 310.

Specifically, when the material of the first electrode layer 110 is evaporated by using an Open Mask on the TFT backplane 10 having the organic functional layer 30 and the touch trace 20, the formed thin film layer cannot be attached to the boundary position between the upper surface and the side surface of the insulating isolation pillar 60, so that the first electrode layer 110 can be divided into a plurality of insulated self-capacitance electrodes 40. In the method, the first electrode layer 110 is divided by using the insulating isolation pillar 60 as a barrier without using a metal mask in the process of preparing the self-capacitance electrode 40.

S107, the sealing portion 80 shown in fig. 15 is produced.

The sealing portion 80 may be formed by a Thin-Film Encapsulation (TFE) technique, in which case the sealing portion 80 includes two inorganic Thin Film layers 801 and an organic Thin Film layer 802 between the two inorganic Thin Film layers 801.

The inorganic thin film layer 801 may be formed of silicon nitride (SiNx). The organic thin film layer may be prepared using Ink Jet Printing (IJP) technology.

The manufacturing method of the display panel has the same technical effects as the display panel provided by the foregoing embodiment, and details are not repeated herein.

Some embodiments of the present application provide a display device including any one of the display panels described above.

The display device may be any device having a display function, such as a monitor, a television, a mobile phone, and a tablet computer. The display panel has the same technical effects as the display panel provided by the foregoing embodiments, and details are not repeated herein.

The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all the changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the appended claims.

Claims

1. A display panel is characterized by comprising a TFT backboard, and a touch routing and an organic functional layer which are positioned on the TFT backboard;

the organic functional layer is provided with a plurality of through holes, and each through hole exposes one part of the touch wire;

the display panel further includes a first electrode layer covering the organic functional layer; the first electrode layer comprises a plurality of self-capacitance electrodes which are insulated from each other; each self-capacitance electrode is in contact with the touch-control trace exposed out of one through hole;

the TFT backboard comprises a substrate, a driving circuit structure positioned on the substrate and a pixel defining layer covering the driving circuit structure;

the touch wire is positioned on the surface of one side of the pixel defining layer, which is far away from the substrate base plate.

2. The display panel of claim 1, wherein an insulating layer is disposed between the wall of the via hole and the touch trace.

3. The display panel of claim 1, further comprising insulating spacers on the TFT backplane;

the insulation isolation column is arranged between two adjacent self-capacitance electrodes and is used for insulating the two adjacent self-capacitance electrodes.

4. The display panel according to claim 3, wherein the insulating spacers include a first sub-spacer and a second sub-spacer arranged in a stack;

the first sub isolation column is close to the TFT backboard, and the vertical section of the first sub isolation column is trapezoidal;

the second sub isolation column is far away from the TFT backboard, and the shape of the vertical section of the second sub isolation column is an inverted trapezoid;

the vertical cross section is perpendicular to the TFT backplane.

5. The display panel according to any one of claims 1 to 4, wherein the display panel comprises insulating spacers;

the insulating isolation column and the touch wire are positioned on the surface of one side, away from the substrate, of the pixel defining layer.

6. The display panel according to any one of claims 1 to 4, further comprising a second electrode on a side of the organic functional layer adjacent to the substrate base;

the pixel defining layer comprises pixel separators which are crossed transversely and longitudinally and openings surrounded by the pixel separators; the second electrode is positioned in the opening;

the organic functional layer includes an organic light emitting layer, which is located within the opening.

7. A method of fabricating a display panel as claimed in any one of claims 1 to 6, characterized in that the method comprises a method of fabricating a TFT backplane; the method further comprises the following steps:

manufacturing a touch wire on the TFT backboard;

forming an organic functional layer on the TFT backboard on which the touch wiring is manufactured; the method for forming one organic thin film layer in the organic functional layer comprises the following steps:

evaporating an organic material on the TFT backboard with the touch wiring manufactured by adopting a first mask;

evaporating the organic material on the TFT backboard evaporated with the organic material again by adopting a second mask;

after the first mask and the second mask are superposed, a first shielding part of the first mask and a second shielding part of the second mask are provided with an overlapping area; the organic material is not evaporated at the position, corresponding to the overlapping area, on the TFT backboard, and a via hole is formed on the organic functional layer; the via hole exposes a part of the touch routing;

and forming a plurality of mutually insulated self-capacitance electrodes on the TFT backboard on which the organic functional layer and the touch-control wires are manufactured, wherein each self-capacitance electrode is contacted with the touch-control wire exposed out of one through hole.

8. The mask assembly used in the method for manufacturing a display panel according to claim 7, wherein the mask assembly comprises a first mask and a second mask;

the first mask is provided with a plurality of first shielding parts and first transmission parts, and the first shielding parts and the first transmission parts are alternately arranged; the first shielding part comprises a main shielding part and a plurality of convex sub shielding parts positioned on the main shielding part;

the second mask is provided with a plurality of second shielding parts and second transmission parts, and the second shielding parts and the second transmission parts are alternately arranged;

after the first mask and the second mask are superposed, the main shielding part in the first shielding part corresponds to the second transmission part in position; the sub shielding part in the first shielding part and the second shielding part have an overlapping region.

9. A display device comprising the display panel according to any one of claims 1 to 6.