JP2023024082A - Acoustic wave device and module including the acoustic wave device - Google Patents

Abstract

To provide an acoustic wave device suppressing the infiltration of a sealing material into a space 6.SOLUTION: An acoustic wave device 1 includes a wiring board 2, a device chip 3, and a sealing part 5 sealing the device chip, together with the wiring board. The device chip includes a plurality of resonators, a wiring pattern, a bump pad, and a first sealing material infiltration prevention wall B formed between a plurality of the bump pads. The wiring board includes a plurality of bump pads on a wiring board side formed in positions corresponding to the plurality of bump pads, respectively, and a second sealing material infiltration prevention wall C. When A represents a distance between the wiring board and the device chip, B represents a height of the first sealing material infiltration prevention wall, and C represents a height of the second sealing material infiltration prevention wall, A<B+C, A>B, and A>C are satisfied. The first sealing material infiltration prevention wall and the second sealing material infiltration prevention wall are formed in a position where the first and second sealing material infiltration prevention walls do not overlap, in see-through of the top surface in the thickness direction of the device chip.SELECTED DRAWING: Figure 3

Description

The present disclosure relates to acoustic wave devices and modules comprising the acoustic wave devices.

Patent Literature 1 discloses an acoustic wave device. The acoustic wave device is provided with a dam that forms a hollow portion between the acoustic wave device and the substrate and prevents a sealing material from entering the hollow portion from the outside.

JP 2020-102713 A

By forming the dam so as to surround the IDT (Interdigital Transducer) electrode and the connecting portion in plan view, it is possible to suppress the intrusion of the sealing material into the space of the acoustic wave device.

However, it is not easy to form a dam that almost completely covers the space between the wiring board and the device chip. Flip-chip bonding, in which ultrasonic waves are applied while bumps are crushed, has a large manufacturing error in the distance between the wiring substrate and the device chip. Therefore, the device chip may collide with the dam during bonding and be destroyed.

Moreover, forming a dam on the wiring board that is higher than the distance between the wiring board and the device chip hinders miniaturization of the acoustic wave device. This is because it is necessary to secure a distance between the dam and the mounting area of the device chip in order to prevent the device chip from colliding with the dam during bonding.

The present disclosure has been made to solve the above problems. An object of the present disclosure is to provide an acoustic wave device and a module including the acoustic wave device that suppress the intrusion of the sealing material into the space of the acoustic wave device without or with reduced harm.

The acoustic wave device according to the present disclosure is
a wiring board;
a device chip arranged opposite to the wiring substrate;
a sealing portion that seals the device chip together with the wiring substrate;
with
The device chip is
a plurality of resonators;
a wiring pattern electrically connecting the plurality of resonators;
a plurality of bump pads electrically connected to the wiring pattern;
a first sealing material penetration prevention wall formed between the plurality of bump pads;
with
The wiring board is
a plurality of wiring board-side bump pads formed at positions corresponding to the plurality of bump pads;
a second sealing material penetration prevention wall;
with
When the distance between the wiring board and the device chip is A, the height of the first encapsulant penetration prevention wall is B, and the height of the second encapsulant penetration prevention wall is C,
A<B+C, A>B, and A>C,
The first encapsulant penetration prevention wall and the second encapsulant penetration prevention wall are formed at positions that do not overlap each other when viewed through the upper surface in the thickness direction of the device chip.

It is an aspect of the present disclosure that B<C.

It is an aspect of the present disclosure that the height of the wiring pattern is the same as B above.

An aspect of the present disclosure is that the second sealing material penetration prevention wall is formed continuously or intermittently so as to surround the plurality of resonators.

It is an aspect of the present disclosure that the second encapsulant penetration prevention wall is composed of a metal layer and an insulating layer.

An aspect of the present disclosure is that the second encapsulant penetration prevention wall is partially formed at a position overlapping with the extension of the device chip when seen from above in the thickness direction of the device chip. .

It is an aspect of the present disclosure that the second sealing material penetration prevention wall is formed between the plurality of wiring board side bump pads.

An aspect of the present disclosure is that the second encapsulant penetration prevention wall is arranged at a position closer to the central portion of the device chip than the first encapsulant penetration prevention wall.

The second encapsulant penetration prevention wall (inner side) arranged at a position closer to the central portion of the device chip than the first encapsulant penetration prevention wall; An aspect of the present disclosure includes a second encapsulant penetration prevention wall (outside) arranged at a position farther from the central portion of the device chip than the first encapsulant penetration prevention wall.

An aspect of the present disclosure is that the device chip is a substrate obtained by bonding a piezoelectric substrate and a substrate made of sapphire, silicon, alumina, spinel, crystal, or glass.

An aspect of the present disclosure is that the liquid intrusion prevention pattern is formed thinner than the wiring pattern.

An aspect of the present disclosure is that the device chip has a substrate in which a piezoelectric substrate and a substrate made of sapphire, silicon, alumina, spinel, crystal, or glass are bonded together.

An aspect of the present disclosure is that the plurality of resonators are surface acoustic wave resonators, and a bandpass filter or duplexer is formed on the device chip.

An aspect of the present disclosure is that the plurality of resonators are acoustic thin film resonators, and a bandpass filter or duplexer is formed on the device chip.

A module including the acoustic wave device described above is one aspect of the present disclosure.

According to the present disclosure, it is possible to suppress penetration of the sealing material into the electrode without or with reduced harm.

1 is a cross-sectional view of an acoustic wave device according to Embodiment 1; FIG. 2 is a diagram showing the main surface of the device chip in Embodiment 1; FIG. FIG. 3 is a diagram showing a DD cross-sectional view shown in FIG. 2; It is a figure which shows the example which the extension part of the device chip 3 and a part of 2nd sealing material penetration|invasion prevention wall C were arrange|positioned so that it may overlap in top surface see-through. FIG. 10 is a diagram showing an example in which a second encapsulant penetration prevention wall C is intermittently formed so as to surround a plurality of resonators; FIG. 10 is a diagram showing an example in which the second encapsulant penetration prevention wall C is arranged at a position closer to the central portion of the device chip 3 than the first encapsulant penetration prevention wall B is. FIG. 10 is a diagram showing an example in which the second encapsulant penetration prevention wall C is arranged at a position closer to the central portion of the device chip 3 than the first encapsulant penetration prevention wall B, and at a position not closer. FIG. 3 is a diagram showing an example in which the resonator of the acoustic wave device according to Embodiment 1 is an acoustic thin film resonator; FIG. 10 is a vertical cross-sectional view of a module to which the acoustic wave device according to Embodiment 2 is applied;

Embodiments will be described with reference to the accompanying drawings. In addition, the same code|symbol is attached|subjected to the part which is the same or corresponds in each figure. Redundant description of the relevant part will be simplified or omitted as appropriate.

Embodiment 1.
FIG. 1 is a cross-sectional view of an acoustic wave device according to Embodiment 1. FIG. The acoustic wave device 1 has a wiring board 2 . According to one example, the wiring board 2 is a multilayer board containing resin.

According to another example, the wiring substrate 2 is a Low Temperature Co-fired Ceramics (LTCC) multilayer substrate consisting of multiple dielectric layers. A passive element such as a capacitor or an inductor may be formed inside the wiring board 2 .

In the example of FIG. 1, the wiring board 2 has a plurality of wiring board-side bump pads 2b on its upper surface, which is the component mounting surface. The lower surface of the wiring board 2 is a mounting surface to a mother board, for example. A plurality of conductive pads 2c are provided on the lower surface of the wiring board 2. As shown in FIG. Corresponding bump pads 2b on the wiring board side and conductive pads 2c are connected to each other by internal conductors 2a or via-hole conductors.

A device chip 3 electrically connected to the wiring board 2 is placed on the wiring board 2 . The device chip 3 is a surface acoustic wave device chip. The device chip 3 has a piezoelectric substrate 3a made of a piezoelectric material.

According to one example, the piezoelectric substrate 3a is a substrate made of a piezoelectric single crystal such as lithium tantalate, lithium niobate or quartz. According to another example, the piezoelectric substrate 3a is a substrate made of piezoelectric ceramics.

According to yet another example, the piezoelectric substrate 3a is a substrate in which a piezoelectric substrate and a support substrate are bonded together. The support substrate is, for example, a substrate made of sapphire, silicon, alumina, spinel, quartz or glass.

According to one example, the piezoelectric substrate 3a is the substrate on which the functional elements are formed. For example, a reception filter and a transmission filter are formed on the main surface (lower surface) of the device chip 3 that faces the wiring board 2 .

The receive filter is formed so that an electrical signal in a desired frequency band can pass. For example, the receive filter is a ladder-type filter consisting of a plurality of series resonators and a plurality of parallel resonators.

The transmission filter is formed so that an electrical signal in a desired frequency band can pass. For example, the transmission filter is a ladder-type filter consisting of multiple series resonators and multiple parallel resonators.

FIG. 1 shows an example in which a plurality of bump pads 3b and a plurality of periodically formed electrodes 3c are formed on the main surface of a device chip 3. As shown in FIG. According to one example, the plurality of electrodes 3c are IDT electrodes that are comb-shaped electrode fingers.

A high-frequency electric field is applied to the IDT electrode from a lead terminal on the power supply side to excite a surface acoustic wave, and the surface acoustic wave is converted into a high-frequency electric field by piezoelectric action to obtain filter characteristics.

The bump pads 3b and the wiring board side bump pads 2b are arranged at corresponding positions and electrically connected by the bumps 4. As shown in FIG. The bumps 4 are for example Au, conductive glue or solder.

The acoustic wave device 1 has a sealing portion 5 . The sealing portion 5 seals the device chip 3 while leaving a space 6 between the wiring board 2 and the device chip 3 . According to one example, the device chip 3 is mounted on the wiring substrate 2 and then a resin sheet is placed on the device chip so as to straddle the device chip 3 .

According to one example, the resin sheet is a liquid epoxy resin formed into a sheet. According to another example, the resin sheet can be a synthetic resin, such as polyimide, which is different than an epoxy resin. A protective film made of polyethylene terephthalate (PET) can be provided on the upper surface of the resin sheet, and a base film made of polyester can be provided on the lower surface of the resin sheet.

By placing the resin sheet on the device chip 3 , the resin sheet is temporarily fixed to the device chip 3 . Then, the structure including the device chip 3, the resin sheet, and the wiring substrate 2 is passed between an upper roller and a lower roller heated to at least the softening temperature of the resin sheet, so that the resin sheet is bonded to the side surfaces of the device chip 3 and the wiring substrate 2. is filled on top of the This is called hot roller lamination.

Any method other than the heat roller lamination method may be employed as long as it can perform lamination as shown in FIG.

After that, the process proceeds to a press forming step in order to fully cure the resin sheet. For example, by pressing the resin sheet in the direction of the wiring board 2 with a press having an upper mold and a lower mold heated to the curing temperature of the resin, expansion of the air in the space 6 is suppressed and the resin is compressed. Harden.

According to this example, the resin sheet is once heated up to the softening temperature and then pressurized and deformed so as to adhere to the outer surface of the device chip 3 and the upper surface of the wiring board 2, and then heated up to the curing temperature to shape it. is fixed, the sealing portion 5 is formed. For example, the sealing portion 5 makes the space 6 an airtight space and reinforces the fixing force of the device chip 3 to the wiring board 2 .

In the example of FIG. 1 , the space 6 is an airtight space surrounded by the main surface of the device chip 3 , the upper surface of the wiring board 2 and the sealing portion 5 . The number of device chips mounted on the wiring board 2 can be two or more. According to one example, the encapsulation 5 is a thermosetting resin.

According to yet another example, the encapsulant may be formed of metal as the encapsulating material and may be formed by an aerosol deposition method. In particular, an acoustic wave device with high heat dissipation can be provided by using a metal or aluminum nitride by an aerosol deposition method as the sealing material.

FIG. 2 is a diagram showing a configuration example of the main surface of the device chip 3, and the like. In this example, the device chip 3 has a plurality of resonators 31 on its main surface. Each resonator has a reflector 32 on each side. The thickness of the resonator is, for example, 150 nm to 400 nm.

It also has a plurality of bump pads 3b and wiring patterns 3d. The bump pads 3b and the wiring patterns 3d are made of appropriate metals or alloys such as silver, aluminum, copper, titanium, palladium. According to another example, the bump pad 3b and the wiring pattern 3d are formed of a laminated metal film formed by laminating a plurality of metal layers. For example, the wiring pattern has a thickness of 1 μm to 8 μm.

A first sealing material penetration prevention wall B is formed between the plurality of bump pads 3b. The first encapsulant penetration prevention wall B is formed between the bump pads at the four corners substantially in parallel along the four sides of the substantially rectangular main surface of the device chip 3 .

The first encapsulant penetration prevention wall B may be formed without contact with the bump pad 3b, or may be formed in contact with the bump pad 3bGND, which is the ground potential. When the first encapsulant penetration prevention wall B is formed of metal or the like, the first encapsulant penetration prevention wall B is appropriately formed by bonding to the bump pad GND, which is the ground potential, so that the ground is strengthened or shielded. You can enjoy the effect. In addition, it is possible to prevent the sealing material from entering the gap GAP between the first sealing material penetration prevention wall B and the bump pad 3bGND.

The second sealing material penetration prevention wall C shown in FIG. 2 is formed on the wiring board 2 . As shown in FIG. 2, the second encapsulant penetration prevention wall C is arranged so as to surround the device chip 3 and not overlap the first encapsulant penetration prevention wall B when seen through the top surface. It is

FIG. 3 is a diagram showing a DD cross-sectional view shown in FIG. As shown in FIG. 3, on the wiring substrate 2, a second encapsulant penetration prevention wall C is formed.

The device chip 3 has a first encapsulant penetration prevention wall B. As shown in FIG. Here, the distance A between the wiring board 2 and the device chip 3 is smaller than the sum of the height of the first encapsulant penetration prevention wall B and the height of the second encapsulant penetration prevention wall C. As shown in FIG. Also, the distance A is greater than the height of the first sealing material penetration prevention wall B. As shown in FIG. Also, the distance A is greater than the height of the second sealing material penetration prevention wall C. As shown in FIG.

According to such a configuration, it is possible to suppress the intrusion of the sealing material forming the sealing portion 5 into the space 6 between the wiring board 2 and the device chip 3 .

A distance A between the wiring board 2 and the device chip 3 can be set to 35 μm, for example. Further, the height of the first encapsulant penetration prevention wall B can be, for example, 4 μm to 8 μm. Further, the height of the second encapsulant penetration prevention wall C can be, for example, 30 μm to 34 μm.

Also, the height of the bump pad 3b shown in FIG. 2 and the height of the first sealing material penetration prevention wall B may be the same height. Also, the height of the wiring pattern 3d shown in FIG. 2 and the height of the first encapsulant penetration prevention wall B may be the same height.

According to the example shown in FIG. 3, the height of the first encapsulant penetration prevention wall B is smaller than the height of the second encapsulant penetration prevention wall C. As shown in FIG.

The first encapsulant penetration prevention wall B can be made of metal, for example. When forming the first encapsulant penetration prevention wall B with the same material and the same height as the wiring pattern 3b, it can be formed at the same time.

The second encapsulant penetration prevention wall C can be formed of an insulator such as a solder resist, for example. Alternatively, it may be made of metal and/or insulator.

FIG. 4 is a diagram showing an example in which the extended portion of the device chip 3 and a portion of the second encapsulant penetration prevention wall C are arranged so as to overlap when seen through the top surface. With such a configuration, it is possible to provide a more compact acoustic wave device.

FIG. 5 is a diagram showing an example in which the second encapsulant penetration prevention wall C is intermittently formed so as to surround a plurality of resonators. The example shown in FIG. 5 is an example in which the second encapsulant penetration prevention wall C is formed between a plurality of wiring board side bump pads 2b (not shown in FIG. 5, shown in FIG. 1). Such a configuration may be adopted if there are few adverse effects due to the infiltration of the sealing material in the four corner regions of the device chip 3 .

FIG. 6 is a diagram showing an example in which the second encapsulant penetration prevention wall C is arranged at a position closer to the central portion of the device chip 3 than the first encapsulant penetration prevention wall B is. As shown in FIG. 6, the second encapsulant penetration prevention wall C is formed so as to continuously surround a plurality of resonators in a region that completely overlaps with the device chip 3 when viewed through the upper surface.

According to such a configuration, it is possible to suppress the infiltration of the sealing material without increasing the size of the acoustic wave device.

FIG. 7 is a diagram showing an example in which the second encapsulant penetration prevention wall C is arranged at a position closer to the central portion of the device chip 3 than the first encapsulant penetration prevention wall B, and at a position not closer. be.

As shown in FIG. 7, the second encapsulant penetration prevention wall C (IN) is formed so as to intermittently enclose a plurality of resonators in a region that completely overlaps with the device chip 3 when viewed through the top surface. there is

Further, by being formed intermittently, even when the height of the first encapsulant penetration prevention wall B and the wiring pattern 3b is the same, the second encapsulant penetration prevention wall does not collide with the wiring pattern 3b. C can be formed.

As shown in FIG. 7, the second encapsulating material penetration prevention wall C(OUT) is such that, when viewed through the top surface, the extension of the device chip 3 and part of the second encapsulation material penetration prevention wall C(OUT) are , are formed to overlap. According to such a configuration, it is possible to further suppress the infiltration of the sealing material.

Next, an example in which the resonator is an acoustic thin film resonator will be described with reference to FIG. FIG. 8 is a diagram showing an example in which the resonator of the acoustic wave device according to Embodiment 1 is an acoustic thin film resonator.

In FIG. 8, the chip substrate 60 functions as the device chip 3. As shown in FIG. For example, the chip substrate 60 is a semiconductor substrate such as silicon, or an insulating substrate such as sapphire, alumina, spinel or glass.

A piezoelectric film 62 is provided on the chip substrate 60 . For example, the piezoelectric film 62 is made of aluminum nitride.

The lower electrode 64 and the upper electrode 66 are provided so as to sandwich the piezoelectric film 62 . For example, the lower electrode 64 and the upper electrode 66 are made of metal such as ruthenium.

A gap 68 is formed between the lower electrode 64 and the chip substrate 60 .

In the acoustic thin film resonator, the lower electrode 64 and the upper electrode 66 excite an elastic wave in the thickness longitudinal vibration mode inside the piezoelectric film 62 .

Although one device chip has been described in the embodiments so far, according to another example, an acoustic wave device including a plurality of device chips can be provided. For example, an acoustic wave device can include a second device chip formed with a bandpass filter having a plurality of surface acoustic wave resonators. According to yet another example, an acoustic wave device can comprise a second device chip formed with a bandpass filter having a plurality of thin film acoustic resonators.

Embodiment 2.
FIG. 9 is a longitudinal sectional view of a module to which the acoustic wave device according to Embodiment 2 is applied. The same reference numerals are given to the same or corresponding parts as those of the first embodiment. Description of this part is omitted.

In FIG. 9 , module 100 includes wiring board 130 , integrated circuit component IC, acoustic wave device 1 , inductor 11 and sealing portion 117 .

The wiring board 130 is equivalent to the wiring board 2 of the first embodiment.

Although not shown, the integrated circuit component IC is mounted inside the wiring board 130 . An integrated circuit component IC includes a switching circuit and a low noise amplifier.

Acoustic wave device 1 is mounted on the main surface of wiring board 130 .

Inductor 111 is mounted on the main surface of wiring board 130 . Inductor 111 is implemented for impedance matching. For example, inductor 111 is an Integrated Passive Device (IPD).

The sealing portion 117 seals a plurality of electronic components including the acoustic wave device 1 .

According to the second embodiment described above, module 100 includes acoustic wave device 1 . Therefore, it is possible to provide the module 100 with a small mounting area.

Having described several aspects of at least one embodiment, it is to be appreciated various alterations, modifications, and improvements will readily occur to those skilled in the art. Such alterations, modifications, and improvements are intended to be part of this disclosure, and are intended to be within the scope of this disclosure.

It is to be understood that the method and apparatus embodiments described herein are not limited in application to the details of construction and arrangement of components set forth in the foregoing description or illustrated in the accompanying drawings. The methods and apparatus can be implemented in other embodiments and practiced or carried out in various ways.

Specific implementations are provided here for illustrative purposes only and are not intended to be limiting.

The phraseology and terminology used in this disclosure is for the purpose of description and should not be regarded as limiting. The use of "including", "comprising", "having", "including" and variations thereof herein is intended to be inclusive of the items listed below and equivalents thereof as well as additional items.

References to “or (or)” shall be construed such that any term stated using “or (or)” refers to one, more than one, and all of the terms of the statement. can be

All references to front, back, left, right, top, bottom, top, bottom, width, and front and back are intended for convenience of description. Such references are not limited to any one positional or spatial orientation of the components of this disclosure. Accordingly, the above description and drawings are exemplary only.

1 acoustic wave device 2 wiring substrate 3 device chip 3a piezoelectric substrate 3b bump pad 3c multiple electrodes 3d wiring pattern 4 bump 5 sealing portion 31 resonator 32 reflector B first sealing sealing material penetration prevention wall C second sealing material penetration prevention wall 100 module 105 device chip 111 inductor 117 sealing portion 130 wiring board

Claims (13)

a wiring board;
a device chip arranged opposite to the wiring substrate;
a sealing portion that seals the device chip together with the wiring substrate;
with
The device chip is
a plurality of resonators;
a wiring pattern electrically connecting the plurality of resonators;
a plurality of bump pads electrically connected to the wiring pattern;
a first sealing material penetration prevention wall formed between the plurality of bump pads;
with
The wiring board is
a plurality of wiring board-side bump pads formed at positions corresponding to the plurality of bump pads;
a second sealing material penetration prevention wall;
with
When the distance between the wiring board and the device chip is A, the height of the first encapsulant penetration prevention wall is B, and the height of the second encapsulant penetration prevention wall is C,
A<B+C, A>B, and A>C,
The acoustic wave device, wherein the first encapsulant penetration prevention wall and the second encapsulant penetration prevention wall are formed at positions that do not overlap each other when viewed through the upper surface in the thickness direction of the device chip. The acoustic wave device according to claim 1, wherein the B<the C. 2. The acoustic wave device according to claim 1, wherein the height of said wiring pattern is the same as said B. 2. The acoustic wave device according to claim 1, wherein the second encapsulant penetration prevention wall is formed continuously or intermittently so as to surround the plurality of resonators. 2. The acoustic wave device according to claim 1, wherein the second encapsulant penetration prevention wall comprises a metal layer and an insulating layer. 2. The acoustic wave device according to claim 1, wherein the second encapsulant penetration prevention wall is formed at a position partially overlapping with the extension of the device chip when seen from above in the thickness direction of the device chip. 2. The acoustic wave device according to claim 1, wherein said second sealing material penetration prevention wall is formed between said plurality of wiring board side bump pads. 2. The acoustic wave device according to claim 1, wherein said second encapsulant penetration prevention wall is arranged at a position closer to the central portion of said device chip than said first encapsulant penetration prevention wall. The second encapsulant penetration prevention wall (inner side) arranged at a position closer to the central portion of the device chip than the first encapsulant penetration prevention wall; 2. The acoustic wave device according to claim 1, further comprising a second encapsulant penetration prevention wall (outer side) arranged at a position farther from the central portion of the device chip than the first encapsulant penetration prevention wall. 2. The acoustic wave device according to claim 1, wherein said device chip is a substrate obtained by bonding a piezoelectric substrate and a substrate made of sapphire, silicon, alumina, spinel, crystal or glass. 2. The acoustic wave device according to claim 1, wherein the plurality of resonators are surface acoustic wave resonators, and a bandpass filter or duplexer is formed on the device chip. 2. The elastic wave device according to claim 1, wherein the plurality of resonators are acoustic thin film resonators, and a bandpass filter or duplexer is formed on the device chip. A module comprising the acoustic wave device according to any one of claims 1 to 12.

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