JP2023020981A - Substrate with electronic component and electronic component protection sheet - Google Patents

Abstract

To provide a substrate with electronic components and an electronic component protection sheet with excellent insulation properties, superior cold/heat cycle resistance, and dicing suitability.SOLUTION: In a substrate with electronic components 10, the electronic component 2 is mounted on the substrate 1, which is covered by the electronic component protective layer 3. The surface of the electronic component protective layer 3 has a Flop Index (FI) of 0.3 to 80 calculated by Formula (1). (L*15, L*45, L*110 are the L* of the L*a*b* color system specified in JIS Z8781-4 with offset angles of 15°, 45°, and 110° from the directly reflected light incident at an angle of 45° to the perpendicular direction of the electronic component surface, respectively.)SELECTED DRAWING: Figure 1

Description

The present disclosure relates to an electronic component mounting substrate and an electronic component protection sheet.

In order to protect electronic parts such as IC chips mounted on the board from bending and impact on the board, and to protect them from thermal shock due to temperature changes, the electronic parts are covered with resin for part or all of the board. is being done. In recent years, as electronic components and substrate circuits to be protected have been significantly improved in performance and miniaturized, the level of protective function required for protective coating materials has been increasing.
As a method for covering and protecting electronic components, a hot-melt electronic component protection sheet formed into a sheet shape containing no solvent has been proposed as a means to replace the conventional conformal coating.
For example, Patent Document 1 discloses a moisture-proof sheet for electronic device parts, which is characterized by comprising a moisture-proof layer made of a forming material containing an aromatic vinyl-conjugated diene block copolymer as a main component. .
Patent Document 2 discloses a substrate protection sheet comprising a graft copolymer of an olefinic monomer, an ethylenically unsaturated carboxylic acid, and an ethylenically unsaturated aromatic monomer.
Patent Documents 3 and 4 disclose a sheet-like resin composition comprising an epoxy resin, an inorganic filler and a flame retardant.
Patent Document 5 discloses a manufacturing method of a mounting structure that covers a mounting component and a substrate with a laminated sheet including a first heat conductive layer and a second heat conductive layer. (b) discloses a manufacturing method in which the space between mounted components is filled with the cured product of the laminated sheet without gaps.
Patent Literature 6 discloses a flexible printed wiring board provided with an electrical insulating layer having an average surface roughness within a specific range and a conductor layer.

JP-A-2003-145687 JP 2010-06954 A JP 2011-246596 A JP 2012-054363 A JP 2019-021757 A Japanese Patent Application Laid-Open No. 2008-160151

As described above, inventions relating to electronic component mounting substrates coated and protected by various methods have been disclosed so far, but in recent years, the level of required performance is high, and electronic component mounting substrates with higher quality are desired. there is

An electronic component protective layer laminated on an electronic component mounting substrate is required to have high insulation properties because it serves to provide an insulating coating for the underlying electronic components and substrate.

On the other hand, in order to increase the productivity of electronic component mounting substrates, a dicing process may be performed in which electronic components are mounted, for example, in an array on a large substrate and separated into specific component sections. In this case, dicing suitability is required in the electronic component protective layer. If the electronic component protective layer is not suitable for dicing, the cut surface of the electronic component protective layer may be sagging or burred due to the stress caused by dicing. In addition, the burr referred to in this specification refers to curling of the electronic component protective layer starting from the cut surface of the electronic component protective layer.

Furthermore, since the electronic component mounting substrate is used in various temperature environments after being incorporated into electronic equipment, the electronic component protective layer is exposed to sudden temperature changes, and the electronic component protective layer itself may be damaged. be. For this reason, there is a strong demand for an electronic component protective layer that is excellent in thermal cycle resistance.

The present disclosure has been made in view of the above problems, and provides an electronic component mounting board and an electronic component protection sheet that have excellent insulation, excellent thermal cycle resistance, and excellent dicing suitability.

（Ｌ^＊ _１５°、Ｌ^＊ _４５°、Ｌ^＊ _１１０°は、それぞれ、電子部品表面の垂線方向に対して４５°の角度で入射した光の正反射光からのオフセット角１５°、４５°、１１０°のＪＩＳ Ｚ８７８１-４で規定されるＬ^＊ａ^＊ｂ^＊表色系のＬ^＊である。）
［２］： 前記電子部品保護層のＩＳＯ ５－２で定められる３６０～７６０ｎｍの光学濃度（ＯＤ値）が１～６であることを特徴とする、［１］記載の電子部品搭載基板。
［３］： 前記電子部品保護層のＪＩＳ Ｚ８７８１-４で定められるＬ＊ａ＊ｂ＊表色系における、Ｌ＊値が１～５０、かつａ＊値が－１０～１０、かつｂ＊値が－１０～１０であることを特徴とする、［１］または［２］記載の電子部品搭載基板。
［４］： 前記電子部品保護層の表面抵抗値が１．０×１０^７Ω／□以上であることを特徴とする、［１］～［３］いずれか記載の電子部品搭載基板。
［５］： 前記電子部品保護層が、バインダー樹脂、および粒状改質剤を含有し、
前記粒状改質剤は、ＪＩＳ Ｋ ６２１７－４で規定されるＤＢＰ吸油量が１５～４００ｍｌ／１００ｇであることを特徴とする、［１］～［４］いずれか記載の電子部品搭載基板。
［６］： 前記粒状改質剤が少なくとも１種類のカーボンブラックを含むことを特徴とする、［５］記載の電子部品搭載基板。
［７］： ［１］～［６］いずれか記載の電子部品搭載基板が搭載された電子機器。
［８］： 基板上に搭載された電子部品を被覆するための電子部品保護シートであって、
前記電子部品保護シートを１８０℃、６０分加熱させてなる硬化膜の表面は、
数式（１）により算出されたＦｌｏｐ Ｉｎｄｅｘ（ＦＩ）が０．３～８０である電子部品保護シート。

（Ｌ^＊ _１５°、Ｌ^＊ _４５°、Ｌ^＊ _１１０°は、それぞれ、電子部品表面の垂線方向に対して４５°の角度で入射した光の正反射光からのオフセット角１５°、４５°、１１０°のＪＩＳ Ｚ８７８１-４で規定されるＬ^＊ａ^＊ｂ^＊表色系のＬ^＊である。） As a result of intensive studies, the present inventors have found that the above problems can be solved by using an article (an electronic component mounting board and an electronic component protective sheet) having the following characteristics, and have completed the present disclosure. rice field.
[1]: An electronic component-mounted board in which an electronic component is mounted on the substrate and the electronic component is covered with an electronic component protective layer, wherein the surface of the electronic component protective layer is An electronic component mounting board having a calculated Flop Index (FI) of 0.3 to 80.

(L ^* _15° , L ^* _45° , and L ^* _110° are the offset angles of 15°, 45°, 110° is the L ^* of the L ^* a ^* b ^* color system specified in JIS Z8781-4.)
[2]: The electronic component mounting board according to [1], wherein the electronic component protective layer has an optical density (OD value) of 1 to 6 at 360 to 760 nm defined by ISO 5-2.
[3]: An L* value of 1 to 50, an a* value of −10 to 10, and a b* value in the L*a*b* color system defined by JIS Z8781-4 of the electronic component protective layer is -10 to 10, the electronic component mounting board according to [1] or [2].
[4]: The electronic component mounting substrate according to any one of [1] to [3], wherein the electronic component protective layer has a surface resistance value of 1.0×10 ⁷ Ω/□ or more.
[5]: The electronic component protective layer contains a binder resin and a granular modifier,
The electronic component mounting board according to any one of [1] to [4], wherein the granular modifier has a DBP oil absorption of 15 to 400 ml/100 g as defined in JIS K 6217-4.
[6]: The electronic component mounting board according to [5], wherein the particulate modifier contains at least one type of carbon black.
[7]: An electronic device mounted with the electronic component mounting board according to any one of [1] to [6].
[8]: An electronic component protection sheet for covering electronic components mounted on a substrate,
The surface of the cured film obtained by heating the electronic component protection sheet at 180° C. for 60 minutes,
An electronic component protection sheet having a Flop Index (FI) of 0.3 to 80 as calculated by the formula (1).

(L ^* _15° , L ^* _45° , and L ^* _110° are the offset angles of 15°, 45°, 110° is the L ^* of the L ^* a ^* b ^* color system specified in JIS Z8781-4.)

Advantageous Effects of Invention According to the present disclosure, it is possible to provide an electronic component protective sheet that has excellent insulating properties, excellent thermal cycle resistance, and excellent dicing suitability, and an electronic component mounting substrate provided with the electronic component protective sheet.

1 is a schematic cross-sectional view of an electronic component mounting board according to this embodiment; FIG. It is a figure explaining a Flop Index (FI) measurement system. It is a figure explaining FI measurement system. It is a figure explaining FI measurement system. It is a figure which shows an example of the aggregate of the granularity modifier of this embodiment. It is a typical figure showing the manufacturing process of the electronic component mounting substrate of the present embodiment. 1 is a schematic cross-sectional view of an electronic component mounting board having a conductive layer according to this embodiment; FIG. 1 is a schematic cross-sectional view of a test substrate according to this embodiment; FIG.

《Electronic component board》
As shown in FIG. 1, the electronic component mounting substrate 10 of the present disclosure includes a substrate 1, one or more electronic components 2 mounted on the substrate, a part or all of the electronic components 2, and the substrate 1. and a protective electronic component protection layer 3 . The electronic component protective layer 3 covers the substrate 1 and the upper surface of the electronic component 2 to the substrate 1. In addition to the upper surface of the electronic component 2, the side surface of the stepped portion formed by mounting the electronic component 2 and the substrate Cover at least a portion. In addition, the electronic component protective layer 3 is not limited to a configuration in which the electronic component protective layer 3 is coated so as to follow the shape of the electronic component 2, and includes an aspect in which the electronic component 2 and the substrate 1 are formed so as to cover the electronic component 2. do.

The electronic component 2 may be electrically connected to the substrate via the solder bumps 4, or the connection terminals extending from the electronic component may be directly connected to the substrate. When the electronic component 2 is connected to the substrate via the solder bumps 4, a hollow portion 5 is created between the electronic component 2 and the substrate 1 as shown in FIG. The electronic component protective layer 3 may cover and protect the electronic component 2 and the substrate 1 so as to maintain the hollow portion 5 , or may cover and protect the hollow portion 5 so as to fill the hollow portion 5 . The electronic component protective layer can be produced, for example, by the method described later.

《Electronic component protective layer》
Next, the electronic component protective layer of the present disclosure will be described. The electronic component protective layer is for covering and protecting the electronic component mounted on the substrate as described above.

二乗平均平方根高さＳｑは、光学顕微鏡、レーザー顕微鏡、および電子顕微鏡いずれかで得られる表面形状の座標データを、解析ソフトによって処理することにより、算出することができる。二乗平均平方根高さＳｑは、定義表面における凹凸高さの二乗平均平方根を表したものであり、表面粗さの標準偏差を表す。 <<root mean square height Sq>>
The root-mean-square height Sq (hereinafter also referred to as Sq) is a surface texture parameter defined by the following formula (2) in ISO 25178-2:2012. A represents the area of the defining surface.

The root-mean-square height Sq can be calculated by processing the coordinate data of the surface shape obtained with either an optical microscope, a laser microscope, or an electron microscope, using analysis software. The root-mean-square height Sq represents the root-mean-square height of irregularities on the defined surface, and represents the standard deviation of surface roughness.

The surface of the electronic component protective layer in the present disclosure preferably has a root-mean-square height Sq of 0.15 to 1.0 μm, determined according to ISO 25178-2:2012. When the surface of the electronic component protective layer is within the above-mentioned range, when a charged object contacts the surface of the electronic component protective layer, an appropriate gap can be maintained at the interface, so that the insulation can be improved. , the breakdown voltage can be improved. In addition, since the surface of the electronic component protective layer is within the above-mentioned range, it is possible to cause moderate stress concentration on the cutter and the cutting point in the dicing process, and it is possible to more effectively suppress the occurrence of burrs.

二乗平均平方根傾斜Ｓｄｑは、光学顕微鏡、レーザー顕微鏡、および電子顕微鏡いずれかで得られる表面形状の座標データを、解析ソフトによって処理することにより、算出することができる。二乗平均平方根傾斜Ｓｄｑは、定義表面の全点における傾斜の二乗平均平方根を表しており、定義表面における凹凸の険しさを表現するパラメータである。 <<root mean square slope Sdq>>
The root-mean-square slope Sdq (hereinafter also referred to as Sdq) is a surface texture parameter defined by the following formula (3) in ISO 25178-2:2012. A is the area of the defined surface, ∂x is the x-axis direction, ∂y is the y-axis direction, and ∂z(x, y) is the z-axis direction.

The root-mean-square slope Sdq can be calculated by processing the coordinate data of the surface profile obtained with either an optical microscope, a laser microscope, or an electron microscope, using analysis software. The root-mean-square slope Sdq represents the root-mean-square slope of all points on the defined surface, and is a parameter that expresses the steepness of the unevenness on the defined surface.

The surface of the electronic component protective layer in the present disclosure preferably has a root-mean-square slope Sdq of 0.0001 to 5, determined according to ISO 25178-2:2012. When the surface of the electronic component protective layer is within the range described above, the antifouling property of the electronic component protective layer can be improved. By setting the root-mean-square slope Sdq to 0.0001 or more, the electronic component protective layer can be provided with an appropriate unevenness slope, and adhesion of dust can be suppressed. On the other hand, by setting the root-mean-square slope Sdq to 5 or less, it is possible to suppress fine dust and dirt from adhering to the uneven wall surface of the electronic component protective layer. The root-mean-square slope Sdq of the electronic component protective layer is more preferably 0.0005 to 4.5, even more preferably 0.001 to 4, and particularly 0.005 to 3.5. preferable.

ＦＩ測定系を図２Ａに示す。ＦＩは、測定対象表面１３の垂線方向に対して４５°の入射角で光（入射光１２）を照射し、一定の角度で反射された光（正反射光）を検出器によって検出し、数値化した明度Ｌ^＊を用いて算出される。Ｌ^＊はＪＩＳ Ｚ８７８１-４で規定されるＬ^＊ａ^＊ｂ^＊表色系における明度Ｌ^＊であり、Ｌ^＊ _１５°、Ｌ^＊ _４５°、Ｌ^＊ _１１０°は、それぞれ、測定対象表面の垂線方向に対して４５°の角度で入射した光の正反射光からのオフセット角１５°、４５°、１１０°で観測されるＬ^＊である。
ＦＩは測定対象表面の凹凸険しさと表面凹凸の秩序性を評価する指標となる。図２Ｂに示すように、測定対象表面の凹凸が激しく、無秩序な場合は、入射光１２はあらゆる角度で反射（散乱）されるため、検知される光量の角度依存性は小さくなる。その結果、数式（１）によって算出されるＦＩの値は小さな値となる。一方、図２Ｃに示すように、測定対象表面の凹凸がなだらかであり、秩序性が高い場合は、入射光１２は一定の角度で強く反射されるため、検知される光量の角度依存性は大きくなる。特に、前述のオフセット角１５°、４５°、１１０°で観測される光のうち、１５°の光量が大きくなるため、ＦＩは大きな値となる。 《Flop Index (FI)》
Flop Index (FI) (hereinafter also referred to as FI) is a parameter calculated by Equation (1).

The FI measurement system is shown in FIG. 2A. FI irradiates light (incident light 12) at an incident angle of 45° with respect to the direction perpendicular to the measurement target surface 13, detects light reflected at a certain angle (specularly reflected light) by a detector, and obtains a numerical value calculated using the converted lightness L ^* . L ^* is the lightness L ^* in the L ^* a ^* b ^* color system defined in JIS Z8781-4, and L ^* _15° , L ^* _45° , and L ^* _110° are perpendicular to the surface of the object to be measured. L ^* observed at offset angles of 15°, 45°, and 110° from specularly reflected light for light incident at an angle of 45° to the direction.
The FI is an index for evaluating the roughness of the surface to be measured and the orderliness of the surface irregularities. As shown in FIG. 2B, when the surface of the object to be measured is highly uneven and chaotic, the incident light 12 is reflected (scattered) at all angles, so the angle dependence of the amount of light detected is small. As a result, the value of FI calculated by Equation (1) becomes a small value. On the other hand, as shown in FIG. 2C, when the unevenness of the surface of the object to be measured is smooth and highly ordered, the incident light 12 is strongly reflected at a constant angle. Become. In particular, among the light observed at the offset angles of 15°, 45°, and 110°, the amount of light at 15° increases, so FI takes a large value.

(Effect of FI)
The FI of the surface of the electronic component protective layer in the present disclosure is 0.3-80. When FI is within the above range, the dicing aptitude and voltage resistance (dielectric breakdown voltage) of the electronic component protective layer can be improved. When the FI is 0.3 or more, it is possible to impart a certain degree of orderliness to the uneven shape of the surface of the electronic component protective layer. When a voltage is applied to the protective layer for electronic components, it is possible to suppress the occurrence of starting points for dielectric breakdown by giving a certain degree of order to the uneven surface shape, so voltage resistance (dielectric breakdown voltage) improves. On the other hand, when the FI of the surface of the electronic component protective layer is 80 or less, it is possible to impart a certain degree of disorder to the uneven shape of the surface. On a surface with a highly ordered uneven shape, external stress applied by cutting or the like tends to concentrate at a specific location. Dicing aptitude is improved. Moreover, thermal cycle resistance can be improved. The FI of the surface of the electronic component protective layer is more preferably 1-75, still more preferably 3-50, and particularly preferably 5-26.

Furthermore, as a result of intensive studies, the inventors of the present invention have found that the thermal cycle resistance is further improved by setting the FI of the electronic component protective layer surface to 5 to 26. Since electronic component-mounted substrates are used in various temperature environments after they are incorporated into electronic equipment, the electronic component protective layer may be exposed to rapid temperature changes. When the FI of the surface of the electronic component protective layer is within a specific range and the surface unevenness has a certain degree of disorder, the stress caused by the expansion and contraction of the electronic component protective layer due to a sudden temperature change is appropriately dispersed. Therefore, it is possible to prevent the electronic component protective layer from being damaged when the temperature changes.

[Sq, Sdq, FI control method]
The method of controlling the root-mean-square height Sq, the root-mean-square slope Sdq, and Flop Index (FI) of the surface of the electronic component protective layer can be a conventionally known method for adjusting the surface shape of an object, Different methods can be applied, or a common method can be applied. Specifically, a method of polishing the surface using abrasive cloth and paper, a shot blasting method of spraying an abrasive material on the surface of the electronic component protective layer with compressed air, a predetermined root mean square height Sq, a root mean square inclination Sdq, or A method of forming an electronic component protection sheet 6 (see FIG. 4), which is a precursor of an electronic component protection layer, on a carrier material having FI, and transferring irregularities on the surface of the carrier material, a predetermined root mean square height Sq, A method of pressing a film having a root-mean-square slope Sdq or FI and an electronic component protective sheet 6 to transfer unevenness on the film surface, a method of controlling surface unevenness by incorporating particulate matter into the electronic component protective layer. is mentioned. The method for controlling Sq, Sdq, and FI on the surface of the electronic component protective layer is not limited to the exemplified methods, but any method of controlling the surface unevenness by incorporating particulate matter into the electronic component protective layer This is preferable from the viewpoint of productivity because it eliminates the need for pre- and post-treatments.

光学濃度（ＯＤ値）が大きくなるほど入射光の減衰率は大きくなることから、対象物の光線遮蔽性は良好であるといえる。図１に示すように、電子部品２上に電子部品保護層３が積層された構造においては、電子部品保護層３の光学濃度（ＯＤ値）が高いほど、光線遮蔽性が高く、下層の電子部品２に光が照射、反射されることがなくなり、電子部品の色味は観察者から観測されにくくなる。よって、電子部品と電子部品保護層の色味が同一でない場合には、電子部品上に電子部品保護層が積層されている部分と積層されていない部分を外観から判断することができる。前述の観点から、電子部品保護層のＩＳＯ ５－２で定められる３６０～７６０ｎｍ（可視光領域）の光学濃度（ＯＤ値）は０．５～６の範囲内であることが好ましく、１～６であることがより好ましく、２～６の範囲内であることが更に好ましい。 <<Optical density (OD value)>>
Optical density (hereinafter also abbreviated as OD value) is the attenuation rate of incident light that passes through an object, and is a parameter calculated by Equation (4). PI represents the amount of incident light at a specific wavelength, and PT represents the amount of transmitted light at the specific wavelength.

Since the attenuation rate of incident light increases as the optical density (OD value) increases, it can be said that the light shielding property of the object is good. As shown in FIG. 1, in the structure in which the electronic component protective layer 3 is laminated on the electronic component 2, the higher the optical density (OD value) of the electronic component protective layer 3, the higher the light shielding property. Light is no longer irradiated or reflected on the component 2, and the color of the electronic component is less likely to be observed by an observer. Therefore, when the color of the electronic component and the electronic component protective layer are not the same, it is possible to determine from the appearance whether the electronic component protective layer is laminated on the electronic component or not. From the above point of view, the optical density (OD value) at 360 to 760 nm (visible light region) defined by ISO 5-2 of the electronic component protective layer is preferably in the range of 0.5 to 6. and more preferably in the range of 2 to 6.

In the electronic component protective layer, there is a demand for a technique for improving the accuracy of quality checks such as cracks at the edge of the electronic component and whether the edge of the electronic component protective layer is excessively flowing (bleeding out). There is a method of coloring the electronic component protective layer black, but simply coloring it black makes it difficult to distinguish, for example, on a chip sealed with black sealing resin on the electronic component. It is According to the electronic component protective layer of the present disclosure, by setting the OD value within the above range, the electronic component protective layer itself can be appropriately colored, the visibility can be improved, and the inspection accuracy can be effectively improved.

Examples of methods for increasing the OD value of the electronic component protective layer include a method of using a binder resin exhibiting high light absorption characteristics and a method of incorporating a filler that scatters incident light. The above-mentioned scattering effect of incident light can also be obtained with the granular modifier described later, and by controlling the type and / or amount of the granular modifier, the OD value of the electronic component protective layer is set to the desired range. becomes possible.

<<L ^* a ^* b ^* value>>
The electronic component protective layer of the present disclosure ^has an L ^* value of 1 to 50, an a ^* value of −10 to 10, and a b ^* value of − in the L*a ^* b ^* color system defined by JIS Z8781-4. It is preferably 10-10. By setting the L ^* a ^* b ^* values within the above range, the difference in color from the substrate becomes clear, and the distinguishability is improved. Note that the L ^* a ^* b ^* values are coordinate axes representing the color space. L ^* is the dimension denoting lightness, a ^* and b ^* denoting complementary color dimensions. The lower the L ^* value and the closer the a ^* b ^* value is to 0, the higher the jet-blackness of the target surface, and the clearer the difference in color tone from the normally colored substrate. where L ^* is L ^* ₄₅ in FI measurements. The L ^* value is more preferably 1-40, even more preferably 1-30. Further, the a ^* value and b ^* value are more preferably -5 to 5, and even more preferably -3 to 3.

By optimizing the Sdq, OD value, and L ^* a ^* b ^* value, the electronic component protective layer of the present disclosure is an electronic component protective layer that can be formed on electronic components and substrates of any color. can be visually recognized, and the inspection accuracy can be significantly improved.

《Insulating property of electronic component protective layer》
It is preferable that the electronic component protective layer has excellent insulating properties because it is necessary to cover and protect conductive materials such as electronic components and electric circuits mounted on the electronic component mounting board. Specifically, the surface resistance value of the electronic component protective layer is preferably 1.0×10 ⁷ Ω/□ or more, more preferably 1.0×10 ⁸ Ω/□ or more, and 1.0 More preferably, it is x10 ⁹ Ω/□ or more.

《Binder Resin》
The electronic component protective layer contains a binder resin. The binder resin becomes the base of the electronic component protective layer. It contains a granularity modifier and other optional ingredients, which will be described later. The binder resin can be a thermoplastic resin or a thermosetting resin and a curing agent, or can be used in combination.

[Thermoplastic resin]
Thermoplastic resins include polyolefin resins, vinyl resins, styrene/acrylic resins, diene resins, terpene resins, petroleum resins, cellulose resins, polyamide resins, polyurethane resins, polyester resins, polycarbonate resins, polyimide resins, and liquid crystals. Examples include polymers and fluororesins. Polyamide resins, polyurethane resins, polyester resins, polycarbonate resins, polyimide resins, liquid crystal polymers, and fluorine resins are more preferable from the viewpoint of heat resistance, although they are not particularly limited. The thermoplastic resin can be used alone or in combination of two or more.

[Thermosetting resin]
A thermosetting resin is a resin having multiple functional groups capable of reacting with a curing agent. Functional groups include, for example, hydroxyl group, phenolic hydroxyl group, acid anhydride group, methoxymethyl group, carboxyl group, amino group, epoxy group, oxetanyl group, oxazoline group, oxazine group, aziridine group, thiol group, isocyanate group, blocked Isocyanate groups, blocked carboxyl groups, silanol groups and the like can be mentioned. Thermosetting resins include, for example, acrylic resins, maleic acid resins, polybutadiene resins, polyester resins, polyurethane resins, polyurethane urea resins, epoxy resins, oxetane resins, phenoxy resins, polyimide resins, polyamide resins, polyamideimide resins, and phenolic resins. Known resins such as resins, alkyd resins, amino resins, polylactic acid resins, oxazoline resins, benzoxazine resins, silicone resins and fluorine resins can be used. Thermosetting resins can be used alone or in combination of two or more.

Among these resins, polyurethane resins, polyurethane urea resins, polyester resins, epoxy resins, phenoxy resins, polyimide resins, polyamide resins, and polyamideimide resins are preferred from the viewpoint of heat resistance.

[Curing agent]
The curing agent has multiple functional groups capable of reacting with the functional groups of the thermosetting resin. Examples of curing agents include known compounds such as epoxy compounds, acid anhydride group-containing compounds, isocyanate compounds, aziridine compounds, amine compounds, phenol compounds, and organometallic compounds. Curing agents can be used alone or in combination of two or more.

The curing agent is preferably contained in an amount of 1 to 50 parts by mass per 100 parts by mass of the thermosetting resin. When the amount of the curing agent is 1 part by mass or more, a strong crosslinked structure is formed in the electronic component protective layer, and voltage resistance (dielectric breakdown voltage) is improved. On the other hand, since the amount of the curing agent is 50 parts by mass or less, excessive curing of the electronic component protective layer is suppressed, and in the manufacturing process of the electronic component mounting board described later, the electronic component protective sheet 6 (Fig. 4 ) can be deformed following the shape of the electronic component to form a defect-free electronic component protective layer. The curing agent is more preferably contained in 3 to 45 parts by mass, more preferably 5 to 40 parts by mass, per 100 parts by mass of the thermosetting resin.

《Particulate Modifier》
The electronic component protective layer preferably contains a granular modifier. The granular modifier is used mainly for the purpose of setting the root-mean-square height Sq, root-mean-square tilt Sdq, and Flop Index (FI) of the electronic component protective layer within desired ranges. In addition, the mechanical properties such as the elastic modulus, Young's modulus, and indentation hardness of the electronic component protective layer can be controlled within favorable ranges by appropriately changing the type and amount of the particulate modifier.

The granular modifier preferably has a DBP oil absorption of 15 to 400 ml/100 g as defined in JIS K 6217-4. Dicing aptitude can be improved when the DBP oil absorption of the granular modifier is 15 to 400 ml/100 g. The improvement in dicing aptitude is presumed to be caused by the presumed action described later, but the action mechanism of the effect in the present disclosure is not limited to the presumed action.

The DBP oil absorption indicates the amount of DBP (dibutyl phthalate) that can be absorbed by a target substance, and can be used as an index for grasping the degree of aggregate development of the granular modifier, which will be described later.

The particulate modifier of the present disclosure forms secondary particle-like aggregates (hereinafter, aggregates 22) by aggregating, binding, or fusing base microparticles (hereinafter, primary particles 21). . FIG. 3 shows a schematic diagram of aggregates of granular modifiers.

(Estimated action)
The estimation of the effect of the particulate modifier on improving the dicing aptitude of the protective layer for electronic parts will be described below. The primary particles 21 of the granular modifier have the property of gathering together due to a plurality of inter-particle interactions such as electrostatic interactions, and aggregation, binding, or fusion of the plurality of primary particles 21 causes agglomeration. A gate 22 is formed. When the primary particles agglomerate, the primary particles 21 are not always packed closely, and spaces 23 are generated in the aggregates 22 .
When the granular modifier is immersed in a liquid such as oil or polymer solution, low-molecular weight or high-molecular weight molecules in the liquid enter the space 23 in the aggregate. If it is a macromolecule that enters the space 23 , a part of the molecular chain of the macromolecule enters the space 23 rather than all of the molecular chain enters the space 23 . When the above-mentioned phenomenon occurs at multiple terminals in a polymer, a state is formed in which multiple granular modifiers are linked by polymer chains. A large number of the above-described phenomena are formed in the electronic component protective layer to form a pseudo-crosslinked structure, which improves the strength of the electronic component protective layer and suppresses the occurrence of sagging and burrs during dicing.

The estimated behavior is affected by the amount of space in the aggregate. That is, the more the aggregates develop and become larger, the more difficult it becomes for the primary particles to agglomerate in a close-packed manner, and a wider space or a greater number of spaces are formed. As a result, the particulate modifier forms a higher-density pseudo-crosslinked structure, and the electronic component protective layer obtains higher strength.

DBP oil absorption is used as an index for measuring the size of the space. The DBP oil absorption has a positive correlation with the amount of DBP (dibutyl phthalate) that can be absorbed by the target substance, that is, with the total volume of space in the aggregate. The higher the DBP oil absorption, the wider and more the space in the aggregate, and the higher the density of the pseudo-crosslinked structure formed in the electronic component protective layer.
The above is the presumed function of improving the strength of the electronic component protective layer by the particulate modifier. However, the action mechanism of the effect in the present disclosure is not limited to the presumed action.

The granular modifier used in the present disclosure has a DBP oil absorption of 15 to 400 ml/100 g as defined in JIS K 6217-4. When the DBP oil absorption of the granular modifier is 15 ml/100 g or more, the degree of aggregate development can be made sufficient, and a sufficient pseudo-crosslinking effect can be produced. As a result, when the electronic component mounting board on which the electronic component protective layer is laminated is diced, the electronic component protective layer can be prevented from sagging. In addition, since the DBP oil absorption of the granular modifier is 400 ml/100 g or less, it prevents a large amount of polymer from being taken into the granular modifier, suppresses the occurrence of areas where the polymer is insufficient, and protects electronic parts. When an electronic component mounting substrate having laminated layers is diced, it is possible to suppress appearance defects such as cracking of the electronic component protective layer originating from the defects. The DBP oil absorption of the granular modifier is more preferably 30 to 350 ml/100 g, more preferably 50 to 250 ml/100 g.

The content of the particulate modifier in 100% by mass of the electronic component protective layer is preferably 1 to 30% by mass. When the content of the granular modifier is 1% by mass or more, a sufficient pseudo-crosslinking effect can be produced in the electronic component protective layer, and the suitability for dicing is further improved. When the content of the granular modifier is 30% by mass or less, it prevents a large amount of polymer from being incorporated into the granular modifier, suppresses the occurrence of regions lacking polymers in the electronic component protective layer, and is suitable for dicing. is better. More preferably, the particulate modifier content in the electronic component protective layer is 5 to 20% by mass.

Examples of particulate modifiers include, but are not limited to, carbon-based particles such as carbon black, carbon nanotubes, graphite, carbon fibers, and carbon nanoplates, as long as they have the effect of improving the dicing aptitude of the electronic component protective layer. , or inorganic particles such as trilithium phosphate (Li ₃ PO ₄ ) described in JP-A-2018/185938 and silica described in WO 2016/021467. A known one can be used as long as it has aggregation and the DBP oil absorption can be measured. Among them, it is preferable to use carbon black. Carbon black can include those classified as ketjen black and acetylene black as well as those not classified as described above. Since these granular modifiers do not cause excessive entangled self-aggregation like fibrous carbon nanotubes, they generate a strong interaction with the polymer, so they can be uniformly dispersed in the electronic component protective layer. It is preferable because cracking during dicing can be suppressed.

The granular modifier preferably has a volume resistivity of 1.0×10 ⁻³ Ω·cm or more from the viewpoint of imparting insulation to the electronic component protective layer. The volume resistivity of the granular modifier is more preferably 1.0×10 ⁷ Ω·cm or more, and even more preferably 1.0×10 ¹³ Ω·cm or more. The volume resistivity of the substance contained in the granular modifier can be measured according to JIS C2141. Although the upper limit of the volume resistivity is not limited, it is usually 1.0×10 ¹⁷ Ω·cm or less.

One type of granular modifier may be used alone, or two or more types may be used in combination. By using two or more types of granular modifiers in combination, each characteristic can be complemented. For example, carbon black (DBP oil absorption: 100 ml/100 g, volume resistivity: 1.6×10 ⁻⁵ Ω·cm) is used as the first granular modifier, and silica (DBP Oil absorption: 220 ml/100 g, volume resistivity: 1.6 × 10 ¹⁶ Ω cm), carbon black improves dicing resistance and distinguishability, and silica improves dicing resistance and dielectric breakdown voltage. Such a thing becomes possible.

<<Thickness of protective layer for electronic components>>
The thickness of the electronic component protective layer is preferably 10 to 1000 μm from the viewpoint of achieving both improvement in dielectric breakdown voltage and reduction in thickness. The thickness of the electronic component protective layer is more preferably 15 to 500 μm, still more preferably 20 to 250 μm.

《Electronic component protection sheet》
The electronic component protective sheet 6 is a precursor product of the electronic component protective layer, and is an insulating resin sheet. When the electronic component protective sheet contains a thermosetting resin, the electronic component protective sheet is heated at a temperature for a predetermined time or longer to cause a curing reaction, thereby forming the electronic component protective layer. The electronic component protective sheet may have a peelable sheet on one side or both sides for surface protection. Also, a cushioning material used in the step of covering and protecting with an electronic component protection sheet, which will be described later, may be laminated in advance.

<<Manufacturing method of electronic component protection sheet>>
The method for producing the electronic component protective sheet is not particularly limited, but for example, a method of applying a composition obtained by dissolving a material such as the binder resin that forms the electronic component protective layer in a solvent or the like to a release sheet. Examples of coating methods include gravure coating, kiss coating, die coating, lip coating, comma coating, blade coating, roll coating, knife coating, spray coating, bar coating, spin coating, and dip coating. , or various printing methods.

The electronic component protective sheet of the present disclosure may be laminated with two or more electronic component protective sheets to achieve a desired thickness. The structure laminated as described above may be composed only of the electronic component protective sheet, or may include a layer having a specific function as an intermediate layer.

《Uses of electronic component protective sheets》
The electronic component protective sheet of the present disclosure exhibits practically sufficient adhesion to any substrate made of metal, resin, fiber, ceramic, glass, or conductive silicon. Metals that can be used include aluminum, copper, brass, stainless steel, iron, and chromium. As the resin, epoxy resin, polyethylene terephthalate, polyimide, polyamide, polyethylene, polypropylene, polyolefin graft polymer, polystyrene, polyvinyl chloride and the like can be used. Therefore, the present electronic component protection sheet can be suitably used for adhesion between different materials having different polarities.
The electronic component protection sheet of the present disclosure can be suitably used to protect various substrates, ie, rigid substrates, FPC substrates, and the like.

Electronic component mounting substrates using the electronic component protection sheet of the present disclosure are preferably provided in electronic devices such as liquid crystal displays, touch panels, notebook PCs, mobile phones, smartphones, and tablet terminals.

<<Manufacturing method of electronic component mounting board>>
A method for manufacturing an electronic component-mounted substrate using the electronic component protection sheet of the present disclosure (hereinafter sometimes abbreviated as a coating protection method, a coating method, or a protection method) will be described.
The method for manufacturing an electronic component mounting substrate of the present disclosure includes a step of mounting one or more electronic components on the substrate (step i), a step of preparing an electronic component protection sheet (step ii), and A step of placing an electronic component protective sheet so that the electronic component protective sheet is in contact with a tall electronic component (step iii, also referred to as a temporary attachment step), and the electronic component protective sheet is separated from the individual electronic components by heating and pressurizing. and covering at least a portion of the electronic component and the substrate (step iv), and curing the deformed electronic component protective sheet in a deformed state to form an electronic component protective layer (step v). Through these steps, an electronic component-mounted substrate coated and protected by an electronic component protective layer formed from the electronic component protective sheet of the present disclosure is obtained. Step iv and step v can also be a series of steps.

An example of a method for covering and protecting an electronic component mounting substrate by heating and pressing using an electronic component protective sheet will be described below with reference to FIG. 4 for steps iii to v. FIG.

(Step iii: electronic component protection sheet placement step)
An electronic component mounting substrate (hereinafter also referred to as a mounting substrate) 100 having electronic components 2a and electronic components 2b mounted on a substrate 1 by means of solder bumps 4 is prepared. The electronic components 2 are semiconductor chips, capacitors, transistors, inductors, thermistors, etc., and are mounted on the substrate 1 via solder bumps 4 . A gap exists between the electronic components 2 a and 2 b and the substrate 1 due to the solder bumps 4 . The electronic component 2a is designed higher than the electronic component 2b.
Next, an electronic component protection sheet 6 cut into a predetermined size is placed on the mounting surfaces of the electronic components 2a and 2b. Since the electronic component 2a is taller than the electronic component 2b, the electronic component protection sheet 6 contacts the electronic component 2a and is temporarily attached. Note that the electronic component protection sheet 6 may bend and come into contact with the electronic component 2b (not shown in FIG. 4).

A cushion material 7 may be laminated on the electronic component protection sheet 6 . FIG. 4 shows an example using a cushioning material. The cushion material 7 may be laminated after the electronic component protection sheet 6 is placed, or a laminate obtained by stacking the electronic component protection sheet 6 and the cushion material 7 in advance may be placed. The cushion material 7 is a material that softens or melts when heated and pressurized, and has a function of promoting conformability of the electronic component protection sheet 6 to the electronic components 2a and 2b and to gaps between the electronic components.
The cushioning material 7 is not particularly limited as long as it is a thermoplastic material, but preferably has a melting temperature and a glass transition point (Tg) lower than the temperature at the time of pressurization. Suitable examples include polyolefin films, vinyl chloride films, and PVA films. Depending on the depth of the groove formed between the electronic component 2a and the electronic component 2b, the thickness of the cushioning material is usually about 100 μm to 1 mm. When a plurality of cushion materials 7 are laminated, the total thickness is preferably within this range.

Note that the electronic component mounting board shown in the present embodiment is an example, and the structure of the electronic component and the board is not particularly limited. Doesn't matter. The arrangement position of the electronic component to be mounted is not limited.

Next, by performing heating and pressurization with a heating and pressurizing machine 20, the electronic component protection sheet 6 is deformed and conforms to the shape of each electronic component, that is, along the upper surface and side surface of the electronic components 2a and 2b. It is deformed to follow the electronic component and at least part of the substrate 1 . The cushioning material 7 is softened or melted by heat, and promotes conformity of the electronic component protective sheet 6 to the irregularities between the electronic components on the mounting board 100 .
A method of interposing a release sheet between the heating and pressurizing machine 20 and the cushioning material 7 during heating and pressurization is also preferable. The release sheet is a sheet obtained by subjecting a base material such as paper or plastic to a known release treatment. A plastic sheet with low polarity such as Teflon (registered trademark) can also be used.

The heating temperature may be a temperature at which the electronic component protection sheet 6 is moderately softened, deformed along the shape of the individual electronic components, and can enter the gaps between the individual electronic components, and is preferably 100 to 260 ° C. It is preferably 120 to 240°C, and more preferably 120 to 240°C. If the temperature is too low, the ability of the electronic component protection sheet 6 to enter the gaps between the individual electronic components mounted thereon is reduced. On the other hand, if the temperature is too high, the thermosetting reaction of the thermosetting resin of the electronic component protection sheet 6 proceeds rapidly, and the electronic component protection sheet is less likely to penetrate between mounted electronic components.
The pressure when heating and pressurizing is preferably 0.01 to 10 MPa, more preferably 0.1 to 6.0 MPa. By heating and pressurizing at the above pressure, the embedding property is further improved without damaging the electronic component.
The heating time is usually 0.5 to 30 minutes, preferably 1 to 20 minutes. If the heating time is too short, the ability of the electronic component protection sheet to enter between the mounted electronic components is reduced. On the other hand, if the time is too long, thermal decomposition and oxidation of the thermosetting resin tend to occur, increasing the possibility of lowering the reliability of the bonding site due to reaction products and the like. The heating and pressurizing step is preferably performed in a vacuum state.
As a method of heating and pressurizing, besides using a heating and pressurizing machine, a method of laminating metal plates having appropriate weights so as to obtain a predetermined pressure and putting the laminate into an oven is also preferable.
On the other hand, as the heating and pressurizing method other than the heating and pressurizing machine, a vacuum forming method or a vacuum pressure forming method is also preferable.

(Step v: Curing step of deformed electronic component protection sheet)
After heating and pressurizing, the electronic component protection sheet 6 is deformed and further heated at a temperature of 150° C. to 230° C. for 10 to 60 minutes to thermoset the thermosetting resin in the electronic component protection sheet 6. An electronic component protective layer, which is a cured film, is formed. The electronic component protective layer firmly adheres to the electronic component and the substrate, and functions as a protective layer for preventing and protecting the electronic component from damage from external impacts and abrasions. In the step (iv), the heating and pressurizing temperature is set to 150° C. or higher for 30 minutes or longer to complete the heat curing and form the protective coating layer. The covering protective layer must be an insulator in order to prevent short circuits between electronic parts, and a surface resistance value of 1×10 ⁷ Ω/□ or more is required. In addition, the process v can be abbreviate|omitted when using a thermoplastic resin instead of a thermosetting resin.

In the electronic component mounting board of the present disclosure, the electronic component protection layer may be the outermost layer, and other functional layers may be laminated. The other functional layer is, for example, a layer having a function of conductive layer, hard coat property, water vapor barrier property, oxygen barrier property, thermal conductivity, low dielectric constant, high dielectric constant or heat resistance. Among others, the conductive layer is sometimes used for the purpose of protecting the electronic parts to be covered and protected from electromagnetic wave noise.

FIG. 5 shows a configuration example of an electronic component mounting board 11 having a conductive layer. The conductive layer 8 is formed on the electronic component protective layer 3 and connected to the ground 9 . A connection point with the ground 9 may exist on the surface of the substrate 1 or may exist on the side surface of the substrate 1 . The conductive layer can be formed by forming a metal layer on the surface of the electronic component protective layer by sputtering or plating, or by laminating a conductive sheet containing conductive particles on the electronic component protective layer. can.

"Electronics"
The electronic component mounting board of the present disclosure is preferably provided in electronic devices such as liquid crystal displays, touch panels, notebook PCs, mobile phones, smart phones, and tablet terminals.

EXAMPLES Hereinafter, the present disclosure will be described in detail with reference to examples and comparative examples, but the present disclosure is not limited only to the following examples. "Parts" and "%" below are values based on "parts by mass" and "% by mass", respectively.

"material"
Raw materials used in the examples are shown below.
<Thermosetting resin>
[Synthesis of thermosetting resin 1]
166 parts of terephthalic acid, 146 parts of adipic acid, 212 parts of 3-methyl-1,5-pentanediol, and 25 parts of ethylene glycol were placed in a glass flask equipped with a stirrer, thermometer, reflux condenser, nitrogen inlet tube, and decompression equipment. After the mixture was charged, the mixture was stirred while nitrogen gas was passed through it, the temperature was gradually raised under normal pressure, and the mixture was reacted at 200 to 230° C. for about 8 hours to obtain a liquid product with an acid value of 43. Next, 0.01 part of tetra-n-butoxytitanium was charged, and after purging with nitrogen, the mixture was stirred at 180° C. for 30 minutes under a closed condition. Then, the mixture was reacted at 230° C. and 5 mmHg for 2 hours to obtain a polyester diol having an acid value of 1.1, a hydroxyl value of 114.2, a molecular weight of 982 and a hue of 10 (by APHA method, hereinafter the same).
Then, 734 parts of the polyester diol, 23.9 parts of dimethylolpropionic acid, 219 parts of toluene diisocyanate, and 242 parts of toluene were added to a reaction vessel equipped with a stirrer, thermometer, reflux condenser, dropping device, and nitrogen inlet tube. It was prepared and reacted at 50° C. for 8 hours under a nitrogen atmosphere. To this, 1200 parts of toluene was added to obtain a solution of a urethane prepolymer having terminal isocyanate groups.
Next, the obtained prepolymer solution was heated to 70° C., and while maintaining that temperature, 20.0 parts of 1,3-diaminopropane, 3.1 parts of benzylamine, 600 parts of 2-pronol, and 961 parts of toluene were added. was added dropwise in 1 hour. After completion of the dropwise addition, the mixture was reacted at 70° C. for 6 hours to obtain a polyurethane resin having a molecular weight (Mw) of 130,000, an acid value of 10 mgKOH/g, a Tg of 20° C., and a solid content of 25%.

Curing agent 1: bisphenol A type epoxy compound "jER828" (epoxy equivalent = 189 g / eq) manufactured by Mitsubishi Chemical Corporation

<Particulate modifier>
・ Granular modifier 1: Carbon black “MA100” (average primary particle diameter: 24 nm, DBP oil absorption: 100 ml / 100 g, volume resistivity: 1.6 × 10 ^-5 Ω cm) Mitsubishi Chemical Co., Ltd. Granular modifier Material 2: Silica "Ultrasil U360" (DBP oil absorption: 220 ml/100 g, volume resistivity: 1.6 × 10 ¹⁶ Ω cm) manufactured by NANOCYL

<Average primary particle size of granular modifier>
The average primary particle size of the granular modifier was determined from the average value of 20 primary particles observed from an image magnified about 50,000 to 1,000,000 times with a transmission electron microscope (TEM). When the particle shape of the granular modifier has an average aspect ratio (major axis length/minor axis length) of 1.5 or more, the average primary particle size is obtained by averaging the major axis lengths. .

<DBP oil absorption of granular modifier>
The DBP oil absorption of the granular modifier was determined according to JIS K 6217-4. For the measurement, an absorption measuring device (Absorption measuring device S-500, manufactured by Asahi Soken Co., Ltd.) was used.

《Creating an electronic component protection sheet》
[Preparation of electronic component protection sheet 1]
100 parts of thermosetting resin 1 (solid content), 15 parts of curing agent 1, 2 parts of granular modifier 1, and 4 parts of granular modifier 2 are charged in a container, and the nonvolatile concentration is A mixed solvent of toluene and isopropyl alcohol (mass ratio of 2:1) was added so as to be 45% by mass, and the mixture was stirred with a disper for 10 minutes to obtain a composition. This composition was applied to a cushion material using a doctor blade so as to give a dry thickness of 40 μm. Then, by drying at 100° C. for 2 minutes, a laminated sheet of Example 1 in which the cushioning material and the electronic component protection sheet 1 were laminated was obtained.

Laminated sheets of Examples 2 to 8 and Comparative Examples 1 and 2 were obtained in the same manner as in electronic component protective sheet 1, except that the blending amounts in Table 1 were changed.

[Preparation of Electronic Component Mounting Board 1]
(Fabrication of mounting substrate)
A substrate was prepared by mounting 5×5 electronic components (1000 μm×1000 μm) in an array on a substrate made of glass epoxy. The thickness of the substrate is 0.3 mm, and the mold sealing thickness, ie, the height (component height) H from the top surface of the substrate to the top surface of the mold sealing material, is 0.7 mm. After that, half dicing was performed along the grooves between the components to obtain a mounting substrate (see FIG. 6). The half-cut groove depth was 0.8 mm (the substrate cut groove depth was 0.1 mm), and the half-cut groove width was 200 μm.

The laminated sheet of each example and comparative example was thermocompression bonded to the mounting substrate (substrate on which electronic components are mounted in an array of 5×5) at 8 MPa and 170° C. for 5 minutes, and the cushioning material was peeled off by hand. bottom. After that, curing is performed at 180 ° C. for 2 hours, and based on Table 1, for those that require surface buffing or other processing, processing is performed so that Sq, Sdq, and FI become predetermined values. An electronic component mounting substrate of Example was obtained.
<Measurement of root-mean-square height Sq and root-mean-square slope Sdq>
The root-mean-square height Sq and the root-mean-square slope Sdq of the electronic component protective layer were measured by the following methods. First, using a laser microscope (manufactured by Keyence Corporation, VK-X100), measurement data was obtained for the electronic component protective layer surface of the electronic component mounting board. Subsequently, the acquired measurement data is imported into analysis software (analysis application "VK-H1XA" equipped with ISO 25178 surface texture measurement module "VK-H1XR", both manufactured by Keyence Corporation), ISO 25178 surface texture measurement is performed, Sq and Sdq were calculated. (Conditions are S-filter: 1 μm, L-filter: 0.2 mm).
<Measurement of Flop Index (FI)>
First, L ^* _15° , L ^* _45° , and L ^* _110° were measured on the surface of the electronic component protective layer on the electronic component mounting board using a multi-angle colorimeter (manufactured by BYK, BYK-mac i 23 mm measurement aperture). After that, FI was calculated based on the formula (1). Measurement was performed under the conditions of a light source of D50 and a field of view of 2°.
<Measurement of optical density (OD value)>
The OD value of the surface of the electronic component protective layer on the electronic component mounting board was measured using a "361T desktop transmission densitometer" manufactured by X-Rite.
^{<Measurement of a*b*>}
The a ^* b ^* value of the surface of the electronic component protective layer on the electronic component mounting substrate was measured using a "color difference meter CR-400" manufactured by KONICA MINOLTA.
<Measurement of surface resistance>
The surface resistance value of the electronic component protective layer on the electronic component mounting board was measured using a Nitto Seiko Analytic Co., Ltd. "Hiresta-UX MCP-HT800 high resistance resistivity meter".

"evaluation"
[Insulation breakdown voltage]
An electronic component protection sheet with a release sheet was produced by replacing the cushioning material of the laminated sheet in which the cushioning material and the electronic component protection sheet are laminated with a release sheet.
Peel off one of the releasable sheets from the electronic component protective sheet with a releasable sheet, overlap with an aluminum plate, heat press for 10 minutes at 180 ° C. and 2 MPa, then cure at 180 ° C. for 2 hours to test. made a piece. After that, it was left overnight at 25° C. and 50% RH. After that, under the same environment, the withstand voltage (dielectric breakdown voltage) was measured using a TM650 withstand voltage tester (manufactured by Tsuruga Electric Co., Ltd.).
+++: Dielectric breakdown voltage is 2.0 kV or more.
++: The dielectric breakdown voltage is 1.5 kV or more and less than 2.0 kV.
+: The dielectric breakdown voltage is 1.0 kV or more and less than 1.5 kV. (Practical level)
NG: Dielectric breakdown voltage is less than 1.0 kV.

[Dicing suitability]
The occurrence of burrs when the electronic component mounting board of each example and comparative example was subjected to a singulation process (full dicing) was evaluated using a laser microscope according to the following criteria.
+++: Sagging and burrs are not observed.
++: Less than 2 out of 25 individualized electronic component-mounted substrates had sagging and/or burrs.
+: 2 or more and less than 5 out of 25 individualized electronic component-mounted substrates with sagging and/or burrs. (Practical level)
NG: 5 or more out of 25 electronic component-mounted substrates with sagging and/or burrs.

[Identification]
(Preparation of test pieces)
A substrate was prepared by mounting 5×5 electronic components (1000 μm×1000 μm) in an array on a substrate made of glass epoxy. The thickness of the substrate is 0.3 mm, and the mold sealing thickness, ie, the height (component height) H from the top surface of the substrate to the top surface of the mold sealing material, is 0.7 mm. After that, half dicing was performed along the gap between the parts to obtain a test substrate (see FIG. 6). The half-cut groove depth was 0.8 mm (the cut groove depth of the substrate 20 was 0.1 mm), and the half-cut groove width was 200 μm. The electronic component protective sheets of each example and comparative example were thermocompression bonded to the test substrate under conditions of 8 MPa and 170° C. for 5 minutes, and the cushion material was peeled off by hand. After that, curing is performed at 180 ° C. for 2 hours, and based on Table 1, for those that require surface buffing or other processing, processing is performed so that Sq, Sdq, and FI become predetermined values. An electronic component mounting substrate of Example was obtained. After that, the resulting electronic component-mounted substrate was fully diced along the half-cut grooves to obtain 25 test pieces for each example and comparative example. Furthermore, the same operation was performed without laminating the electronic component protective sheet to obtain a test piece without the electronic component protective layer.
(Distinguishability evaluation)
One test piece with an electronic component protection layer and one test piece without electronic component protection were combined to form a set, and 10 sets of this were prepared. Then, the number of test pieces in which the electronic component protective layer was laminated and the test piece in which the electronic component protective layer was not laminated was counted. Observation was visually performed and evaluated according to the following criteria.
+++: All 10 pairs could be identified.
++: The number of identifiable pairs is 8 or more and 9 or less.
+: The number of identifiable pairs is 6 or more and less than 8. (Practical level)
NG: The number of identifiable pairs is less than 6 pairs.

[Heat cycle resistance]
A test piece was prepared by the same method as the above-mentioned [Distinguishability] evaluation, and the thermal cycle resistance evaluation was performed.
A test piece with an electronic component protective layer is put into a thermal shock device ("TSE-11-A", manufactured by Espec Co., Ltd.), high temperature exposure: 125 ° C., 15 minutes, low temperature exposure: -50 ° C., 15 minutes Exposure conditions 1000 alternating exposures were performed at . After that, the test piece was taken out, the appearance of the electronic component protective layer was observed, the number of damaged test pieces was counted, and evaluation was made according to the following criteria. The number of test pieces was 10 for each example.
+++: The number of damaged test pieces was 0.
++: The number of damaged test pieces is 1 or more and 2 or less.
+: The number of damaged test pieces is 3 or more and 5 or less. (Practical level)
NG: The number of damaged test pieces is 6 or more.

1: Substrate 2: Electronic component 3: Electronic component protective layer 4: Solder bump 5: Hollow portion 6: Electronic component protective sheet 7: Cushion material 8: Conductive layer 9: Ground 10: Electronic component mounting board 11: Has conductive layer Electronic component mounting substrate 12: Incident light 13: Measurement target surface 20: Heating pressurizer 21: Primary particles 22: Aggregate 23: Space 100: Mounting substrate

Claims (8)

An electronic component-mounted substrate, wherein an electronic component is mounted on the substrate and the electronic component is covered with an electronic component protective layer, wherein the surface of the electronic component protective layer is a flop calculated by the formula (1) An electronic component mounting substrate having an index (FI) of 0.3 to 80.

(L ^* _15° , L ^* _45° , and L ^* _110° are the offset angles of 15°, 45°, 110° is the L ^* of the L ^* a ^* b ^* color system specified in JIS Z8781-4.) 2. The electronic component mounting board according to claim 1, wherein the electronic component protective layer has an optical density (OD value) of 1 to 6 at 360 to 760 nm defined by ISO 5-2. In the L*a*b* color system defined by JIS Z8781-4 of the electronic component protective layer, the L* value is 1 to 50, the a* value is −10 to 10, and the b* value is −10 to 10. The electronic component mounting board according to claim 1, wherein the electronic component mounting board is . 2. The electronic component mounting board according to claim 1, wherein the electronic component protective layer has a surface resistance value of 1.0*10 ^{<7 >} [Omega]/[square] or more. The electronic component protective layer contains a binder resin and a granular modifier,
2. The electronic component mounting board according to claim 1, wherein the granular modifier has a DBP oil absorption of 15 to 400 ml/100 g as defined in JIS K 6217-4. 6. The electronic component mounting board according to claim 5, wherein said particulate modifier contains at least one kind of carbon black. An electronic device on which the electronic component mounting board according to any one of claims 1 to 6 is mounted. An electronic component protection sheet for covering electronic components mounted on a substrate,
The surface of the cured film obtained by heating the electronic component protection sheet at 180° C. for 60 minutes,
An electronic component protection sheet having a Flop Index (FI) of 0.3 to 80 as calculated by the formula (1).

(L ^* _15° , L ^* _45° , and L ^* _110° are the offset angles of 15°, 45°, 110° is the L ^* of the L ^* a ^* b ^* color system specified in JIS Z8781-4.)

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