WO2023008327A1 - Electronic component mounted substrate, electronic component protecting sheet, and electronic apparatus - Google Patents
Electronic component mounted substrate, electronic component protecting sheet, and electronic apparatus Download PDFInfo
- Publication number
- WO2023008327A1 WO2023008327A1 PCT/JP2022/028459 JP2022028459W WO2023008327A1 WO 2023008327 A1 WO2023008327 A1 WO 2023008327A1 JP 2022028459 W JP2022028459 W JP 2022028459W WO 2023008327 A1 WO2023008327 A1 WO 2023008327A1
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- Prior art keywords
- electronic component
- protective layer
- substrate
- component protective
- electronic
- Prior art date
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- 239000000758 substrate Substances 0.000 title claims abstract description 103
- 239000011241 protective layer Substances 0.000 claims description 186
- 239000003607 modifier Substances 0.000 claims description 64
- 229920005989 resin Polymers 0.000 claims description 53
- 239000011347 resin Substances 0.000 claims description 53
- 230000001681 protective effect Effects 0.000 claims description 38
- 238000010521 absorption reaction Methods 0.000 claims description 24
- 238000010438 heat treatment Methods 0.000 claims description 24
- 230000003287 optical effect Effects 0.000 claims description 11
- 239000011230 binding agent Substances 0.000 claims description 10
- 239000006229 carbon black Substances 0.000 claims description 8
- DOIRQSBPFJWKBE-UHFFFAOYSA-N dibutyl phthalate Chemical compound CCCCOC(=O)C1=CC=CC=C1C(=O)OCCCC DOIRQSBPFJWKBE-UHFFFAOYSA-N 0.000 description 50
- 238000000034 method Methods 0.000 description 45
- 239000010410 layer Substances 0.000 description 29
- 239000000463 material Substances 0.000 description 28
- 238000012360 testing method Methods 0.000 description 28
- 239000003921 oil Substances 0.000 description 22
- 238000001723 curing Methods 0.000 description 21
- 229920001187 thermosetting polymer Polymers 0.000 description 20
- 238000005259 measurement Methods 0.000 description 19
- 230000015556 catabolic process Effects 0.000 description 17
- 239000000428 dust Substances 0.000 description 15
- 239000003795 chemical substances by application Substances 0.000 description 14
- 238000004519 manufacturing process Methods 0.000 description 14
- YXFVVABEGXRONW-UHFFFAOYSA-N Toluene Chemical compound CC1=CC=CC=C1 YXFVVABEGXRONW-UHFFFAOYSA-N 0.000 description 12
- 239000011164 primary particle Substances 0.000 description 12
- 238000000576 coating method Methods 0.000 description 10
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 9
- 230000000052 comparative effect Effects 0.000 description 9
- 230000000694 effects Effects 0.000 description 9
- 239000000203 mixture Substances 0.000 description 9
- 229920000642 polymer Polymers 0.000 description 9
- 230000009471 action Effects 0.000 description 8
- 239000011248 coating agent Substances 0.000 description 8
- 238000011156 evaluation Methods 0.000 description 8
- 238000009413 insulation Methods 0.000 description 8
- 229920001721 polyimide Polymers 0.000 description 8
- 238000012545 processing Methods 0.000 description 8
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 7
- 238000007665 sagging Methods 0.000 description 7
- 229920005992 thermoplastic resin Polymers 0.000 description 7
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 7
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 6
- 229910000679 solder Inorganic materials 0.000 description 6
- 230000005068 transpiration Effects 0.000 description 6
- 239000004593 Epoxy Substances 0.000 description 5
- 230000003373 anti-fouling effect Effects 0.000 description 5
- 230000006870 function Effects 0.000 description 5
- 238000007689 inspection Methods 0.000 description 5
- -1 isocyanate compounds Chemical class 0.000 description 5
- 229920005749 polyurethane resin Polymers 0.000 description 5
- 230000008569 process Effects 0.000 description 5
- 238000006243 chemical reaction Methods 0.000 description 4
- 150000001875 compounds Chemical class 0.000 description 4
- 239000003822 epoxy resin Substances 0.000 description 4
- 125000000524 functional group Chemical group 0.000 description 4
- 239000011521 glass Substances 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 239000002245 particle Substances 0.000 description 4
- 229920006122 polyamide resin Polymers 0.000 description 4
- 229920000647 polyepoxide Polymers 0.000 description 4
- 229920001225 polyester resin Polymers 0.000 description 4
- 239000004645 polyester resin Substances 0.000 description 4
- 239000009719 polyimide resin Substances 0.000 description 4
- 238000007789 sealing Methods 0.000 description 4
- 239000000377 silicon dioxide Substances 0.000 description 4
- LYCAIKOWRPUZTN-UHFFFAOYSA-N Ethylene glycol Chemical compound OCCO LYCAIKOWRPUZTN-UHFFFAOYSA-N 0.000 description 3
- KFZMGEQAYNKOFK-UHFFFAOYSA-N Isopropanol Chemical compound CC(C)O KFZMGEQAYNKOFK-UHFFFAOYSA-N 0.000 description 3
- 239000002253 acid Substances 0.000 description 3
- 230000002776 aggregation Effects 0.000 description 3
- 238000004220 aggregation Methods 0.000 description 3
- 239000012298 atmosphere Substances 0.000 description 3
- 238000005520 cutting process Methods 0.000 description 3
- 230000006378 damage Effects 0.000 description 3
- 230000007547 defect Effects 0.000 description 3
- 125000002887 hydroxy group Chemical group [H]O* 0.000 description 3
- 230000006872 improvement Effects 0.000 description 3
- IQPQWNKOIGAROB-UHFFFAOYSA-N isocyanate group Chemical group [N-]=C=O IQPQWNKOIGAROB-UHFFFAOYSA-N 0.000 description 3
- 238000010030 laminating Methods 0.000 description 3
- 239000004973 liquid crystal related substance Substances 0.000 description 3
- 229910052757 nitrogen Inorganic materials 0.000 description 3
- 239000000047 product Substances 0.000 description 3
- 230000035882 stress Effects 0.000 description 3
- 239000004925 Acrylic resin Substances 0.000 description 2
- 229920000178 Acrylic resin Polymers 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 2
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- 239000004962 Polyamide-imide Substances 0.000 description 2
- PPBRXRYQALVLMV-UHFFFAOYSA-N Styrene Chemical compound C=CC1=CC=CC=C1 PPBRXRYQALVLMV-UHFFFAOYSA-N 0.000 description 2
- KKEYFWRCBNTPAC-UHFFFAOYSA-N Terephthalic acid Chemical compound OC(=O)C1=CC=C(C(O)=O)C=C1 KKEYFWRCBNTPAC-UHFFFAOYSA-N 0.000 description 2
- 238000005299 abrasion Methods 0.000 description 2
- 125000004018 acid anhydride group Chemical group 0.000 description 2
- WNLRTRBMVRJNCN-UHFFFAOYSA-N adipic acid Chemical compound OC(=O)CCCCC(O)=O WNLRTRBMVRJNCN-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- WGQKYBSKWIADBV-UHFFFAOYSA-N benzylamine Chemical compound NCC1=CC=CC=C1 WGQKYBSKWIADBV-UHFFFAOYSA-N 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 2
- IISBACLAFKSPIT-UHFFFAOYSA-N bisphenol A Chemical compound C=1C=C(O)C=CC=1C(C)(C)C1=CC=C(O)C=C1 IISBACLAFKSPIT-UHFFFAOYSA-N 0.000 description 2
- 229910052799 carbon Inorganic materials 0.000 description 2
- 229910021393 carbon nanotube Inorganic materials 0.000 description 2
- 239000002041 carbon nanotube Substances 0.000 description 2
- 125000003178 carboxy group Chemical group [H]OC(*)=O 0.000 description 2
- 239000012876 carrier material Substances 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 238000004040 coloring Methods 0.000 description 2
- 239000012141 concentrate Substances 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 238000005336 cracking Methods 0.000 description 2
- 238000004132 cross linking Methods 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 150000001993 dienes Chemical class 0.000 description 2
- 150000002009 diols Chemical class 0.000 description 2
- 230000006355 external stress Effects 0.000 description 2
- 230000002349 favourable effect Effects 0.000 description 2
- 239000011737 fluorine Substances 0.000 description 2
- 229910052731 fluorine Inorganic materials 0.000 description 2
- 229920000578 graft copolymer Polymers 0.000 description 2
- LNEPOXFFQSENCJ-UHFFFAOYSA-N haloperidol Chemical compound C1CC(O)(C=2C=CC(Cl)=CC=2)CCN1CCCC(=O)C1=CC=C(F)C=C1 LNEPOXFFQSENCJ-UHFFFAOYSA-N 0.000 description 2
- 238000007373 indentation Methods 0.000 description 2
- 230000003993 interaction Effects 0.000 description 2
- 239000002346 layers by function Substances 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 229920002521 macromolecule Polymers 0.000 description 2
- 230000007246 mechanism Effects 0.000 description 2
- 239000000178 monomer Substances 0.000 description 2
- 239000013618 particulate matter Substances 0.000 description 2
- 229920006287 phenoxy resin Polymers 0.000 description 2
- 239000013034 phenoxy resin Substances 0.000 description 2
- 229920002312 polyamide-imide Polymers 0.000 description 2
- 229920005668 polycarbonate resin Polymers 0.000 description 2
- 239000004431 polycarbonate resin Substances 0.000 description 2
- 229920000728 polyester Polymers 0.000 description 2
- 229920000098 polyolefin Polymers 0.000 description 2
- 229920003226 polyurethane urea Polymers 0.000 description 2
- 239000000843 powder Substances 0.000 description 2
- 239000002243 precursor Substances 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 238000003825 pressing Methods 0.000 description 2
- 239000011253 protective coating Substances 0.000 description 2
- 238000010992 reflux Methods 0.000 description 2
- 239000003566 sealing material Substances 0.000 description 2
- 230000035939 shock Effects 0.000 description 2
- 239000007787 solid Substances 0.000 description 2
- 239000002904 solvent Substances 0.000 description 2
- 238000005507 spraying Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 230000003746 surface roughness Effects 0.000 description 2
- 239000013076 target substance Substances 0.000 description 2
- 238000011282 treatment Methods 0.000 description 2
- XFNJVJPLKCPIBV-UHFFFAOYSA-N trimethylenediamine Chemical compound NCCCN XFNJVJPLKCPIBV-UHFFFAOYSA-N 0.000 description 2
- 229920002554 vinyl polymer Polymers 0.000 description 2
- RNFJDJUURJAICM-UHFFFAOYSA-N 2,2,4,4,6,6-hexaphenoxy-1,3,5-triaza-2$l^{5},4$l^{5},6$l^{5}-triphosphacyclohexa-1,3,5-triene Chemical compound N=1P(OC=2C=CC=CC=2)(OC=2C=CC=CC=2)=NP(OC=2C=CC=CC=2)(OC=2C=CC=CC=2)=NP=1(OC=1C=CC=CC=1)OC1=CC=CC=C1 RNFJDJUURJAICM-UHFFFAOYSA-N 0.000 description 1
- PTBDIHRZYDMNKB-UHFFFAOYSA-N 2,2-Bis(hydroxymethyl)propionic acid Chemical compound OCC(C)(CO)C(O)=O PTBDIHRZYDMNKB-UHFFFAOYSA-N 0.000 description 1
- IMSODMZESSGVBE-UHFFFAOYSA-N 2-Oxazoline Chemical compound C1CN=CO1 IMSODMZESSGVBE-UHFFFAOYSA-N 0.000 description 1
- 125000003504 2-oxazolinyl group Chemical group O1C(=NCC1)* 0.000 description 1
- CMLFRMDBDNHMRA-UHFFFAOYSA-N 2h-1,2-benzoxazine Chemical compound C1=CC=C2C=CNOC2=C1 CMLFRMDBDNHMRA-UHFFFAOYSA-N 0.000 description 1
- BCHZICNRHXRCHY-UHFFFAOYSA-N 2h-oxazine Chemical group N1OC=CC=C1 BCHZICNRHXRCHY-UHFFFAOYSA-N 0.000 description 1
- SXFJDZNJHVPHPH-UHFFFAOYSA-N 3-methylpentane-1,5-diol Chemical compound OCCC(C)CCO SXFJDZNJHVPHPH-UHFFFAOYSA-N 0.000 description 1
- 241001550224 Apha Species 0.000 description 1
- 238000012935 Averaging Methods 0.000 description 1
- 229910001369 Brass Inorganic materials 0.000 description 1
- 229920000049 Carbon (fiber) Polymers 0.000 description 1
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- JOYRKODLDBILNP-UHFFFAOYSA-N Ethyl urethane Chemical compound CCOC(N)=O JOYRKODLDBILNP-UHFFFAOYSA-N 0.000 description 1
- 229910018119 Li 3 PO 4 Inorganic materials 0.000 description 1
- 229920000106 Liquid crystal polymer Polymers 0.000 description 1
- 239000004977 Liquid-crystal polymers (LCPs) Substances 0.000 description 1
- 240000007594 Oryza sativa Species 0.000 description 1
- 235000007164 Oryza sativa Nutrition 0.000 description 1
- 239000004952 Polyamide Substances 0.000 description 1
- 239000005062 Polybutadiene Substances 0.000 description 1
- 239000004698 Polyethylene Substances 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 239000004743 Polypropylene Substances 0.000 description 1
- 239000004793 Polystyrene Substances 0.000 description 1
- OFOBLEOULBTSOW-UHFFFAOYSA-N Propanedioic acid Natural products OC(=O)CC(O)=O OFOBLEOULBTSOW-UHFFFAOYSA-N 0.000 description 1
- 239000004809 Teflon Substances 0.000 description 1
- 229920006362 Teflon® Polymers 0.000 description 1
- BZHJMEDXRYGGRV-UHFFFAOYSA-N Vinyl chloride Chemical compound ClC=C BZHJMEDXRYGGRV-UHFFFAOYSA-N 0.000 description 1
- 239000003082 abrasive agent Substances 0.000 description 1
- 239000006230 acetylene black Substances 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 235000011037 adipic acid Nutrition 0.000 description 1
- 239000001361 adipic acid Substances 0.000 description 1
- 238000005054 agglomeration Methods 0.000 description 1
- 229920000180 alkyd Polymers 0.000 description 1
- 125000003277 amino group Chemical group 0.000 description 1
- 229920003180 amino resin Polymers 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 125000003118 aryl group Chemical group 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 150000001541 aziridines Chemical class 0.000 description 1
- 125000004069 aziridinyl group Chemical group 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 230000027455 binding Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000005422 blasting Methods 0.000 description 1
- 230000000740 bleeding effect Effects 0.000 description 1
- 229920001400 block copolymer Polymers 0.000 description 1
- 239000010951 brass Substances 0.000 description 1
- FPCJKVGGYOAWIZ-UHFFFAOYSA-N butan-1-ol;titanium Chemical compound [Ti].CCCCO.CCCCO.CCCCO.CCCCO FPCJKVGGYOAWIZ-UHFFFAOYSA-N 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 239000004917 carbon fiber Substances 0.000 description 1
- 239000011203 carbon fibre reinforced carbon Substances 0.000 description 1
- 150000001732 carboxylic acid derivatives Chemical class 0.000 description 1
- 239000012461 cellulose resin Substances 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 230000000739 chaotic effect Effects 0.000 description 1
- 239000007795 chemical reaction product Substances 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000011651 chromium Substances 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 238000013329 compounding Methods 0.000 description 1
- 239000011231 conductive filler Substances 0.000 description 1
- 230000008602 contraction Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 230000006837 decompression Effects 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000007607 die coating method Methods 0.000 description 1
- 229910001873 dinitrogen Inorganic materials 0.000 description 1
- 238000003618 dip coating Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 230000009881 electrostatic interaction Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 125000003700 epoxy group Chemical group 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 239000000835 fiber Substances 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 239000003063 flame retardant Substances 0.000 description 1
- 230000004927 fusion Effects 0.000 description 1
- 230000009477 glass transition Effects 0.000 description 1
- 229910002804 graphite Inorganic materials 0.000 description 1
- 239000010439 graphite Substances 0.000 description 1
- 238000007756 gravure coating Methods 0.000 description 1
- 238000013007 heat curing Methods 0.000 description 1
- 239000012943 hotmelt Substances 0.000 description 1
- 239000004615 ingredient Substances 0.000 description 1
- 239000011256 inorganic filler Substances 0.000 description 1
- 229910003475 inorganic filler Inorganic materials 0.000 description 1
- 239000010954 inorganic particle Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- 239000012948 isocyanate Substances 0.000 description 1
- 239000003273 ketjen black Substances 0.000 description 1
- 238000007759 kiss coating Methods 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 230000031700 light absorption Effects 0.000 description 1
- 239000012263 liquid product Substances 0.000 description 1
- VZCYOOQTPOCHFL-UPHRSURJSA-N maleic acid Chemical compound OC(=O)\C=C/C(O)=O VZCYOOQTPOCHFL-UPHRSURJSA-N 0.000 description 1
- 239000011976 maleic acid Substances 0.000 description 1
- 238000000691 measurement method Methods 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 125000004184 methoxymethyl group Chemical group [H]C([H])([H])OC([H])([H])* 0.000 description 1
- 239000011859 microparticle Substances 0.000 description 1
- 239000012046 mixed solvent Substances 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 239000002055 nanoplate Substances 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- 150000002902 organometallic compounds Chemical class 0.000 description 1
- AHHWIHXENZJRFG-UHFFFAOYSA-N oxetane Chemical compound C1COC1 AHHWIHXENZJRFG-UHFFFAOYSA-N 0.000 description 1
- 125000003566 oxetanyl group Chemical group 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
- 239000003208 petroleum Substances 0.000 description 1
- ISWSIDIOOBJBQZ-UHFFFAOYSA-N phenol group Chemical group C1(=CC=CC=C1)O ISWSIDIOOBJBQZ-UHFFFAOYSA-N 0.000 description 1
- 229920001568 phenolic resin Polymers 0.000 description 1
- 239000005011 phenolic resin Substances 0.000 description 1
- 150000002989 phenols Chemical class 0.000 description 1
- 229920003023 plastic Polymers 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 239000002985 plastic film Substances 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000007517 polishing process Methods 0.000 description 1
- 229920000747 poly(lactic acid) Polymers 0.000 description 1
- 229920003223 poly(pyromellitimide-1,4-diphenyl ether) Polymers 0.000 description 1
- 229920002647 polyamide Polymers 0.000 description 1
- 229920002857 polybutadiene Polymers 0.000 description 1
- 229920000573 polyethylene Polymers 0.000 description 1
- 229920000139 polyethylene terephthalate Polymers 0.000 description 1
- 239000005020 polyethylene terephthalate Substances 0.000 description 1
- 239000004626 polylactic acid Substances 0.000 description 1
- 229920005672 polyolefin resin Polymers 0.000 description 1
- 229920001155 polypropylene Polymers 0.000 description 1
- 229920002223 polystyrene Polymers 0.000 description 1
- 239000004800 polyvinyl chloride Substances 0.000 description 1
- 229920000915 polyvinyl chloride Polymers 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 230000001737 promoting effect Effects 0.000 description 1
- 230000009993 protective function Effects 0.000 description 1
- 238000010926 purge Methods 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 239000011342 resin composition Substances 0.000 description 1
- 235000009566 rice Nutrition 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 125000005372 silanol group Chemical group 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229920002050 silicone resin Polymers 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
- 238000003786 synthesis reaction Methods 0.000 description 1
- 238000010345 tape casting Methods 0.000 description 1
- 150000003505 terpenes Chemical class 0.000 description 1
- 235000007586 terpenes Nutrition 0.000 description 1
- 238000010998 test method Methods 0.000 description 1
- 238000005979 thermal decomposition reaction Methods 0.000 description 1
- 229920002725 thermoplastic elastomer Polymers 0.000 description 1
- 239000012815 thermoplastic material Substances 0.000 description 1
- 125000003396 thiol group Chemical group [H]S* 0.000 description 1
- DVKJHBMWWAPEIU-UHFFFAOYSA-N toluene 2,4-diisocyanate Chemical compound CC1=CC=C(N=C=O)C=C1N=C=O DVKJHBMWWAPEIU-UHFFFAOYSA-N 0.000 description 1
- VZCYOOQTPOCHFL-UHFFFAOYSA-N trans-butenedioic acid Natural products OC(=O)C=CC(O)=O VZCYOOQTPOCHFL-UHFFFAOYSA-N 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
- TWQULNDIKKJZPH-UHFFFAOYSA-K trilithium;phosphate Chemical compound [Li+].[Li+].[Li+].[O-]P([O-])([O-])=O TWQULNDIKKJZPH-UHFFFAOYSA-K 0.000 description 1
- 238000007666 vacuum forming Methods 0.000 description 1
- 125000000391 vinyl group Chemical group [H]C([*])=C([H])[H] 0.000 description 1
- 230000000007 visual effect Effects 0.000 description 1
- 238000011179 visual inspection Methods 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/285—Permanent coating compositions
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
Definitions
- the present disclosure relates to an electronic component mounting board, an electronic component protection sheet, and an electronic device.
- Patent Document 1 discloses a moisture-proof sheet for electronic device parts, which is characterized by comprising a moisture-proof layer made of a forming material containing an aromatic vinyl-conjugated diene block copolymer as a main component.
- Patent Document 2 discloses a substrate protection sheet comprising a graft copolymer of an olefinic monomer, an ethylenically unsaturated carboxylic acid, and an ethylenically unsaturated aromatic monomer.
- Patent Documents 3 and 4 disclose a sheet-like resin composition comprising an epoxy resin, an inorganic filler and a flame retardant.
- Patent Document 5 discloses a manufacturing method of a mounting structure that covers a mounting component and a substrate with a laminated sheet including a first heat conductive layer and a second heat conductive layer.
- Patent Literature 6 discloses a flexible printed wiring board provided with an electrical insulating layer having an average surface roughness within a specific range and a conductor layer.
- Patent Document 7 discloses a configuration in which the surface of a flexible circuit body having an insulating film, a wiring layer formed on the insulating film, and an insulating layer formed on the wiring layer is coated with a thermoplastic elastomer.
- Patent Literature 8 discloses an electronic component mounting substrate having an electromagnetic wave shielding layer containing a conductive filler and a binder resin, in which electronic components are covered with an electromagnetic wave shielding member having kurtosis within a specific range.
- An electronic component protective layer laminated on an electronic component mounting substrate is required to have high insulation properties because it serves to provide an insulating coating for the underlying electronic components and substrate.
- a dicing process may be performed in which electronic components are mounted, for example, in an array on a large substrate and separated into specific component sections. In this case, dicing suitability is required in the electronic component protective layer. If the electronic component protective layer is not suitable for dicing, the cut surface of the electronic component protective layer may be sagging or burred due to the stress caused by dicing.
- the burr referred to in this specification refers to curling of the electronic component protective layer starting from the cut surface of the electronic component protective layer.
- the electronic component mounting board is used in various temperature environments after it is incorporated in the electronic device, the electronic component protective layer is exposed to sudden temperature changes, and the electronic component protective layer itself may be damaged. be. For this reason, there is a strong demand for an electronic component protective layer that is excellent in thermal cycle resistance.
- Electronic component mounting boards are not allowed to have dust and dirt on them due to the convenience of being incorporated into electronic equipment.
- an electronic component protective layer with unremovable dust stuck in irregularities may be judged as unpractical in the inspection process and discarded. Therefore, there is a demand for an electronic component protective layer that is excellent in antifouling properties.
- the electronic component protective layer when inspecting the quality of the electronic component protective layer (whether there are cracks in the corners or excessive flow at the edges, etc.), if the electronic component protective layer itself is not colored, it cannot be visually recognized. There is a problem with inspection accuracy, such as overlooking a part.
- the chip is simply colored black or the like, for example, it is difficult to identify the defective portion on the chip sealed with the black sealing resin on the electronic component, and this also poses a problem in the inspection accuracy.
- the present disclosure has been made in view of the above problems, and the first object thereof is to provide an electronic component mounting board having excellent insulation, excellent thermal cycle resistance, and excellent dicing suitability, and an electronic component It is to provide a protective sheet.
- a second object of the present invention is to provide a high-quality electronic component protection sheet having high antifouling properties and excellent identifiability, and an electronic component mounting board having the same.
- the surface of the electronic component protective layer is The root mean square height Sq determined in accordance with ISO 25178-2:2012 is 0.01 to 10 ⁇ m, and satisfies the following formulas (2) and (3).
- OD value optical density
- the electronic component mounting board according to any one of the above. [5]: L* is 1 to 50, a* is ⁇ 10 to 10, and b* is ⁇ 10 in the L*a*b* color system defined by JIS Z8781-4 of the electronic component protective layer
- the electronic component protective layer contains a binder resin and a granular modifier, The electronic component mounting board according to any one of [1] to [6], wherein the granular modifier has a DBP oil absorption defined by JIS K 6217-4 of 15 to 400 ml/100 g.
- An electronic component protection sheet for covering electronic components mounted on a substrate, The surface of the cured film obtained by heating the electronic component protection sheet at 180° C.
- FI Flop Index
- L * 15° , L * 45° , and L * 110° are the offset angles of 15°, 45°, 110° is the L * of the L * a * b * color system specified in JIS Z8781-4.
- An electronic component protection sheet for covering and protecting one electronic component or a group of electronic components consisting of a plurality of electronic components mounted on a substrate, The surface of the cured film obtained by heating the electronic component protection sheet at 180° C. for 60 minutes, The root mean square height Sq determined in accordance with ISO 25178-2:2012 is 0.01 to 10 ⁇ m, and satisfies the following formulas (2) and (3).
- an electronic component mounting board having excellent insulation, excellent thermal cycle resistance, and excellent dicing suitability, and an electronic component protective sheet. Effective.
- a high-quality electronic component protective sheet having high antifouling properties and excellent identifiability, and an electronic component mounting substrate provided with the same. play.
- FIG. 1 is a schematic cross-sectional view of an electronic component mounting board according to this embodiment
- FIG. FIG. 4 is a diagram explaining a Flop Index (FI) measurement system; It is a figure explaining FI measurement system. It is a figure explaining FI measurement system. It is a figure which shows an example of the aggregate of the granularity modifier of this embodiment. It is a typical figure showing the manufacturing process of the electronic component mounting substrate of the present embodiment.
- 1 is a schematic cross-sectional view of an electronic component mounting board having a conductive layer according to this embodiment;
- FIG. 1 is a schematic cross-sectional view of a test substrate according to this embodiment;
- FIG. FIG. 4 is a schematic top view for explaining a substrate for a water vapor transpiration test;
- FIG. 4 is a schematic top view for explaining a substrate for a water vapor transpiration test;
- FIG. 7B is a cross-sectional view of the VIIC-VIIC section of FIG. 7B;
- the electronic component mounting substrate 10 of the first embodiment includes a substrate 1, one or more electronic components 2 mounted on the substrate, a part or all of the electronic components 2, and the substrate 1.
- An electronic component protective layer 3 that covers and protects the The electronic component protective layer 3 covers the substrate 1 and the upper surface of the electronic component 2 to the substrate 1.
- the side surface of the stepped portion formed by mounting the electronic component 2 and the substrate Cover at least a portion.
- the electronic component protective layer 3 is not limited to a configuration in which the electronic component protective layer 3 is coated so as to follow the shape of the electronic component 2, and includes an aspect in which the electronic component 2 and the substrate 1 are formed so as to cover the electronic component 2. do.
- the electronic component 2 may be electrically connected to the substrate via solder bumps 4, or the connection terminals extending from the electronic component may be directly connected to the substrate.
- the electronic component protective layer 3 may cover and protect the electronic component 2 and the substrate 1 so as to maintain the hollow portion 5 , or may cover and protect the hollow portion 5 so as to fill the hollow portion 5 .
- the electronic component protective layer can be produced, for example, by the method described later.
- the electronic component protective layer is for covering and protecting the electronic component mounted on the substrate as described above.
- the root-mean-square height Sq (hereinafter also referred to as Sq) is a surface texture parameter defined by the following formula (4) in ISO 25178-2:2012.
- A represents the area of the defining surface.
- the root-mean-square height Sq can be calculated by processing the coordinate data of the surface shape obtained with either an optical microscope, a laser microscope, or an electron microscope, using analysis software.
- the root-mean-square height Sq represents the root-mean-square height of irregularities on the defined surface, and represents the standard deviation of surface roughness.
- the surface of the electronic component protective layer in the first embodiment preferably has a root-mean-square height Sq of 0.15 to 1.0 ⁇ m, determined according to ISO 25178-2:2012.
- Sq root-mean-square height
- the root-mean-square slope Sdq (hereinafter also referred to as Sdq) is a surface texture parameter defined by the following formula (5) in ISO 25178-2:2012.
- A is the area of the defined surface
- ⁇ x is the x-axis direction
- ⁇ y is the y-axis direction
- ⁇ z(x, y) is the z-axis direction.
- the root-mean-square slope Sdq can be calculated by processing the coordinate data of the surface profile obtained with either an optical microscope, a laser microscope, or an electron microscope, using analysis software.
- the root-mean-square slope Sdq represents the root-mean-square slope of all points on the defined surface, and is a parameter that expresses the steepness of the unevenness on the defined surface.
- the surface of the electronic component protective layer in the first embodiment preferably has a root-mean-square slope Sdq of 0.0001 to 5, determined according to ISO 25178-2:2012.
- the antifouling property of the electronic component protective layer can be improved.
- the root-mean-square slope Sdq is set to 0.0001 or more, the electronic component protective layer can be provided with an appropriate unevenness slope, and adhesion of dust can be suppressed.
- the root-mean-square slope Sdq to 5 or less it is possible to suppress fine dust and dirt from adhering to the uneven wall surface of the electronic component protective layer.
- the root-mean-square slope Sdq of the electronic component protective layer is more preferably 0.0005 to 4.5, even more preferably 0.001 to 4, and particularly 0.005 to 3.5. preferable.
- FI ⁇ Flop Index (FI) ⁇ Flop Index (FI)
- FI Flop Index
- FIG. 2A The FI measurement system is shown in FIG. 2A.
- FI irradiates light (incident light 12) at an incident angle of 45° with respect to the direction perpendicular to the measurement target surface 13, detects light reflected at a certain angle (specularly reflected light) by a detector, and obtains a numerical value calculated using the converted lightness L * .
- L * is the lightness L * in the L * a * b * color system defined in JIS Z8781-4, and L * 15° , L * 45° , and L * 110° are perpendicular to the surface of the object to be measured.
- the FI is an index for evaluating the roughness of the surface to be measured and the orderliness of the surface irregularities.
- FIG. 2B when the surface of the object to be measured is highly uneven and chaotic, the incident light 12 is reflected (scattered) at all angles, so the angle dependence of the amount of light detected is small. As a result, the value of FI calculated by Equation (1) becomes a small value.
- FIG. 2C when the unevenness of the surface of the object to be measured is smooth and highly ordered, the incident light 12 is strongly reflected at a constant angle. Become. In particular, among the light observed at the offset angles of 15°, 45°, and 110°, the amount of light at 15° increases, so FI takes a large value.
- the FI of the surface of the electronic component protective layer in the first embodiment is 0.3-80.
- the dicing aptitude and voltage resistance (dielectric breakdown voltage) of the electronic component protective layer can be improved.
- the FI is 0.3 or more, it is possible to impart a certain degree of orderliness to the uneven shape of the surface of the electronic component protective layer.
- voltage resistance (dielectric breakdown voltage) improves.
- the FI of the surface of the electronic component protective layer is 80 or less, it is possible to impart a certain degree of disorder to the uneven shape of the surface. On a surface with a highly ordered uneven shape, external stress applied by cutting or the like tends to concentrate at a specific location. Dicing aptitude is improved. Moreover, thermal cycle resistance can be improved.
- the FI of the surface of the electronic component protective layer is more preferably 1-75, still more preferably 3-50, and particularly preferably 5-26.
- the inventors of the present invention found that by setting the FI of the surface of the electronic component protective layer to 5 to 26, the thermal cycle resistance is further improved. Since electronic component-mounted substrates are used in various temperature environments after they are incorporated into electronic equipment, the electronic component protective layer may be exposed to rapid temperature changes. When the FI of the surface of the electronic component protective layer is within a specific range and the surface unevenness has a certain degree of disorder, the stress caused by the expansion and contraction of the electronic component protective layer due to a sudden temperature change is appropriately dispersed. Therefore, it is possible to prevent the electronic component protective layer from being damaged when the temperature changes.
- the method of controlling the root-mean-square height Sq, the root-mean-square slope Sdq, and Flop Index (FI) of the surface of the electronic component protective layer can be a conventionally known method for adjusting the surface shape of an object, Different methods can be applied, or a common method can be applied. Specifically, a method of polishing the surface using abrasive cloth and paper, a shot blasting method of spraying an abrasive material on the surface of the electronic component protective layer with compressed air, a predetermined root mean square height Sq, a root mean square inclination Sdq, or A method of forming an electronic component protection sheet 6 (see FIG.
- Optical density (hereinafter also abbreviated as OD value) is the attenuation rate of incident light that passes through an object, and is a parameter calculated by Equation (6).
- PI represents the amount of incident light at a specific wavelength
- PT represents the amount of transmitted light at the specific wavelength. Since the attenuation rate of incident light increases as the optical density (OD value) increases, it can be said that the light shielding property of the object is good.
- the optical density (OD value) As shown in FIG. 1, in the structure in which the electronic component protective layer 3 is laminated on the electronic component 2, the higher the optical density (OD value) of the electronic component protective layer 3, the higher the light shielding property.
- the optical density (OD value) at 360 to 760 nm (visible light region) defined by ISO 5-2 of the electronic component protective layer is preferably in the range of 0.5 to 6. and more preferably in the range of 2 to 6.
- the electronic component protective layer there is a need for a technology to improve the accuracy of quality checks, such as whether there are cracks at the edge of the electronic component, or whether the edge of the electronic component protective layer is flowing too much (bleeding out).
- There is a method of coloring the electronic component protective layer black but simply coloring it black makes it difficult to distinguish, for example, on a chip sealed with black sealing resin on the electronic component. It is According to the electronic component protective layer of the first embodiment, by setting the OD value within the above range, the electronic component protective layer itself can be appropriately colored, the visibility can be improved, and the inspection accuracy can be effectively improved.
- Examples of methods for increasing the OD value of the electronic component protective layer include a method of using a binder resin that exhibits high light absorption characteristics and a method of including a filler that scatters incident light.
- the above-mentioned scattering effect of incident light can also be obtained with the granular modifier described later, and by controlling the type and / or amount of the granular modifier, the OD value of the electronic component protective layer is set to the desired range. becomes possible.
- the electronic component protective layer of the first embodiment has an L * value of 1 to 50, an a * value of ⁇ 10 to 10, and a b * value in the L * a * b * color system defined by JIS Z8781-4. is preferably -10 to 10.
- L * a * b * values are coordinate axes representing the color space.
- L * is the dimension denoting lightness, a * and b * denoting complementary color dimensions.
- L * is L * 45 in FI measurements.
- the L * value is more preferably 1-40, even more preferably 1-30.
- the a * value and b * value are more preferably -5 to 5, and even more preferably -3 to 3.
- the electronic component protective layer of the first embodiment can be used to form an electronic component protective layer on any color electronic component and substrate.
- the protective layer can be visually recognized, and the inspection accuracy can be significantly improved.
- the electronic component protective layer has excellent insulating properties because it is necessary to cover and protect conductive materials such as electronic components and electric circuits mounted on the electronic component mounting board.
- the surface resistance value of the electronic component protective layer is preferably 1.0 ⁇ 10 7 ⁇ / ⁇ or more, more preferably 1.0 ⁇ 10 8 ⁇ / ⁇ or more, and 1.0 More preferably, it is x10 9 ⁇ / ⁇ or more.
- the electronic component protective layer contains a binder resin.
- the binder resin becomes the base of the electronic component protective layer. It contains a granularity modifier and other optional ingredients, which will be described later.
- the binder resin can be a thermoplastic resin or a thermosetting resin and a curing agent, or can be used in combination.
- Thermoplastic resins include polyolefin resins, vinyl resins, styrene/acrylic resins, diene resins, terpene resins, petroleum resins, cellulose resins, polyamide resins, polyurethane resins, polyester resins, polycarbonate resins, polyimide resins, and liquid crystals. Examples include polymers and fluororesins. Polyamide resins, polyurethane resins, polyester resins, polycarbonate resins, polyimide resins, liquid crystal polymers, and fluorine resins are more preferable from the viewpoint of heat resistance, although they are not particularly limited.
- the thermoplastic resin can be used alone or in combination of two or more.
- thermosetting resin is a resin having multiple functional groups capable of reacting with a curing agent.
- Functional groups include, for example, hydroxyl group, phenolic hydroxyl group, acid anhydride group, methoxymethyl group, carboxyl group, amino group, epoxy group, oxetanyl group, oxazoline group, oxazine group, aziridine group, thiol group, isocyanate group, blocked Isocyanate groups, blocked carboxyl groups, silanol groups and the like can be mentioned.
- Thermosetting resins include, for example, acrylic resins, maleic acid resins, polybutadiene resins, polyester resins, polyurethane resins, polyurethane urea resins, epoxy resins, oxetane resins, phenoxy resins, polyimide resins, polyamide resins, polyamideimide resins, and phenolic resins.
- Known resins such as resins, alkyd resins, amino resins, polylactic acid resins, oxazoline resins, benzoxazine resins, silicone resins and fluorine resins can be used.
- Thermosetting resins can be used alone or in combination of two or more.
- polyurethane resins polyurethane urea resins, polyester resins, epoxy resins, phenoxy resins, polyimide resins, polyamide resins, and polyamideimide resins are preferable from the viewpoint of heat resistance.
- the curing agent has multiple functional groups capable of reacting with the functional groups of the thermosetting resin.
- Examples of curing agents include known compounds such as epoxy compounds, acid anhydride group-containing compounds, isocyanate compounds, aziridine compounds, amine compounds, phenol compounds, and organometallic compounds. Curing agents can be used alone or in combination of two or more.
- the curing agent is preferably contained in 1 to 50 parts by mass of each type per 100 parts by mass of the thermosetting resin.
- the amount of the curing agent is 1 part by mass or more, a strong crosslinked structure is formed in the electronic component protective layer, and voltage resistance (dielectric breakdown voltage) is improved.
- the amount of the curing agent is 50 parts by mass or less, excessive curing of the electronic component protective layer is suppressed, and in the manufacturing process of the electronic component mounting board described later, the electronic component protective sheet 6 (Fig. 4 ) can be deformed following the shape of the electronic component to form a defect-free electronic component protective layer.
- the curing agent is more preferably contained in 3 to 45 parts by mass, more preferably 5 to 40 parts by mass, per 100 parts by mass of the thermosetting resin.
- the electronic component protective layer preferably contains a granular modifier.
- the granular modifier is used mainly for the purpose of setting the root-mean-square height Sq, root-mean-square tilt Sdq, and Flop Index (FI) of the electronic component protective layer within desired ranges.
- the mechanical properties such as the elastic modulus, Young's modulus, and indentation hardness of the electronic component protective layer can be controlled within favorable ranges by appropriately changing the type and amount of the particulate modifier.
- the granular modifier preferably has a DBP oil absorption of 15 to 400 ml/100 g as defined by JIS K 6217-4.
- Dicing aptitude can be improved when the DBP oil absorption of the granular modifier is 15 to 400 ml/100 g.
- the improvement in dicing aptitude is presumed to be caused by the presumed action described later, but the action mechanism of the effect in the first embodiment is not limited to the presumed action.
- DBP oil absorption refers to the amount of DBP (dibutyl phthalate) that a target substance can absorb, and can be used as an index for understanding the degree of aggregate development of the granular modifier described later.
- the base microparticles (hereinafter, primary particles 21) are aggregated, bound, or fused to form secondary particle-like bound bodies (hereinafter, aggregates 22).
- aggregates 22 are aggregated, bound, or fused to form secondary particle-like bound bodies.
- FIG. 3 shows a schematic diagram of aggregates of granular modifiers.
- the primary particles 21 of the granular modifier have the property of gathering together due to a plurality of inter-particle interactions such as electrostatic interactions, and aggregation, binding, or fusion of the plurality of primary particles 21 causes agglomeration.
- a gate 22 is formed.
- the primary particles agglomerate the primary particles 21 are not always packed closely, and spaces 23 are generated in the aggregates 22 .
- the granular modifier is immersed in a liquid such as oil or polymer solution, low-molecular weight or high-molecular weight molecules in the liquid enter the space 23 in the aggregate.
- the estimated action is affected by the size of the space in the aggregate. That is, the more the aggregates develop and become larger, the more difficult it becomes for the primary particles to agglomerate in a close-packed manner, and a wider space or a greater number of spaces are formed. As a result, the particulate modifier forms a higher-density pseudo-crosslinked structure, and the electronic component protective layer obtains higher strength.
- DBP oil absorption is used as an index for measuring the size of the space.
- the DBP oil absorption has a positive correlation with the amount of DBP (dibutyl phthalate) that can be absorbed by the target substance, that is, with the total volume of space in the aggregate.
- DBP dibutyl phthalate
- the above is the presumed function of improving the strength of the electronic component protective layer by the particulate modifier.
- the action mechanism of the effect in the first embodiment is not limited to the presumed action.
- the granular modifier used in the first embodiment has a DBP oil absorption of 15 to 400 ml/100 g as defined by JIS K 6217-4.
- the DBP oil absorption of the granular modifier is 15 ml/100 g or more, the degree of aggregate development can be made sufficient, and a sufficient pseudo-crosslinking effect can be produced.
- the electronic component mounting board on which the electronic component protective layer is laminated is diced, the electronic component protective layer can be prevented from sagging.
- the DBP oil absorption of the granular modifier is 400 ml/100 g or less, it prevents a large amount of polymer from being taken into the granular modifier, suppresses the occurrence of areas where the polymer is insufficient, and protects electronic parts.
- the DBP oil absorption of the granular modifier is more preferably 30 to 350 ml/100 g, more preferably 50 to 250 ml/100 g.
- the content of the particulate modifier in 100% by mass of the electronic component protective layer is preferably 1 to 30% by mass.
- the content of the particulate modifier is 1% by mass or more, a sufficient pseudo-crosslinking effect can be produced in the electronic component protective layer, and the suitability for dicing is further improved.
- the content of the granular modifier is 30% by mass or less, a large amount of polymer is prevented from being incorporated into the granular modifier, suppressing the occurrence of regions lacking polymer in the electronic component protective layer, and dicing suitability. is better. More preferably, the particulate modifier content in the electronic component protective layer is 5 to 20% by mass.
- particulate modifiers include, but are not limited to, carbon-based particles such as carbon black, carbon nanotubes, graphite, carbon fibers, and carbon nanoplates, as long as they have the effect of improving the dicing aptitude of the electronic component protective layer. , or inorganic particles such as trilithium phosphate (Li 3 PO 4 ) described in JP-A-2018/185938 and silica described in WO 2016/021467.
- inorganic particles such as trilithium phosphate (Li 3 PO 4 ) described in JP-A-2018/185938 and silica described in WO 2016/021467.
- a known one can be used as long as it has aggregation and the DBP oil absorption can be measured.
- Carbon black can include those classified as ketjen black and acetylene black as well as those not classified as described above.
- these granular modifiers do not cause excessive entangled self-aggregation like fibrous carbon nanotubes, they generate a strong interaction with the polymer, so they can be uniformly dispersed in the electronic component protective layer. It is preferable because cracking during dicing can be suppressed.
- the granular modifier preferably has a volume resistivity of 1.0 ⁇ 10 ⁇ 3 ⁇ cm or more from the viewpoint of imparting insulation to the electronic component protective layer.
- the volume resistivity of the granular modifier is more preferably 1.0 ⁇ 10 7 ⁇ cm or more, and even more preferably 1.0 ⁇ 10 13 ⁇ cm or more.
- the volume resistivity of the substance contained in the granular modifier can be measured according to JIS C2141. Although the upper limit of the volume resistivity is not limited, it is usually 1.0 ⁇ 10 17 ⁇ cm or less.
- One type of granular modifier may be used alone, or two or more types may be used in combination. By using two or more types of granular modifiers in combination, each characteristic can be complemented.
- carbon black (DBP oil absorption: 100 ml/100 g, volume resistivity: 1.6 ⁇ 10 ⁇ 5 ⁇ cm) is used as the first granular modifier
- silica (DBP Oil absorption: 220 ml/100 g, volume resistivity: 1.6 ⁇ 10 16 ⁇ cm)
- carbon black improves dicing resistance and distinguishability
- silica improves dicing resistance and dielectric breakdown voltage. Such a thing becomes possible.
- the thickness of the electronic component protective layer is preferably 10 to 1000 ⁇ m from the viewpoint of achieving both improvement in dielectric breakdown voltage and reduction in thickness.
- the thickness of the electronic component protective layer is more preferably 15 to 500 ⁇ m, still more preferably 20 to 250 ⁇ m.
- the electronic component protective sheet 6 is a precursor product of the electronic component protective layer, and is an insulating resin sheet.
- the electronic component protective sheet contains a thermosetting resin
- the electronic component protective sheet is heated at a temperature for a predetermined time or longer to cause a curing reaction, thereby forming the electronic component protective layer.
- the electronic component protective sheet may have a peelable sheet on one side or both sides for surface protection.
- a cushioning material used in the step of covering and protecting with an electronic component protection sheet, which will be described later, may be laminated in advance.
- the method for producing the electronic component protective sheet is not particularly limited, but for example, a method of applying a composition obtained by dissolving a material such as the binder resin that forms the electronic component protective layer in a solvent or the like to a release sheet.
- coating methods include gravure coating, kiss coating, die coating, lip coating, comma coating, blade coating, roll coating, knife coating, spray coating, bar coating, spin coating, and dip coating. , or various printing methods.
- two or more electronic component protection sheets may be laminated to achieve a desired thickness.
- the structure laminated as described above may be composed only of the electronic component protective sheet, or may include a layer having a specific function as an intermediate layer.
- the electronic component protection sheet of the first embodiment exhibits a practically sufficient adhesive strength regardless of whether the substrate is metal, resin, fiber, ceramic, glass, or conductive silicon.
- Metals that can be used include aluminum, copper, brass, stainless steel, iron, and chromium.
- the resin epoxy resin, polyethylene terephthalate, polyimide, polyamide, polyethylene, polypropylene, polyolefin graft polymer, polystyrene, polyvinyl chloride and the like can be used. Therefore, the present electronic component protection sheet can be suitably used for adhesion between different materials having different polarities.
- the electronic component protection sheet of the first embodiment can be suitably used to protect various substrates, such as rigid substrates and FPC substrates.
- Electronic component mounting substrates using the electronic component protection sheet of the first embodiment are preferably provided in electronic devices such as notebook PCs, mobile phones, smartphones, tablet terminals, etc., in addition to liquid crystal displays and touch panels.
- a method for manufacturing an electronic component-mounted substrate using the electronic component protection sheet of the first embodiment (hereinafter sometimes abbreviated as a coating protection method, a coating method, or a protection method) will be described.
- a method for manufacturing an electronic component mounting board according to the first embodiment comprises a step of mounting one or more electronic components on the board (step i), a step of preparing an electronic component protection sheet (step ii), and , the step of placing the electronic component protective sheet so that the electronic component protective sheet is in contact with the highest electronic component (step iii, also referred to as temporary sticking step), and the electronic component protective sheet is individually separated by heat and pressure.
- Step iv Deformation along the shape of the electronic component to cover at least a portion of the electronic component and the substrate (step iv); Curing of the deformed electronic component protective sheet in the deformed state to form an electronic component protective layer. It can be produced through (step v). Through these steps, an electronic component mounting substrate coated and protected by an electronic component protective layer formed from the electronic component protective sheet of the first embodiment is obtained. Step iv and step v can also be a series of steps.
- Step iii electronic component protection sheet placement step
- An electronic component mounting substrate (also referred to as a mounting substrate) 100 is prepared in which the electronic components 2a and the electronic components 2b are mounted on the substrate 1 by means of the solder bumps 4.
- the electronic components 2 are semiconductor chips, capacitors, transistors, inductors, thermistors, etc., and are mounted on the substrate 1 via solder bumps 4 .
- the electronic component 2a is designed higher than the electronic component 2b.
- an electronic component protection sheet 6 cut into a predetermined size is placed on the mounting surfaces of the electronic components 2a and 2b. Since the electronic component 2a is taller than the electronic component 2b, the electronic component protection sheet 6 contacts the electronic component 2a and is temporarily attached. Note that the electronic component protection sheet 6 may bend and come into contact with the electronic component 2b (not shown in FIG. 4).
- a cushion material 7 may be laminated on the electronic component protection sheet 6 .
- FIG. 4 shows an example using a cushioning material.
- the cushion material 7 may be laminated after the electronic component protection sheet 6 is placed, or a laminate obtained by stacking the electronic component protection sheet 6 and the cushion material 7 in advance may be placed.
- the cushion material 7 is a material that softens or melts when heated and pressurized, and has a function of promoting conformability of the electronic component protection sheet 6 to the electronic components 2a and 2b and to gaps between the electronic components.
- the cushioning material 7 is not particularly limited as long as it is a thermoplastic material, but preferably has a melting temperature and a glass transition point (Tg) lower than the temperature at the time of pressurization.
- Suitable examples include polyolefin films, vinyl chloride films, and PVA films.
- the thickness of the cushioning material is usually about 100 ⁇ m to 1 mm.
- the total thickness is preferably within this range.
- the electronic component mounting board shown in the first embodiment is an example, and the structure of the electronic component and the board is not particularly limited. It doesn't matter.
- the arrangement position of the electronic component to be mounted is not limited.
- the electronic component protection sheet 6 is deformed and conforms to the shape of each electronic component, that is, along the upper surface and side surface of the electronic components 2a and 2b. It is deformed to follow the electronic component and at least part of the substrate 1 .
- the cushioning material 7 is softened or melted by heat, and promotes conformity of the electronic component protective sheet 6 to the irregularities between the electronic components on the mounting board 100 .
- a method of interposing a release sheet between the heating and pressurizing machine 20 and the cushioning material 7 during heating and pressurization is also preferable.
- the release sheet is a sheet obtained by subjecting a base material such as paper or plastic to a known release treatment.
- a plastic sheet with low polarity such as Teflon (registered trademark) can also be used.
- the heating temperature may be a temperature at which the electronic component protection sheet 6 is moderately softened, deformed according to the shape of the individual electronic components, and can enter the gaps between the individual electronic components, and is preferably 100 to 260 ° C. It is preferably 120 to 240°C, and more preferably 120 to 240°C. If the temperature is too low, the ability of the electronic component protection sheet 6 to enter the gaps between the individual electronic components mounted thereon is reduced. On the other hand, if the temperature is too high, the thermosetting reaction of the thermosetting resin of the electronic component protective sheet 6 proceeds rapidly, and the electronic component protective sheet is less likely to penetrate between mounted electronic components.
- the pressure when heating and pressurizing is preferably 0.01 to 10 MPa, more preferably 0.1 to 6.0 MPa.
- the heating time is usually 0.5 to 30 minutes, preferably 1 to 20 minutes. If the heating time is too short, the ability of the electronic component protection sheet to enter between the mounted electronic components is reduced. On the other hand, if the time is too long, thermal decomposition and oxidation of the thermosetting resin tend to occur, increasing the possibility of lowering the reliability of the bonding site due to reaction products and the like.
- the heating and pressurizing step is preferably performed in a vacuum state.
- a method of heating and pressurizing besides using a heating and pressurizing machine, a method of laminating metal plates of appropriate weights so as to obtain a predetermined pressure and putting the laminate into an oven is also preferable.
- a vacuum forming method or a vacuum pressure forming method is also preferable.
- Step v Curing step of deformed electronic component protection sheet
- the electronic component protection sheet 6 After heating and pressurizing, the electronic component protection sheet 6 is deformed and further heated at a temperature of 150° C. to 230° C. for 10 to 60 minutes to thermoset the thermosetting resin in the electronic component protection sheet 6.
- An electronic component protective layer which is a cured film, is formed.
- the electronic component protective layer firmly adheres to the electronic component and the substrate, and functions as a protective layer for preventing and protecting the electronic component from damage from external impacts and abrasions.
- the heating and pressurizing temperature is set to 150° C. or higher for 30 minutes or longer to complete the heat curing and form the protective coating layer.
- the covering protective layer must be an insulator in order to prevent short circuits between electronic parts, and a surface resistance value of 1 ⁇ 10 7 ⁇ / ⁇ or more is required.
- the process v can be abbreviate
- the electronic component protection layer may be the outermost layer, and other functional layers may be laminated.
- the other functional layer is, for example, a layer having a function of conductive layer, hard coat property, water vapor barrier property, oxygen barrier property, thermal conductivity, low dielectric constant, high dielectric constant or heat resistance.
- the conductive layer is sometimes used for the purpose of protecting the electronic parts to be covered and protected from electromagnetic wave noise.
- FIG. 5 shows a configuration example of an electronic component mounting board 11 having a conductive layer.
- the conductive layer 8 is formed on the electronic component protective layer 3 and connected to the ground 9 .
- a connection point with the ground 9 may exist on the surface of the substrate 1 or may exist on the side surface of the substrate 1 .
- the conductive layer can be formed by forming a metal layer on the surface of the electronic component protective layer by sputtering or plating, or by laminating a conductive sheet containing conductive particles on the electronic component protective layer. can.
- the electronic component mounting substrate of the first embodiment is preferably provided in electronic devices such as notebook PCs, mobile phones, smart phones, tablet terminals, etc., in addition to liquid crystal displays and touch panels.
- the electronic component protection layer of the second embodiment is for covering and protecting the electronic components mounted on the substrate, as in the first embodiment.
- Sq is a surface texture parameter defined by the above formula (4) in ISO 25178-2:2012.
- the description of the first embodiment is used for the description of the equations.
- the surface of the electronic component protective layer in the second embodiment preferably has a root-mean-square height Sq of 0.01 to 10 ⁇ m, which is determined according to ISO 25178-2:2012.
- the electronic component protective layer can be provided with appropriate unevenness. As a result, even if a foreign object contacts the surface of the electronic component protective layer and damages the surface, the unevenness of the entire surface makes it difficult to visually recognize minor damage that poses no problem in practice.
- the root-mean-square height Sq of the electronic component protective layer is more preferably 0.05 to 7 ⁇ m, even more preferably 0.1 to 5 ⁇ m.
- the surface of the electronic component protective layer in the second embodiment has a root-mean-square gradient Sdq of 0.0001 to 5, which is determined according to ISO 25178-2:2012.
- the antifouling property of the electronic component protective layer can be improved.
- the electronic component protective layer can be provided with an appropriate unevenness slope, and adhesion of dust can be suppressed.
- the root-mean-square slope Sdq of the electronic component protective layer is more preferably 0.0005 to 4.5, even more preferably 0.001 to 4, and particularly 0.005 to 3.5. preferable.
- the inventors of the present invention have found that the water transpiration property is improved by setting the root-mean-square gradient Sdq of the surface of the electronic component protective layer to 0.005 to 3.5. Since the electronic component mounting board is used under various temperature environments after being incorporated into the electronic device, the electronic component protective layer may be exposed to a high humidity environment. When the root-mean-square slope Sdq of the surface of the electronic component protective layer is 0.005 or more, fine water droplets generated by moisture in the air adhering to the surface of the electronic component protective layer are prevented from becoming large by the surface unevenness. , rapidly evaporates into the atmosphere.
- the root-mean-square slope Sdq of the surface of the electronic component protective layer is 3.5 or less, the minute water droplets evaporate quickly into the atmosphere without being blocked by the steep unevenness of the surface of the electronic component protective layer.
- the penetration of moisture into the electronic component protective layer is suppressed, and moisture reaches the electronic component underlying the electronic component protective layer, It is possible to suppress the occurrence of defects such as short circuits.
- the surface of the electronic component protective layer of the second embodiment has a root mean square height Sq of 0.01 to 10 ⁇ m determined in accordance with ISO 25178-2:2012, and the following formulas (2) and (3) ) is preferably satisfied.
- y ⁇ 195x-0.553 (2) y ⁇ 0.258x (3) (x: root-mean-square slope Sdq of the surface of the electronic component protective layer determined in accordance with ISO 25178-2: 2012, y: the square of the surface of the electronic component protective layer determined in accordance with ISO 25178-2: 2012 Root mean height Sq)
- ⁇ Flop Index (FI) ⁇ FI is a parameter calculated by the formula (1) described in the first embodiment, the measurement method is JIS Z8781-4 described in the first embodiment, and the first embodiment except as described below The description of the FI of the form is used.
- the FI of the surface of the electronic component protective layer in the second embodiment is preferably 0.3-80.
- the dicing aptitude and voltage resistance (dielectric breakdown voltage) of the electronic component protective layer can be improved.
- the FI is 0.3 or more, it is possible to impart a certain degree of orderliness to the uneven shape of the surface of the electronic component protective layer.
- voltage resistance (dielectric breakdown voltage) improves.
- the FI of the surface of the electronic component protective layer is 80 or less, it is possible to impart a certain degree of disorder to the uneven shape of the surface. On a surface with a highly ordered uneven shape, external stress applied by cutting or the like tends to concentrate at a specific location. Dicing aptitude is improved.
- the FI of the surface of the electronic component protective layer is more preferably 1-75, still more preferably 3-50, and particularly preferably 5-26.
- the electronic component protective layer preferably contains a granular modifier.
- the granular modifier is used mainly for the purpose of setting the root-mean-square height Sq, root-mean-square tilt Sdq, and Flop Index (FI) of the electronic component protective layer within desired ranges.
- the mechanical properties such as the elastic modulus, Young's modulus, and indentation hardness of the electronic component protective layer can be controlled within favorable ranges by appropriately changing the type and amount of the particulate modifier.
- the granular modifier preferably has a DBP oil absorption of 15 to 400 ml/100 g as defined by JIS K 6217-4. Dicing aptitude can be improved when the DBP oil absorption of the granular modifier is 15 to 400 ml/100 g. It is presumed that the improvement in dicing aptitude is caused by the presumed action described in the first embodiment.
- the description using FIG. 3 of the first embodiment is used.
- thermosetting resin 1 166 parts of terephthalic acid, 146 parts of adipic acid, 212 parts of 3-methyl-1,5-pentanediol, and 25 parts of ethylene glycol were placed in a glass flask equipped with a stirrer, thermometer, reflux condenser, nitrogen inlet tube, and decompression equipment. After the mixture was charged, the mixture was stirred while nitrogen gas was passed through, and the temperature was gradually raised under normal pressure, and the reaction was carried out at 200 to 230° C. for about 8 hours to obtain a liquid product with an acid value of 43.
- the obtained prepolymer solution was heated to 70° C., and while maintaining the temperature, 20.0 parts of 1,3-diaminopropane, 3.1 parts of benzylamine, 600 parts of 2-pronol and 961 parts of toluene were added. was added dropwise in 1 hour. After completion of the dropwise addition, the mixture was reacted at 70° C. for 6 hours to obtain a polyurethane resin having a molecular weight (Mw) of 130,000, an acid value of 10 mgKOH/g, a Tg of 20° C., and a solid content of 25%.
- Mw molecular weight
- Granular modifier 1 Carbon black “MA100” (average primary particle diameter: 24 nm, DBP oil absorption: 100 ml / 100 g, volume resistivity: 1.6 ⁇ 10 -5 ⁇ cm) Mitsubishi Chemical Co., Ltd.
- Granular modifier Material 2 Silica "Ultrasil U360" (DBP oil absorption: 220 ml/100 g, volume resistivity: 1.6 ⁇ 10 16 ⁇ cm) manufactured by NANOCYL
- the average primary particle size of the granular modifier was determined from the average value of 20 primary particles observed from an image magnified about 50,000 to 1,000,000 times with a transmission electron microscope (TEM).
- TEM transmission electron microscope
- the average primary particle size is obtained by averaging the major axis lengths. .
- DBP oil absorption of granular modifier was determined according to JIS K 6217-4.
- an absorption measuring device Absorption measuring device S-500, manufactured by Asahi Soken Co., Ltd. was used.
- thermosetting resin 1 solid content
- curing agent 1 solid content
- 2 parts of granular modifier 1 4 parts of granular modifier 2
- the nonvolatile concentration is A mixed solvent of toluene and isopropyl alcohol (mass ratio of 2:1) was added so as to be 45% by mass, and the mixture was stirred with a disper for 10 minutes to obtain a composition.
- This composition was applied to a cushion material using a doctor blade so as to give a dry thickness of 40 ⁇ m. Then, by drying at 100° C. for 2 minutes, a laminated sheet of Example 101 in which the cushioning material and the electronic component protection sheet 101 are laminated is obtained.
- a substrate was prepared by mounting 5 ⁇ 5 electronic components (1000 ⁇ m ⁇ 1000 ⁇ m) in an array on a substrate made of glass epoxy.
- the thickness of the substrate is 0.3 mm, and the mold sealing thickness, ie, the height (component height) H from the top surface of the substrate to the top surface of the mold sealing material, is 0.7 mm.
- half dicing was performed along the grooves between the components to obtain a mounting substrate (see FIG. 6).
- the half-cut groove depth was 0.8 mm (the substrate cut groove depth was 0.1 mm), and the half-cut groove width was 200 ⁇ m.
- the laminated sheet of each example and comparative example was thermocompression bonded to the mounting substrate (substrate on which electronic components are mounted in an array of 5 ⁇ 5) at 8 MPa and 170° C. for 5 minutes, and the cushioning material was peeled off by hand. bottom. After that, curing is performed at 180 ° C. for 2 hours, and based on Table 1, for those that require surface buffing or other processing, processing is performed so that Sq, Sdq, and FI become predetermined values. An electronic component mounting substrate of Example was obtained.
- the root-mean-square height Sq and the root-mean-square slope Sdq of the electronic component protective layer were measured by the following methods. First, using a laser microscope (manufactured by Keyence Corporation, VK-X100), measurement data was obtained for the electronic component protective layer surface of the electronic component mounting board. Subsequently, the acquired measurement data is imported into analysis software (analysis application "VK-H1XA” equipped with ISO 25178 surface texture measurement module “VK-H1XR", both manufactured by Keyence Corporation), ISO 25178 surface texture measurement is performed, Sq and Sdq were calculated.
- Dielectric breakdown voltage is 2.0 kV or more. ++: The dielectric breakdown voltage is 1.5 kV or more and less than 2.0 kV. +: The dielectric breakdown voltage is 1.0 kV or more and less than 1.5 kV. (Practical level) NG: Dielectric breakdown voltage is less than 1.0 kV.
- Moisture transpiration was evaluated by the number of leak touches of a circuit board imitating an electronic component mounting board.
- a moisture transpiration test method will be described with reference to FIGS. 7A to 7C.
- the comb-shaped signal wiring 32 for the cathode electrode and the comb-shaped signal wiring 33 for the anode electrode are covered, and the vicinity of the cathode electrode connection point 32' and the vicinity of the anode electrode connection point 3' are exposed.
- the laminated sheets of each example and comparative example cut to size were thermocompressed under conditions of 8 MPa and 170° C. for 5 minutes, and the cushion material was peeled off by hand. After that, curing is performed at 180 ° C. for 2 hours, and based on Table 1, for those that require surface buffing or other processing, processing is performed so that Sq, Sdq, and FI become predetermined values.
- a test wiring board having the electronic component protective layer 3 of Example laminated thereon was obtained.
- the obtained sample was placed in an atmosphere of 85° C.-85% RH (relative humidity), the anode electrode was connected to the anode electrode connection point 33 ′, and the cathode electrode was connected to the cathode electrode connection point 32 ′.
- a voltage of 50 V was applied and continued for 500 hours.
- the change in the resistance value was continuously measured until 500 hours passed, and the number of leak touches was confirmed.
- the following "leak touch” means that there is a dielectric breakdown due to a short circuit, the resistance is momentarily lowered, and the current flows. Evaluation criteria are as follows. +++: No leak touch. ++: There was one leak touch. +: There was two leak touches. (Practical level) NG: Three or more leak touches were found.
- a substrate was prepared by mounting 5 ⁇ 5 electronic components (1000 ⁇ m ⁇ 1000 ⁇ m) in an array on a substrate made of glass epoxy.
- the thickness of the substrate is 0.3 mm, and the mold sealing thickness, ie, the height (component height) H from the top surface of the substrate to the top surface of the mold sealing material, is 0.7 mm.
- half dicing was performed along the gap between the parts to obtain a test substrate (see FIG. 6).
- the half-cut groove depth was 0.8 mm (the substrate cut groove depth was 0.1 mm), and the half-cut groove width was 200 ⁇ m.
- the electronic component protective sheets of each example and comparative example were thermocompression bonded to the test substrate under conditions of 8 MPa and 170° C. for 5 minutes, and the cushion material was peeled off by hand. After that, curing is performed at 180 ° C. for 2 hours, and based on Table 1, for those that require surface buffing or other processing, processing is performed so that Sq, Sdq, and FI become predetermined values.
- An electronic component mounting substrate of Example was obtained. After that, the resulting electronic component-mounted substrate was fully diced along the half-cut grooves to obtain 25 test pieces for each example and comparative example. Furthermore, the same operation was performed without laminating the electronic component protective sheet to obtain a test piece without the electronic component protective layer.
- a test piece was prepared by the same method as the above-mentioned [Distinguishability] evaluation, and the thermal cycle resistance evaluation was performed.
- a test piece with an electronic component protective layer is put into a thermal shock device ("TSE-11-A", manufactured by Espec Co., Ltd.), high temperature exposure: 125 ° C., 15 minutes, low temperature exposure: -50 ° C., 15 minutes Exposure conditions 1000 alternating exposures were performed at . After that, the test piece was taken out, the appearance of the electronic component protective layer was observed, the number of damaged test pieces was counted, and evaluation was made according to the following criteria.
- the number of test pieces was 10 for each example. +++: The number of damaged test pieces was 0. ++: The number of damaged test pieces is 1 or more and 2 or less. +: The number of damaged test pieces is 3 or more and 5 or less. (Practical level) NG: The number of damaged test pieces is 6 or more.
- the surface of the electronic component protective layer was visually observed and evaluated based on the following criteria. +++: Fewer than 10 scratches were observed. ++: 10 or more and less than 20 scratches were confirmed. +: 20 or more and less than 40 scratches were observed. (Practical level) NG: 40 or more scratches were confirmed.
- the electronic component mounting board of the present disclosure is used by being mounted on an electronic device.
- the electronic component protection sheet of the present disclosure can be suitably used as a sheet for protecting electronic components in an electronic mounting board.
- the protective sheet can be suitably used not only for electronic parts but also as a part protective sheet for covering various parts.
- Substrate 2 Electronic component 3: Electronic component protective layer 4: Solder bump 5: Hollow portion 6: Electronic component protective sheet 7: Cushion material 8: Conductive layer 9: Ground 10: Electronic component mounting board 11: Has conductive layer Electronic component mounting substrate 12: Incident light 13: Measurement target surface 20: Heating pressurizer 21: Primary particles 22: Aggregate 23: Space 100: Mounting substrate
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Abstract
Provided is an electronic component mounted substrate that has excellent insulative properties, that excels in cold cycle tolerance, and that excels in dicing suitability. An electronic component mounted substrate (10) is configured so that an electronic component (2) is mounted on a substrate (1), and the electronic component (2) is covered by an electronic component protecting layer (3). The surface of the electronic component protecting layer (3) has a Flop Index (FI), calculated using a formula (1), of 0.3 to 80.
Description
本開示は、電子部品搭載基板、電子部品保護シート、及び電子機器に関する。
The present disclosure relates to an electronic component mounting board, an electronic component protection sheet, and an electronic device.
基板に搭載されたICチップ等の電子部品を、基板に対する折り曲げや衝撃から保護したり、温度変化による熱衝撃から保護したりするため、電子部品を基板の一部、或いは全面ごと樹脂によって被覆保護することが行われている。近年では、保護される電子部品および基板回路の著しい性能の向上や小型化に伴い、被覆保護する材料に求められる保護機能の要求水準が高まっている。
電子部品を被覆保護する手法としては、従来より行われてきたコンフォーマルコーティングに置き換わる手段として、溶剤を含まないシート状に成形された熱溶融性の電子部品保護シートが提案されている。
例えば、特許文献1には、芳香族ビニル-共役ジエン系ブロック共重合体を主成分とする形成材料からなる防湿層を備えてなることを特徴とする電子機器部品用防湿シートが開示されている。
特許文献2には、オレフィン系単量体、エチレン性不飽和カルボン酸、および芳香族エチレン性不飽和単量体のグラフト共重合体からなる、基板保護用シートが開示されている。
特許文献3および特許文献4にはエポキシ樹脂、無機フィラー、難燃剤からなるシート状樹脂組成物が開示されている。
特許文献5には、第1の熱伝導層と第2の熱伝導層とを備える積層シートで、搭載部品と基板とを覆う搭載構造体の製造方法が開示されており、同文献の図3(b)には搭載部品と搭載部品との間を前記積層シートの硬化物で隙間なく埋め尽くす製造方法が開示されている。
特許文献6には、表面の平均粗さが特定範囲にある電気絶縁層と、導体層を備えるフレキシブルプリント配線板が開示されている。
特許文献7には、絶縁フィルムと、絶縁フィルム上に形成された配線層と、配線層上に形成された絶縁層とを有するフレキシブル回路体表面に、熱可塑性エラストマーを被覆する構成が開示されている。
特許文献8には、導電性フィラーとバインダー樹脂を含む電磁波シールド層を有し、クルトシスが特定範囲にある電磁波シールド部材によって電子部品を被覆した電子部品搭載基板が開示されている。 In order to protect electronic parts such as IC chips mounted on the board from bending and impact on the board, and to protect them from thermal shock due to temperature changes, the electronic parts are covered with resin for part or all of the board. is being done. In recent years, as electronic components and substrate circuits to be protected have been significantly improved in performance and miniaturized, the level of protective function required for protective coating materials has been increasing.
As a method for covering and protecting electronic components, a hot-melt electronic component protection sheet formed into a sheet shape containing no solvent has been proposed as a means to replace the conventional conformal coating.
For example,Patent Document 1 discloses a moisture-proof sheet for electronic device parts, which is characterized by comprising a moisture-proof layer made of a forming material containing an aromatic vinyl-conjugated diene block copolymer as a main component. .
Patent Document 2 discloses a substrate protection sheet comprising a graft copolymer of an olefinic monomer, an ethylenically unsaturated carboxylic acid, and an ethylenically unsaturated aromatic monomer.
Patent Documents 3 and 4 disclose a sheet-like resin composition comprising an epoxy resin, an inorganic filler and a flame retardant.
Patent Document 5 discloses a manufacturing method of a mounting structure that covers a mounting component and a substrate with a laminated sheet including a first heat conductive layer and a second heat conductive layer. (b) discloses a manufacturing method in which the space between mounted components is filled with the cured product of the laminated sheet without gaps.
Patent Literature 6 discloses a flexible printed wiring board provided with an electrical insulating layer having an average surface roughness within a specific range and a conductor layer.
Patent Document 7 discloses a configuration in which the surface of a flexible circuit body having an insulating film, a wiring layer formed on the insulating film, and an insulating layer formed on the wiring layer is coated with a thermoplastic elastomer. there is
Patent Literature 8 discloses an electronic component mounting substrate having an electromagnetic wave shielding layer containing a conductive filler and a binder resin, in which electronic components are covered with an electromagnetic wave shielding member having kurtosis within a specific range.
電子部品を被覆保護する手法としては、従来より行われてきたコンフォーマルコーティングに置き換わる手段として、溶剤を含まないシート状に成形された熱溶融性の電子部品保護シートが提案されている。
例えば、特許文献1には、芳香族ビニル-共役ジエン系ブロック共重合体を主成分とする形成材料からなる防湿層を備えてなることを特徴とする電子機器部品用防湿シートが開示されている。
特許文献2には、オレフィン系単量体、エチレン性不飽和カルボン酸、および芳香族エチレン性不飽和単量体のグラフト共重合体からなる、基板保護用シートが開示されている。
特許文献3および特許文献4にはエポキシ樹脂、無機フィラー、難燃剤からなるシート状樹脂組成物が開示されている。
特許文献5には、第1の熱伝導層と第2の熱伝導層とを備える積層シートで、搭載部品と基板とを覆う搭載構造体の製造方法が開示されており、同文献の図3(b)には搭載部品と搭載部品との間を前記積層シートの硬化物で隙間なく埋め尽くす製造方法が開示されている。
特許文献6には、表面の平均粗さが特定範囲にある電気絶縁層と、導体層を備えるフレキシブルプリント配線板が開示されている。
特許文献7には、絶縁フィルムと、絶縁フィルム上に形成された配線層と、配線層上に形成された絶縁層とを有するフレキシブル回路体表面に、熱可塑性エラストマーを被覆する構成が開示されている。
特許文献8には、導電性フィラーとバインダー樹脂を含む電磁波シールド層を有し、クルトシスが特定範囲にある電磁波シールド部材によって電子部品を被覆した電子部品搭載基板が開示されている。 In order to protect electronic parts such as IC chips mounted on the board from bending and impact on the board, and to protect them from thermal shock due to temperature changes, the electronic parts are covered with resin for part or all of the board. is being done. In recent years, as electronic components and substrate circuits to be protected have been significantly improved in performance and miniaturized, the level of protective function required for protective coating materials has been increasing.
As a method for covering and protecting electronic components, a hot-melt electronic component protection sheet formed into a sheet shape containing no solvent has been proposed as a means to replace the conventional conformal coating.
For example,
Patent Document 5 discloses a manufacturing method of a mounting structure that covers a mounting component and a substrate with a laminated sheet including a first heat conductive layer and a second heat conductive layer. (b) discloses a manufacturing method in which the space between mounted components is filled with the cured product of the laminated sheet without gaps.
Patent Document 7 discloses a configuration in which the surface of a flexible circuit body having an insulating film, a wiring layer formed on the insulating film, and an insulating layer formed on the wiring layer is coated with a thermoplastic elastomer. there is
Patent Literature 8 discloses an electronic component mounting substrate having an electromagnetic wave shielding layer containing a conductive filler and a binder resin, in which electronic components are covered with an electromagnetic wave shielding member having kurtosis within a specific range.
前述のとおり、これまで種々の方法によって被覆保護された電子部品搭載基板に関する発明が開示されているが、近年では、要求性能のレベルが高く、より品質の優れた電子部品搭載基板が望まれている。
As described above, inventions relating to electronic component mounting substrates coated and protected by various methods have been disclosed so far, but in recent years, the level of required performance is high, and electronic component mounting substrates with higher quality are desired. there is
電子部品搭載基板に積層されている電子部品保護層は、下層の電子部品や基板を絶縁被覆する役割のため、高い絶縁性が求められている。
また、電子部品搭載基板の生産性を高めるため、大型基板に例えばアレイ状に電子部品を搭載し、特定の部品区画ごとに切り離す、ダイシング工程を行うことがある。この場合、電子部品保護層においてダイシング適正が求められる。ダイシング適性のない電子部品保護層は、ダイシングによる応力によって電子部品保護層の切断面がダレを起こしたり、バリを発生させたりする。なお、本明細書でいうバリとは、電子部品保護層の切断面を基点とした電子部品保護層の捲れをいう。
更に、電子部品搭載基板は電子機器に組み込まれた後、様々な温度環境下で使用されることから、電子部品保護層が急激な温度変化に曝され、電子部品保護層自体が破損することがある。このため、冷熱サイクル耐性に優れる電子部品保護層が切望されている。 An electronic component protective layer laminated on an electronic component mounting substrate is required to have high insulation properties because it serves to provide an insulating coating for the underlying electronic components and substrate.
Also, in order to increase the productivity of electronic component mounting substrates, a dicing process may be performed in which electronic components are mounted, for example, in an array on a large substrate and separated into specific component sections. In this case, dicing suitability is required in the electronic component protective layer. If the electronic component protective layer is not suitable for dicing, the cut surface of the electronic component protective layer may be sagging or burred due to the stress caused by dicing. In addition, the burr referred to in this specification refers to curling of the electronic component protective layer starting from the cut surface of the electronic component protective layer.
Furthermore, since the electronic component mounting board is used in various temperature environments after it is incorporated in the electronic device, the electronic component protective layer is exposed to sudden temperature changes, and the electronic component protective layer itself may be damaged. be. For this reason, there is a strong demand for an electronic component protective layer that is excellent in thermal cycle resistance.
また、電子部品搭載基板の生産性を高めるため、大型基板に例えばアレイ状に電子部品を搭載し、特定の部品区画ごとに切り離す、ダイシング工程を行うことがある。この場合、電子部品保護層においてダイシング適正が求められる。ダイシング適性のない電子部品保護層は、ダイシングによる応力によって電子部品保護層の切断面がダレを起こしたり、バリを発生させたりする。なお、本明細書でいうバリとは、電子部品保護層の切断面を基点とした電子部品保護層の捲れをいう。
更に、電子部品搭載基板は電子機器に組み込まれた後、様々な温度環境下で使用されることから、電子部品保護層が急激な温度変化に曝され、電子部品保護層自体が破損することがある。このため、冷熱サイクル耐性に優れる電子部品保護層が切望されている。 An electronic component protective layer laminated on an electronic component mounting substrate is required to have high insulation properties because it serves to provide an insulating coating for the underlying electronic components and substrate.
Also, in order to increase the productivity of electronic component mounting substrates, a dicing process may be performed in which electronic components are mounted, for example, in an array on a large substrate and separated into specific component sections. In this case, dicing suitability is required in the electronic component protective layer. If the electronic component protective layer is not suitable for dicing, the cut surface of the electronic component protective layer may be sagging or burred due to the stress caused by dicing. In addition, the burr referred to in this specification refers to curling of the electronic component protective layer starting from the cut surface of the electronic component protective layer.
Furthermore, since the electronic component mounting board is used in various temperature environments after it is incorporated in the electronic device, the electronic component protective layer is exposed to sudden temperature changes, and the electronic component protective layer itself may be damaged. be. For this reason, there is a strong demand for an electronic component protective layer that is excellent in thermal cycle resistance.
電子部品搭載基板は、電子機器へ組み込まれる都合上、塵や埃が付着することは許容されない。例えば、電子部品保護層の凹凸にはまり込んだ除去不可能な塵埃が付着したものは検査工程で実用不可と判断され、廃棄されることがある。このため、防汚性に優れる電子部品保護層が望まれている。更に、電子部品保護層の品質検査(角部のヒビ割れや端部が流動しすぎていないか等)をする場合、電子部品保護層自体が着色されていないと、視認することができず欠点箇所を見逃してしまう等、検査精度に課題がある。一方単純に黒色等に着色するだけでは、例えば電子部品に黒色の封止樹脂で封止されたチップ上では欠点箇所の識別がしにくく、これもまた検査精度に課題がある。
Electronic component mounting boards are not allowed to have dust and dirt on them due to the convenience of being incorporated into electronic equipment. For example, an electronic component protective layer with unremovable dust stuck in irregularities may be judged as unpractical in the inspection process and discarded. Therefore, there is a demand for an electronic component protective layer that is excellent in antifouling properties. Furthermore, when inspecting the quality of the electronic component protective layer (whether there are cracks in the corners or excessive flow at the edges, etc.), if the electronic component protective layer itself is not colored, it cannot be visually recognized. There is a problem with inspection accuracy, such as overlooking a part. On the other hand, if the chip is simply colored black or the like, for example, it is difficult to identify the defective portion on the chip sealed with the black sealing resin on the electronic component, and this also poses a problem in the inspection accuracy.
本開示は、上記課題に鑑みてなされたものであり、その第一の目的は、優れた絶縁性を有し、冷熱サイクル耐性に優れ、且つダイシング適正に優れた電子部品搭載基板、及び電子部品保護シートを提供することである。また、第二の目的は、高い防汚性を有し、識別性の優れた高品質の電子部品保護シートおよびこれを備えた電子部品搭載基板を提供することである。
The present disclosure has been made in view of the above problems, and the first object thereof is to provide an electronic component mounting board having excellent insulation, excellent thermal cycle resistance, and excellent dicing suitability, and an electronic component It is to provide a protective sheet. A second object of the present invention is to provide a high-quality electronic component protection sheet having high antifouling properties and excellent identifiability, and an electronic component mounting board having the same.
本発明者らは、鋭意検討の結果、以下の特徴を有する物品(電子部品搭載基板、及び電子部品保護シート)を用いることにより、前記課題を解決することを見出し、本開示を完成させるに至った。
[1]: 基板上に電子部品が搭載されており、前記電子部品が電子部品保護層によって被覆されている電子部品搭載基板であって、前記電子部品保護層の表面は、数式(1)により算出されたFlop Index(FI)が0.3~80である電子部品搭載基板。
(L*
15°、L*
45°、L*
110°は、それぞれ、電子部品表面の垂線方向に対して45°の角度で入射した光の正反射光からのオフセット角15°、45°、110°のJIS Z8781‐4で規定されるL*a*b*表色系のL*である。)
[2]: 基板上に電子部品が搭載されており、前記電子部品が電子部品保護層によって被覆されている電子部品搭載基板であって、前記電子部品保護層の表面は、
ISO 25178-2:2012に準拠して求めた二乗平均平方根傾斜Sdqが0.0001~5.0である電子部品搭載基板。
[3]: 前記電子部品保護層の表面は、
ISO 25178-2:2012に準拠して求めた二乗平均平方根高さSqが0.01~10μmであって、下記数式(2)及び数式(3)を満たす、
ことを特徴とする、[2]記載の電子部品搭載基板。
y≦195x-0.553 (2)
y≧0.258x (3)
(x:ISO 25178-2:2012に準拠して求めた電子部品保護層の表面の二乗平均平方根傾斜Sdq、y:ISO 25178-2:2012に準拠して求めた電子部品保護層の表面の二乗平均平方根高さSq)
[4]:前記電子部品保護層のISO 5-2で定められる360~760nmの可視光領域の光学濃度(OD値)が1~6であることを特徴とする、[1]~[3]いずれか記載の電子部品搭載基板。
[5]: 前記電子部品保護層のJIS Z8781‐4で定められるL*a*b*表色系における、L*が1~50、かつa*が-10~10、かつb*が-10~10であることを特徴とする、[1]~[4]記載の電子部品搭載基板。
[6]: 前記電子部品保護層の表面抵抗値が1.0×107Ω/□以上であることを特徴とする、[1]~[5]いずれか記載の電子部品搭載基板。
[7]: 前記電子部品保護層が、バインダー樹脂、および粒状改質剤を含有し、
前記粒状改質剤は、JIS K 6217-4で規定されるDBP吸油量が15~400ml/100gであることを特徴とする、[1]~[6]いずれか記載の電子部品搭載基板。
[8]: 前記粒状改質剤が少なくとも1種類のカーボンブラックを含むことを特徴とする、[7]記載の電子部品搭載基板。
[9]: [1]~[8]いずれか記載の電子部品搭載基板が搭載された電子機器。
[10]: 基板上に搭載された電子部品を被覆するための電子部品保護シートであって、
前記電子部品保護シートを180℃、60分加熱させてなる硬化膜の表面は、
数式(1)により算出されたFlop Index(FI)が0.3~80である電子部品保護シート。
(L*
15°、L*
45°、L*
110°は、それぞれ、電子部品表面の垂線方向に対して45°の角度で入射した光の正反射光からのオフセット角15°、45°、110°のJIS Z8781‐4で規定されるL*a*b*表色系のL*である。)
[11]: 基板上に搭載された電子部品を被覆するための電子部品保護シートであって、
前記電子部品保護シートを180℃、60分加熱させてなる硬化膜の表面は、
ISO 25178-2:2012に準拠して求めた二乗平均平方根傾斜Sdqが0.0001~5.0である電子部品保護シート。
[12]: 基板上に搭載された1つの電子部品、または複数の電子部品からなる電子部品群を、被覆保護するための電子部品保護シートであって、
前記電子部品保護シートを180℃、60分加熱させてなる硬化膜の表面は、
ISO 25178-2:2012に準拠して求めた二乗平均平方根高さSqが0.01~10μmであって、下記数式(2)及び数式(3)を満たす、
ことを特徴とする、[11]記載の電子部品保護シート。
y≦195x-0.553 (2)
y≧0.258x (3)
(x:ISO 25178-2:2012に準拠して求めた電子部品保護層の表面の二乗平均平方根傾斜Sdq、y:ISO 25178-2:2012に準拠して求めた電子部品保護層の表面の二乗平均平方根高さSq) As a result of intensive studies, the present inventors have found that the above problems can be solved by using an article (an electronic component mounting board and an electronic component protective sheet) having the following characteristics, and have completed the present disclosure. rice field.
[1]: An electronic component-mounted board in which an electronic component is mounted on the substrate and the electronic component is covered with an electronic component protective layer, wherein the surface of the electronic component protective layer is An electronic component mounting board having a calculated Flop Index (FI) of 0.3 to 80.
(L * 15° , L * 45° , and L * 110° are the offset angles of 15°, 45°, 110° is the L * of the L * a * b * color system specified in JIS Z8781-4.)
[2]: An electronic component-mounted board, wherein an electronic component is mounted on the substrate, and the electronic component is covered with an electronic component protective layer, the surface of the electronic component protective layer being:
An electronic component mounting board having a root-mean-square slope Sdq determined in accordance with ISO 25178-2:2012 of 0.0001 to 5.0.
[3]: The surface of the electronic component protective layer is
The root mean square height Sq determined in accordance with ISO 25178-2:2012 is 0.01 to 10 μm, and satisfies the following formulas (2) and (3).
The electronic component mounting board according to [2], characterized by:
y≤195x-0.553 (2)
y≧0.258x (3)
(x: root-mean-square slope Sdq of the surface of the electronic component protective layer determined in accordance with ISO 25178-2: 2012, y: the square of the surface of the electronic component protective layer determined in accordance with ISO 25178-2: 2012 Root mean height Sq)
[4]: [1] to [3], wherein the electronic component protective layer has an optical density (OD value) of 1 to 6 in the visible light region of 360 to 760 nm defined by ISO 5-2. The electronic component mounting board according to any one of the above.
[5]: L* is 1 to 50, a* is −10 to 10, and b* is −10 in the L*a*b* color system defined by JIS Z8781-4 of the electronic component protective layer The electronic component mounting board according to [1] to [4], characterized in that 1 to 10.
[6]: The electronic component mounting substrate according to any one of [1] to [5], wherein the electronic component protective layer has a surface resistance value of 1.0×10 7 Ω/□ or more.
[7]: The electronic component protective layer contains a binder resin and a granular modifier,
The electronic component mounting board according to any one of [1] to [6], wherein the granular modifier has a DBP oil absorption defined by JIS K 6217-4 of 15 to 400 ml/100 g.
[8]: The electronic component mounting board according to [7], wherein the particulate modifier contains at least one type of carbon black.
[9]: An electronic device equipped with the electronic component mounting board according to any one of [1] to [8].
[10]: An electronic component protection sheet for covering electronic components mounted on a substrate,
The surface of the cured film obtained by heating the electronic component protection sheet at 180° C. for 60 minutes,
An electronic component protection sheet having a Flop Index (FI) of 0.3 to 80 as calculated by the formula (1).
(L * 15° , L * 45° , and L * 110° are the offset angles of 15°, 45°, 110° is the L * of the L * a * b * color system specified in JIS Z8781-4.)
[11]: An electronic component protection sheet for covering electronic components mounted on a substrate,
The surface of the cured film obtained by heating the electronic component protection sheet at 180° C. for 60 minutes,
An electronic component protection sheet having a root-mean-square slope Sdq determined in accordance with ISO 25178-2:2012 of 0.0001 to 5.0.
[12]: An electronic component protection sheet for covering and protecting one electronic component or a group of electronic components consisting of a plurality of electronic components mounted on a substrate,
The surface of the cured film obtained by heating the electronic component protection sheet at 180° C. for 60 minutes,
The root mean square height Sq determined in accordance with ISO 25178-2:2012 is 0.01 to 10 μm, and satisfies the following formulas (2) and (3).
The electronic component protection sheet according to [11], characterized by:
y≤195x-0.553 (2)
y≧0.258x (3)
(x: root-mean-square slope Sdq of the surface of the electronic component protective layer determined in accordance with ISO 25178-2: 2012, y: the square of the surface of the electronic component protective layer determined in accordance with ISO 25178-2: 2012 Root mean height Sq)
[1]: 基板上に電子部品が搭載されており、前記電子部品が電子部品保護層によって被覆されている電子部品搭載基板であって、前記電子部品保護層の表面は、数式(1)により算出されたFlop Index(FI)が0.3~80である電子部品搭載基板。
[2]: 基板上に電子部品が搭載されており、前記電子部品が電子部品保護層によって被覆されている電子部品搭載基板であって、前記電子部品保護層の表面は、
ISO 25178-2:2012に準拠して求めた二乗平均平方根傾斜Sdqが0.0001~5.0である電子部品搭載基板。
[3]: 前記電子部品保護層の表面は、
ISO 25178-2:2012に準拠して求めた二乗平均平方根高さSqが0.01~10μmであって、下記数式(2)及び数式(3)を満たす、
ことを特徴とする、[2]記載の電子部品搭載基板。
y≦195x-0.553 (2)
y≧0.258x (3)
(x:ISO 25178-2:2012に準拠して求めた電子部品保護層の表面の二乗平均平方根傾斜Sdq、y:ISO 25178-2:2012に準拠して求めた電子部品保護層の表面の二乗平均平方根高さSq)
[4]:前記電子部品保護層のISO 5-2で定められる360~760nmの可視光領域の光学濃度(OD値)が1~6であることを特徴とする、[1]~[3]いずれか記載の電子部品搭載基板。
[5]: 前記電子部品保護層のJIS Z8781‐4で定められるL*a*b*表色系における、L*が1~50、かつa*が-10~10、かつb*が-10~10であることを特徴とする、[1]~[4]記載の電子部品搭載基板。
[6]: 前記電子部品保護層の表面抵抗値が1.0×107Ω/□以上であることを特徴とする、[1]~[5]いずれか記載の電子部品搭載基板。
[7]: 前記電子部品保護層が、バインダー樹脂、および粒状改質剤を含有し、
前記粒状改質剤は、JIS K 6217-4で規定されるDBP吸油量が15~400ml/100gであることを特徴とする、[1]~[6]いずれか記載の電子部品搭載基板。
[8]: 前記粒状改質剤が少なくとも1種類のカーボンブラックを含むことを特徴とする、[7]記載の電子部品搭載基板。
[9]: [1]~[8]いずれか記載の電子部品搭載基板が搭載された電子機器。
[10]: 基板上に搭載された電子部品を被覆するための電子部品保護シートであって、
前記電子部品保護シートを180℃、60分加熱させてなる硬化膜の表面は、
数式(1)により算出されたFlop Index(FI)が0.3~80である電子部品保護シート。
[11]: 基板上に搭載された電子部品を被覆するための電子部品保護シートであって、
前記電子部品保護シートを180℃、60分加熱させてなる硬化膜の表面は、
ISO 25178-2:2012に準拠して求めた二乗平均平方根傾斜Sdqが0.0001~5.0である電子部品保護シート。
[12]: 基板上に搭載された1つの電子部品、または複数の電子部品からなる電子部品群を、被覆保護するための電子部品保護シートであって、
前記電子部品保護シートを180℃、60分加熱させてなる硬化膜の表面は、
ISO 25178-2:2012に準拠して求めた二乗平均平方根高さSqが0.01~10μmであって、下記数式(2)及び数式(3)を満たす、
ことを特徴とする、[11]記載の電子部品保護シート。
y≦195x-0.553 (2)
y≧0.258x (3)
(x:ISO 25178-2:2012に準拠して求めた電子部品保護層の表面の二乗平均平方根傾斜Sdq、y:ISO 25178-2:2012に準拠して求めた電子部品保護層の表面の二乗平均平方根高さSq) As a result of intensive studies, the present inventors have found that the above problems can be solved by using an article (an electronic component mounting board and an electronic component protective sheet) having the following characteristics, and have completed the present disclosure. rice field.
[1]: An electronic component-mounted board in which an electronic component is mounted on the substrate and the electronic component is covered with an electronic component protective layer, wherein the surface of the electronic component protective layer is An electronic component mounting board having a calculated Flop Index (FI) of 0.3 to 80.
[2]: An electronic component-mounted board, wherein an electronic component is mounted on the substrate, and the electronic component is covered with an electronic component protective layer, the surface of the electronic component protective layer being:
An electronic component mounting board having a root-mean-square slope Sdq determined in accordance with ISO 25178-2:2012 of 0.0001 to 5.0.
[3]: The surface of the electronic component protective layer is
The root mean square height Sq determined in accordance with ISO 25178-2:2012 is 0.01 to 10 μm, and satisfies the following formulas (2) and (3).
The electronic component mounting board according to [2], characterized by:
y≤195x-0.553 (2)
y≧0.258x (3)
(x: root-mean-square slope Sdq of the surface of the electronic component protective layer determined in accordance with ISO 25178-2: 2012, y: the square of the surface of the electronic component protective layer determined in accordance with ISO 25178-2: 2012 Root mean height Sq)
[4]: [1] to [3], wherein the electronic component protective layer has an optical density (OD value) of 1 to 6 in the visible light region of 360 to 760 nm defined by ISO 5-2. The electronic component mounting board according to any one of the above.
[5]: L* is 1 to 50, a* is −10 to 10, and b* is −10 in the L*a*b* color system defined by JIS Z8781-4 of the electronic component protective layer The electronic component mounting board according to [1] to [4], characterized in that 1 to 10.
[6]: The electronic component mounting substrate according to any one of [1] to [5], wherein the electronic component protective layer has a surface resistance value of 1.0×10 7 Ω/□ or more.
[7]: The electronic component protective layer contains a binder resin and a granular modifier,
The electronic component mounting board according to any one of [1] to [6], wherein the granular modifier has a DBP oil absorption defined by JIS K 6217-4 of 15 to 400 ml/100 g.
[8]: The electronic component mounting board according to [7], wherein the particulate modifier contains at least one type of carbon black.
[9]: An electronic device equipped with the electronic component mounting board according to any one of [1] to [8].
[10]: An electronic component protection sheet for covering electronic components mounted on a substrate,
The surface of the cured film obtained by heating the electronic component protection sheet at 180° C. for 60 minutes,
An electronic component protection sheet having a Flop Index (FI) of 0.3 to 80 as calculated by the formula (1).
[11]: An electronic component protection sheet for covering electronic components mounted on a substrate,
The surface of the cured film obtained by heating the electronic component protection sheet at 180° C. for 60 minutes,
An electronic component protection sheet having a root-mean-square slope Sdq determined in accordance with ISO 25178-2:2012 of 0.0001 to 5.0.
[12]: An electronic component protection sheet for covering and protecting one electronic component or a group of electronic components consisting of a plurality of electronic components mounted on a substrate,
The surface of the cured film obtained by heating the electronic component protection sheet at 180° C. for 60 minutes,
The root mean square height Sq determined in accordance with ISO 25178-2:2012 is 0.01 to 10 μm, and satisfies the following formulas (2) and (3).
The electronic component protection sheet according to [11], characterized by:
y≤195x-0.553 (2)
y≧0.258x (3)
(x: root-mean-square slope Sdq of the surface of the electronic component protective layer determined in accordance with ISO 25178-2: 2012, y: the square of the surface of the electronic component protective layer determined in accordance with ISO 25178-2: 2012 Root mean height Sq)
本開示の第一の態様に係る発明によれば、優れた絶縁性を有し、冷熱サイクル耐性に優れ、且つダイシング適正に優れた電子部品搭載基板、及び電子部品保護シートを提供できるという優れた効果を奏する。
本開示の第二の態様に係る発明によれば、高い防汚性を有し、識別性に優れた高品質の電子部品保護シートおよびこれを備えた電子部品搭載基板を提供できるという優れた効果を奏する。 According to the invention according to the first aspect of the present disclosure, it is possible to provide an electronic component mounting board having excellent insulation, excellent thermal cycle resistance, and excellent dicing suitability, and an electronic component protective sheet. Effective.
According to the invention according to the second aspect of the present disclosure, it is possible to provide a high-quality electronic component protective sheet having high antifouling properties and excellent identifiability, and an electronic component mounting substrate provided with the same. play.
本開示の第二の態様に係る発明によれば、高い防汚性を有し、識別性に優れた高品質の電子部品保護シートおよびこれを備えた電子部品搭載基板を提供できるという優れた効果を奏する。 According to the invention according to the first aspect of the present disclosure, it is possible to provide an electronic component mounting board having excellent insulation, excellent thermal cycle resistance, and excellent dicing suitability, and an electronic component protective sheet. Effective.
According to the invention according to the second aspect of the present disclosure, it is possible to provide a high-quality electronic component protective sheet having high antifouling properties and excellent identifiability, and an electronic component mounting substrate provided with the same. play.
[第1実施形態]
《電子部品搭載基板》
第1実施形態の電子部品搭載基板10は、図1に示すように、基板1と、基板上に搭載された1つ以上の電子部品2と、前記電子部品2の一部分、あるいは全部と基板1を被覆保護する電子部品保護層3、を含む。電子部品保護層3は、基板1と、電子部品2上面から基板1に亘って被覆されており、電子部品2の上面の他、電子部品2の搭載によって形成された段差部の側面および基板の少なくとも一部を被覆する。なお、電子部品保護層3は、電子部品2の形状に追随するように被覆する構成に限定されず、電子部品2上に電子部品2と基板1を被覆するように形成されている態様も包含する。 [First embodiment]
《Electronic component board》
As shown in FIG. 1, the electroniccomponent mounting substrate 10 of the first embodiment includes a substrate 1, one or more electronic components 2 mounted on the substrate, a part or all of the electronic components 2, and the substrate 1. An electronic component protective layer 3 that covers and protects the The electronic component protective layer 3 covers the substrate 1 and the upper surface of the electronic component 2 to the substrate 1. In addition to the upper surface of the electronic component 2, the side surface of the stepped portion formed by mounting the electronic component 2 and the substrate Cover at least a portion. In addition, the electronic component protective layer 3 is not limited to a configuration in which the electronic component protective layer 3 is coated so as to follow the shape of the electronic component 2, and includes an aspect in which the electronic component 2 and the substrate 1 are formed so as to cover the electronic component 2. do.
《電子部品搭載基板》
第1実施形態の電子部品搭載基板10は、図1に示すように、基板1と、基板上に搭載された1つ以上の電子部品2と、前記電子部品2の一部分、あるいは全部と基板1を被覆保護する電子部品保護層3、を含む。電子部品保護層3は、基板1と、電子部品2上面から基板1に亘って被覆されており、電子部品2の上面の他、電子部品2の搭載によって形成された段差部の側面および基板の少なくとも一部を被覆する。なお、電子部品保護層3は、電子部品2の形状に追随するように被覆する構成に限定されず、電子部品2上に電子部品2と基板1を被覆するように形成されている態様も包含する。 [First embodiment]
《Electronic component board》
As shown in FIG. 1, the electronic
電子部品2は半田バンプ4を介して基板と電気的に接続されていてもよく、電子部品から延長される接続端子と基板が直接接続されていてもよい。電子部品2が半田バンプ4を介して基板と接続される場合、図1に示すように電子部品2と基板1の間には中空部分5が生じる。電子部品保護層3は前記中空部分5を維持するようにして電子部品2と基板1を被覆保護してもよく、中空部分5を埋めるように被覆保護してもよい。電子部品保護層は、例えば後述する方法によって製造することができる。
The electronic component 2 may be electrically connected to the substrate via solder bumps 4, or the connection terminals extending from the electronic component may be directly connected to the substrate. When the electronic component 2 is connected to the substrate via the solder bumps 4, a hollow portion 5 is created between the electronic component 2 and the substrate 1 as shown in FIG. The electronic component protective layer 3 may cover and protect the electronic component 2 and the substrate 1 so as to maintain the hollow portion 5 , or may cover and protect the hollow portion 5 so as to fill the hollow portion 5 . The electronic component protective layer can be produced, for example, by the method described later.
《電子部品保護層》
次いで、第1実施形態の電子部品保護層について説明する。電子部品保護層は、上述の通り基板上に搭載された電子部品を被覆保護するためのものである。 《Electronic component protective layer》
Next, the electronic component protective layer of the first embodiment will be explained. The electronic component protective layer is for covering and protecting the electronic component mounted on the substrate as described above.
次いで、第1実施形態の電子部品保護層について説明する。電子部品保護層は、上述の通り基板上に搭載された電子部品を被覆保護するためのものである。 《Electronic component protective layer》
Next, the electronic component protective layer of the first embodiment will be explained. The electronic component protective layer is for covering and protecting the electronic component mounted on the substrate as described above.
《二乗平均平方根高さSq》
二乗平均平方根高さSq(以下、Sqともいう)はISO 25178-2:2012において、下記数式(4)で規定される表面性状パラメータである。Aは定義表面の面積を表す。
二乗平均平方根高さSqは、光学顕微鏡、レーザー顕微鏡、および電子顕微鏡いずれかで得られる表面形状の座標データを、解析ソフトによって処理することにより、算出することができる。二乗平均平方根高さSqは、定義表面における凹凸高さの二乗平均平方根を表したものであり、表面粗さの標準偏差を表す。
<<root mean square height Sq>>
The root-mean-square height Sq (hereinafter also referred to as Sq) is a surface texture parameter defined by the following formula (4) in ISO 25178-2:2012. A represents the area of the defining surface.
The root-mean-square height Sq can be calculated by processing the coordinate data of the surface shape obtained with either an optical microscope, a laser microscope, or an electron microscope, using analysis software. The root-mean-square height Sq represents the root-mean-square height of irregularities on the defined surface, and represents the standard deviation of surface roughness.
二乗平均平方根高さSq(以下、Sqともいう)はISO 25178-2:2012において、下記数式(4)で規定される表面性状パラメータである。Aは定義表面の面積を表す。
The root-mean-square height Sq (hereinafter also referred to as Sq) is a surface texture parameter defined by the following formula (4) in ISO 25178-2:2012. A represents the area of the defining surface.
第1実施形態における電子部品保護層の表面は、ISO 25178-2:2012に準拠して求めた二乗平均平方根高さSqが0.15~1.0μmであることが好ましい。電子部品保護層の表面が前述の範囲内であることで、電子部品保護層表面に帯電物が接触した際、界面に適度な空隙を維持することができるため絶縁性を良化することができ、絶縁破壊電圧が向上可能となる。また、電子部品保護層の表面が前述の範囲内であることで、ダイシング工程においてカッターと切断点に適度な応力集中を起こすことができ、バリの発生をより効果的に抑制することができる。
The surface of the electronic component protective layer in the first embodiment preferably has a root-mean-square height Sq of 0.15 to 1.0 μm, determined according to ISO 25178-2:2012. When the surface of the electronic component protective layer is within the above-mentioned range, when a charged object contacts the surface of the electronic component protective layer, an appropriate gap can be maintained at the interface, so that the insulation can be improved. , the breakdown voltage can be improved. In addition, since the surface of the electronic component protective layer is within the above-mentioned range, it is possible to cause moderate stress concentration on the cutter and the cutting point in the dicing process, and it is possible to more effectively suppress the occurrence of burrs.
《二乗平均平方根傾斜Sdq》
二乗平均平方根傾斜Sdq(以下、Sdqともいう)はISO 25178-2:2012において、下記数式(5)で規定される表面性状パラメータである。Aは定義表面の面積、∂xはx軸方向、∂yはy軸方向、∂z(x,y)はz軸方向の微小変位を表す。
二乗平均平方根傾斜Sdqは、光学顕微鏡、レーザー顕微鏡、および電子顕微鏡いずれかで得られる表面形状の座標データを、解析ソフトによって処理することにより、算出することができる。二乗平均平方根傾斜Sdqは、定義表面の全点における傾斜の二乗平均平方根を表しており、定義表面における凹凸の険しさを表現するパラメータである。
<<root mean square slope Sdq>>
The root-mean-square slope Sdq (hereinafter also referred to as Sdq) is a surface texture parameter defined by the following formula (5) in ISO 25178-2:2012. A is the area of the defined surface, ∂x is the x-axis direction, ∂y is the y-axis direction, and ∂z(x, y) is the z-axis direction.
The root-mean-square slope Sdq can be calculated by processing the coordinate data of the surface profile obtained with either an optical microscope, a laser microscope, or an electron microscope, using analysis software. The root-mean-square slope Sdq represents the root-mean-square slope of all points on the defined surface, and is a parameter that expresses the steepness of the unevenness on the defined surface.
二乗平均平方根傾斜Sdq(以下、Sdqともいう)はISO 25178-2:2012において、下記数式(5)で規定される表面性状パラメータである。Aは定義表面の面積、∂xはx軸方向、∂yはy軸方向、∂z(x,y)はz軸方向の微小変位を表す。
The root-mean-square slope Sdq (hereinafter also referred to as Sdq) is a surface texture parameter defined by the following formula (5) in ISO 25178-2:2012. A is the area of the defined surface, ∂x is the x-axis direction, ∂y is the y-axis direction, and ∂z(x, y) is the z-axis direction.
第1実施形態における電子部品保護層の表面は、ISO 25178-2:2012に準拠して求めた二乗平均平方根傾斜Sdqが0.0001~5であることが好ましい。電子部品保護層の表面が前述の範囲内であることで、電子部品保護層の防汚性を向上することができる。二乗平均平方根傾斜Sdqを0.0001以上とすることで、電子部品保護層に適度な凹凸傾斜を付与することができ、塵や埃の付着を抑制することができる。一方、二乗平均平方根傾斜Sdqを5以下とすることで、微細な塵や埃が電子部品保護層の凹凸壁面に付着するのを抑制することができる。電子部品保護層の二乗平均平方根傾斜Sdqは、0.0005~4.5であることがより好ましく、0.001~4であることがさらに好ましく、0.005~3.5であることが特に好ましい。
The surface of the electronic component protective layer in the first embodiment preferably has a root-mean-square slope Sdq of 0.0001 to 5, determined according to ISO 25178-2:2012. When the surface of the electronic component protective layer is within the range described above, the antifouling property of the electronic component protective layer can be improved. By setting the root-mean-square slope Sdq to 0.0001 or more, the electronic component protective layer can be provided with an appropriate unevenness slope, and adhesion of dust can be suppressed. On the other hand, by setting the root-mean-square slope Sdq to 5 or less, it is possible to suppress fine dust and dirt from adhering to the uneven wall surface of the electronic component protective layer. The root-mean-square slope Sdq of the electronic component protective layer is more preferably 0.0005 to 4.5, even more preferably 0.001 to 4, and particularly 0.005 to 3.5. preferable.
《Flop Index(FI)》
Flop Index(FI)(以下、FIともいう)は数式(1)によって算出されるパラメータである。
FI測定系を図2Aに示す。FIは、測定対象表面13の垂線方向に対して45°の入射角で光(入射光12)を照射し、一定の角度で反射された光(正反射光)を検出器によって検出し、数値化した明度L*を用いて算出される。L*はJIS Z8781‐4で規定されるL*a*b*表色系における明度L*であり、L*
15°、L*
45°、L*
110°は、それぞれ、測定対象表面の垂線方向に対して45°の角度で入射した光の正反射光からのオフセット角15°、45°、110°で観測されるL*である。
FIは測定対象表面の凹凸険しさと表面凹凸の秩序性を評価する指標となる。図2Bに示すように、測定対象表面の凹凸が激しく、無秩序な場合は、入射光12はあらゆる角度で反射(散乱)されるため、検知される光量の角度依存性は小さくなる。その結果、数式(1)によって算出されるFIの値は小さな値となる。一方、図2Cに示すように、測定対象表面の凹凸がなだらかであり、秩序性が高い場合は、入射光12は一定の角度で強く反射されるため、検知される光量の角度依存性は大きくなる。特に、前述のオフセット角15°、45°、110°で観測される光のうち、15°の光量が大きくなるため、FIは大きな値となる。 《Flop Index (FI)》
Flop Index (FI) (hereinafter also referred to as FI) is a parameter calculated by Equation (1).
The FI measurement system is shown in FIG. 2A. FI irradiates light (incident light 12) at an incident angle of 45° with respect to the direction perpendicular to the measurement target surface 13, detects light reflected at a certain angle (specularly reflected light) by a detector, and obtains a numerical value calculated using the converted lightness L * . L * is the lightness L * in the L * a * b * color system defined in JIS Z8781-4, and L * 15° , L * 45° , and L * 110° are perpendicular to the surface of the object to be measured. L * observed at offset angles of 15°, 45°, and 110° from specularly reflected light for light incident at an angle of 45° to the direction.
The FI is an index for evaluating the roughness of the surface to be measured and the orderliness of the surface irregularities. As shown in FIG. 2B, when the surface of the object to be measured is highly uneven and chaotic, theincident light 12 is reflected (scattered) at all angles, so the angle dependence of the amount of light detected is small. As a result, the value of FI calculated by Equation (1) becomes a small value. On the other hand, as shown in FIG. 2C, when the unevenness of the surface of the object to be measured is smooth and highly ordered, the incident light 12 is strongly reflected at a constant angle. Become. In particular, among the light observed at the offset angles of 15°, 45°, and 110°, the amount of light at 15° increases, so FI takes a large value.
Flop Index(FI)(以下、FIともいう)は数式(1)によって算出されるパラメータである。
FIは測定対象表面の凹凸険しさと表面凹凸の秩序性を評価する指標となる。図2Bに示すように、測定対象表面の凹凸が激しく、無秩序な場合は、入射光12はあらゆる角度で反射(散乱)されるため、検知される光量の角度依存性は小さくなる。その結果、数式(1)によって算出されるFIの値は小さな値となる。一方、図2Cに示すように、測定対象表面の凹凸がなだらかであり、秩序性が高い場合は、入射光12は一定の角度で強く反射されるため、検知される光量の角度依存性は大きくなる。特に、前述のオフセット角15°、45°、110°で観測される光のうち、15°の光量が大きくなるため、FIは大きな値となる。 《Flop Index (FI)》
Flop Index (FI) (hereinafter also referred to as FI) is a parameter calculated by Equation (1).
The FI is an index for evaluating the roughness of the surface to be measured and the orderliness of the surface irregularities. As shown in FIG. 2B, when the surface of the object to be measured is highly uneven and chaotic, the
(FIの効果)
第1実施形態における電子部品保護層表面のFIは、0.3~80である。FIは前述の範囲内であることで、電子部品保護層のダイシング適性と電圧耐性(絶縁破壊電圧)を良好なものとすることができる。FIが0.3以上であることで、電子部品保護層表面の凹凸形状に一定の秩序性を付与することが可能となる。電子部品保護層に電圧が印加された際に表面凹凸形状に一定の秩序性をもたせることにより、絶縁破壊の起点が発生することを抑制することが可能となるため、電圧耐性(絶縁破壊電圧)が向上する。一方、電子部品保護層表面のFIが80以下であることで、表面凹凸形状に一定の無秩序性を付与することが可能となる。凹凸形状が高い秩序性を有する表面では、切断などで加わる外部応力が特定箇所に集中しやすくなるが、凹凸が一定の無秩序性を有する場合は、当該外部応力を適切に分散させることができ、ダイシング適性が向上する。また、冷熱サイクル耐性を向上させることができる。電子部品保護層表面のFIは1~75であることがより好ましく、3~50であることがさらに好ましく、5~26であることが特に好ましい。 (Effect of FI)
The FI of the surface of the electronic component protective layer in the first embodiment is 0.3-80. When FI is within the above range, the dicing aptitude and voltage resistance (dielectric breakdown voltage) of the electronic component protective layer can be improved. When the FI is 0.3 or more, it is possible to impart a certain degree of orderliness to the uneven shape of the surface of the electronic component protective layer. When a voltage is applied to the protective layer for electronic components, it is possible to suppress the occurrence of starting points for dielectric breakdown by giving a certain degree of order to the uneven surface shape, so voltage resistance (dielectric breakdown voltage) improves. On the other hand, when the FI of the surface of the electronic component protective layer is 80 or less, it is possible to impart a certain degree of disorder to the uneven shape of the surface. On a surface with a highly ordered uneven shape, external stress applied by cutting or the like tends to concentrate at a specific location. Dicing aptitude is improved. Moreover, thermal cycle resistance can be improved. The FI of the surface of the electronic component protective layer is more preferably 1-75, still more preferably 3-50, and particularly preferably 5-26.
第1実施形態における電子部品保護層表面のFIは、0.3~80である。FIは前述の範囲内であることで、電子部品保護層のダイシング適性と電圧耐性(絶縁破壊電圧)を良好なものとすることができる。FIが0.3以上であることで、電子部品保護層表面の凹凸形状に一定の秩序性を付与することが可能となる。電子部品保護層に電圧が印加された際に表面凹凸形状に一定の秩序性をもたせることにより、絶縁破壊の起点が発生することを抑制することが可能となるため、電圧耐性(絶縁破壊電圧)が向上する。一方、電子部品保護層表面のFIが80以下であることで、表面凹凸形状に一定の無秩序性を付与することが可能となる。凹凸形状が高い秩序性を有する表面では、切断などで加わる外部応力が特定箇所に集中しやすくなるが、凹凸が一定の無秩序性を有する場合は、当該外部応力を適切に分散させることができ、ダイシング適性が向上する。また、冷熱サイクル耐性を向上させることができる。電子部品保護層表面のFIは1~75であることがより好ましく、3~50であることがさらに好ましく、5~26であることが特に好ましい。 (Effect of FI)
The FI of the surface of the electronic component protective layer in the first embodiment is 0.3-80. When FI is within the above range, the dicing aptitude and voltage resistance (dielectric breakdown voltage) of the electronic component protective layer can be improved. When the FI is 0.3 or more, it is possible to impart a certain degree of orderliness to the uneven shape of the surface of the electronic component protective layer. When a voltage is applied to the protective layer for electronic components, it is possible to suppress the occurrence of starting points for dielectric breakdown by giving a certain degree of order to the uneven surface shape, so voltage resistance (dielectric breakdown voltage) improves. On the other hand, when the FI of the surface of the electronic component protective layer is 80 or less, it is possible to impart a certain degree of disorder to the uneven shape of the surface. On a surface with a highly ordered uneven shape, external stress applied by cutting or the like tends to concentrate at a specific location. Dicing aptitude is improved. Moreover, thermal cycle resistance can be improved. The FI of the surface of the electronic component protective layer is more preferably 1-75, still more preferably 3-50, and particularly preferably 5-26.
更に本発明者は鋭意検討の結果、電子部品保護層表面のFIを5~26とすることで、冷熱サイクル耐性がより向上することを見出した。電子部品搭載基板は電子機器へ組み込まれた後、様々な温度環境下で使用されることから、電子部品保護層は急激な温度変化に曝されることがある。電子部品保護層表面のFIが特定の範囲内であり、表面凹凸が一定程度の無秩序性を有する場合、急激な温度変化に対する電子部品保護層の膨張・収縮に起因する応力を適度に分散することが可能となるため、温度変化時に電子部品保護層が破損するのを防ぐことができる。
Furthermore, as a result of intensive studies, the inventors of the present invention found that by setting the FI of the surface of the electronic component protective layer to 5 to 26, the thermal cycle resistance is further improved. Since electronic component-mounted substrates are used in various temperature environments after they are incorporated into electronic equipment, the electronic component protective layer may be exposed to rapid temperature changes. When the FI of the surface of the electronic component protective layer is within a specific range and the surface unevenness has a certain degree of disorder, the stress caused by the expansion and contraction of the electronic component protective layer due to a sudden temperature change is appropriately dispersed. Therefore, it is possible to prevent the electronic component protective layer from being damaged when the temperature changes.
[Sq、Sdq、FIの制御方法]
電子部品保護層表面の二乗平均平方根高さSq、二乗平均平方根傾斜Sdq、Flop Index(FI)を制御する方法は、物体の表面形状を調整する方法として従来公知の方法を適用することができ、それぞれ異なった方法を適用することもでき、あるいは共通した方法を適用することもできる。具体的には、研磨布紙を用いて表面を研磨する方法、圧縮空気によって研磨材を電子部品保護層表面に吹き付けるショットブラスト法、所定の二乗平均平方根高さSq、二乗平均平方根傾斜Sdq、あるいはFIを有するキャリア材の上に電子部品保護層の前駆体となる電子部品保護シート6(図4参照)を形成し、キャリア材表面の凹凸を転写する方法、所定の二乗平均平方根高さSq、二乗平均平方根傾斜Sdq、あるいはFIを有するフィルムと電子部品保護シート6を圧着し、フィルム表面の凹凸を転写する方法、電子部品保護層に粒子状物質を含有させて表面凹凸を制御する、といった方法が挙げられる。電子部品保護層表面のSq、Sdq、FIを制御する方法としては、例示した方法に限定されるものではないが、電子部品保護層に粒子状物質を含有させて表面凹凸を制御する方法であれば、特に前/後処理も行う必要がなくなるため、生産性の観点から好ましい。 [Sq, Sdq, FI control method]
The method of controlling the root-mean-square height Sq, the root-mean-square slope Sdq, and Flop Index (FI) of the surface of the electronic component protective layer can be a conventionally known method for adjusting the surface shape of an object, Different methods can be applied, or a common method can be applied. Specifically, a method of polishing the surface using abrasive cloth and paper, a shot blasting method of spraying an abrasive material on the surface of the electronic component protective layer with compressed air, a predetermined root mean square height Sq, a root mean square inclination Sdq, or A method of forming an electronic component protection sheet 6 (see FIG. 4), which is a precursor of an electronic component protection layer, on a carrier material having FI, and transferring irregularities on the surface of the carrier material, a predetermined root mean square height Sq, A method of pressing a film having a root-mean-square slope Sdq or FI and an electronic componentprotective sheet 6 to transfer unevenness on the film surface, a method of controlling surface unevenness by incorporating particulate matter into the electronic component protective layer. is mentioned. The method for controlling Sq, Sdq, and FI on the surface of the electronic component protective layer is not limited to the exemplified methods, but any method of controlling the surface unevenness by incorporating particulate matter into the electronic component protective layer This is preferable from the viewpoint of productivity because it eliminates the need for pre- and post-treatments.
電子部品保護層表面の二乗平均平方根高さSq、二乗平均平方根傾斜Sdq、Flop Index(FI)を制御する方法は、物体の表面形状を調整する方法として従来公知の方法を適用することができ、それぞれ異なった方法を適用することもでき、あるいは共通した方法を適用することもできる。具体的には、研磨布紙を用いて表面を研磨する方法、圧縮空気によって研磨材を電子部品保護層表面に吹き付けるショットブラスト法、所定の二乗平均平方根高さSq、二乗平均平方根傾斜Sdq、あるいはFIを有するキャリア材の上に電子部品保護層の前駆体となる電子部品保護シート6(図4参照)を形成し、キャリア材表面の凹凸を転写する方法、所定の二乗平均平方根高さSq、二乗平均平方根傾斜Sdq、あるいはFIを有するフィルムと電子部品保護シート6を圧着し、フィルム表面の凹凸を転写する方法、電子部品保護層に粒子状物質を含有させて表面凹凸を制御する、といった方法が挙げられる。電子部品保護層表面のSq、Sdq、FIを制御する方法としては、例示した方法に限定されるものではないが、電子部品保護層に粒子状物質を含有させて表面凹凸を制御する方法であれば、特に前/後処理も行う必要がなくなるため、生産性の観点から好ましい。 [Sq, Sdq, FI control method]
The method of controlling the root-mean-square height Sq, the root-mean-square slope Sdq, and Flop Index (FI) of the surface of the electronic component protective layer can be a conventionally known method for adjusting the surface shape of an object, Different methods can be applied, or a common method can be applied. Specifically, a method of polishing the surface using abrasive cloth and paper, a shot blasting method of spraying an abrasive material on the surface of the electronic component protective layer with compressed air, a predetermined root mean square height Sq, a root mean square inclination Sdq, or A method of forming an electronic component protection sheet 6 (see FIG. 4), which is a precursor of an electronic component protection layer, on a carrier material having FI, and transferring irregularities on the surface of the carrier material, a predetermined root mean square height Sq, A method of pressing a film having a root-mean-square slope Sdq or FI and an electronic component
《光学濃度(OD値)》
光学濃度(以下、OD値と省略もする)は対象物を透過する入射光線の減衰率であり数式(6)によって算出されるパラメータである。PIは特定波長における入射光量、PTは特定波長の透過光量を表す。
光学濃度(OD値)が大きくなるほど入射光の減衰率は大きくなることから、対象物の光線遮蔽性は良好であるといえる。図1に示すように、電子部品2上に電子部品保護層3が積層された構造においては、電子部品保護層3の光学濃度(OD値)が高いほど、光線遮蔽性が高く、下層の電子部品2に光が照射、反射されることがなくなり、電子部品の色味は観察者から観測されにくくなる。よって、電子部品と電子部品保護層の色味が同一でない場合には、電子部品上に電子部品保護層が積層されている部分と積層されていない部分を外観から判断することができる。前述の観点から、電子部品保護層のISO 5-2で定められる360~760nm(可視光領域)の光学濃度(OD値)は0.5~6の範囲内であることが好ましく、1~6であることがより好ましく、2~6の範囲内であることが更に好ましい。
<<Optical density (OD value)>>
Optical density (hereinafter also abbreviated as OD value) is the attenuation rate of incident light that passes through an object, and is a parameter calculated by Equation (6). PI represents the amount of incident light at a specific wavelength, and PT represents the amount of transmitted light at the specific wavelength.
Since the attenuation rate of incident light increases as the optical density (OD value) increases, it can be said that the light shielding property of the object is good. As shown in FIG. 1, in the structure in which the electronic component protective layer 3 is laminated on the electronic component 2, the higher the optical density (OD value) of the electronic component protective layer 3, the higher the light shielding property. Light is no longer irradiated or reflected on the component 2, and the color of the electronic component is less likely to be observed by an observer. Therefore, when the color of the electronic component and the electronic component protective layer are not the same, it is possible to determine from the appearance whether the electronic component protective layer is laminated on the electronic component or not. From the above point of view, the optical density (OD value) at 360 to 760 nm (visible light region) defined by ISO 5-2 of the electronic component protective layer is preferably in the range of 0.5 to 6. and more preferably in the range of 2 to 6.
光学濃度(以下、OD値と省略もする)は対象物を透過する入射光線の減衰率であり数式(6)によって算出されるパラメータである。PIは特定波長における入射光量、PTは特定波長の透過光量を表す。
Optical density (hereinafter also abbreviated as OD value) is the attenuation rate of incident light that passes through an object, and is a parameter calculated by Equation (6). PI represents the amount of incident light at a specific wavelength, and PT represents the amount of transmitted light at the specific wavelength.
電子部品保護層において、電子部品のエッジ部等のヒビ割れ、電子部品保護層の端部が流動しすぎ(染み出し)ていないか等の品質チェック精度を高める技術が求められている。電子部品保護層を黒に着色する方法があるが、単純に黒く着色するのみでは、例えば電子部品に黒色の封止樹脂で封止されたチップ上では識別しにくく、検査精度を高める技術が求められている。第1実施形態の電子部品保護層によれば、OD値を上記範囲とすることにより、電子部品保護層自体を適度に着色させ、視認性を高め、検査精度を効果的に高めることができる。
In the electronic component protective layer, there is a need for a technology to improve the accuracy of quality checks, such as whether there are cracks at the edge of the electronic component, or whether the edge of the electronic component protective layer is flowing too much (bleeding out). There is a method of coloring the electronic component protective layer black, but simply coloring it black makes it difficult to distinguish, for example, on a chip sealed with black sealing resin on the electronic component. It is According to the electronic component protective layer of the first embodiment, by setting the OD value within the above range, the electronic component protective layer itself can be appropriately colored, the visibility can be improved, and the inspection accuracy can be effectively improved.
電子部品保護層のOD値を高める方法として、高い吸光特性を示すバインダー樹脂を用いる方法、入射光を散乱させるフィラーを含有させる方法が例示できる。後述する粒状改質剤についても前述する入射光の散乱効果を得ることができ、粒状改質剤の種類および/又は量を制御することで、電子部品保護層のOD値を所望の範囲とすることが可能となる。
Examples of methods for increasing the OD value of the electronic component protective layer include a method of using a binder resin that exhibits high light absorption characteristics and a method of including a filler that scatters incident light. The above-mentioned scattering effect of incident light can also be obtained with the granular modifier described later, and by controlling the type and / or amount of the granular modifier, the OD value of the electronic component protective layer is set to the desired range. becomes possible.
《L*a*b*値》
第1実施形態の電子部品保護層はJIS Z8781‐4で定められるL*a*b*表色系における、L*値が1~50、かつa*値が-10~10、かつb*値が-10~10であることが好ましい。L*a*b*値を前記範囲とすることで、基板との色味の違いが明確となり、識別性が向上する。なお、L*a*b*値は色空間を表す座標軸である。L*は、明度を意味する次元、a*およびb*は、補色次元を意味する。L*値が低く、a*b*値が0に近しい程、対象面の漆黒性は高くなり、通常着色されている基板との色味の違いは明確となる。ここでL*はFI測定におけるL* 45である。L*値は1~40であることがより好ましく、1~30であることが更に好ましい。また、a*値、およびb*値は-5~5であることがより好ましく、-3~3であることが更に好ましい。 <<L * a * b * value>>
The electronic component protective layer of the first embodiment has an L * value of 1 to 50, an a * value of −10 to 10, and a b * value in the L * a * b * color system defined by JIS Z8781-4. is preferably -10 to 10. By setting the L * a * b * values within the above range, the difference in color from the substrate becomes clear, and the distinguishability is improved. Note that the L * a * b * values are coordinate axes representing the color space. L * is the dimension denoting lightness, a * and b * denoting complementary color dimensions. The lower the L * value and the closer the a * b * value is to 0, the higher the jet-blackness of the target surface, and the clearer the difference in color tone from the normally colored substrate. where L * is L * 45 in FI measurements. The L * value is more preferably 1-40, even more preferably 1-30. Further, the a * value and b * value are more preferably -5 to 5, and even more preferably -3 to 3.
第1実施形態の電子部品保護層はJIS Z8781‐4で定められるL*a*b*表色系における、L*値が1~50、かつa*値が-10~10、かつb*値が-10~10であることが好ましい。L*a*b*値を前記範囲とすることで、基板との色味の違いが明確となり、識別性が向上する。なお、L*a*b*値は色空間を表す座標軸である。L*は、明度を意味する次元、a*およびb*は、補色次元を意味する。L*値が低く、a*b*値が0に近しい程、対象面の漆黒性は高くなり、通常着色されている基板との色味の違いは明確となる。ここでL*はFI測定におけるL* 45である。L*値は1~40であることがより好ましく、1~30であることが更に好ましい。また、a*値、およびb*値は-5~5であることがより好ましく、-3~3であることが更に好ましい。 <<L * a * b * value>>
The electronic component protective layer of the first embodiment has an L * value of 1 to 50, an a * value of −10 to 10, and a b * value in the L * a * b * color system defined by JIS Z8781-4. is preferably -10 to 10. By setting the L * a * b * values within the above range, the difference in color from the substrate becomes clear, and the distinguishability is improved. Note that the L * a * b * values are coordinate axes representing the color space. L * is the dimension denoting lightness, a * and b * denoting complementary color dimensions. The lower the L * value and the closer the a * b * value is to 0, the higher the jet-blackness of the target surface, and the clearer the difference in color tone from the normally colored substrate. where L * is L * 45 in FI measurements. The L * value is more preferably 1-40, even more preferably 1-30. Further, the a * value and b * value are more preferably -5 to 5, and even more preferably -3 to 3.
第1実施形態の電子部品保護層は、Sdq、OD値、およびL*a*b*値を最適化することでいかなる色の電子部品及び基板上に電子部品保護層を形成しても電子部品保護層を視認できるようになり、検査精度を顕著に向上させることができる。
By optimizing the Sdq, the OD value, and the L * a * b * value, the electronic component protective layer of the first embodiment can be used to form an electronic component protective layer on any color electronic component and substrate. The protective layer can be visually recognized, and the inspection accuracy can be significantly improved.
《電子部品保護層の絶縁性》
電子部品搭載基板に搭載された電子部品や電気回路などの通電材料を被覆保護する必要性から、電子部品保護層は優れた絶縁性を有することが好ましい。具体的には、電子部品保護層の表面抵抗値は1.0×107Ω/□以上であることが好ましく、1.0×108Ω/□以上であることがより好ましく、1.0×109Ω/□以上であることがさらに好ましい。 《Insulating property of electronic component protective layer》
It is preferable that the electronic component protective layer has excellent insulating properties because it is necessary to cover and protect conductive materials such as electronic components and electric circuits mounted on the electronic component mounting board. Specifically, the surface resistance value of the electronic component protective layer is preferably 1.0×10 7 Ω/□ or more, more preferably 1.0×10 8 Ω/□ or more, and 1.0 More preferably, it is x10 9 Ω/□ or more.
電子部品搭載基板に搭載された電子部品や電気回路などの通電材料を被覆保護する必要性から、電子部品保護層は優れた絶縁性を有することが好ましい。具体的には、電子部品保護層の表面抵抗値は1.0×107Ω/□以上であることが好ましく、1.0×108Ω/□以上であることがより好ましく、1.0×109Ω/□以上であることがさらに好ましい。 《Insulating property of electronic component protective layer》
It is preferable that the electronic component protective layer has excellent insulating properties because it is necessary to cover and protect conductive materials such as electronic components and electric circuits mounted on the electronic component mounting board. Specifically, the surface resistance value of the electronic component protective layer is preferably 1.0×10 7 Ω/□ or more, more preferably 1.0×10 8 Ω/□ or more, and 1.0 More preferably, it is x10 9 Ω/□ or more.
《バインダー樹脂》
電子部品保護層は、バインダー樹脂を含む。バインダー樹脂は電子部品保護層の基体となる。後述する粒状改質剤やその他の任意成分を含む。バインダー樹脂は、熱可塑性樹脂、もしくは熱硬化性樹脂および硬化剤、のいずれか若しくは組み合わせて用いることができる。 《Binder Resin》
The electronic component protective layer contains a binder resin. The binder resin becomes the base of the electronic component protective layer. It contains a granularity modifier and other optional ingredients, which will be described later. The binder resin can be a thermoplastic resin or a thermosetting resin and a curing agent, or can be used in combination.
電子部品保護層は、バインダー樹脂を含む。バインダー樹脂は電子部品保護層の基体となる。後述する粒状改質剤やその他の任意成分を含む。バインダー樹脂は、熱可塑性樹脂、もしくは熱硬化性樹脂および硬化剤、のいずれか若しくは組み合わせて用いることができる。 《Binder Resin》
The electronic component protective layer contains a binder resin. The binder resin becomes the base of the electronic component protective layer. It contains a granularity modifier and other optional ingredients, which will be described later. The binder resin can be a thermoplastic resin or a thermosetting resin and a curing agent, or can be used in combination.
[熱可塑性樹脂]
熱可塑性樹脂としては、ポリオレフィン系樹脂、ビニル系樹脂、スチレン・アクリル系樹脂、ジエン系樹脂、テルペン樹脂、石油樹脂、セルロース系樹脂、ポリアミド樹脂、ポリウレタン樹脂、ポリエステル樹脂、ポリカーボネート樹脂、ポリイミド樹脂、液晶ポリマー、フッ素樹脂等が挙げられる。特に限定するものではないが、耐熱性の観点から、ポリアミド樹脂、ポリウレタン樹脂、ポリエステル樹脂、ポリカーボネート樹脂、ポリイミド樹脂、液晶ポリマー、フッ素樹脂がより好ましい。熱可塑性樹脂は、単独または2種類以上併用できる。 [Thermoplastic resin]
Thermoplastic resins include polyolefin resins, vinyl resins, styrene/acrylic resins, diene resins, terpene resins, petroleum resins, cellulose resins, polyamide resins, polyurethane resins, polyester resins, polycarbonate resins, polyimide resins, and liquid crystals. Examples include polymers and fluororesins. Polyamide resins, polyurethane resins, polyester resins, polycarbonate resins, polyimide resins, liquid crystal polymers, and fluorine resins are more preferable from the viewpoint of heat resistance, although they are not particularly limited. The thermoplastic resin can be used alone or in combination of two or more.
熱可塑性樹脂としては、ポリオレフィン系樹脂、ビニル系樹脂、スチレン・アクリル系樹脂、ジエン系樹脂、テルペン樹脂、石油樹脂、セルロース系樹脂、ポリアミド樹脂、ポリウレタン樹脂、ポリエステル樹脂、ポリカーボネート樹脂、ポリイミド樹脂、液晶ポリマー、フッ素樹脂等が挙げられる。特に限定するものではないが、耐熱性の観点から、ポリアミド樹脂、ポリウレタン樹脂、ポリエステル樹脂、ポリカーボネート樹脂、ポリイミド樹脂、液晶ポリマー、フッ素樹脂がより好ましい。熱可塑性樹脂は、単独または2種類以上併用できる。 [Thermoplastic resin]
Thermoplastic resins include polyolefin resins, vinyl resins, styrene/acrylic resins, diene resins, terpene resins, petroleum resins, cellulose resins, polyamide resins, polyurethane resins, polyester resins, polycarbonate resins, polyimide resins, and liquid crystals. Examples include polymers and fluororesins. Polyamide resins, polyurethane resins, polyester resins, polycarbonate resins, polyimide resins, liquid crystal polymers, and fluorine resins are more preferable from the viewpoint of heat resistance, although they are not particularly limited. The thermoplastic resin can be used alone or in combination of two or more.
[熱硬化性樹脂]
熱硬化性樹脂は、硬化剤と反応可能な官能基を複数有する樹脂である。官能基は、例えば、水酸基、フェノール性水酸基、酸無水物基、メトキシメチル基、カルボキシル基、アミノ基、エポキシ基、オキセタニル基、オキサゾリン基、オキサジン基、アジリジン基、チオール基、イソシアネート基、ブロック化イソシアネート基、ブロック化カルボキシル基、シラノール基等が挙げられる。熱硬化性樹脂は、例えば、アクリル樹脂、マレイン酸樹脂、ポリブタジエン系樹脂、ポリエステル樹脂、ポリウレタン樹脂、ポリウレタンウレア樹脂、エポキシ樹脂、オキセタン樹脂、フェノキシ樹脂、ポリイミド樹脂、ポリアミド樹脂、ポリアミドイミド樹脂、フェノール系樹脂、アルキド樹脂、アミノ樹脂、ポリ乳酸樹脂、オキサゾリン樹脂、ベンゾオキサジン樹脂、シリコーン樹脂、フッ素樹脂等の公知の樹脂が挙げられる。熱硬化性樹脂は、単独または2種類以上併用できる。 [Thermosetting resin]
A thermosetting resin is a resin having multiple functional groups capable of reacting with a curing agent. Functional groups include, for example, hydroxyl group, phenolic hydroxyl group, acid anhydride group, methoxymethyl group, carboxyl group, amino group, epoxy group, oxetanyl group, oxazoline group, oxazine group, aziridine group, thiol group, isocyanate group, blocked Isocyanate groups, blocked carboxyl groups, silanol groups and the like can be mentioned. Thermosetting resins include, for example, acrylic resins, maleic acid resins, polybutadiene resins, polyester resins, polyurethane resins, polyurethane urea resins, epoxy resins, oxetane resins, phenoxy resins, polyimide resins, polyamide resins, polyamideimide resins, and phenolic resins. Known resins such as resins, alkyd resins, amino resins, polylactic acid resins, oxazoline resins, benzoxazine resins, silicone resins and fluorine resins can be used. Thermosetting resins can be used alone or in combination of two or more.
熱硬化性樹脂は、硬化剤と反応可能な官能基を複数有する樹脂である。官能基は、例えば、水酸基、フェノール性水酸基、酸無水物基、メトキシメチル基、カルボキシル基、アミノ基、エポキシ基、オキセタニル基、オキサゾリン基、オキサジン基、アジリジン基、チオール基、イソシアネート基、ブロック化イソシアネート基、ブロック化カルボキシル基、シラノール基等が挙げられる。熱硬化性樹脂は、例えば、アクリル樹脂、マレイン酸樹脂、ポリブタジエン系樹脂、ポリエステル樹脂、ポリウレタン樹脂、ポリウレタンウレア樹脂、エポキシ樹脂、オキセタン樹脂、フェノキシ樹脂、ポリイミド樹脂、ポリアミド樹脂、ポリアミドイミド樹脂、フェノール系樹脂、アルキド樹脂、アミノ樹脂、ポリ乳酸樹脂、オキサゾリン樹脂、ベンゾオキサジン樹脂、シリコーン樹脂、フッ素樹脂等の公知の樹脂が挙げられる。熱硬化性樹脂は、単独または2種類以上併用できる。 [Thermosetting resin]
A thermosetting resin is a resin having multiple functional groups capable of reacting with a curing agent. Functional groups include, for example, hydroxyl group, phenolic hydroxyl group, acid anhydride group, methoxymethyl group, carboxyl group, amino group, epoxy group, oxetanyl group, oxazoline group, oxazine group, aziridine group, thiol group, isocyanate group, blocked Isocyanate groups, blocked carboxyl groups, silanol groups and the like can be mentioned. Thermosetting resins include, for example, acrylic resins, maleic acid resins, polybutadiene resins, polyester resins, polyurethane resins, polyurethane urea resins, epoxy resins, oxetane resins, phenoxy resins, polyimide resins, polyamide resins, polyamideimide resins, and phenolic resins. Known resins such as resins, alkyd resins, amino resins, polylactic acid resins, oxazoline resins, benzoxazine resins, silicone resins and fluorine resins can be used. Thermosetting resins can be used alone or in combination of two or more.
これらの中でも耐熱性の点から、ポリウレタン樹脂、ポリウレタンウレア樹脂、ポリエステル樹脂、エポキシ樹脂、フェノキシ樹脂、ポリイミド樹脂、ポリアミド樹脂、ポリアミドイミド樹脂が好ましい。
Among these, polyurethane resins, polyurethane urea resins, polyester resins, epoxy resins, phenoxy resins, polyimide resins, polyamide resins, and polyamideimide resins are preferable from the viewpoint of heat resistance.
[硬化剤]
硬化剤は、熱硬化性樹脂の官能基と反応可能な官能基を複数有している。硬化剤は、例えばエポキシ化合物、酸無水物基含有化合物、イソシアネート化合物、アジリジン化合物、アミン化合物、フェノール化合物、有機金属化合物等の公知の化合物が挙げられる。硬化剤は、単独または2種類以上併用できる。 [Curing agent]
The curing agent has multiple functional groups capable of reacting with the functional groups of the thermosetting resin. Examples of curing agents include known compounds such as epoxy compounds, acid anhydride group-containing compounds, isocyanate compounds, aziridine compounds, amine compounds, phenol compounds, and organometallic compounds. Curing agents can be used alone or in combination of two or more.
硬化剤は、熱硬化性樹脂の官能基と反応可能な官能基を複数有している。硬化剤は、例えばエポキシ化合物、酸無水物基含有化合物、イソシアネート化合物、アジリジン化合物、アミン化合物、フェノール化合物、有機金属化合物等の公知の化合物が挙げられる。硬化剤は、単独または2種類以上併用できる。 [Curing agent]
The curing agent has multiple functional groups capable of reacting with the functional groups of the thermosetting resin. Examples of curing agents include known compounds such as epoxy compounds, acid anhydride group-containing compounds, isocyanate compounds, aziridine compounds, amine compounds, phenol compounds, and organometallic compounds. Curing agents can be used alone or in combination of two or more.
硬化剤は、熱硬化性樹脂100質量部に対して各種1~50質量部含むことが好ましい。硬化剤量が1質量部以上であることで、電子部品保護層に強固な架橋構造が形成されるようになり、電圧耐性(絶縁破壊電圧)が向上する。一方、硬化剤量が50質量部以下であることで、電子部品保護層の過剰な硬化を抑制し、後述する電子部品搭載基板の製造工程において、加熱加圧時に電子部品保護シート6(図4参照)が電子部品の形状に追随して変形し、欠陥のない電子部品保護層を形成することができる。硬化剤は、熱硬化性樹脂100質量部に対して各種3~45質量部含むことがより好ましく、5~40質量部含むことがさらに好ましい。
The curing agent is preferably contained in 1 to 50 parts by mass of each type per 100 parts by mass of the thermosetting resin. When the amount of the curing agent is 1 part by mass or more, a strong crosslinked structure is formed in the electronic component protective layer, and voltage resistance (dielectric breakdown voltage) is improved. On the other hand, since the amount of the curing agent is 50 parts by mass or less, excessive curing of the electronic component protective layer is suppressed, and in the manufacturing process of the electronic component mounting board described later, the electronic component protective sheet 6 (Fig. 4 ) can be deformed following the shape of the electronic component to form a defect-free electronic component protective layer. The curing agent is more preferably contained in 3 to 45 parts by mass, more preferably 5 to 40 parts by mass, per 100 parts by mass of the thermosetting resin.
《粒状改質剤》
電子部品保護層は、粒状改質剤を含むことが好ましい。粒状改質剤は電子部品保護層の、二乗平均平方根高さSq、二乗平均平方根傾斜Sdq、Flop Index(FI)を所望の範囲とすることを主目的として用いられる。また、粒状改質剤の種類、添加量を適宜変更することにより電子部品保護層の弾性率、ヤング率、押し込み固さといった機械的性質を良好な範囲とすることができる。 《Particulate Modifier》
The electronic component protective layer preferably contains a granular modifier. The granular modifier is used mainly for the purpose of setting the root-mean-square height Sq, root-mean-square tilt Sdq, and Flop Index (FI) of the electronic component protective layer within desired ranges. In addition, the mechanical properties such as the elastic modulus, Young's modulus, and indentation hardness of the electronic component protective layer can be controlled within favorable ranges by appropriately changing the type and amount of the particulate modifier.
電子部品保護層は、粒状改質剤を含むことが好ましい。粒状改質剤は電子部品保護層の、二乗平均平方根高さSq、二乗平均平方根傾斜Sdq、Flop Index(FI)を所望の範囲とすることを主目的として用いられる。また、粒状改質剤の種類、添加量を適宜変更することにより電子部品保護層の弾性率、ヤング率、押し込み固さといった機械的性質を良好な範囲とすることができる。 《Particulate Modifier》
The electronic component protective layer preferably contains a granular modifier. The granular modifier is used mainly for the purpose of setting the root-mean-square height Sq, root-mean-square tilt Sdq, and Flop Index (FI) of the electronic component protective layer within desired ranges. In addition, the mechanical properties such as the elastic modulus, Young's modulus, and indentation hardness of the electronic component protective layer can be controlled within favorable ranges by appropriately changing the type and amount of the particulate modifier.
粒状改質剤は、JIS K 6217-4で規定されるDBP吸油量が15~400ml/100gであることが好ましい。粒状改質剤のDBP吸油量が15~400ml/100gであることで、ダイシング適性を向上させることができる。ダイシング適性の向上は、後述する推定作用により生ずると推定されるが、第1実施形態における効果の作用機構については、当該推定作用に限定を受けるものではない。
The granular modifier preferably has a DBP oil absorption of 15 to 400 ml/100 g as defined by JIS K 6217-4. Dicing aptitude can be improved when the DBP oil absorption of the granular modifier is 15 to 400 ml/100 g. The improvement in dicing aptitude is presumed to be caused by the presumed action described later, but the action mechanism of the effect in the first embodiment is not limited to the presumed action.
DBP吸油量は、対象となる物質がDBP(ジブチルフタレート)を吸収できる量を指し、後述する粒状改質剤のアグリゲートの発達度合いを把握するための指標とすることができる。
DBP oil absorption refers to the amount of DBP (dibutyl phthalate) that a target substance can absorb, and can be used as an index for understanding the degree of aggregate development of the granular modifier described later.
第1実施形態の粒状改質剤は、基となる微小粒子(以下、一次粒子21)が凝集、結着、または融着することで二次粒子様結着体(以下、アグリゲート22)を形成する。図3に粒状改質剤のアグリゲートの模式図を示す。
In the granular modifier of the first embodiment, the base microparticles (hereinafter, primary particles 21) are aggregated, bound, or fused to form secondary particle-like bound bodies (hereinafter, aggregates 22). Form. FIG. 3 shows a schematic diagram of aggregates of granular modifiers.
(推定作用)
以下に、粒状改質剤が電子部品保護層のダイシング適性向上に寄与する作用の推定について示す。粒状改質剤の一次粒子21は、静電相互作用等、複数の粒子間相互作用によって、互いに寄せ集まる性質を有し、複数の一次粒子21が凝集、結着、または融着することでアグリゲート22を形成する。一次粒子が凝集する際には、必ずしも一次粒子21が最密充填されることはなく、アグリゲート22には空間23が生じる。
粒状改質剤が油や高分子溶液といった液体に浸漬されると、液体中の低分子、あるいは高分子がアグリゲート中の空間23に入り込む。当該空間23に入り込むのが高分子であれば、当該高分子は分子鎖全てが当該空間23に入り込むのではなく、分子鎖の一部分が空間23内に入り込む。上述の現象が、高分子中の複数末端で生じた際には、複数の粒状改質剤が高分子鎖によって繋がれた状態が形成される。前述する現象が、電子部品保護層で多数形成されることで、疑似架橋構造が形成され、電子部品保護層の強度が向上しダイシング時のダレやバリの発生を抑制する。 (Estimated action)
The estimation of the effect of the particulate modifier on improving the dicing aptitude of the protective layer for electronic parts will be described below. Theprimary particles 21 of the granular modifier have the property of gathering together due to a plurality of inter-particle interactions such as electrostatic interactions, and aggregation, binding, or fusion of the plurality of primary particles 21 causes agglomeration. A gate 22 is formed. When the primary particles agglomerate, the primary particles 21 are not always packed closely, and spaces 23 are generated in the aggregates 22 .
When the granular modifier is immersed in a liquid such as oil or polymer solution, low-molecular weight or high-molecular weight molecules in the liquid enter thespace 23 in the aggregate. If it is a macromolecule that enters the space 23 , a part of the molecular chain of the macromolecule enters the space 23 rather than all of the molecular chain enters the space 23 . When the above-mentioned phenomenon occurs at multiple terminals in a polymer, a state is formed in which multiple granular modifiers are linked by polymer chains. A large number of the above-described phenomena are formed in the electronic component protective layer to form a pseudo-crosslinked structure, which improves the strength of the electronic component protective layer and suppresses the occurrence of sagging and burrs during dicing.
以下に、粒状改質剤が電子部品保護層のダイシング適性向上に寄与する作用の推定について示す。粒状改質剤の一次粒子21は、静電相互作用等、複数の粒子間相互作用によって、互いに寄せ集まる性質を有し、複数の一次粒子21が凝集、結着、または融着することでアグリゲート22を形成する。一次粒子が凝集する際には、必ずしも一次粒子21が最密充填されることはなく、アグリゲート22には空間23が生じる。
粒状改質剤が油や高分子溶液といった液体に浸漬されると、液体中の低分子、あるいは高分子がアグリゲート中の空間23に入り込む。当該空間23に入り込むのが高分子であれば、当該高分子は分子鎖全てが当該空間23に入り込むのではなく、分子鎖の一部分が空間23内に入り込む。上述の現象が、高分子中の複数末端で生じた際には、複数の粒状改質剤が高分子鎖によって繋がれた状態が形成される。前述する現象が、電子部品保護層で多数形成されることで、疑似架橋構造が形成され、電子部品保護層の強度が向上しダイシング時のダレやバリの発生を抑制する。 (Estimated action)
The estimation of the effect of the particulate modifier on improving the dicing aptitude of the protective layer for electronic parts will be described below. The
When the granular modifier is immersed in a liquid such as oil or polymer solution, low-molecular weight or high-molecular weight molecules in the liquid enter the
当該推定作用は、アグリゲート中の空間の大きさに影響を受ける。即ち、アグリゲートの発達がより進み、大きくなるほど、一次粒子は最密充填で凝集することが困難となり、より広い空間が形成されたり、より多数の空間が形成される。それにより、粒状改質剤はより高密度な疑似架橋構造を形成し、電子部品保護層はより高い強度を得る。
The estimated action is affected by the size of the space in the aggregate. That is, the more the aggregates develop and become larger, the more difficult it becomes for the primary particles to agglomerate in a close-packed manner, and a wider space or a greater number of spaces are formed. As a result, the particulate modifier forms a higher-density pseudo-crosslinked structure, and the electronic component protective layer obtains higher strength.
当該空間の大きさを測る指標として、DBP吸油量が用いられる。DBP吸油量は、対象となる物質がDBP(ジブチルフタレート)を吸収できる量、即ちアグリゲート中の空間の総体積と正の相関関係にある。DBP吸油量が高いほど、アグリゲート中の空間は広く、多くなり、電子部品保護層には高密度な疑似架橋構造が形成される。
以上が粒状改質剤による電子部品保護層の強度向上における推定作用である。但し、第1実施形態における効果の作用機構については、当該推定作用に限定を受けるものではない。 DBP oil absorption is used as an index for measuring the size of the space. The DBP oil absorption has a positive correlation with the amount of DBP (dibutyl phthalate) that can be absorbed by the target substance, that is, with the total volume of space in the aggregate. The higher the DBP oil absorption, the wider and more the space in the aggregate, and the higher the density of the pseudo-crosslinked structure formed in the electronic component protective layer.
The above is the presumed function of improving the strength of the electronic component protective layer by the particulate modifier. However, the action mechanism of the effect in the first embodiment is not limited to the presumed action.
以上が粒状改質剤による電子部品保護層の強度向上における推定作用である。但し、第1実施形態における効果の作用機構については、当該推定作用に限定を受けるものではない。 DBP oil absorption is used as an index for measuring the size of the space. The DBP oil absorption has a positive correlation with the amount of DBP (dibutyl phthalate) that can be absorbed by the target substance, that is, with the total volume of space in the aggregate. The higher the DBP oil absorption, the wider and more the space in the aggregate, and the higher the density of the pseudo-crosslinked structure formed in the electronic component protective layer.
The above is the presumed function of improving the strength of the electronic component protective layer by the particulate modifier. However, the action mechanism of the effect in the first embodiment is not limited to the presumed action.
第1実施形態で用いられる粒状改質剤は、JIS K 6217-4で規定されるDBP吸油量が15~400ml/100gである。粒状改質剤のDBP吸油量が15ml/100g以上であることで、アグリゲートの発達度合いを充分なものとでき、充分な疑似架橋効果が生じる。その結果、電子部品保護層を積層した電子部品搭載基板をダイシング加工した際に、電子部品保護層のダレを抑制することができる。また、粒状改質剤のDBP吸油量が400ml/100g以下であることで、多量の高分子が粒状改質剤に取り込まれるのを防ぎ、高分子が不足した領域の発生を抑え、電子部品保護層を積層した電子部品搭載基板をダイシング加工した際に、当該欠陥を起点とした電子部品保護層の割れなどの外観不良発生を抑制することができる。粒状改質剤のDBP吸油量は30~350ml/100gがより好ましく、50~250ml/100gが更に好ましい。
The granular modifier used in the first embodiment has a DBP oil absorption of 15 to 400 ml/100 g as defined by JIS K 6217-4. When the DBP oil absorption of the granular modifier is 15 ml/100 g or more, the degree of aggregate development can be made sufficient, and a sufficient pseudo-crosslinking effect can be produced. As a result, when the electronic component mounting board on which the electronic component protective layer is laminated is diced, the electronic component protective layer can be prevented from sagging. In addition, since the DBP oil absorption of the granular modifier is 400 ml/100 g or less, it prevents a large amount of polymer from being taken into the granular modifier, suppresses the occurrence of areas where the polymer is insufficient, and protects electronic parts. When an electronic component mounting substrate having laminated layers is diced, it is possible to suppress appearance defects such as cracking of the electronic component protective layer originating from the defects. The DBP oil absorption of the granular modifier is more preferably 30 to 350 ml/100 g, more preferably 50 to 250 ml/100 g.
電子部品保護層100質量%中の粒状改質剤含有率は、1~30質量%であることが好ましい。粒状改質剤含有率が1質量%以上であると、電子部品保護層に十分な疑似架橋効果を生じさせることができ、ダイシング適性がより向上する。粒状改質剤含有率が30質量%以下であると、多量の高分子が粒状改質剤に取り込まれるのを防ぎ、電子部品保護層中に高分子が不足した領域の発生を抑え、ダイシング適性がより向上する。電子部品保護層中の粒状改質剤含有率は5~20質量%であることが更に好ましい。
The content of the particulate modifier in 100% by mass of the electronic component protective layer is preferably 1 to 30% by mass. When the content of the particulate modifier is 1% by mass or more, a sufficient pseudo-crosslinking effect can be produced in the electronic component protective layer, and the suitability for dicing is further improved. When the content of the granular modifier is 30% by mass or less, a large amount of polymer is prevented from being incorporated into the granular modifier, suppressing the occurrence of regions lacking polymer in the electronic component protective layer, and dicing suitability. is better. More preferably, the particulate modifier content in the electronic component protective layer is 5 to 20% by mass.
粒状改質剤の例としては、電子部品保護層のダイシング適性を向上させる作用を有するものであれば、制限されないが、カーボンブラック、カーボンナノチューブ、グラファイト、カーボンファイバー、カーボンナノプレートなどの炭素系粒子、または特開2018/185938号公報に記載のリン酸三リチウム(Li3PO4)や、国際公開2016/021467号公報に記載のシリカなどの無機粒子等が挙げられる。アグリゲーションを有し、DBP吸油量が測定可能なものであれば、公知のものを使用することができる。なかでも、カーボンブラックを用いることが好ましい。カーボンブラックは、ケッチェンブラックやアセチレンブラックといった特定の分類がなされるものから、前述のような特定分類がなされないものも含み得る。これらの粒状改質剤は繊維状のカーボンナノチューブのような絡み合った過剰な自己凝集を起こすことなく高分子との強固な相互作用を生じるため、電子部品保護層中に均一分散することができ、ダイシング時の割れを抑制することができるために好ましい。
Examples of particulate modifiers include, but are not limited to, carbon-based particles such as carbon black, carbon nanotubes, graphite, carbon fibers, and carbon nanoplates, as long as they have the effect of improving the dicing aptitude of the electronic component protective layer. , or inorganic particles such as trilithium phosphate (Li 3 PO 4 ) described in JP-A-2018/185938 and silica described in WO 2016/021467. A known one can be used as long as it has aggregation and the DBP oil absorption can be measured. Among them, it is preferable to use carbon black. Carbon black can include those classified as ketjen black and acetylene black as well as those not classified as described above. Since these granular modifiers do not cause excessive entangled self-aggregation like fibrous carbon nanotubes, they generate a strong interaction with the polymer, so they can be uniformly dispersed in the electronic component protective layer. It is preferable because cracking during dicing can be suppressed.
粒状改質剤は電子部品保護層に絶縁性を付与する観点から、体積抵抗率1.0×10-3Ω・cm以上であることが好ましい。粒状改質剤の体積抵抗率は、1.0×107Ω・cm以上であることがより好ましく、1.0×1013Ω・cm以上であることが更に好ましい。粒状改質剤に含まれる物質の体積抵抗率はJIS C2141に準拠して測定できる。体積抵抗率の上限は限定されないが、通常1.0×1017Ω・cm以下である。
The granular modifier preferably has a volume resistivity of 1.0×10 −3 Ω·cm or more from the viewpoint of imparting insulation to the electronic component protective layer. The volume resistivity of the granular modifier is more preferably 1.0×10 7 Ω·cm or more, and even more preferably 1.0×10 13 Ω·cm or more. The volume resistivity of the substance contained in the granular modifier can be measured according to JIS C2141. Although the upper limit of the volume resistivity is not limited, it is usually 1.0×10 17 Ω·cm or less.
粒状改質剤は1種類を単独で使用してもよく、2種類以上を併用してもよい。粒状改質剤を2種類以上併用することにより、それぞれの特性を補完することができる。例えば、第一の粒状改質剤としてカーボンブラック(DBP吸油量:100ml/100g、体積抵抗率:1.6×10-5Ω・cm)を用い、第二の粒状改質剤としてシリカ(DBP吸油量:220ml/100g、体積抵抗率:1.6×1016Ω・cm)を用いた場合、カーボンブラックによってダイシング耐性と識別性を向上させ、シリカによってダイシング耐性と絶縁破壊電圧を向上させる、といったことが可能となる。
One type of granular modifier may be used alone, or two or more types may be used in combination. By using two or more types of granular modifiers in combination, each characteristic can be complemented. For example, carbon black (DBP oil absorption: 100 ml/100 g, volume resistivity: 1.6×10 −5 Ω·cm) is used as the first granular modifier, and silica (DBP Oil absorption: 220 ml/100 g, volume resistivity: 1.6 × 10 16 Ω cm), carbon black improves dicing resistance and distinguishability, and silica improves dicing resistance and dielectric breakdown voltage. Such a thing becomes possible.
《電子部品保護層の厚み》
電子部品保護層の厚みは10~1000μmであることが、絶縁破壊電圧向上と薄膜化を両立する観点から好ましい。電子部品保護層の厚みは、15~500μmであることがより好ましく、20~250μmであることが更に好ましい。 <<Thickness of protective layer for electronic components>>
The thickness of the electronic component protective layer is preferably 10 to 1000 μm from the viewpoint of achieving both improvement in dielectric breakdown voltage and reduction in thickness. The thickness of the electronic component protective layer is more preferably 15 to 500 μm, still more preferably 20 to 250 μm.
電子部品保護層の厚みは10~1000μmであることが、絶縁破壊電圧向上と薄膜化を両立する観点から好ましい。電子部品保護層の厚みは、15~500μmであることがより好ましく、20~250μmであることが更に好ましい。 <<Thickness of protective layer for electronic components>>
The thickness of the electronic component protective layer is preferably 10 to 1000 μm from the viewpoint of achieving both improvement in dielectric breakdown voltage and reduction in thickness. The thickness of the electronic component protective layer is more preferably 15 to 500 μm, still more preferably 20 to 250 μm.
《電子部品保護シート》
電子部品保護シート6は電子部品保護層の前駆体物品であって、絶縁性の樹脂シートである。電子部品保護シートが熱硬化性樹脂を含む場合、電子部品保護シートを所定以上の時間、温度で加熱し、硬化反応を起こすことによって電子部品保護層となる。電子部品保護シートは表面保護のために、片面あるいは両面に剥離性シートを具備していてもよい。また、後述する電子部品保護シートによる被覆保護工程において用いられるクッション材があらかじめ積層されていてもよい。 《Electronic component protection sheet》
The electronic componentprotective sheet 6 is a precursor product of the electronic component protective layer, and is an insulating resin sheet. When the electronic component protective sheet contains a thermosetting resin, the electronic component protective sheet is heated at a temperature for a predetermined time or longer to cause a curing reaction, thereby forming the electronic component protective layer. The electronic component protective sheet may have a peelable sheet on one side or both sides for surface protection. Also, a cushioning material used in the step of covering and protecting with an electronic component protection sheet, which will be described later, may be laminated in advance.
電子部品保護シート6は電子部品保護層の前駆体物品であって、絶縁性の樹脂シートである。電子部品保護シートが熱硬化性樹脂を含む場合、電子部品保護シートを所定以上の時間、温度で加熱し、硬化反応を起こすことによって電子部品保護層となる。電子部品保護シートは表面保護のために、片面あるいは両面に剥離性シートを具備していてもよい。また、後述する電子部品保護シートによる被覆保護工程において用いられるクッション材があらかじめ積層されていてもよい。 《Electronic component protection sheet》
The electronic component
《電子部品保護シートの製造方法》
電子部品保護シートの製造方法は、特に限定されないが、例えば、電子部品保護層を形成する上記バインダー樹脂等の材料を溶媒等に溶解させた組成物を、剥離シートに塗布する方法が挙げられる。塗布方法として、例えば、グラビアコート方式、キスコート方式、ダイコート方式、リップコート方式、コンマコート方式、ブレード方式、ロールコート方式、ナイフコート方式、スプレーコート方式、バーコート方式、スピンコート方式、ディップコート方式、又は、各種印刷方式が挙げられる。 <<Manufacturing method of electronic component protection sheet>>
The method for producing the electronic component protective sheet is not particularly limited, but for example, a method of applying a composition obtained by dissolving a material such as the binder resin that forms the electronic component protective layer in a solvent or the like to a release sheet. Examples of coating methods include gravure coating, kiss coating, die coating, lip coating, comma coating, blade coating, roll coating, knife coating, spray coating, bar coating, spin coating, and dip coating. , or various printing methods.
電子部品保護シートの製造方法は、特に限定されないが、例えば、電子部品保護層を形成する上記バインダー樹脂等の材料を溶媒等に溶解させた組成物を、剥離シートに塗布する方法が挙げられる。塗布方法として、例えば、グラビアコート方式、キスコート方式、ダイコート方式、リップコート方式、コンマコート方式、ブレード方式、ロールコート方式、ナイフコート方式、スプレーコート方式、バーコート方式、スピンコート方式、ディップコート方式、又は、各種印刷方式が挙げられる。 <<Manufacturing method of electronic component protection sheet>>
The method for producing the electronic component protective sheet is not particularly limited, but for example, a method of applying a composition obtained by dissolving a material such as the binder resin that forms the electronic component protective layer in a solvent or the like to a release sheet. Examples of coating methods include gravure coating, kiss coating, die coating, lip coating, comma coating, blade coating, roll coating, knife coating, spray coating, bar coating, spin coating, and dip coating. , or various printing methods.
第1実施形態の電子部品保護シートは、所望の厚みを実現するために2枚以上の電子部品保護シートを積層してもよい。前述のように積層された構成物については、電子部品保護シートのみから構成されていてもよく、中間層として特定の機能を有する層を含んでいてもよい。
For the electronic component protection sheet of the first embodiment, two or more electronic component protection sheets may be laminated to achieve a desired thickness. The structure laminated as described above may be composed only of the electronic component protective sheet, or may include a layer having a specific function as an intermediate layer.
《電子部品保護シートの用途》
第1実施形態の電子部品保護シートは、基板が、金属、樹脂、繊維、セラミック、ガラス、および導電性シリコンのいずれである場合にも、実用上十分な密着力を示す。金属としては、アルミニウム、銅、真鍮、ステンレス、鉄、クロムなどに使用できる。樹脂としてはエポキシ樹脂、ポリエチレンテレフタラート、ポリイミド、ポリアミド、ポリエチレン、ポリプロピレン、ポリオレフィン系グラフトポリマー、ポリスチレン、ポリ塩化ビニルなどに使用できる。それゆえに本電子部品保護シートは極性の異なる異種材料間の密着にも好適に用いることができる。
第1実施形態の電子部品保護シートは、各種基板、すなわち、リジッド基板、FPC基板など各種基板の保護に好適に用いることができる。 《Uses of electronic component protective sheets》
The electronic component protection sheet of the first embodiment exhibits a practically sufficient adhesive strength regardless of whether the substrate is metal, resin, fiber, ceramic, glass, or conductive silicon. Metals that can be used include aluminum, copper, brass, stainless steel, iron, and chromium. As the resin, epoxy resin, polyethylene terephthalate, polyimide, polyamide, polyethylene, polypropylene, polyolefin graft polymer, polystyrene, polyvinyl chloride and the like can be used. Therefore, the present electronic component protection sheet can be suitably used for adhesion between different materials having different polarities.
The electronic component protection sheet of the first embodiment can be suitably used to protect various substrates, such as rigid substrates and FPC substrates.
第1実施形態の電子部品保護シートは、基板が、金属、樹脂、繊維、セラミック、ガラス、および導電性シリコンのいずれである場合にも、実用上十分な密着力を示す。金属としては、アルミニウム、銅、真鍮、ステンレス、鉄、クロムなどに使用できる。樹脂としてはエポキシ樹脂、ポリエチレンテレフタラート、ポリイミド、ポリアミド、ポリエチレン、ポリプロピレン、ポリオレフィン系グラフトポリマー、ポリスチレン、ポリ塩化ビニルなどに使用できる。それゆえに本電子部品保護シートは極性の異なる異種材料間の密着にも好適に用いることができる。
第1実施形態の電子部品保護シートは、各種基板、すなわち、リジッド基板、FPC基板など各種基板の保護に好適に用いることができる。 《Uses of electronic component protective sheets》
The electronic component protection sheet of the first embodiment exhibits a practically sufficient adhesive strength regardless of whether the substrate is metal, resin, fiber, ceramic, glass, or conductive silicon. Metals that can be used include aluminum, copper, brass, stainless steel, iron, and chromium. As the resin, epoxy resin, polyethylene terephthalate, polyimide, polyamide, polyethylene, polypropylene, polyolefin graft polymer, polystyrene, polyvinyl chloride and the like can be used. Therefore, the present electronic component protection sheet can be suitably used for adhesion between different materials having different polarities.
The electronic component protection sheet of the first embodiment can be suitably used to protect various substrates, such as rigid substrates and FPC substrates.
第1実施形態の電子部品保護用シートを使用した電子部品搭載基板は、液晶ディスプレイ、タッチパネル等のほか、ノートPC、携帯電話、スマートフォン、タブレット端末等の電子機器に備えることが好ましい。
Electronic component mounting substrates using the electronic component protection sheet of the first embodiment are preferably provided in electronic devices such as notebook PCs, mobile phones, smartphones, tablet terminals, etc., in addition to liquid crystal displays and touch panels.
《電子部品搭載基板の製造方法》
第1実施形態の電子部品保護シートを用いる電子部品搭載基板の製造方法(以下、被覆保護方法、被覆方法、保護方法と略すことがある)について説明する。
第1実施形態の電子部品搭載基板の製造方法は、1つ以上の電子部品を基板上に搭載する工程(工程i)、電子部品保護シートを用意する工程(工程ii)、前記電子部品のうち、最も高さの高い電子部品と、電子部品保護シートが接するように電子部品保護シートを載置する工程(工程iii、仮貼り工程ともいう)、加熱加圧により前記電子部品保護シートを個々の電子部品の形状に沿うように変形させ、前記電子部品および基板の少なくとも一部を被覆する工程(工程iv)、変形した電子部品保護シートを変形した状態で硬化させ電子部品保護層を形成する工程(工程v)を経て製造できる。これらの工程を経て、第1実施形態の電子部品保護シートから形成される電子部品保護層により被覆保護した電子部品搭載基板が得られる。工程ivと工程vとは一連の工程とすることもできる。 <<Manufacturing method of electronic component mounting board>>
A method for manufacturing an electronic component-mounted substrate using the electronic component protection sheet of the first embodiment (hereinafter sometimes abbreviated as a coating protection method, a coating method, or a protection method) will be described.
A method for manufacturing an electronic component mounting board according to the first embodiment comprises a step of mounting one or more electronic components on the board (step i), a step of preparing an electronic component protection sheet (step ii), and , the step of placing the electronic component protective sheet so that the electronic component protective sheet is in contact with the highest electronic component (step iii, also referred to as temporary sticking step), and the electronic component protective sheet is individually separated by heat and pressure. Deformation along the shape of the electronic component to cover at least a portion of the electronic component and the substrate (step iv); Curing of the deformed electronic component protective sheet in the deformed state to form an electronic component protective layer. It can be produced through (step v). Through these steps, an electronic component mounting substrate coated and protected by an electronic component protective layer formed from the electronic component protective sheet of the first embodiment is obtained. Step iv and step v can also be a series of steps.
第1実施形態の電子部品保護シートを用いる電子部品搭載基板の製造方法(以下、被覆保護方法、被覆方法、保護方法と略すことがある)について説明する。
第1実施形態の電子部品搭載基板の製造方法は、1つ以上の電子部品を基板上に搭載する工程(工程i)、電子部品保護シートを用意する工程(工程ii)、前記電子部品のうち、最も高さの高い電子部品と、電子部品保護シートが接するように電子部品保護シートを載置する工程(工程iii、仮貼り工程ともいう)、加熱加圧により前記電子部品保護シートを個々の電子部品の形状に沿うように変形させ、前記電子部品および基板の少なくとも一部を被覆する工程(工程iv)、変形した電子部品保護シートを変形した状態で硬化させ電子部品保護層を形成する工程(工程v)を経て製造できる。これらの工程を経て、第1実施形態の電子部品保護シートから形成される電子部品保護層により被覆保護した電子部品搭載基板が得られる。工程ivと工程vとは一連の工程とすることもできる。 <<Manufacturing method of electronic component mounting board>>
A method for manufacturing an electronic component-mounted substrate using the electronic component protection sheet of the first embodiment (hereinafter sometimes abbreviated as a coating protection method, a coating method, or a protection method) will be described.
A method for manufacturing an electronic component mounting board according to the first embodiment comprises a step of mounting one or more electronic components on the board (step i), a step of preparing an electronic component protection sheet (step ii), and , the step of placing the electronic component protective sheet so that the electronic component protective sheet is in contact with the highest electronic component (step iii, also referred to as temporary sticking step), and the electronic component protective sheet is individually separated by heat and pressure. Deformation along the shape of the electronic component to cover at least a portion of the electronic component and the substrate (step iv); Curing of the deformed electronic component protective sheet in the deformed state to form an electronic component protective layer. It can be produced through (step v). Through these steps, an electronic component mounting substrate coated and protected by an electronic component protective layer formed from the electronic component protective sheet of the first embodiment is obtained. Step iv and step v can also be a series of steps.
以下、工程iii~工程vについて図4を用いて、電子部品保護シートを用いた加熱加圧による電子部品搭載基板の被覆保護方法の一例を説明する。
An example of a method for covering and protecting an electronic component mounting substrate by heating and pressurizing using an electronic component protection sheet will be described below with reference to FIG. 4 for steps iii to v.
(工程iii:電子部品保護シート載置工程)
基板1に電子部品2a及び電子部品2bが半田バンプ4によって搭載された電子部品搭載基板(搭載基板ともいう)100を用意する。電子部品2は半導体チップ、コンデンサ、トランジスタ、インダクタ、サーミスタ等であり、基板1に半田バンプ4を介して実装されている。半田バンプ4により、電子部品2a、2bと基板1に間隙が存在する。電子部品2aは、電子部品2bよりも高く設計されている。
次いで、電子部品2a、2bの実装面上に、所定のサイズにカットした電子部品保護シート6を載置する。電子部品2bよりも電子部品2aの高さが大きいので、電子部品保護シート6は電子部品2aと接触し、仮貼りされる。なお、電子部品保護シート6がしなり、電子部品2bと接触することもある(図4では図示せず)。 (Step iii: electronic component protection sheet placement step)
An electronic component mounting substrate (also referred to as a mounting substrate) 100 is prepared in which theelectronic components 2a and the electronic components 2b are mounted on the substrate 1 by means of the solder bumps 4. As shown in FIG. The electronic components 2 are semiconductor chips, capacitors, transistors, inductors, thermistors, etc., and are mounted on the substrate 1 via solder bumps 4 . A gap exists between the electronic components 2 a and 2 b and the substrate 1 due to the solder bumps 4 . The electronic component 2a is designed higher than the electronic component 2b.
Next, an electroniccomponent protection sheet 6 cut into a predetermined size is placed on the mounting surfaces of the electronic components 2a and 2b. Since the electronic component 2a is taller than the electronic component 2b, the electronic component protection sheet 6 contacts the electronic component 2a and is temporarily attached. Note that the electronic component protection sheet 6 may bend and come into contact with the electronic component 2b (not shown in FIG. 4).
基板1に電子部品2a及び電子部品2bが半田バンプ4によって搭載された電子部品搭載基板(搭載基板ともいう)100を用意する。電子部品2は半導体チップ、コンデンサ、トランジスタ、インダクタ、サーミスタ等であり、基板1に半田バンプ4を介して実装されている。半田バンプ4により、電子部品2a、2bと基板1に間隙が存在する。電子部品2aは、電子部品2bよりも高く設計されている。
次いで、電子部品2a、2bの実装面上に、所定のサイズにカットした電子部品保護シート6を載置する。電子部品2bよりも電子部品2aの高さが大きいので、電子部品保護シート6は電子部品2aと接触し、仮貼りされる。なお、電子部品保護シート6がしなり、電子部品2bと接触することもある(図4では図示せず)。 (Step iii: electronic component protection sheet placement step)
An electronic component mounting substrate (also referred to as a mounting substrate) 100 is prepared in which the
Next, an electronic
なお、電子部品保護シート6にはクッション材7を積層してもよい。図4はクッション材を使用した例を示している。クッション材7は電子部品保護シート6を載置した後に積層してもよく、あらかじめ電子部品保護シート6とクッション材7とを重ねた積層体を載置してもよい。上記クッション材7とは加熱加圧時に軟化もしくは溶融する材料であり、電子部品保護シート6の電子部品2a、2bへの、そして電子部品同士の隙間への追随性を促す機能を有する。
クッション材7は、例えば熱可塑性を有する素材であれば特に限定されないが、加圧時の温度よりも低い溶融温度及びガラス転移点(Tg)であることが好ましい。好適な例として、ポリオレフィン系フィルム、塩化ビニルフィルム、PVAフィルムが例示できる。電子部品2aと電子部品2bの間に形成される溝の深さによるが、クッション材の厚みは、通常、100μm~1mm程度である。クッション材7を複数積層する場合には、合計の厚みがこの範囲にあることが好ましい。 A cushion material 7 may be laminated on the electroniccomponent protection sheet 6 . FIG. 4 shows an example using a cushioning material. The cushion material 7 may be laminated after the electronic component protection sheet 6 is placed, or a laminate obtained by stacking the electronic component protection sheet 6 and the cushion material 7 in advance may be placed. The cushion material 7 is a material that softens or melts when heated and pressurized, and has a function of promoting conformability of the electronic component protection sheet 6 to the electronic components 2a and 2b and to gaps between the electronic components.
The cushioning material 7 is not particularly limited as long as it is a thermoplastic material, but preferably has a melting temperature and a glass transition point (Tg) lower than the temperature at the time of pressurization. Suitable examples include polyolefin films, vinyl chloride films, and PVA films. Depending on the depth of the groove formed between theelectronic component 2a and the electronic component 2b, the thickness of the cushioning material is usually about 100 μm to 1 mm. When a plurality of cushion materials 7 are laminated, the total thickness is preferably within this range.
クッション材7は、例えば熱可塑性を有する素材であれば特に限定されないが、加圧時の温度よりも低い溶融温度及びガラス転移点(Tg)であることが好ましい。好適な例として、ポリオレフィン系フィルム、塩化ビニルフィルム、PVAフィルムが例示できる。電子部品2aと電子部品2bの間に形成される溝の深さによるが、クッション材の厚みは、通常、100μm~1mm程度である。クッション材7を複数積層する場合には、合計の厚みがこの範囲にあることが好ましい。 A cushion material 7 may be laminated on the electronic
The cushioning material 7 is not particularly limited as long as it is a thermoplastic material, but preferably has a melting temperature and a glass transition point (Tg) lower than the temperature at the time of pressurization. Suitable examples include polyolefin films, vinyl chloride films, and PVA films. Depending on the depth of the groove formed between the
なお、第1実施形態に示した電子部品搭載基板は一例であって、電子部品と基板の構造は特に限定されるものではなく、電子部品2a、2bと基板1との間には隙間があってもなくともよい。搭載する電子部品の配置位置は限定されない。
Note that the electronic component mounting board shown in the first embodiment is an example, and the structure of the electronic component and the board is not particularly limited. It doesn't matter. The arrangement position of the electronic component to be mounted is not limited.
次いで、加熱加圧機20により加熱加圧を行うことで、前記電子部品保護シート6が変形し、個々の電子部品の形状に沿うように、即ち電子部品2a、2bの上面と側面に沿うように変形させ、電子部品および基板1の少なくとも一部に追従させる。クッション材7は熱によって軟化もしくは溶融し電子部品保護シート6の搭載基板100の電子部品間の凹凸への追随を促す。
加熱加圧時において加熱加圧機20とクッション材7との間に、剥離性シートを介する方法も好ましい。剥離性シートは、紙やプラスチック等の基材に公知の剥離処理を行ったシートである。また、テフロン(登録商標)等の極性が低いプラスチックシートを用いることもできる。 Next, by performing heating and pressurization with a heating and pressurizingmachine 20, the electronic component protection sheet 6 is deformed and conforms to the shape of each electronic component, that is, along the upper surface and side surface of the electronic components 2a and 2b. It is deformed to follow the electronic component and at least part of the substrate 1 . The cushioning material 7 is softened or melted by heat, and promotes conformity of the electronic component protective sheet 6 to the irregularities between the electronic components on the mounting board 100 .
A method of interposing a release sheet between the heating and pressurizingmachine 20 and the cushioning material 7 during heating and pressurization is also preferable. The release sheet is a sheet obtained by subjecting a base material such as paper or plastic to a known release treatment. A plastic sheet with low polarity such as Teflon (registered trademark) can also be used.
加熱加圧時において加熱加圧機20とクッション材7との間に、剥離性シートを介する方法も好ましい。剥離性シートは、紙やプラスチック等の基材に公知の剥離処理を行ったシートである。また、テフロン(登録商標)等の極性が低いプラスチックシートを用いることもできる。 Next, by performing heating and pressurization with a heating and pressurizing
A method of interposing a release sheet between the heating and pressurizing
加熱温度は、電子部品保護シート6が適度に軟化し、個々の電子部品の形状に沿い、変形し、個々の電子部品同士の間隙に入り込める温度であればよく、100~260℃であることが好ましく、120~240℃であることがより好ましい。温度が低すぎると搭載された個々の電子部品同士の間隙への電子部品保護シート6の入り込み性が低下する。一方で、温度が高すぎると、電子部品保護シート6の熱硬化性樹脂の熱硬化反応が急速に進み、搭載された電子部品間への電子部品保護シートの入り込み性が低下する。
加熱加圧する場合の圧力は、0.01~10MPaが好ましく、0.1~6.0MPaがより好ましい。上記の圧力で加熱加圧することで、電子部品を破損することなく、埋め込み性がより向上する。
加熱時間は、通常0.5~30分であり、1~20分の範囲が好ましい。加熱時間が短すぎると搭載された電子部品間への電子部品保護シートの入り込み性が低下する。一方で時間が長すぎると、熱硬化性樹脂の熱分解や酸化が起こりやすくなり、反応生成物などによる接着部位の信頼性低下の可能性が増す。上記加熱加圧工程は真空状態で行うことが好ましい。
加熱加圧の方法として、加熱加圧機を用いる他に、所定の圧力になるよう適度な重量の金属板を積層し、この積層物をオーブンに投入する方法も好ましい。
一方、加熱加圧機以外の加熱加圧方法としては、真空成形法または真空圧空成形も好ましい。 The heating temperature may be a temperature at which the electroniccomponent protection sheet 6 is moderately softened, deformed according to the shape of the individual electronic components, and can enter the gaps between the individual electronic components, and is preferably 100 to 260 ° C. It is preferably 120 to 240°C, and more preferably 120 to 240°C. If the temperature is too low, the ability of the electronic component protection sheet 6 to enter the gaps between the individual electronic components mounted thereon is reduced. On the other hand, if the temperature is too high, the thermosetting reaction of the thermosetting resin of the electronic component protective sheet 6 proceeds rapidly, and the electronic component protective sheet is less likely to penetrate between mounted electronic components.
The pressure when heating and pressurizing is preferably 0.01 to 10 MPa, more preferably 0.1 to 6.0 MPa. By heating and pressurizing at the above pressure, the embedding property is further improved without damaging the electronic component.
The heating time is usually 0.5 to 30 minutes, preferably 1 to 20 minutes. If the heating time is too short, the ability of the electronic component protection sheet to enter between the mounted electronic components is reduced. On the other hand, if the time is too long, thermal decomposition and oxidation of the thermosetting resin tend to occur, increasing the possibility of lowering the reliability of the bonding site due to reaction products and the like. The heating and pressurizing step is preferably performed in a vacuum state.
As a method of heating and pressurizing, besides using a heating and pressurizing machine, a method of laminating metal plates of appropriate weights so as to obtain a predetermined pressure and putting the laminate into an oven is also preferable.
On the other hand, as the heating and pressurizing method other than the heating and pressurizing machine, a vacuum forming method or a vacuum pressure forming method is also preferable.
加熱加圧する場合の圧力は、0.01~10MPaが好ましく、0.1~6.0MPaがより好ましい。上記の圧力で加熱加圧することで、電子部品を破損することなく、埋め込み性がより向上する。
加熱時間は、通常0.5~30分であり、1~20分の範囲が好ましい。加熱時間が短すぎると搭載された電子部品間への電子部品保護シートの入り込み性が低下する。一方で時間が長すぎると、熱硬化性樹脂の熱分解や酸化が起こりやすくなり、反応生成物などによる接着部位の信頼性低下の可能性が増す。上記加熱加圧工程は真空状態で行うことが好ましい。
加熱加圧の方法として、加熱加圧機を用いる他に、所定の圧力になるよう適度な重量の金属板を積層し、この積層物をオーブンに投入する方法も好ましい。
一方、加熱加圧機以外の加熱加圧方法としては、真空成形法または真空圧空成形も好ましい。 The heating temperature may be a temperature at which the electronic
The pressure when heating and pressurizing is preferably 0.01 to 10 MPa, more preferably 0.1 to 6.0 MPa. By heating and pressurizing at the above pressure, the embedding property is further improved without damaging the electronic component.
The heating time is usually 0.5 to 30 minutes, preferably 1 to 20 minutes. If the heating time is too short, the ability of the electronic component protection sheet to enter between the mounted electronic components is reduced. On the other hand, if the time is too long, thermal decomposition and oxidation of the thermosetting resin tend to occur, increasing the possibility of lowering the reliability of the bonding site due to reaction products and the like. The heating and pressurizing step is preferably performed in a vacuum state.
As a method of heating and pressurizing, besides using a heating and pressurizing machine, a method of laminating metal plates of appropriate weights so as to obtain a predetermined pressure and putting the laminate into an oven is also preferable.
On the other hand, as the heating and pressurizing method other than the heating and pressurizing machine, a vacuum forming method or a vacuum pressure forming method is also preferable.
(工程v:変形した電子部品保護シートの硬化工程)
加熱加圧後、電子部品保護シート6を変形した状態で、さらに150℃~230℃の温度で10分から60分加熱することにより、電子部品保護シート6中の熱硬化性樹脂を熱硬化し、硬化膜である電子部品保護層を形成する。電子部品保護層は電子部品および基板と強固に接着し、外部の衝撃や擦傷から電子部品の破損を防止、保護するための保護層として機能する。なお、(工程iv)の段階で加熱加圧の温度を150℃以上、時間を30分以上とすることで、熱硬化を完了させ被覆保護層を形成することもできる。被覆保護層は電子部品間のショートを防ぐため絶縁体であることが必須であり、表面抵抗値は1×107Ω/□以上が求められる。なお、熱硬化性樹脂を用いずに、熱可塑性樹脂を用いる場合には工程vを省略することができる。 (Step v: Curing step of deformed electronic component protection sheet)
After heating and pressurizing, the electroniccomponent protection sheet 6 is deformed and further heated at a temperature of 150° C. to 230° C. for 10 to 60 minutes to thermoset the thermosetting resin in the electronic component protection sheet 6. An electronic component protective layer, which is a cured film, is formed. The electronic component protective layer firmly adheres to the electronic component and the substrate, and functions as a protective layer for preventing and protecting the electronic component from damage from external impacts and abrasions. In the step (iv), the heating and pressurizing temperature is set to 150° C. or higher for 30 minutes or longer to complete the heat curing and form the protective coating layer. The covering protective layer must be an insulator in order to prevent short circuits between electronic parts, and a surface resistance value of 1×10 7 Ω/□ or more is required. In addition, the process v can be abbreviate|omitted when using a thermoplastic resin instead of a thermosetting resin.
加熱加圧後、電子部品保護シート6を変形した状態で、さらに150℃~230℃の温度で10分から60分加熱することにより、電子部品保護シート6中の熱硬化性樹脂を熱硬化し、硬化膜である電子部品保護層を形成する。電子部品保護層は電子部品および基板と強固に接着し、外部の衝撃や擦傷から電子部品の破損を防止、保護するための保護層として機能する。なお、(工程iv)の段階で加熱加圧の温度を150℃以上、時間を30分以上とすることで、熱硬化を完了させ被覆保護層を形成することもできる。被覆保護層は電子部品間のショートを防ぐため絶縁体であることが必須であり、表面抵抗値は1×107Ω/□以上が求められる。なお、熱硬化性樹脂を用いずに、熱可塑性樹脂を用いる場合には工程vを省略することができる。 (Step v: Curing step of deformed electronic component protection sheet)
After heating and pressurizing, the electronic
第1実施形態の電子部品搭載基板は、電子部品保護層が最外層であってもよく、更に他の機能層を積層してもよい。他の機能層とは、例えば、導電層、ハードコート性、水蒸気バリア性、酸素バリア性、熱伝導性、低誘電率、高誘電率性または耐熱性の機能を有する層である。なかでも、導電層は被覆保護する電子部品を電磁波ノイズから保護する目的で用いられることがある。
In the electronic component mounting substrate of the first embodiment, the electronic component protection layer may be the outermost layer, and other functional layers may be laminated. The other functional layer is, for example, a layer having a function of conductive layer, hard coat property, water vapor barrier property, oxygen barrier property, thermal conductivity, low dielectric constant, high dielectric constant or heat resistance. Among others, the conductive layer is sometimes used for the purpose of protecting the electronic parts to be covered and protected from electromagnetic wave noise.
図5に導電層を有する電子部品搭載基板11の構成例を示す。導電層8は電子部品保護層3の上層に形成され、グランド9に接続される。グランド9との接続点は基板1の表面上に存在していてもよく、基板1の側面に存在していてもよい。導電層は、電子部品保護層表面上にスパッタやメッキにより金属層を形成する、あるいは導電性粒子を含有する導電シートを電子部品保護層上に積層させて形成する、といった方法によって形成することができる。
FIG. 5 shows a configuration example of an electronic component mounting board 11 having a conductive layer. The conductive layer 8 is formed on the electronic component protective layer 3 and connected to the ground 9 . A connection point with the ground 9 may exist on the surface of the substrate 1 or may exist on the side surface of the substrate 1 . The conductive layer can be formed by forming a metal layer on the surface of the electronic component protective layer by sputtering or plating, or by laminating a conductive sheet containing conductive particles on the electronic component protective layer. can.
《電子機器》
第1実施形態の電子部品搭載基板は、液晶ディスプレイ、タッチパネル等のほか、ノートPC、携帯電話、スマートフォン、タブレット端末等の電子機器に備えることが好ましい。 "Electronics"
The electronic component mounting substrate of the first embodiment is preferably provided in electronic devices such as notebook PCs, mobile phones, smart phones, tablet terminals, etc., in addition to liquid crystal displays and touch panels.
第1実施形態の電子部品搭載基板は、液晶ディスプレイ、タッチパネル等のほか、ノートPC、携帯電話、スマートフォン、タブレット端末等の電子機器に備えることが好ましい。 "Electronics"
The electronic component mounting substrate of the first embodiment is preferably provided in electronic devices such as notebook PCs, mobile phones, smart phones, tablet terminals, etc., in addition to liquid crystal displays and touch panels.
[第2実施形態]
次に、第1実施形態とは異なる電子部品搭載基板の一例について説明する。なお、以降の説明において、前出の実施形態と同一の要素部材は同一の符号を付し、適宜その説明を省略する。第2実施形態の電子部品搭載基板において、下記に別途説明する以外は第1実施形態の説明を援用する。 [Second embodiment]
Next, an example of an electronic component mounting board different from that of the first embodiment will be described. In the following description, the same reference numerals are given to the same element members as in the above-described embodiment, and the description thereof will be omitted as appropriate. In the electronic component mounting board of the second embodiment, the description of the first embodiment is used unless otherwise described below.
次に、第1実施形態とは異なる電子部品搭載基板の一例について説明する。なお、以降の説明において、前出の実施形態と同一の要素部材は同一の符号を付し、適宜その説明を省略する。第2実施形態の電子部品搭載基板において、下記に別途説明する以外は第1実施形態の説明を援用する。 [Second embodiment]
Next, an example of an electronic component mounting board different from that of the first embodiment will be described. In the following description, the same reference numerals are given to the same element members as in the above-described embodiment, and the description thereof will be omitted as appropriate. In the electronic component mounting board of the second embodiment, the description of the first embodiment is used unless otherwise described below.
《電子部品保護層》
第2実施形態の電子部品保護層は、第1実施形態と同様に、基板上に搭載された電子部品を被覆保護するためのものである。 《Electronic component protective layer》
The electronic component protection layer of the second embodiment is for covering and protecting the electronic components mounted on the substrate, as in the first embodiment.
第2実施形態の電子部品保護層は、第1実施形態と同様に、基板上に搭載された電子部品を被覆保護するためのものである。 《Electronic component protective layer》
The electronic component protection layer of the second embodiment is for covering and protecting the electronic components mounted on the substrate, as in the first embodiment.
《二乗平均平方根高さSq》
Sqは、ISO 25178-2:2012において、上記数式(4)で規定される表面性状パラメータである。式の説明等は第1実施形態の説明を援用する。
ところで、電子部品搭載基板の製造後、電子機器への組み込みまでの間に、例えば電子部品搭載基板同士の接触などで電子部品保護層に傷が入ることがある。電子部品搭載基板は、精密機器に組み込むため電子部品保護層に傷があると目視判断により廃棄されることがしばしばある。例えば、そのような傷の入った電子部品搭載基板は一律に目視判定で実用不可と判断されることがある。しかし、廃棄品の一部は軽微な傷であり、実用上問題無いものまで含まれている。 <<root mean square height Sq>>
Sq is a surface texture parameter defined by the above formula (4) in ISO 25178-2:2012. The description of the first embodiment is used for the description of the equations.
By the way, after the electronic component mounting board is manufactured and before it is incorporated into an electronic device, the electronic component protective layer may be damaged due to, for example, contact between the electronic component mounting boards. Electronic component-mounted substrates are often discarded by visual judgment if the electronic component protective layer is damaged because they are incorporated into precision equipment. For example, such a damaged electronic component mounting board may be uniformly judged by visual inspection to be unpractical. However, some of the discarded items have minor scratches that do not pose a practical problem.
Sqは、ISO 25178-2:2012において、上記数式(4)で規定される表面性状パラメータである。式の説明等は第1実施形態の説明を援用する。
ところで、電子部品搭載基板の製造後、電子機器への組み込みまでの間に、例えば電子部品搭載基板同士の接触などで電子部品保護層に傷が入ることがある。電子部品搭載基板は、精密機器に組み込むため電子部品保護層に傷があると目視判断により廃棄されることがしばしばある。例えば、そのような傷の入った電子部品搭載基板は一律に目視判定で実用不可と判断されることがある。しかし、廃棄品の一部は軽微な傷であり、実用上問題無いものまで含まれている。 <<root mean square height Sq>>
Sq is a surface texture parameter defined by the above formula (4) in ISO 25178-2:2012. The description of the first embodiment is used for the description of the equations.
By the way, after the electronic component mounting board is manufactured and before it is incorporated into an electronic device, the electronic component protective layer may be damaged due to, for example, contact between the electronic component mounting boards. Electronic component-mounted substrates are often discarded by visual judgment if the electronic component protective layer is damaged because they are incorporated into precision equipment. For example, such a damaged electronic component mounting board may be uniformly judged by visual inspection to be unpractical. However, some of the discarded items have minor scratches that do not pose a practical problem.
第2実施形態における電子部品保護層の表面は、ISO 25178-2:2012に準拠して求めた二乗平均平方根高さSqが0.01~10μmであることが好ましい。電子部品保護層の表面が前述の範囲内であることで、電子部品保護層に適度な凹凸を付与することができる。その結果、電子部品保護層表面に異物が接触して、その表面が傷ついたとしても、表面全体が凹凸であることにより、実用上問題のない軽微な傷については外観上視認しづらくなる。電子部品保護層の二乗平均平方根高さSqは、0.05~7μmであることがより好ましく、0.1~5μmであることがさらに好ましい。
The surface of the electronic component protective layer in the second embodiment preferably has a root-mean-square height Sq of 0.01 to 10 μm, which is determined according to ISO 25178-2:2012. When the surface of the electronic component protective layer is within the range described above, the electronic component protective layer can be provided with appropriate unevenness. As a result, even if a foreign object contacts the surface of the electronic component protective layer and damages the surface, the unevenness of the entire surface makes it difficult to visually recognize minor damage that poses no problem in practice. The root-mean-square height Sq of the electronic component protective layer is more preferably 0.05 to 7 μm, even more preferably 0.1 to 5 μm.
《二乗平均平方根傾斜Sdq》
第2実施形態の二乗平均平方根高さSdqの説明は、以下の点を除き、第1実施形態のSdqの説明を援用する。
第2実施形態における電子部品保護層の表面は、ISO 25178-2:2012に準拠して求めた二乗平均平方根傾斜Sdqが0.0001~5とする。電子部品保護層の表面が前述の範囲内であることで、電子部品保護層の防汚性を向上することができる。二乗平均平方根傾斜Sdqを0.0001以上とすることで、電子部品保護層に適度な凹凸傾斜を付与することができ、塵や埃の付着を抑制することができる。一方、二乗平均平方根傾斜Sdqを5以下とすることで、微細な塵や埃が電子部品保護層の凹凸壁面に付着するのを抑制することができる。電子部品保護層の二乗平均平方根傾斜Sdqは、0.0005~4.5であることがより好ましく、0.001~4であることがさらに好ましく、0.005~3.5であることが特に好ましい。 <<root mean square slope Sdq>>
For the description of the root-mean-square height Sdq of the second embodiment, the description of Sdq of the first embodiment is used except for the following points.
The surface of the electronic component protective layer in the second embodiment has a root-mean-square gradient Sdq of 0.0001 to 5, which is determined according to ISO 25178-2:2012. When the surface of the electronic component protective layer is within the range described above, the antifouling property of the electronic component protective layer can be improved. By setting the root-mean-square slope Sdq to 0.0001 or more, the electronic component protective layer can be provided with an appropriate unevenness slope, and adhesion of dust can be suppressed. On the other hand, by setting the root-mean-square slope Sdq to 5 or less, it is possible to suppress fine dust and dirt from adhering to the uneven wall surface of the electronic component protective layer. The root-mean-square slope Sdq of the electronic component protective layer is more preferably 0.0005 to 4.5, even more preferably 0.001 to 4, and particularly 0.005 to 3.5. preferable.
第2実施形態の二乗平均平方根高さSdqの説明は、以下の点を除き、第1実施形態のSdqの説明を援用する。
第2実施形態における電子部品保護層の表面は、ISO 25178-2:2012に準拠して求めた二乗平均平方根傾斜Sdqが0.0001~5とする。電子部品保護層の表面が前述の範囲内であることで、電子部品保護層の防汚性を向上することができる。二乗平均平方根傾斜Sdqを0.0001以上とすることで、電子部品保護層に適度な凹凸傾斜を付与することができ、塵や埃の付着を抑制することができる。一方、二乗平均平方根傾斜Sdqを5以下とすることで、微細な塵や埃が電子部品保護層の凹凸壁面に付着するのを抑制することができる。電子部品保護層の二乗平均平方根傾斜Sdqは、0.0005~4.5であることがより好ましく、0.001~4であることがさらに好ましく、0.005~3.5であることが特に好ましい。 <<root mean square slope Sdq>>
For the description of the root-mean-square height Sdq of the second embodiment, the description of Sdq of the first embodiment is used except for the following points.
The surface of the electronic component protective layer in the second embodiment has a root-mean-square gradient Sdq of 0.0001 to 5, which is determined according to ISO 25178-2:2012. When the surface of the electronic component protective layer is within the range described above, the antifouling property of the electronic component protective layer can be improved. By setting the root-mean-square slope Sdq to 0.0001 or more, the electronic component protective layer can be provided with an appropriate unevenness slope, and adhesion of dust can be suppressed. On the other hand, by setting the root-mean-square slope Sdq to 5 or less, it is possible to suppress fine dust and dirt from adhering to the uneven wall surface of the electronic component protective layer. The root-mean-square slope Sdq of the electronic component protective layer is more preferably 0.0005 to 4.5, even more preferably 0.001 to 4, and particularly 0.005 to 3.5. preferable.
更に本発明者は鋭意検討の結果、電子部品保護層表面の二乗平均平方根傾斜Sdqを0.005~3.5とすることで、水分蒸散性が向上することを見出した。電子部品搭載基板は電子機器へ組み込まれた後、様々な温度環境下で使用されることから、電子部品保護層は高湿度環境に曝されることがある。電子部品保護層表面の二乗平均平方根傾斜Sdqが0.005以上である場合は、大気中の水分が電子品保護層表面へ付着して生じる微小水滴が、表面凹凸に阻まれて大きくなることなく、速やかに大気中に蒸発する。一方、電子部品保護層表面の二乗平均平方根傾斜Sdqが3.5以下である場合は、微小水滴が電子部品保護層表面の険しい凹凸に阻まれることなく、速やかに大気中に蒸発する。
電子部品保護層表面に付着する水滴が当該表面に留まる時間を短くすることにより、電子部品保護層への水分の浸透を抑制し、電子部品保護層の下層にある電子部品へ水分が到達し、短絡等の不具合が発生することを抑制することが可能となる。 Furthermore, as a result of extensive studies, the inventors of the present invention have found that the water transpiration property is improved by setting the root-mean-square gradient Sdq of the surface of the electronic component protective layer to 0.005 to 3.5. Since the electronic component mounting board is used under various temperature environments after being incorporated into the electronic device, the electronic component protective layer may be exposed to a high humidity environment. When the root-mean-square slope Sdq of the surface of the electronic component protective layer is 0.005 or more, fine water droplets generated by moisture in the air adhering to the surface of the electronic component protective layer are prevented from becoming large by the surface unevenness. , rapidly evaporates into the atmosphere. On the other hand, when the root-mean-square slope Sdq of the surface of the electronic component protective layer is 3.5 or less, the minute water droplets evaporate quickly into the atmosphere without being blocked by the steep unevenness of the surface of the electronic component protective layer.
By shortening the time that water droplets adhering to the surface of the electronic component protective layer remain on the surface, the penetration of moisture into the electronic component protective layer is suppressed, and moisture reaches the electronic component underlying the electronic component protective layer, It is possible to suppress the occurrence of defects such as short circuits.
電子部品保護層表面に付着する水滴が当該表面に留まる時間を短くすることにより、電子部品保護層への水分の浸透を抑制し、電子部品保護層の下層にある電子部品へ水分が到達し、短絡等の不具合が発生することを抑制することが可能となる。 Furthermore, as a result of extensive studies, the inventors of the present invention have found that the water transpiration property is improved by setting the root-mean-square gradient Sdq of the surface of the electronic component protective layer to 0.005 to 3.5. Since the electronic component mounting board is used under various temperature environments after being incorporated into the electronic device, the electronic component protective layer may be exposed to a high humidity environment. When the root-mean-square slope Sdq of the surface of the electronic component protective layer is 0.005 or more, fine water droplets generated by moisture in the air adhering to the surface of the electronic component protective layer are prevented from becoming large by the surface unevenness. , rapidly evaporates into the atmosphere. On the other hand, when the root-mean-square slope Sdq of the surface of the electronic component protective layer is 3.5 or less, the minute water droplets evaporate quickly into the atmosphere without being blocked by the steep unevenness of the surface of the electronic component protective layer.
By shortening the time that water droplets adhering to the surface of the electronic component protective layer remain on the surface, the penetration of moisture into the electronic component protective layer is suppressed, and moisture reaches the electronic component underlying the electronic component protective layer, It is possible to suppress the occurrence of defects such as short circuits.
第2実施形態の電子部品保護層の表面は、ISO 25178-2:2012に準拠して求めた二乗平均平方根高さSqが0.01~10μmであって、下記数式(2)及び数式(3)を満たすことが好ましい。
y≦195x-0.553 (2)
y≧0.258x (3)
(x:ISO 25178-2:2012に準拠して求めた電子部品保護層の表面の二乗平均平方根傾斜Sdq、y:ISO 25178-2:2012に準拠して求めた電子部品保護層の表面の二乗平均平方根高さSq)
電子部品保護層表面に異物が接触し表面が傷ついた際に、実用上問題ないレベルの軽微な傷を視認しづらくすることで不要な廃棄品を削減できる。その結果、生産性を向上させることができる。 The surface of the electronic component protective layer of the second embodiment has a root mean square height Sq of 0.01 to 10 μm determined in accordance with ISO 25178-2:2012, and the following formulas (2) and (3) ) is preferably satisfied.
y≤195x-0.553 (2)
y≧0.258x (3)
(x: root-mean-square slope Sdq of the surface of the electronic component protective layer determined in accordance with ISO 25178-2: 2012, y: the square of the surface of the electronic component protective layer determined in accordance with ISO 25178-2: 2012 Root mean height Sq)
When the surface of the protective layer for electronic components is damaged by contact with a foreign object, it is possible to reduce unnecessary waste products by making it difficult to visually recognize minor scratches that pose no practical problems. As a result, productivity can be improved.
y≦195x-0.553 (2)
y≧0.258x (3)
(x:ISO 25178-2:2012に準拠して求めた電子部品保護層の表面の二乗平均平方根傾斜Sdq、y:ISO 25178-2:2012に準拠して求めた電子部品保護層の表面の二乗平均平方根高さSq)
電子部品保護層表面に異物が接触し表面が傷ついた際に、実用上問題ないレベルの軽微な傷を視認しづらくすることで不要な廃棄品を削減できる。その結果、生産性を向上させることができる。 The surface of the electronic component protective layer of the second embodiment has a root mean square height Sq of 0.01 to 10 μm determined in accordance with ISO 25178-2:2012, and the following formulas (2) and (3) ) is preferably satisfied.
y≤195x-0.553 (2)
y≧0.258x (3)
(x: root-mean-square slope Sdq of the surface of the electronic component protective layer determined in accordance with ISO 25178-2: 2012, y: the square of the surface of the electronic component protective layer determined in accordance with ISO 25178-2: 2012 Root mean height Sq)
When the surface of the protective layer for electronic components is damaged by contact with a foreign object, it is possible to reduce unnecessary waste products by making it difficult to visually recognize minor scratches that pose no practical problems. As a result, productivity can be improved.
《Flop Index(FI)》
FIは、第1実施形態で述べた数式(1)によって算出されるパラメータであり、測定方法は、第1実施形態で説明したJIS Z8781‐4であり、以下に説明する以外は、第1実施形態のFIの説明を援用する。 《Flop Index (FI)》
FI is a parameter calculated by the formula (1) described in the first embodiment, the measurement method is JIS Z8781-4 described in the first embodiment, and the first embodiment except as described below The description of the FI of the form is used.
FIは、第1実施形態で述べた数式(1)によって算出されるパラメータであり、測定方法は、第1実施形態で説明したJIS Z8781‐4であり、以下に説明する以外は、第1実施形態のFIの説明を援用する。 《Flop Index (FI)》
FI is a parameter calculated by the formula (1) described in the first embodiment, the measurement method is JIS Z8781-4 described in the first embodiment, and the first embodiment except as described below The description of the FI of the form is used.
(FIの効果)
第2実施形態の電子部品保護層表面のFIは、0.3~80であることが好ましい。FIを前述の範囲内とすることで、電子部品保護層のダイシング適性と電圧耐性(絶縁破壊電圧)を良好なものとすることができる。FIが0.3以上であることで、電子部品保護層表面の凹凸形状に一定の秩序性を付与することが可能となる。電子部品保護層に電圧が印加された際に表面凹凸形状に一定の秩序性をもたせることにより、絶縁破壊の起点が発生することを抑制することが可能となるため、電圧耐性(絶縁破壊電圧)が向上する。一方、電子部品保護層表面のFIが80以下であることで、表面凹凸形状に一定の無秩序性を付与することが可能となる。凹凸形状が高い秩序性を有する表面では、切断などで加わる外部応力が特定箇所に集中しやすくなるが、凹凸が一定の無秩序性を有する場合は、当該外部応力を適切に分散させることができ、ダイシング適性が向上する。電子部品保護層表面のFIは1~75であることがより好ましく、3~50であることがさらに好ましく、5~26であることが特に好ましい。 (Effect of FI)
The FI of the surface of the electronic component protective layer in the second embodiment is preferably 0.3-80. By setting FI within the above range, the dicing aptitude and voltage resistance (dielectric breakdown voltage) of the electronic component protective layer can be improved. When the FI is 0.3 or more, it is possible to impart a certain degree of orderliness to the uneven shape of the surface of the electronic component protective layer. When a voltage is applied to the protective layer for electronic components, it is possible to suppress the occurrence of starting points for dielectric breakdown by giving a certain degree of order to the uneven surface shape, so voltage resistance (dielectric breakdown voltage) improves. On the other hand, when the FI of the surface of the electronic component protective layer is 80 or less, it is possible to impart a certain degree of disorder to the uneven shape of the surface. On a surface with a highly ordered uneven shape, external stress applied by cutting or the like tends to concentrate at a specific location. Dicing aptitude is improved. The FI of the surface of the electronic component protective layer is more preferably 1-75, still more preferably 3-50, and particularly preferably 5-26.
第2実施形態の電子部品保護層表面のFIは、0.3~80であることが好ましい。FIを前述の範囲内とすることで、電子部品保護層のダイシング適性と電圧耐性(絶縁破壊電圧)を良好なものとすることができる。FIが0.3以上であることで、電子部品保護層表面の凹凸形状に一定の秩序性を付与することが可能となる。電子部品保護層に電圧が印加された際に表面凹凸形状に一定の秩序性をもたせることにより、絶縁破壊の起点が発生することを抑制することが可能となるため、電圧耐性(絶縁破壊電圧)が向上する。一方、電子部品保護層表面のFIが80以下であることで、表面凹凸形状に一定の無秩序性を付与することが可能となる。凹凸形状が高い秩序性を有する表面では、切断などで加わる外部応力が特定箇所に集中しやすくなるが、凹凸が一定の無秩序性を有する場合は、当該外部応力を適切に分散させることができ、ダイシング適性が向上する。電子部品保護層表面のFIは1~75であることがより好ましく、3~50であることがさらに好ましく、5~26であることが特に好ましい。 (Effect of FI)
The FI of the surface of the electronic component protective layer in the second embodiment is preferably 0.3-80. By setting FI within the above range, the dicing aptitude and voltage resistance (dielectric breakdown voltage) of the electronic component protective layer can be improved. When the FI is 0.3 or more, it is possible to impart a certain degree of orderliness to the uneven shape of the surface of the electronic component protective layer. When a voltage is applied to the protective layer for electronic components, it is possible to suppress the occurrence of starting points for dielectric breakdown by giving a certain degree of order to the uneven surface shape, so voltage resistance (dielectric breakdown voltage) improves. On the other hand, when the FI of the surface of the electronic component protective layer is 80 or less, it is possible to impart a certain degree of disorder to the uneven shape of the surface. On a surface with a highly ordered uneven shape, external stress applied by cutting or the like tends to concentrate at a specific location. Dicing aptitude is improved. The FI of the surface of the electronic component protective layer is more preferably 1-75, still more preferably 3-50, and particularly preferably 5-26.
第2実施形態の「Sq、Sdq、FIの制御方法」、「OD値」、「L*a*b*値」は、第1実施形態の[Sq、Sdq、FIの制御方法]、《光学濃度(OD値)》、《L*a*b*値》に関する記載を援用する。
第2実施形態の「絶縁性」は、第1実施形態の《電子部品保護層の絶縁性》の記載を援用する。
第2実施形態の「バインダー樹脂」、「熱可塑性樹脂」、「熱硬化性樹脂」、「硬化剤」は、第1実施形態の《バインダー樹脂》、[熱可塑性樹脂]、[熱硬化性樹脂]、[硬化剤]の記載を援用する。
《粒状改質剤》
電子部品保護層は、粒状改質剤を含むことが好ましい。粒状改質剤は電子部品保護層の、二乗平均平方根高さSq、二乗平均平方根傾斜Sdq、Flop Index(FI)を所望の範囲とすることを主目的として用いられる。また、粒状改質剤の種類、添加量を適宜変更することにより電子部品保護層の弾性率、ヤング率、押し込み固さといった機械的性質を良好な範囲とすることができる。 "Sq, Sdq, FI control method", "OD value", and "L*a*b* value" of the second embodiment are the same as [Sq, Sdq, FI control method], <<optical The descriptions regarding density (OD value)>> and <<L * a * b * value>> are incorporated.
For the “insulation” in the second embodiment, the description of <<insulation of the electronic component protective layer>> in the first embodiment is used.
The "binder resin", "thermoplastic resin", "thermosetting resin", and "curing agent" of the second embodiment are the same as the <<binder resin>>, [thermoplastic resin], and [thermosetting resin ] and [curing agent].
《Particulate Modifier》
The electronic component protective layer preferably contains a granular modifier. The granular modifier is used mainly for the purpose of setting the root-mean-square height Sq, root-mean-square tilt Sdq, and Flop Index (FI) of the electronic component protective layer within desired ranges. In addition, the mechanical properties such as the elastic modulus, Young's modulus, and indentation hardness of the electronic component protective layer can be controlled within favorable ranges by appropriately changing the type and amount of the particulate modifier.
第2実施形態の「絶縁性」は、第1実施形態の《電子部品保護層の絶縁性》の記載を援用する。
第2実施形態の「バインダー樹脂」、「熱可塑性樹脂」、「熱硬化性樹脂」、「硬化剤」は、第1実施形態の《バインダー樹脂》、[熱可塑性樹脂]、[熱硬化性樹脂]、[硬化剤]の記載を援用する。
《粒状改質剤》
電子部品保護層は、粒状改質剤を含むことが好ましい。粒状改質剤は電子部品保護層の、二乗平均平方根高さSq、二乗平均平方根傾斜Sdq、Flop Index(FI)を所望の範囲とすることを主目的として用いられる。また、粒状改質剤の種類、添加量を適宜変更することにより電子部品保護層の弾性率、ヤング率、押し込み固さといった機械的性質を良好な範囲とすることができる。 "Sq, Sdq, FI control method", "OD value", and "L*a*b* value" of the second embodiment are the same as [Sq, Sdq, FI control method], <<optical The descriptions regarding density (OD value)>> and <<L * a * b * value>> are incorporated.
For the “insulation” in the second embodiment, the description of <<insulation of the electronic component protective layer>> in the first embodiment is used.
The "binder resin", "thermoplastic resin", "thermosetting resin", and "curing agent" of the second embodiment are the same as the <<binder resin>>, [thermoplastic resin], and [thermosetting resin ] and [curing agent].
《Particulate Modifier》
The electronic component protective layer preferably contains a granular modifier. The granular modifier is used mainly for the purpose of setting the root-mean-square height Sq, root-mean-square tilt Sdq, and Flop Index (FI) of the electronic component protective layer within desired ranges. In addition, the mechanical properties such as the elastic modulus, Young's modulus, and indentation hardness of the electronic component protective layer can be controlled within favorable ranges by appropriately changing the type and amount of the particulate modifier.
粒状改質剤は、JIS K 6217-4で規定されるDBP吸油量が15~400ml/100gであることが好ましい。粒状改質剤のDBP吸油量が15~400ml/100gであることで、ダイシング適性を向上させることができる。ダイシング適性の向上は、第1実施形態で説明した推定作用により生ずると推定される。
The granular modifier preferably has a DBP oil absorption of 15 to 400 ml/100 g as defined by JIS K 6217-4. Dicing aptitude can be improved when the DBP oil absorption of the granular modifier is 15 to 400 ml/100 g. It is presumed that the improvement in dicing aptitude is caused by the presumed action described in the first embodiment.
第2実施形態の粒状改質剤は、第1実施形態の図3を用いた説明を援用する。第2実施形態の表面改質剤のJIS K 6217-4で規定されるDBP吸油量の好適範囲、電子部品保護層100質量%中の粒状改質剤含有率、粒状改質剤の具体例、好適な種類、粒状改質剤の体積抵抗率は第1実施形態の説明を援用する。
For the granularity modifier of the second embodiment, the description using FIG. 3 of the first embodiment is used. Appropriate range of DBP oil absorption defined by JIS K 6217-4 of the surface modifier of the second embodiment, granular modifier content in 100% by mass of the electronic component protective layer, specific examples of the granular modifier, The preferred types and the volume resistivity of the granular modifier refer to the description of the first embodiment.
第2実施形態の「電子部品保護層の厚み」、「電子部品保護シート」、「電子部品保護シートの製造方法」および「電子部品保護シートの用途」は、第1実施形態の《電子部品保護層の厚み》、《電子部品保護シート》、《電子部品保護シートの製造方法》および《電子部品保護シートの用途》の記載を援用する。
第2実施形態の「電子部品搭載基板の製造方法」、「電子機器」は、第1実施形態の《電子部品搭載基板の製造方法》および《電子機器》の記載を援用する。 "Thickness of electronic component protective layer", "electronic component protective sheet", "method for manufacturing electronic component protective sheet", and "use of electronic component protective sheet" in the second embodiment are the same as "electronic component protective sheet" in the first embodiment. The descriptions of "Layer thickness", "Electronic component protective sheet", "Method for producing electronic component protective sheet" and "Use of electronic component protective sheet" are incorporated.
For the "method for manufacturing an electronic component mounting board" and "electronic equipment" of the second embodiment, the descriptions of "method for manufacturing an electronic component mounting board" and "electronic equipment" in the first embodiment are used.
第2実施形態の「電子部品搭載基板の製造方法」、「電子機器」は、第1実施形態の《電子部品搭載基板の製造方法》および《電子機器》の記載を援用する。 "Thickness of electronic component protective layer", "electronic component protective sheet", "method for manufacturing electronic component protective sheet", and "use of electronic component protective sheet" in the second embodiment are the same as "electronic component protective sheet" in the first embodiment. The descriptions of "Layer thickness", "Electronic component protective sheet", "Method for producing electronic component protective sheet" and "Use of electronic component protective sheet" are incorporated.
For the "method for manufacturing an electronic component mounting board" and "electronic equipment" of the second embodiment, the descriptions of "method for manufacturing an electronic component mounting board" and "electronic equipment" in the first embodiment are used.
以下、実施例、比較例を挙げて本開示を詳細に説明するが、本開示は以下の実施例のみに限定されるものではない。なお、以下の「部」及び「%」は、それぞれ「質量部」及び「質量%」に基づく値である。
表1~7では、例えば、「2.2×109」という指数表記を、一部「2.2×10^9」と記した。 EXAMPLES Hereinafter, the present disclosure will be described in detail with reference to examples and comparative examples, but the present disclosure is not limited only to the following examples. "Parts" and "%" below are values based on "parts by mass" and "% by mass", respectively.
In Tables 1 to 7, for example, the exponential notation "2.2×10 9 " is partially written as "2.2×10^9".
表1~7では、例えば、「2.2×109」という指数表記を、一部「2.2×10^9」と記した。 EXAMPLES Hereinafter, the present disclosure will be described in detail with reference to examples and comparative examples, but the present disclosure is not limited only to the following examples. "Parts" and "%" below are values based on "parts by mass" and "% by mass", respectively.
In Tables 1 to 7, for example, the exponential notation "2.2×10 9 " is partially written as "2.2×10^9".
《原料》
実施例で使用した原料を以下に示す。
<熱硬化性樹脂>
[熱硬化性樹脂1の合成]
攪拌機、温度計、還流冷却器、窒素導入管、減圧設備を備えたガラス製フラスコにテレフタル酸166部、アジピン酸146部、3-メチル-1,5-ペンタンジオール212部およびエチレングリコール25部を仕込み、窒素ガスを通じながら攪拌し、常圧下、徐々に昇温し、200~230℃にて約8時間反応させ酸価43の液状物を得た。次いで、テトラ-n-ブトキシチタン0.01部を仕込み、窒素置換後、密閉下180℃にて30分間攪拌した。次いで230℃、5mmHgにて2時間反応させ、酸価1.1、水酸基価114.2、分子量982、色相10(APHA法、以下同様)のポリエステルジオールを得た。
次いで、攪拌機、温度計、還流冷却器、滴下装置、窒素導入管を備えた反応容器に、前記ポリエステルジオールを734部、ジメチロールプロピオン酸23.9部、トルエンジイソシアネート219部、及びトルエン242部を仕込み、窒素雰囲気下50℃で8時間反応させた。これに、トルエン1200部を加えて、末端にイソシアネート基を有するウレタンプレポリマーの溶液を得た。
次に得られたプレポリマーの溶液を70℃に加温し、その温度を保ちながら、1,3-ジアミノプロパン20.0部、ベンジルアミン3.1部、2-プロノール600部およびトルエン961部を混合した溶液を1時間で滴下した。滴下終了後70℃にて更に6時間反応させることで、分子量(Mw)が130000、酸価は10mgKOH/g、Tgは20℃、固形分が25%であるポリウレタン系樹脂を得た。 "material"
Raw materials used in the examples are shown below.
<Thermosetting resin>
[Synthesis of thermosetting resin 1]
166 parts of terephthalic acid, 146 parts of adipic acid, 212 parts of 3-methyl-1,5-pentanediol, and 25 parts of ethylene glycol were placed in a glass flask equipped with a stirrer, thermometer, reflux condenser, nitrogen inlet tube, and decompression equipment. After the mixture was charged, the mixture was stirred while nitrogen gas was passed through, and the temperature was gradually raised under normal pressure, and the reaction was carried out at 200 to 230° C. for about 8 hours to obtain a liquid product with an acid value of 43. Next, 0.01 part of tetra-n-butoxytitanium was charged, and after purging with nitrogen, the mixture was stirred at 180° C. for 30 minutes under a closed condition. Then, the mixture was reacted at 230° C. and 5 mmHg for 2 hours to obtain a polyester diol having an acid value of 1.1, a hydroxyl value of 114.2, a molecular weight of 982 and a hue of 10 (by APHA method, hereinafter the same).
Then, 734 parts of the polyester diol, 23.9 parts of dimethylolpropionic acid, 219 parts of toluene diisocyanate, and 242 parts of toluene were added to a reaction vessel equipped with a stirrer, thermometer, reflux condenser, dropping device, and nitrogen inlet tube. It was prepared and reacted at 50° C. for 8 hours under a nitrogen atmosphere. To this, 1200 parts of toluene was added to obtain a solution of a urethane prepolymer having terminal isocyanate groups.
Next, the obtained prepolymer solution was heated to 70° C., and while maintaining the temperature, 20.0 parts of 1,3-diaminopropane, 3.1 parts of benzylamine, 600 parts of 2-pronol and 961 parts of toluene were added. was added dropwise in 1 hour. After completion of the dropwise addition, the mixture was reacted at 70° C. for 6 hours to obtain a polyurethane resin having a molecular weight (Mw) of 130,000, an acid value of 10 mgKOH/g, a Tg of 20° C., and a solid content of 25%.
実施例で使用した原料を以下に示す。
<熱硬化性樹脂>
[熱硬化性樹脂1の合成]
攪拌機、温度計、還流冷却器、窒素導入管、減圧設備を備えたガラス製フラスコにテレフタル酸166部、アジピン酸146部、3-メチル-1,5-ペンタンジオール212部およびエチレングリコール25部を仕込み、窒素ガスを通じながら攪拌し、常圧下、徐々に昇温し、200~230℃にて約8時間反応させ酸価43の液状物を得た。次いで、テトラ-n-ブトキシチタン0.01部を仕込み、窒素置換後、密閉下180℃にて30分間攪拌した。次いで230℃、5mmHgにて2時間反応させ、酸価1.1、水酸基価114.2、分子量982、色相10(APHA法、以下同様)のポリエステルジオールを得た。
次いで、攪拌機、温度計、還流冷却器、滴下装置、窒素導入管を備えた反応容器に、前記ポリエステルジオールを734部、ジメチロールプロピオン酸23.9部、トルエンジイソシアネート219部、及びトルエン242部を仕込み、窒素雰囲気下50℃で8時間反応させた。これに、トルエン1200部を加えて、末端にイソシアネート基を有するウレタンプレポリマーの溶液を得た。
次に得られたプレポリマーの溶液を70℃に加温し、その温度を保ちながら、1,3-ジアミノプロパン20.0部、ベンジルアミン3.1部、2-プロノール600部およびトルエン961部を混合した溶液を1時間で滴下した。滴下終了後70℃にて更に6時間反応させることで、分子量(Mw)が130000、酸価は10mgKOH/g、Tgは20℃、固形分が25%であるポリウレタン系樹脂を得た。 "material"
Raw materials used in the examples are shown below.
<Thermosetting resin>
[Synthesis of thermosetting resin 1]
166 parts of terephthalic acid, 146 parts of adipic acid, 212 parts of 3-methyl-1,5-pentanediol, and 25 parts of ethylene glycol were placed in a glass flask equipped with a stirrer, thermometer, reflux condenser, nitrogen inlet tube, and decompression equipment. After the mixture was charged, the mixture was stirred while nitrogen gas was passed through, and the temperature was gradually raised under normal pressure, and the reaction was carried out at 200 to 230° C. for about 8 hours to obtain a liquid product with an acid value of 43. Next, 0.01 part of tetra-n-butoxytitanium was charged, and after purging with nitrogen, the mixture was stirred at 180° C. for 30 minutes under a closed condition. Then, the mixture was reacted at 230° C. and 5 mmHg for 2 hours to obtain a polyester diol having an acid value of 1.1, a hydroxyl value of 114.2, a molecular weight of 982 and a hue of 10 (by APHA method, hereinafter the same).
Then, 734 parts of the polyester diol, 23.9 parts of dimethylolpropionic acid, 219 parts of toluene diisocyanate, and 242 parts of toluene were added to a reaction vessel equipped with a stirrer, thermometer, reflux condenser, dropping device, and nitrogen inlet tube. It was prepared and reacted at 50° C. for 8 hours under a nitrogen atmosphere. To this, 1200 parts of toluene was added to obtain a solution of a urethane prepolymer having terminal isocyanate groups.
Next, the obtained prepolymer solution was heated to 70° C., and while maintaining the temperature, 20.0 parts of 1,3-diaminopropane, 3.1 parts of benzylamine, 600 parts of 2-pronol and 961 parts of toluene were added. was added dropwise in 1 hour. After completion of the dropwise addition, the mixture was reacted at 70° C. for 6 hours to obtain a polyurethane resin having a molecular weight (Mw) of 130,000, an acid value of 10 mgKOH/g, a Tg of 20° C., and a solid content of 25%.
硬化剤1:ビスフェノールA型エポキシ化合物「jER828」(エポキシ当量=189g/eq)三菱ケミカル社製
Curing agent 1: bisphenol A type epoxy compound "jER828" (epoxy equivalent = 189 g / eq) manufactured by Mitsubishi Chemical Corporation
<粒状改質剤>
・粒状改質剤1:カーボンブラック「MA100」(平均一次粒子径:24nm、DBP吸油量:100ml/100g、体積抵抗率:1.6×10-5Ω・cm)三菱ケミカル社製
・粒状改質剤2:シリカ「ウルトラシルU360」(DBP吸油量:220ml/100g、体積抵抗率:1.6×1016Ω・cm)NANOCYL社製 <Particulate modifier>
・ Granular modifier 1: Carbon black “MA100” (average primary particle diameter: 24 nm, DBP oil absorption: 100 ml / 100 g, volume resistivity: 1.6 × 10 -5 Ω cm) Mitsubishi Chemical Co., Ltd. Granular modifier Material 2: Silica "Ultrasil U360" (DBP oil absorption: 220 ml/100 g, volume resistivity: 1.6 × 10 16 Ω cm) manufactured by NANOCYL
・粒状改質剤1:カーボンブラック「MA100」(平均一次粒子径:24nm、DBP吸油量:100ml/100g、体積抵抗率:1.6×10-5Ω・cm)三菱ケミカル社製
・粒状改質剤2:シリカ「ウルトラシルU360」(DBP吸油量:220ml/100g、体積抵抗率:1.6×1016Ω・cm)NANOCYL社製 <Particulate modifier>
・ Granular modifier 1: Carbon black “MA100” (average primary particle diameter: 24 nm, DBP oil absorption: 100 ml / 100 g, volume resistivity: 1.6 × 10 -5 Ω cm) Mitsubishi Chemical Co., Ltd. Granular modifier Material 2: Silica "Ultrasil U360" (DBP oil absorption: 220 ml/100 g, volume resistivity: 1.6 × 10 16 Ω cm) manufactured by NANOCYL
<粒状改質剤の平均一次粒子径>
粒状改質剤の平均一次粒子径は透過型電子顕微鏡(TEM)により5万倍~100万倍程度に拡大した画像から観察できる20個の一次粒子の平均値から求めた。なお、粒状改質剤の粒子形状が、1.5以上の平均アスペクト比(長軸長さ/短軸長さ)を有する場合、平均一次粒子径は、長軸長さを平均して求めた。 <Average primary particle size of granular modifier>
The average primary particle size of the granular modifier was determined from the average value of 20 primary particles observed from an image magnified about 50,000 to 1,000,000 times with a transmission electron microscope (TEM). When the particle shape of the granular modifier has an average aspect ratio (major axis length/minor axis length) of 1.5 or more, the average primary particle size is obtained by averaging the major axis lengths. .
粒状改質剤の平均一次粒子径は透過型電子顕微鏡(TEM)により5万倍~100万倍程度に拡大した画像から観察できる20個の一次粒子の平均値から求めた。なお、粒状改質剤の粒子形状が、1.5以上の平均アスペクト比(長軸長さ/短軸長さ)を有する場合、平均一次粒子径は、長軸長さを平均して求めた。 <Average primary particle size of granular modifier>
The average primary particle size of the granular modifier was determined from the average value of 20 primary particles observed from an image magnified about 50,000 to 1,000,000 times with a transmission electron microscope (TEM). When the particle shape of the granular modifier has an average aspect ratio (major axis length/minor axis length) of 1.5 or more, the average primary particle size is obtained by averaging the major axis lengths. .
<粒状改質剤のDBP吸油量>
粒状改質剤のDBP吸油量は、JIS K 6217-4に準拠して行った。測定には吸収量測定器(吸収量測定器 S‐500、あさひ総研社製)を使用した。 <DBP oil absorption of granular modifier>
The DBP oil absorption of the granular modifier was determined according to JIS K 6217-4. For the measurement, an absorption measuring device (Absorption measuring device S-500, manufactured by Asahi Soken Co., Ltd.) was used.
粒状改質剤のDBP吸油量は、JIS K 6217-4に準拠して行った。測定には吸収量測定器(吸収量測定器 S‐500、あさひ総研社製)を使用した。 <DBP oil absorption of granular modifier>
The DBP oil absorption of the granular modifier was determined according to JIS K 6217-4. For the measurement, an absorption measuring device (Absorption measuring device S-500, manufactured by Asahi Soken Co., Ltd.) was used.
《電子部品保護シートの作成》
[電子部品保護シート101の作成]
熱硬化性樹脂1(固形分)100部と、硬化剤1を15部と、粒状改質剤1を2部と、粒状改質剤2を4部と、を容器に仕込み、不揮発分濃度が45質量%になるようトルエン:イソプロピルアルコール(質量比2:1)の混合溶剤を加えディスパーで10分攪拌することで組成物を得た。この組成物を乾燥厚みが40μmになるようにドクターブレードを使用してクッション材に塗工した。そして、100℃で2分間乾燥することでクッション材と電子部品保護シート101とが積層された実施例101の積層シートを得た。 《Creating an electronic component protection sheet》
[Preparation of electronic component protection sheet 101]
100 parts of thermosetting resin 1 (solid content), 15 parts of curing agent 1, 2 parts of granular modifier 1, and 4 parts of granular modifier 2 are charged in a container, and the nonvolatile concentration is A mixed solvent of toluene and isopropyl alcohol (mass ratio of 2:1) was added so as to be 45% by mass, and the mixture was stirred with a disper for 10 minutes to obtain a composition. This composition was applied to a cushion material using a doctor blade so as to give a dry thickness of 40 μm. Then, by drying at 100° C. for 2 minutes, a laminated sheet of Example 101 in which the cushioning material and the electronic component protection sheet 101 are laminated is obtained.
[電子部品保護シート101の作成]
熱硬化性樹脂1(固形分)100部と、硬化剤1を15部と、粒状改質剤1を2部と、粒状改質剤2を4部と、を容器に仕込み、不揮発分濃度が45質量%になるようトルエン:イソプロピルアルコール(質量比2:1)の混合溶剤を加えディスパーで10分攪拌することで組成物を得た。この組成物を乾燥厚みが40μmになるようにドクターブレードを使用してクッション材に塗工した。そして、100℃で2分間乾燥することでクッション材と電子部品保護シート101とが積層された実施例101の積層シートを得た。 《Creating an electronic component protection sheet》
[Preparation of electronic component protection sheet 101]
100 parts of thermosetting resin 1 (solid content), 15 parts of curing
表1の配合量を変更した以外は電子部品保護シート101と同様の所作によって、実施例102~108、201~212、301~332および比較例101,102,201~203、301~304の積層シートをそれぞれ得た。表1~7に各例の配合量を示す。
Lamination of Examples 102 to 108, 201 to 212, 301 to 332 and Comparative Examples 101, 102, 201 to 203, 301 to 304 in the same manner as the electronic component protection sheet 101 except that the blending amount in Table 1 was changed. Got a sheet each. Tables 1 to 7 show the compounding amounts of each example.
[電子部品搭載基板の作成]
(搭載基板の作製)
ガラスエポキシからなる基板上に、モールド封止された電子部品(1000μm×1000μm)を5×5個アレイ状に搭載した基板を用意した。基板の厚みは0.3mmであり、モールド封止厚、即ち基板上面からモールド封止材の頂面までの高さ(部品高さ)Hは0.7mmである。その後、部品同士の間隙である溝に添ってハーフダイシングを行い、搭載基板を得た(図6参照)。ハーフカット溝深さは0.8mm(基板のカット溝深さは0.1mm)、ハーフカット溝幅は200μmとした。 [Creation of electronic component mounting board]
(Fabrication of mounting substrate)
A substrate was prepared by mounting 5×5 electronic components (1000 μm×1000 μm) in an array on a substrate made of glass epoxy. The thickness of the substrate is 0.3 mm, and the mold sealing thickness, ie, the height (component height) H from the top surface of the substrate to the top surface of the mold sealing material, is 0.7 mm. After that, half dicing was performed along the grooves between the components to obtain a mounting substrate (see FIG. 6). The half-cut groove depth was 0.8 mm (the substrate cut groove depth was 0.1 mm), and the half-cut groove width was 200 μm.
(搭載基板の作製)
ガラスエポキシからなる基板上に、モールド封止された電子部品(1000μm×1000μm)を5×5個アレイ状に搭載した基板を用意した。基板の厚みは0.3mmであり、モールド封止厚、即ち基板上面からモールド封止材の頂面までの高さ(部品高さ)Hは0.7mmである。その後、部品同士の間隙である溝に添ってハーフダイシングを行い、搭載基板を得た(図6参照)。ハーフカット溝深さは0.8mm(基板のカット溝深さは0.1mm)、ハーフカット溝幅は200μmとした。 [Creation of electronic component mounting board]
(Fabrication of mounting substrate)
A substrate was prepared by mounting 5×5 electronic components (1000 μm×1000 μm) in an array on a substrate made of glass epoxy. The thickness of the substrate is 0.3 mm, and the mold sealing thickness, ie, the height (component height) H from the top surface of the substrate to the top surface of the mold sealing material, is 0.7 mm. After that, half dicing was performed along the grooves between the components to obtain a mounting substrate (see FIG. 6). The half-cut groove depth was 0.8 mm (the substrate cut groove depth was 0.1 mm), and the half-cut groove width was 200 μm.
上記搭載基板(5×5個アレイ状に電子部品が搭載された基板)に、各実施例および比較例の積層シートを8MPa、170℃の条件で5分間熱圧着し、クッション材を手で剥離した。その後、180℃2時間キュアを行い、表1に基づき、表面のバフ研磨等の処理が必要なものについては、Sq、Sdq、FIが所定の値となるよう処理を行い、各実施例および比較例の電子部品搭載基板を得た。
The laminated sheet of each example and comparative example was thermocompression bonded to the mounting substrate (substrate on which electronic components are mounted in an array of 5×5) at 8 MPa and 170° C. for 5 minutes, and the cushioning material was peeled off by hand. bottom. After that, curing is performed at 180 ° C. for 2 hours, and based on Table 1, for those that require surface buffing or other processing, processing is performed so that Sq, Sdq, and FI become predetermined values. An electronic component mounting substrate of Example was obtained.
<二乗平均平方根高さSq、二乗平均平方根傾斜Sdqの測定>
電子部品保護層の二乗平均平方根高さSq、ならびに二乗平均平方根傾斜Sdqは、以下の方法により測定した。まず、電子部品搭載基板における電子部品保護層表面をレーザーマイクロスコープ(キーエンス社製、VK-X100)を使用し、測定データ取得を行った。続いて、取得した測定データを解析ソフトウェア(ISO 25178表面性状計測モジュール「VK-H1XR」を備えた、解析アプリケーション「VK-H1XA」、ともにキーエンス社製)に取り込み、ISO25178表面性状計測を実行し、Sq、Sdqを算出した。(条件は、S‐フィルター:1μm、L‐フィルター:0.2mm)。
<Flop Index(FI)の測定>
まず、電子部品搭載基板における電子部品保護層表面を多角度測色計(BYK社製、BYK‐mac i23mm測定口径)を用いてL* 15°、L* 45°、L* 110°を測定した後、数式(1)に基づいてFIを算出した。光源はD50、視野は2°視野の条件にて測定を行った。表5-7中のL*は、L* 45の値である。
<光学濃度(OD値)の測定>
電子部品搭載基板における電子部品保護層表面のOD値をエックスライト社製「361T 卓上式透過濃度計」を用いて測定した。
<a*b*の測定>
電子部品搭載基板における電子部品保護層表面のa*b*値をKONICA MINOLTA社製「色彩色差計CR-400」を用いて測定した。
<表面抵抗値の測定>
電子部品搭載基板における電子部品保護層の表面抵抗値を日東精工アナリティック社製「ハイレスタ-UX MCP-HT800 高抵抗 抵抗率計」を用いて測定した。 <Measurement of root-mean-square height Sq and root-mean-square slope Sdq>
The root-mean-square height Sq and the root-mean-square slope Sdq of the electronic component protective layer were measured by the following methods. First, using a laser microscope (manufactured by Keyence Corporation, VK-X100), measurement data was obtained for the electronic component protective layer surface of the electronic component mounting board. Subsequently, the acquired measurement data is imported into analysis software (analysis application "VK-H1XA" equipped with ISO 25178 surface texture measurement module "VK-H1XR", both manufactured by Keyence Corporation), ISO 25178 surface texture measurement is performed, Sq and Sdq were calculated. (Conditions are S-filter: 1 μm, L-filter: 0.2 mm).
<Measurement of Flop Index (FI)>
First, L * 15° , L * 45° , and L * 110° were measured on the surface of the electronic component protective layer on the electronic component mounting board using a multi-angle colorimeter (manufactured by BYK, BYK-mac i 23 mm measurement aperture). After that, FI was calculated based on the formula (1). Measurement was performed under the conditions of a light source of D50 and a field of view of 2°. L * in Tables 5-7 is the value of L * 45 .
<Measurement of optical density (OD value)>
The OD value of the surface of the electronic component protective layer on the electronic component mounting board was measured using a "361T desktop transmission densitometer" manufactured by X-Rite.
<Measurement of a * b* >
The a * b * value of the surface of the electronic component protective layer on the electronic component mounting substrate was measured using a "color difference meter CR-400" manufactured by KONICA MINOLTA.
<Measurement of surface resistance>
The surface resistance value of the electronic component protective layer on the electronic component mounting board was measured using a Nitto Seiko Analytic Co., Ltd. "Hiresta-UX MCP-HT800 high resistance resistivity meter".
電子部品保護層の二乗平均平方根高さSq、ならびに二乗平均平方根傾斜Sdqは、以下の方法により測定した。まず、電子部品搭載基板における電子部品保護層表面をレーザーマイクロスコープ(キーエンス社製、VK-X100)を使用し、測定データ取得を行った。続いて、取得した測定データを解析ソフトウェア(ISO 25178表面性状計測モジュール「VK-H1XR」を備えた、解析アプリケーション「VK-H1XA」、ともにキーエンス社製)に取り込み、ISO25178表面性状計測を実行し、Sq、Sdqを算出した。(条件は、S‐フィルター:1μm、L‐フィルター:0.2mm)。
<Flop Index(FI)の測定>
まず、電子部品搭載基板における電子部品保護層表面を多角度測色計(BYK社製、BYK‐mac i23mm測定口径)を用いてL* 15°、L* 45°、L* 110°を測定した後、数式(1)に基づいてFIを算出した。光源はD50、視野は2°視野の条件にて測定を行った。表5-7中のL*は、L* 45の値である。
<光学濃度(OD値)の測定>
電子部品搭載基板における電子部品保護層表面のOD値をエックスライト社製「361T 卓上式透過濃度計」を用いて測定した。
<a*b*の測定>
電子部品搭載基板における電子部品保護層表面のa*b*値をKONICA MINOLTA社製「色彩色差計CR-400」を用いて測定した。
<表面抵抗値の測定>
電子部品搭載基板における電子部品保護層の表面抵抗値を日東精工アナリティック社製「ハイレスタ-UX MCP-HT800 高抵抗 抵抗率計」を用いて測定した。 <Measurement of root-mean-square height Sq and root-mean-square slope Sdq>
The root-mean-square height Sq and the root-mean-square slope Sdq of the electronic component protective layer were measured by the following methods. First, using a laser microscope (manufactured by Keyence Corporation, VK-X100), measurement data was obtained for the electronic component protective layer surface of the electronic component mounting board. Subsequently, the acquired measurement data is imported into analysis software (analysis application "VK-H1XA" equipped with ISO 25178 surface texture measurement module "VK-H1XR", both manufactured by Keyence Corporation), ISO 25178 surface texture measurement is performed, Sq and Sdq were calculated. (Conditions are S-filter: 1 μm, L-filter: 0.2 mm).
<Measurement of Flop Index (FI)>
First, L * 15° , L * 45° , and L * 110° were measured on the surface of the electronic component protective layer on the electronic component mounting board using a multi-angle colorimeter (manufactured by BYK, BYK-mac i 23 mm measurement aperture). After that, FI was calculated based on the formula (1). Measurement was performed under the conditions of a light source of D50 and a field of view of 2°. L * in Tables 5-7 is the value of L * 45 .
<Measurement of optical density (OD value)>
The OD value of the surface of the electronic component protective layer on the electronic component mounting board was measured using a "361T desktop transmission densitometer" manufactured by X-Rite.
<Measurement of a * b* >
The a * b * value of the surface of the electronic component protective layer on the electronic component mounting substrate was measured using a "color difference meter CR-400" manufactured by KONICA MINOLTA.
<Measurement of surface resistance>
The surface resistance value of the electronic component protective layer on the electronic component mounting board was measured using a Nitto Seiko Analytic Co., Ltd. "Hiresta-UX MCP-HT800 high resistance resistivity meter".
《評価》
[絶縁破壊電圧]
クッション材と電子部品保護シートとが積層された積層シートのクッション材を剥離性シートに変えて、剥離性シートつき電子部品保護シートを作製した。
剥離性シートつき電子部品保護シートから一方の剥離性シートを剥離し、アルミウム板と重ね合わせ、180℃で2MPaの条件で10分熱プレスを行った後、180℃で2時間キュアすることで試験片を作成した。その後、25℃、50%RHで一晩放置した。その後、同環境下でTM650耐電圧試験器(鶴賀電気社製)を用いて、耐電圧(絶縁破壊電圧)を測定した。
+++:絶縁破壊電圧が2.0kV以上。
++:絶縁破壊電圧が1.5kV以上、2.0kV未満。
+:絶縁破壊電圧が1.0kV以上、1.5kV未満。(実用レベル)
NG:絶縁破壊電圧が1.0kV未満。 "evaluation"
[Insulation breakdown voltage]
An electronic component protection sheet with a release sheet was produced by replacing the cushioning material of the laminated sheet in which the cushioning material and the electronic component protection sheet are laminated with a release sheet.
Peel off one of the releasable sheets from the electronic component protective sheet with a releasable sheet, overlap with an aluminum plate, heat press for 10 minutes at 180 ° C. and 2 MPa, then cure at 180 ° C. for 2 hours to test. made a piece. After that, it was left overnight at 25° C. and 50% RH. After that, under the same environment, the withstand voltage (dielectric breakdown voltage) was measured using a TM650 withstand voltage tester (manufactured by Tsuruga Electric Co., Ltd.).
+++: Dielectric breakdown voltage is 2.0 kV or more.
++: The dielectric breakdown voltage is 1.5 kV or more and less than 2.0 kV.
+: The dielectric breakdown voltage is 1.0 kV or more and less than 1.5 kV. (Practical level)
NG: Dielectric breakdown voltage is less than 1.0 kV.
[絶縁破壊電圧]
クッション材と電子部品保護シートとが積層された積層シートのクッション材を剥離性シートに変えて、剥離性シートつき電子部品保護シートを作製した。
剥離性シートつき電子部品保護シートから一方の剥離性シートを剥離し、アルミウム板と重ね合わせ、180℃で2MPaの条件で10分熱プレスを行った後、180℃で2時間キュアすることで試験片を作成した。その後、25℃、50%RHで一晩放置した。その後、同環境下でTM650耐電圧試験器(鶴賀電気社製)を用いて、耐電圧(絶縁破壊電圧)を測定した。
+++:絶縁破壊電圧が2.0kV以上。
++:絶縁破壊電圧が1.5kV以上、2.0kV未満。
+:絶縁破壊電圧が1.0kV以上、1.5kV未満。(実用レベル)
NG:絶縁破壊電圧が1.0kV未満。 "evaluation"
[Insulation breakdown voltage]
An electronic component protection sheet with a release sheet was produced by replacing the cushioning material of the laminated sheet in which the cushioning material and the electronic component protection sheet are laminated with a release sheet.
Peel off one of the releasable sheets from the electronic component protective sheet with a releasable sheet, overlap with an aluminum plate, heat press for 10 minutes at 180 ° C. and 2 MPa, then cure at 180 ° C. for 2 hours to test. made a piece. After that, it was left overnight at 25° C. and 50% RH. After that, under the same environment, the withstand voltage (dielectric breakdown voltage) was measured using a TM650 withstand voltage tester (manufactured by Tsuruga Electric Co., Ltd.).
+++: Dielectric breakdown voltage is 2.0 kV or more.
++: The dielectric breakdown voltage is 1.5 kV or more and less than 2.0 kV.
+: The dielectric breakdown voltage is 1.0 kV or more and less than 1.5 kV. (Practical level)
NG: Dielectric breakdown voltage is less than 1.0 kV.
[ダイシング適性]
各実施例および比較例の電子部品搭載基板に対し、個片化工程(フルダイシング)を行ったときのバリの発生状況を、レーザー顕微鏡を用いて以下の基準で評価した。
+++:ダレおよびバリが確認されない。
++:ダレおよび/又はバリの発生が個片化した電子部品搭載基板25個中2個未満。
+:ダレおよび/又はバリの発生が個片化した電子部品搭載基板25個中2個以上、5個未満。(実用レベル)
NG:ダレおよび/又はバリの発生が個片化した電子部品搭載基板25個中5個以上。 [Dicing suitability]
The occurrence of burrs when the electronic component mounting board of each example and comparative example was subjected to a singulation process (full dicing) was evaluated using a laser microscope according to the following criteria.
+++: Sagging and burrs are not observed.
++: Less than 2 out of 25 individualized electronic component-mounted substrates had sagging and/or burrs.
+: 2 or more and less than 5 out of 25 individualized electronic component-mounted substrates with sagging and/or burrs. (Practical level)
NG: 5 or more out of 25 electronic component-mounted substrates with sagging and/or burrs.
各実施例および比較例の電子部品搭載基板に対し、個片化工程(フルダイシング)を行ったときのバリの発生状況を、レーザー顕微鏡を用いて以下の基準で評価した。
+++:ダレおよびバリが確認されない。
++:ダレおよび/又はバリの発生が個片化した電子部品搭載基板25個中2個未満。
+:ダレおよび/又はバリの発生が個片化した電子部品搭載基板25個中2個以上、5個未満。(実用レベル)
NG:ダレおよび/又はバリの発生が個片化した電子部品搭載基板25個中5個以上。 [Dicing suitability]
The occurrence of burrs when the electronic component mounting board of each example and comparative example was subjected to a singulation process (full dicing) was evaluated using a laser microscope according to the following criteria.
+++: Sagging and burrs are not observed.
++: Less than 2 out of 25 individualized electronic component-mounted substrates had sagging and/or burrs.
+: 2 or more and less than 5 out of 25 individualized electronic component-mounted substrates with sagging and/or burrs. (Practical level)
NG: 5 or more out of 25 electronic component-mounted substrates with sagging and/or burrs.
《評価》
[防汚性]
各実施例および比較例の電子部品搭載基板を塵埃試験機(DT-1-CF、スガ試験機製)に投入し、60分塵埃曝露させた。試験用粉体としては、JIS Z8901にて規定される試験用粉体11種(関東ローム)を用いた。
塵埃曝露の試験サンプルを取出した後、積もった塵埃をエアダスターにより除去し、5×5個アレイ状の各区画を1個ずつ観察し、残留する塵埃の有無を確認し、以下のように評価を行った。
+++:いずれの区画にも塵埃の残留が認められない。
++:塵埃の残留が認められた区画が25個中1個以上、3個未満。
+:塵埃の残留が認められた区画が25個中3個以上、5個未満。(実用レベル)
NG:塵埃の残留が認められた区画が25個中5個以上。 "evaluation"
[Stain resistance]
The electronic component-mounted substrates of each example and comparative example were placed in a dust tester (DT-1-CF, manufactured by Suga Test Instruments) and exposed to dust for 60 minutes. As the test powder, 11 types of test powder (Kanto loam) specified in JIS Z8901 were used.
After removing the dust exposure test sample, remove the accumulated dust with an air duster, observe each section in a 5 x 5 array pattern one by one, confirm the presence or absence of residual dust, and evaluate as follows. did
+++: Residual dust is not observed in any section.
++: 1 or more but less than 3 sections out of 25 sections in which residual dust was observed.
+: 3 or more but less than 5 sections out of 25 sections in which residual dust was observed. (Practical level)
NG: 5 or more out of 25 sections in which residual dust was observed.
[防汚性]
各実施例および比較例の電子部品搭載基板を塵埃試験機(DT-1-CF、スガ試験機製)に投入し、60分塵埃曝露させた。試験用粉体としては、JIS Z8901にて規定される試験用粉体11種(関東ローム)を用いた。
塵埃曝露の試験サンプルを取出した後、積もった塵埃をエアダスターにより除去し、5×5個アレイ状の各区画を1個ずつ観察し、残留する塵埃の有無を確認し、以下のように評価を行った。
+++:いずれの区画にも塵埃の残留が認められない。
++:塵埃の残留が認められた区画が25個中1個以上、3個未満。
+:塵埃の残留が認められた区画が25個中3個以上、5個未満。(実用レベル)
NG:塵埃の残留が認められた区画が25個中5個以上。 "evaluation"
[Stain resistance]
The electronic component-mounted substrates of each example and comparative example were placed in a dust tester (DT-1-CF, manufactured by Suga Test Instruments) and exposed to dust for 60 minutes. As the test powder, 11 types of test powder (Kanto loam) specified in JIS Z8901 were used.
After removing the dust exposure test sample, remove the accumulated dust with an air duster, observe each section in a 5 x 5 array pattern one by one, confirm the presence or absence of residual dust, and evaluate as follows. did
+++: Residual dust is not observed in any section.
++: 1 or more but less than 3 sections out of 25 sections in which residual dust was observed.
+: 3 or more but less than 5 sections out of 25 sections in which residual dust was observed. (Practical level)
NG: 5 or more out of 25 sections in which residual dust was observed.
[水分蒸散性]
水分蒸散性は、電子部品搭載基板を模した回路基板のリークタッチ回数によって評価した。図7A~図7Cを参照して水分蒸散性試験方法を説明する。まず、厚さ12μmの銅箔と厚さ25μmポリイミドフィルムの積層体をエッチング処理することで図7Aの平面図に示した通り、ポリイミドフィルム31上にライン/スペース=0.05mm/0.05mmの、カソード電極接続点32’を備えたカソード電極用櫛型信号配線32と、アノード電極接続点33’を備えたアノード電極用櫛型信号配線33とをそれぞれ形成した。 [Moisture Transpiration]
Moisture transpiration was evaluated by the number of leak touches of a circuit board imitating an electronic component mounting board. A moisture transpiration test method will be described with reference to FIGS. 7A to 7C. First, by etching a laminate of a copper foil with a thickness of 12 μm and a polyimide film with a thickness of 25 μm, lines/spaces of 0.05 mm/0.05 mm are formed on thepolyimide film 31 as shown in the plan view of FIG. 7A. , a cathode electrode comb-shaped signal wiring 32 having a cathode electrode connection point 32' and an anode electrode comb-shaped signal wiring 33 having an anode electrode connection point 33' were formed.
水分蒸散性は、電子部品搭載基板を模した回路基板のリークタッチ回数によって評価した。図7A~図7Cを参照して水分蒸散性試験方法を説明する。まず、厚さ12μmの銅箔と厚さ25μmポリイミドフィルムの積層体をエッチング処理することで図7Aの平面図に示した通り、ポリイミドフィルム31上にライン/スペース=0.05mm/0.05mmの、カソード電極接続点32’を備えたカソード電極用櫛型信号配線32と、アノード電極接続点33’を備えたアノード電極用櫛型信号配線33とをそれぞれ形成した。 [Moisture Transpiration]
Moisture transpiration was evaluated by the number of leak touches of a circuit board imitating an electronic component mounting board. A moisture transpiration test method will be described with reference to FIGS. 7A to 7C. First, by etching a laminate of a copper foil with a thickness of 12 μm and a polyimide film with a thickness of 25 μm, lines/spaces of 0.05 mm/0.05 mm are formed on the
次いで図7Bの平面図に示した通り、カソード電極用櫛型信号配線32およびアノード電極用櫛型信号配線33を覆い、カソード電極接続点32’付近およびアノード電極接続点3’付近が露出する程度の大きさに切断した各実施例および比較例の積層シートを8MPa、170℃の条件で5分間熱圧着し、クッション材を手で剥離した。その後、180℃2時間キュアを行い、表1に基づき、表面のバフ研磨等の処理が必要なものについては、Sq、Sdq、FIが所定の値となるよう処理を行い、各実施例および比較例の電子部品保護層3が積層された試験用配線板を得た。得られた試料を、試料を85℃-85%RH(相対湿度)の雰囲気下で、アノード電極接続点33’にアノード電極を接続し、カソード電極接続点32’にカソード電極を接続した上で、電圧50Vを印加し500時間継続した。そして500時間を経過するまでの抵抗値の変化を継続して測定し、リークタッチ回数を確認した。なお下記「リークタッチ」とは、短絡による絶縁破壊があり、瞬間的に抵抗が低下し電流が流れることをいう。評価基準は以下の通りである。
+++:リークタッチ無し。
++:リークタッチ1回有り。
+:リークタッチ2回有り。(実用レベル)
NG:リークタッチ3回以上有り。 Next, as shown in the plan view of FIG. 7B, the comb-shapedsignal wiring 32 for the cathode electrode and the comb-shaped signal wiring 33 for the anode electrode are covered, and the vicinity of the cathode electrode connection point 32' and the vicinity of the anode electrode connection point 3' are exposed. The laminated sheets of each example and comparative example cut to size were thermocompressed under conditions of 8 MPa and 170° C. for 5 minutes, and the cushion material was peeled off by hand. After that, curing is performed at 180 ° C. for 2 hours, and based on Table 1, for those that require surface buffing or other processing, processing is performed so that Sq, Sdq, and FI become predetermined values. A test wiring board having the electronic component protective layer 3 of Example laminated thereon was obtained. The obtained sample was placed in an atmosphere of 85° C.-85% RH (relative humidity), the anode electrode was connected to the anode electrode connection point 33 ′, and the cathode electrode was connected to the cathode electrode connection point 32 ′. , a voltage of 50 V was applied and continued for 500 hours. Then, the change in the resistance value was continuously measured until 500 hours passed, and the number of leak touches was confirmed. Note that the following "leak touch" means that there is a dielectric breakdown due to a short circuit, the resistance is momentarily lowered, and the current flows. Evaluation criteria are as follows.
+++: No leak touch.
++: There was one leak touch.
+: There was two leak touches. (Practical level)
NG: Three or more leak touches were found.
+++:リークタッチ無し。
++:リークタッチ1回有り。
+:リークタッチ2回有り。(実用レベル)
NG:リークタッチ3回以上有り。 Next, as shown in the plan view of FIG. 7B, the comb-shaped
+++: No leak touch.
++: There was one leak touch.
+: There was two leak touches. (Practical level)
NG: Three or more leak touches were found.
[識別性]
(試験個片の作製)
ガラスエポキシからなる基板上に、モールド封止された電子部品(1000μm×1000μm)を5×5個アレイ状に搭載した基板を用意した。基板の厚みは0.3mmであり、モールド封止厚、即ち基板上面からモールド封止材の頂面までの高さ(部品高さ)Hは0.7mmである。その後、部品同士の間隙である溝に添ってハーフダイシングを行い、試験基板を得た(図6参照)。ハーフカット溝深さは0.8mm(基板のカット溝深さは0.1mm)、ハーフカット溝幅は200μmとした。前記試験基板に、各実施例および比較例の電子部品保護シートを8MPa、170℃の条件で5分間熱圧着し、クッション材を手で剥離した。その後、180℃2時間キュアを行い、表1に基づき、表面のバフ研磨等の処理が必要なものについては、Sq、Sdq、FIが所定の値となるよう処理を行い、各実施例および比較例の電子部品搭載基板を得た。その後、得られた電子部品搭載基板をハーフカット溝に沿ってフルダイシングを行うことにより、各実施例および比較例につき25個の試験個片を得た。更に同様の操作を、電子部品保護シートを積層せずに実施し、電子部品保護層のない試験個片を得た。
(識別性評価)
電子部品保護層つき試験個片および電子部品保護なし試験個片について、それぞれ1個を組み合わせて一組とし、これを10組用意した。そして、電子部品保護層が積層されている試験個片と、電子部品保護層が積層されていない試験個片とを識別できた組数を数えた。観察は目視にて、以下の基準により評価した。
+++:10組全て識別できた。
++:識別できた組数が8組以上、9組以下。
+:識別できた組数が6組以上、8組未満。(実用レベル)
NG:識別できた組数が6組未満。 [Identification]
(Preparation of test pieces)
A substrate was prepared by mounting 5×5 electronic components (1000 μm×1000 μm) in an array on a substrate made of glass epoxy. The thickness of the substrate is 0.3 mm, and the mold sealing thickness, ie, the height (component height) H from the top surface of the substrate to the top surface of the mold sealing material, is 0.7 mm. After that, half dicing was performed along the gap between the parts to obtain a test substrate (see FIG. 6). The half-cut groove depth was 0.8 mm (the substrate cut groove depth was 0.1 mm), and the half-cut groove width was 200 μm. The electronic component protective sheets of each example and comparative example were thermocompression bonded to the test substrate under conditions of 8 MPa and 170° C. for 5 minutes, and the cushion material was peeled off by hand. After that, curing is performed at 180 ° C. for 2 hours, and based on Table 1, for those that require surface buffing or other processing, processing is performed so that Sq, Sdq, and FI become predetermined values. An electronic component mounting substrate of Example was obtained. After that, the resulting electronic component-mounted substrate was fully diced along the half-cut grooves to obtain 25 test pieces for each example and comparative example. Furthermore, the same operation was performed without laminating the electronic component protective sheet to obtain a test piece without the electronic component protective layer.
(Distinguishability evaluation)
One test piece with an electronic component protection layer and one test piece without electronic component protection were combined to form a set, and 10 sets of this were prepared. Then, the number of test pieces in which the electronic component protective layer was laminated and the test piece in which the electronic component protective layer was not laminated was counted. Observation was visually performed and evaluated according to the following criteria.
+++: All 10 pairs could be identified.
++: The number of identifiable pairs is 8 or more and 9 or less.
+: The number of identifiable pairs is 6 or more and less than 8. (Practical level)
NG: The number of identifiable pairs is less than 6 pairs.
(試験個片の作製)
ガラスエポキシからなる基板上に、モールド封止された電子部品(1000μm×1000μm)を5×5個アレイ状に搭載した基板を用意した。基板の厚みは0.3mmであり、モールド封止厚、即ち基板上面からモールド封止材の頂面までの高さ(部品高さ)Hは0.7mmである。その後、部品同士の間隙である溝に添ってハーフダイシングを行い、試験基板を得た(図6参照)。ハーフカット溝深さは0.8mm(基板のカット溝深さは0.1mm)、ハーフカット溝幅は200μmとした。前記試験基板に、各実施例および比較例の電子部品保護シートを8MPa、170℃の条件で5分間熱圧着し、クッション材を手で剥離した。その後、180℃2時間キュアを行い、表1に基づき、表面のバフ研磨等の処理が必要なものについては、Sq、Sdq、FIが所定の値となるよう処理を行い、各実施例および比較例の電子部品搭載基板を得た。その後、得られた電子部品搭載基板をハーフカット溝に沿ってフルダイシングを行うことにより、各実施例および比較例につき25個の試験個片を得た。更に同様の操作を、電子部品保護シートを積層せずに実施し、電子部品保護層のない試験個片を得た。
(識別性評価)
電子部品保護層つき試験個片および電子部品保護なし試験個片について、それぞれ1個を組み合わせて一組とし、これを10組用意した。そして、電子部品保護層が積層されている試験個片と、電子部品保護層が積層されていない試験個片とを識別できた組数を数えた。観察は目視にて、以下の基準により評価した。
+++:10組全て識別できた。
++:識別できた組数が8組以上、9組以下。
+:識別できた組数が6組以上、8組未満。(実用レベル)
NG:識別できた組数が6組未満。 [Identification]
(Preparation of test pieces)
A substrate was prepared by mounting 5×5 electronic components (1000 μm×1000 μm) in an array on a substrate made of glass epoxy. The thickness of the substrate is 0.3 mm, and the mold sealing thickness, ie, the height (component height) H from the top surface of the substrate to the top surface of the mold sealing material, is 0.7 mm. After that, half dicing was performed along the gap between the parts to obtain a test substrate (see FIG. 6). The half-cut groove depth was 0.8 mm (the substrate cut groove depth was 0.1 mm), and the half-cut groove width was 200 μm. The electronic component protective sheets of each example and comparative example were thermocompression bonded to the test substrate under conditions of 8 MPa and 170° C. for 5 minutes, and the cushion material was peeled off by hand. After that, curing is performed at 180 ° C. for 2 hours, and based on Table 1, for those that require surface buffing or other processing, processing is performed so that Sq, Sdq, and FI become predetermined values. An electronic component mounting substrate of Example was obtained. After that, the resulting electronic component-mounted substrate was fully diced along the half-cut grooves to obtain 25 test pieces for each example and comparative example. Furthermore, the same operation was performed without laminating the electronic component protective sheet to obtain a test piece without the electronic component protective layer.
(Distinguishability evaluation)
One test piece with an electronic component protection layer and one test piece without electronic component protection were combined to form a set, and 10 sets of this were prepared. Then, the number of test pieces in which the electronic component protective layer was laminated and the test piece in which the electronic component protective layer was not laminated was counted. Observation was visually performed and evaluated according to the following criteria.
+++: All 10 pairs could be identified.
++: The number of identifiable pairs is 8 or more and 9 or less.
+: The number of identifiable pairs is 6 or more and less than 8. (Practical level)
NG: The number of identifiable pairs is less than 6 pairs.
[冷熱サイクル耐性]
前述の[識別性]評価と同様の方法により試験固片を作製し、冷熱サイクル耐性評価を行った。
電子部品保護層つき試験個片を冷熱衝撃装置(「TSE‐11‐A」、エスペック社製)に投入し、高温さらし:125℃、15分、低温さらし:-50℃、15分の曝露条件にて交互曝露を1000回実施した。その後、試験個片を取出し、電子部品保護層の外観を観察し、破損した試験個片数を数え、以下の基準によって評価した。試験個数は各例についてそれぞれ10個とした。
+++:破損した試験個片数が0個であった。
++:破損した試験個片数が1個以上、2個以下。
+:破損した試験個片数が3個以上、5個以下。(実用レベル)
NG:破損した試験個片数が6個以上。 [Heat cycle resistance]
A test piece was prepared by the same method as the above-mentioned [Distinguishability] evaluation, and the thermal cycle resistance evaluation was performed.
A test piece with an electronic component protective layer is put into a thermal shock device ("TSE-11-A", manufactured by Espec Co., Ltd.), high temperature exposure: 125 ° C., 15 minutes, low temperature exposure: -50 ° C., 15 minutes Exposure conditions 1000 alternating exposures were performed at . After that, the test piece was taken out, the appearance of the electronic component protective layer was observed, the number of damaged test pieces was counted, and evaluation was made according to the following criteria. The number of test pieces was 10 for each example.
+++: The number of damaged test pieces was 0.
++: The number of damaged test pieces is 1 or more and 2 or less.
+: The number of damaged test pieces is 3 or more and 5 or less. (Practical level)
NG: The number of damaged test pieces is 6 or more.
前述の[識別性]評価と同様の方法により試験固片を作製し、冷熱サイクル耐性評価を行った。
電子部品保護層つき試験個片を冷熱衝撃装置(「TSE‐11‐A」、エスペック社製)に投入し、高温さらし:125℃、15分、低温さらし:-50℃、15分の曝露条件にて交互曝露を1000回実施した。その後、試験個片を取出し、電子部品保護層の外観を観察し、破損した試験個片数を数え、以下の基準によって評価した。試験個数は各例についてそれぞれ10個とした。
+++:破損した試験個片数が0個であった。
++:破損した試験個片数が1個以上、2個以下。
+:破損した試験個片数が3個以上、5個以下。(実用レベル)
NG:破損した試験個片数が6個以上。 [Heat cycle resistance]
A test piece was prepared by the same method as the above-mentioned [Distinguishability] evaluation, and the thermal cycle resistance evaluation was performed.
A test piece with an electronic component protective layer is put into a thermal shock device ("TSE-11-A", manufactured by Espec Co., Ltd.), high temperature exposure: 125 ° C., 15 minutes, low temperature exposure: -50 ° C., 15 minutes Exposure conditions 1000 alternating exposures were performed at . After that, the test piece was taken out, the appearance of the electronic component protective layer was observed, the number of damaged test pieces was counted, and evaluation was made according to the following criteria. The number of test pieces was 10 for each example.
+++: The number of damaged test pieces was 0.
++: The number of damaged test pieces is 1 or more and 2 or less.
+: The number of damaged test pieces is 3 or more and 5 or less. (Practical level)
NG: The number of damaged test pieces is 6 or more.
《評価》
[傷視認性]
厚さ125μmのポリイミドフィルム(東レ・デュポン社製「カプトン500H」)に、5×15cmにカットした各実施例および比較例の積層シートをそれぞれ載置し、180℃で2MPaの条件で10分熱プレスを行った後、クッション材を剥離し、180℃で2時間キュアすることで試験基板を得た。次いで、電子部品保護層に対して学振式磨耗試験機(テスター産業社製)にセットして荷重10gf、ストローク120mm、往復速度10回/minの条件で、摩擦子を10往復させた後、電子部品保護層表面を目視で観察し、以下の基準に基づいて評価を行った。
+++:確認できた傷が10個未満。
++:確認できた傷が10個以上、20個未満。
+:確認できた傷が20個以上、40個未満。(実用レベル)
NG:確認できた傷が40個以上。 "evaluation"
[Scratch visibility]
Laminated sheets of each example and comparative example cut into 5×15 cm were placed on a polyimide film having a thickness of 125 μm (“Kapton 500H” manufactured by DuPont Toray), and heated at 180° C. and 2 MPa for 10 minutes. After pressing, the cushion material was peeled off and cured at 180° C. for 2 hours to obtain a test substrate. Next, set the electronic component protective layer in a Gakushin abrasion tester (manufactured by Tester Sangyo Co., Ltd.) and reciprocate thefriction element 10 times under the conditions of a load of 10 gf, a stroke of 120 mm, and a reciprocating speed of 10 times/min. The surface of the electronic component protective layer was visually observed and evaluated based on the following criteria.
+++: Fewer than 10 scratches were observed.
++: 10 or more and less than 20 scratches were confirmed.
+: 20 or more and less than 40 scratches were observed. (Practical level)
NG: 40 or more scratches were confirmed.
[傷視認性]
厚さ125μmのポリイミドフィルム(東レ・デュポン社製「カプトン500H」)に、5×15cmにカットした各実施例および比較例の積層シートをそれぞれ載置し、180℃で2MPaの条件で10分熱プレスを行った後、クッション材を剥離し、180℃で2時間キュアすることで試験基板を得た。次いで、電子部品保護層に対して学振式磨耗試験機(テスター産業社製)にセットして荷重10gf、ストローク120mm、往復速度10回/minの条件で、摩擦子を10往復させた後、電子部品保護層表面を目視で観察し、以下の基準に基づいて評価を行った。
+++:確認できた傷が10個未満。
++:確認できた傷が10個以上、20個未満。
+:確認できた傷が20個以上、40個未満。(実用レベル)
NG:確認できた傷が40個以上。 "evaluation"
[Scratch visibility]
Laminated sheets of each example and comparative example cut into 5×15 cm were placed on a polyimide film having a thickness of 125 μm (“Kapton 500H” manufactured by DuPont Toray), and heated at 180° C. and 2 MPa for 10 minutes. After pressing, the cushion material was peeled off and cured at 180° C. for 2 hours to obtain a test substrate. Next, set the electronic component protective layer in a Gakushin abrasion tester (manufactured by Tester Sangyo Co., Ltd.) and reciprocate the
+++: Fewer than 10 scratches were observed.
++: 10 or more and less than 20 scratches were confirmed.
+: 20 or more and less than 40 scratches were observed. (Practical level)
NG: 40 or more scratches were confirmed.
この出願は、2021年7月29日に出願された日本出願特願2021-124665、同2021-124666、および同2021-124667を基礎とする優先権を主張し、その開示の全てをここに取り込む。
This application claims priority based on Japanese patent applications 2021-124665, 2021-124666, and 2021-124667 filed on July 29, 2021, and incorporates all disclosures thereof .
本開示の電子部品搭載基板は、電子機器に搭載されて利用される。本開示の電子部品保護シートは、電子搭載基板において電子部品を保護するシートとして好適に利用できる。前記保護シートは、電子部品のみならず、各種部品を被覆するための部品保護シートとしても好適に利用できる。
The electronic component mounting board of the present disclosure is used by being mounted on an electronic device. The electronic component protection sheet of the present disclosure can be suitably used as a sheet for protecting electronic components in an electronic mounting board. The protective sheet can be suitably used not only for electronic parts but also as a part protective sheet for covering various parts.
1:基板
2:電子部品
3:電子部品保護層
4:半田バンプ
5:中空部分
6:電子部品保護シート
7:クッション材
8:導電層
9:グランド
10:電子部品搭載基板
11:導電層を有する電子部品搭載基板
12:入射光
13:測定対象表面
20:加熱加圧機
21:一次粒子
22:アグリゲート
23:空間
100:搭載基板 1: Substrate 2: Electronic component 3: Electronic component protective layer 4: Solder bump 5: Hollow portion 6: Electronic component protective sheet 7: Cushion material 8: Conductive layer 9: Ground 10: Electronic component mounting board 11: Has conductive layer Electronic component mounting substrate 12: Incident light 13: Measurement target surface 20: Heating pressurizer 21: Primary particles 22: Aggregate 23: Space 100: Mounting substrate
2:電子部品
3:電子部品保護層
4:半田バンプ
5:中空部分
6:電子部品保護シート
7:クッション材
8:導電層
9:グランド
10:電子部品搭載基板
11:導電層を有する電子部品搭載基板
12:入射光
13:測定対象表面
20:加熱加圧機
21:一次粒子
22:アグリゲート
23:空間
100:搭載基板 1: Substrate 2: Electronic component 3: Electronic component protective layer 4: Solder bump 5: Hollow portion 6: Electronic component protective sheet 7: Cushion material 8: Conductive layer 9: Ground 10: Electronic component mounting board 11: Has conductive layer Electronic component mounting substrate 12: Incident light 13: Measurement target surface 20: Heating pressurizer 21: Primary particles 22: Aggregate 23: Space 100: Mounting substrate
Claims (12)
- 基板上に電子部品が搭載されており、前記電子部品が電子部品保護層によって被覆されている電子部品搭載基板であって、前記電子部品保護層の表面は、数式(1)により算出されたFlop Index(FI)が0.3~80である電子部品搭載基板。
- 基板上に電子部品が搭載されており、前記電子部品が電子部品保護層によって被覆されている電子部品搭載基板であって、前記電子部品保護層の表面は、
ISO 25178-2:2012に準拠して求めた二乗平均平方根傾斜Sdqが0.0001~5.0である電子部品搭載基板。 An electronic component-mounted substrate, wherein an electronic component is mounted on the substrate, and the electronic component is covered with an electronic component protective layer, the surface of the electronic component protective layer being:
An electronic component mounting board having a root-mean-square slope Sdq determined in accordance with ISO 25178-2:2012 of 0.0001 to 5.0. - 前記電子部品保護層の表面は、
ISO 25178-2:2012に準拠して求めた二乗平均平方根高さSqが0.01~10μmであって、下記数式(2)及び数式(3)を満たす、
ことを特徴とする、請求項2記載の電子部品搭載基板。
y≦195x-0.553 (2)
y≧0.258x (3)
(x:ISO 25178-2:2012に準拠して求めた電子部品保護層の表面の二乗平均平方根傾斜Sdq、y:ISO 25178-2:2012に準拠して求めた電子部品保護層の表面の二乗平均平方根高さSq) The surface of the electronic component protective layer is
The root mean square height Sq determined in accordance with ISO 25178-2:2012 is 0.01 to 10 μm, and satisfies the following formulas (2) and (3).
3. The electronic component mounting board according to claim 2, characterized by:
y≤195x-0.553 (2)
y≧0.258x (3)
(x: root-mean-square slope Sdq of the surface of the electronic component protective layer determined in accordance with ISO 25178-2: 2012, y: the square of the surface of the electronic component protective layer determined in accordance with ISO 25178-2: 2012 Root mean height Sq) - 前記電子部品保護層のISO 5-2で定められる360~760nmの光学濃度(OD値)が1~6であることを特徴とする、請求項1~3いずれか記載の電子部品搭載基板。 The electronic component mounting board according to any one of claims 1 to 3, wherein the optical density (OD value) of the electronic component protective layer at 360 to 760 nm defined by ISO 5-2 is 1 to 6.
- 前記電子部品保護層のJIS Z8781‐4で定められるL*a*b*表色系における、L*値が1~50、かつa*値が-10~10、かつb*値が-10~10であることを特徴とする、請求項1~4いずれか記載の電子部品搭載基板。 The L* value is 1 to 50, the a* value is -10 to 10, and the b* value is -10 to -10 in the L*a*b* color system defined by JIS Z8781-4 of the electronic component protective layer. 10. The electronic component mounting substrate according to claim 1, wherein the electronic component mounting substrate is .
- 前記電子部品保護層の表面抵抗値が1.0×107Ω/□以上であることを特徴とする、請求項1~5いずれか記載の電子部品搭載基板。 6. The electronic component mounting board according to claim 1, wherein the electronic component protective layer has a surface resistance value of 1.0×10 7 Ω/□ or more.
- 前記電子部品保護層が、バインダー樹脂、および粒状改質剤を含有し、
前記粒状改質剤は、JIS K 6217-4で規定されるDBP吸油量が15~400ml/100gであることを特徴とする、請求項1~6いずれか記載の電子部品搭載基板。 The electronic component protective layer contains a binder resin and a granular modifier,
7. The electronic component mounting board according to claim 1, wherein the granular modifier has a DBP oil absorption of 15 to 400 ml/100 g as defined in JIS K 6217-4. - 前記粒状改質剤が少なくとも1種類のカーボンブラックを含むことを特徴とする、請求項7記載の電子部品搭載基板。 The electronic component mounting board according to claim 7, characterized in that said particulate modifier contains at least one type of carbon black.
- 請求項1~8いずれか記載の電子部品搭載基板が搭載された電子機器。 An electronic device on which the electronic component mounting board according to any one of claims 1 to 8 is mounted.
- 基板上に搭載された電子部品を被覆するための電子部品保護シートであって、
前記電子部品保護シートを180℃、60分加熱させてなる硬化膜の表面は、数式(1)により算出されたFlop Index(FI)が0.3~80である電子部品保護シート。
The surface of the cured film obtained by heating the electronic component protective sheet at 180° C. for 60 minutes has a Flop Index (FI) of 0.3 to 80 as calculated by the formula (1).
- 基板上に搭載された電子部品を被覆するための電子部品保護シートであって、
前記電子部品保護シートを180℃、60分加熱させてなる硬化膜の表面は、ISO 25178-2:2012に準拠して求めた二乗平均平方根傾斜Sdqが0.0001~5.0である電子部品保護シート。 An electronic component protection sheet for covering electronic components mounted on a substrate,
The surface of the cured film obtained by heating the electronic component protective sheet at 180 ° C. for 60 minutes has a root mean square slope Sdq determined in accordance with ISO 25178-2:2012. protective sheet. - 前記電子部品保護シートを180℃、60分加熱させてなる硬化膜の表面は、
ISO 25178-2:2012に準拠して求めた二乗平均平方根高さSqが0.01~10μmであって、下記数式(2)及び数式(3)を満たす、
ことを特徴とする、請求項11記載の電子部品保護シート。
y≦195x-0.553 (2)
y≧0.258x (3)
(x:ISO 25178-2:2012に準拠して求めた電子部品保護層の表面の二乗平均平方根傾斜Sdq、y:ISO 25178-2:2012に準拠して求めた電子部品保護層の表面の二乗平均平方根高さSq) The surface of the cured film obtained by heating the electronic component protection sheet at 180° C. for 60 minutes,
The root mean square height Sq determined in accordance with ISO 25178-2:2012 is 0.01 to 10 μm, and satisfies the following formulas (2) and (3).
The electronic component protective sheet according to claim 11, characterized by:
y≤195x-0.553 (2)
y≧0.258x (3)
(x: root-mean-square slope Sdq of the surface of the electronic component protective layer determined in accordance with ISO 25178-2: 2012, y: the square of the surface of the electronic component protective layer determined in accordance with ISO 25178-2: 2012 Root mean height Sq)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020227045600A KR20230019132A (en) | 2021-07-29 | 2022-07-22 | Electronic component mounting board, electronic component protection sheet, and electronic device |
CN202280005331.7A CN116134612A (en) | 2021-07-29 | 2022-07-22 | Electronic component mounting board, electronic component protection sheet, and electronic device |
Applications Claiming Priority (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2021124665 | 2021-07-29 | ||
JP2021-124665 | 2021-07-29 | ||
JP2021-124667 | 2021-07-29 | ||
JP2021124667A JP2023019723A (en) | 2021-07-29 | 2021-07-29 | Substrate with electronic component and electronic component protection sheet |
JP2021124666 | 2021-07-29 | ||
JP2021-124666 | 2021-07-29 |
Publications (1)
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WO2023008327A1 true WO2023008327A1 (en) | 2023-02-02 |
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PCT/JP2022/028459 WO2023008327A1 (en) | 2021-07-29 | 2022-07-22 | Electronic component mounted substrate, electronic component protecting sheet, and electronic apparatus |
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KR (1) | KR20230019132A (en) |
CN (1) | CN116134612A (en) |
TW (2) | TWI838799B (en) |
WO (1) | WO2023008327A1 (en) |
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CN116134612A (en) | 2023-05-16 |
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