JP2022527785A - 無線通信システムにおいて無線信号を送受信する方法及び装置 - Google Patents
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Abstract
Description
Claims (15)
- 多重TB(Transport Block)スケジューリングを支援する無線通信システムにおいて端末が信号を送受信する方法であって、
2つのTBをスケジューリングする1つのDCI(Downlink Control Information)を基地局から受信する段階;
前記2つのTBに設定された繰り返し送信回数が1であることに基づき、前記DCIから2ビットサイズのRV(Redundancy Version)情報を得る段階;及び
前記繰り返し送信回数が1より大きいことに基づき、前記DCIから1ビットサイズのRV情報及び1ビットサイズの周波数ホッピング情報を得る段階;を含む、方法。 - 前記繰り返し送信回数が1であることに基づき、前記周波数ホッピング情報は、
周波数ホッピングの非活性化を指示する固定された値に決定されるか、
上位階層シグナリングにより半-静的(semi-static)に決定されるか、又は、
前記1つのDCIに含まれた他の情報により暗示的(implicit)に決定される、請求項1に記載の方法。 - 前記1つのDCIは、PUSCH(Physical Uplink Shared Channel)をスケジューリングする為のDCI又はPDSCH(Physical Downlink Shared Channel)をスケジューリングする為のDCIを含む、請求項1に記載の方法。
- 前記方法は、
前記1つのDCIが前記PUSCHをスケジューリングする為のDCIであることに基づき、前記スケジューリングされたPUSCHを介して前記2つの送信ブロックを送信する段階を更に含む、請求項3に記載の方法。 - 前記方法は、
前記1つのDCIが前記PDSCHをスケジューリングする為のDCIであることに基づき、前記スケジューリングされたPDSCHを介して前記2つのブロックを受信する段階を更に含む、請求項3に記載の方法。 - 前記端末は前記PDSCHの為に64QAM(Quadrature Amplitude Modulation)を使用するように設定されない、請求項5に記載の方法。
- 前記方法は、複数のTBをスケジューリングするための設定情報を受信する段階を更に含む、請求項1に記載の方法。
- 前記複数のTBをスケジューリングするための設定情報は、前記1つのDCIによりスケジューリングされるTBの最大数に関する情報を含む、請求項7に記載の方法。
- 無線通信システムで動作する端末であって、
送受信機(transceiver);及び
前記送受信機に連結されて動作するプロセッサ(processor);を備えてなり、
前記プロセッサは、
2つのTBをスケジューリングする1つのDCI(Downlink Control Information)を基地局から受信し、
前記2つのTBに設定された繰り返し送信回数が1であることに基づき、前記DCIから2ビットサイズのRV(Redundancy Version)情報を得、
前記繰り返し送信回数が1より大きいことに基づき、前記DCIから1ビットサイズのRV情報及び1ビットサイズの周波数ホッピング情報を得るように設定された、端末。 - 前記繰り返し送信回数が1であることに基づき、前記周波数ホッピング情報は、
周波数ホッピングの非活性化を指示する固定された値に決定されるか、
上位階層シグナリングにより半-静的(semi-static)に決定されるか、又は、
前記1つのDCIに含まれた他の情報により暗示的(implicit)に決定される、請求項9に記載の端末。 - 前記1つのDCIは、PUSCH(Physical Uplink Shared Channel)をスケジューリングするためのDCI又はPDSCH(Physical Downlink Shared Channel)をスケジューリングするためのDCIを含む、請求項9に記載の端末。
- 前記1つのDCIが前記PUSCHをスケジューリングするためのDCIであることに基づき、前記スケジューリングされたPUSCHを介して前記2つの送信ブロックを送信し、
前記1つのDCIが前記PDSCHをスケジューリングするためのDCIであることに基づき、前記スケジューリングされたPDSCHを介して前記2つのブロックを受信する、請求項9に記載の端末。 - 前記端末は前記PDSCHの為に64QAM(Quadrature Amplitude Modulation)を使用するように設定されない、請求項12に記載の端末。
- 前記プロセッサは複数のTBをスケジューリングするための設定情報を受信する動作を行うように更に設定された、請求項1に記載の端末。
- 端末のための装置であって、
少なくとも1つのプロセッサ;及び
前記少なくとも1つのプロセッサと動作可能に連結され、実行されるとき、前記少なくとも1つのプロセッサに動作を実行させる少なくとも1つのコンピューターメモリ;を備えてなり、
前記動作は:
2つのTBをスケジューリングする1つのDCI(Downlink Control Information)を基地局から受信し、
前記2つのTBに設定された繰り返し送信回数が1であることに基づき、前記DCIから2ビットサイズのRV(Redundancy Version)情報を得、
前記繰り返し送信回数が1より大きいことに基づき、前記DCIから1ビットサイズのRV情報及び1ビットサイズの周波数ホッピング情報を得ることを含む、装置。
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US20220191911A1 (en) | 2022-06-16 |
EP3923662A1 (en) | 2021-12-15 |
JP7316373B2 (ja) | 2023-07-27 |
WO2020204496A1 (ko) | 2020-10-08 |
KR20210134335A (ko) | 2021-11-09 |
EP3923662B1 (en) | 2023-03-08 |
CN113678556B (zh) | 2023-10-13 |
EP3923662A4 (en) | 2022-03-23 |
CN113678556A (zh) | 2021-11-19 |
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