JP2022047488A - Straight wire bonding of silicon die - Google Patents

Abstract

To provide a method including stacking a number of silicon dice such that one or more edges of the dice are in vertical alignment.SOLUTION: A silicon die 200 has one or more edges 204 including a number of connection pads 202a, 202b. A method includes positioning a connecting wire on a substantially perpendicular axis to the one or more edges 204. The connecting wire includes a number of solder blocks formed thereon. The solder blocks are spaced at intervals associated with a distance between a first set of aligned connection pads on the die 200. The connecting wire is positioned such that the solder blocks are in contact with the first set of aligned connection pads 202a, 202b. The method further includes applying heat to cause the solder blocks to reflow and physically and electrically couple the connecting wire to the connection pads 202a, 202b by the solder blocks.SELECTED DRAWING: Figure 2

Description

This application claims the priority and interests of US Provisional Patent Application Nos. 63/077, 069 filed on September 11, 2020, all of which are incorporated herein by reference.

The present application generally relates to providing electrical connections between silicon dies, and in particular to electrical connections of silicon dies along vertical edges.

In some silicon die structures, the connection pad is provided at the top or bottom of the die. This structure occupies valuable space for forming transistors and occupies valuable space for connecting dies when stacking dies. Also, because the dies need to be staggered and installed, more space is required to form the completed or packaged integrated device.

The processes, devices, and systems described herein describe electrically connecting silicon dies along the vertical edges of the dies to reduce the required lateral space requirements. Specifically, by installing the connection pads on the vertical edge of the die, the dies can be stacked one above the other without shifting the die and forming a connection via a connection pad provided at the top or bottom. Instead, the silicon dies can be fully stacked vertically by forming a linear connection along the edge-mounted connection pads that are aligned vertically. This reduces the lateral footprint of the silicon die and makes it possible to reduce the overall form factor. In addition, transistors are typically formed at the top and / or bottom of the silicon die rather than at the vertical edges. By installing the connection pad on the edge, previously unused space on the silicon die is used for interconnection, freeing up space for forming transistors at the top and / or bottom of the silicon die.

The methods and systems described herein provide interconnection between silicon dies with connection pads formed at the edges, particularly novel and advantageous connection techniques for top and bottom laminated silicon dies.

The present disclosure also provides an apparatus including a substrate and two or more silicon dies. The first die is provided on the substrate and the second die is installed or laminated on the first die. The silicon die is provided between the upper plane parallel to the substrate, the lower plane parallel to the upper plane and arranged at a first distance from the upper plane, and between the upper plane and the lower plane. It also includes a first edge portion perpendicular to them and a first set of connection pads provided on the first edge portion and aligned vertically. The device further includes a conductive element configured to be coupled to one or more connection pads and several solder blocks. The solder blocks are coupled to the conductive element and placed at intervals associated with the distance between the first set of connection pads. In some embodiments, the solder block has a width approximately equal to the width of the first edge portion and includes a first groove configured to accommodate the edge of the silicon die within the first groove.

The present disclosure provides a method comprising stacking several silicon dies such that one or more edges of the silicon die are aligned vertically, where one or more edges are several connecting pads. including. The method also involves placing a substantially linear conductor on an axis that is substantially perpendicular to one or more edges, where the linear conductor contacts one or more connecting pads. .. Further, the method comprises applying conductive solder to one or more portions of the connecting pad and one or more portions of the linear conductor that come into contact with the one or more connecting pads. It also involves applying heat to reflow the solder and physically and electrically coupling one or more portions of the linear conductor to one or more connecting pads in contact with the solder.

The present disclosure also provides a method comprising stacking several silicon dies such that one or more edges of the several silicon dies are aligned vertically, wherein the one or more edges are: Includes several connection pads. This method also involves installing connecting wires on an axis that is substantially perpendicular to one or more edges. The connecting wire contains several solder blocks. The solder blocks are placed at intervals associated with the distance between the first set of aligned connection pads on the silicon die. The connecting wires are arranged so that the solder blocks are in contact with the first set of aligned connection pads. Further, this method involves applying heat to reflow the solder block and physically bond the connecting wires to the aligned connection pad by the solder block.

As such, various aspects of the present disclosure provide improvements, at least in the technical field of silicon die interconnection and their design and construction. The present disclosure is particularly useful for connecting laminated dies, but those skilled in the art may appreciate the present disclosure in other embodiments, eg, embodiments in which the dies are installed orthogonally to the substrate. You will understand that. The above description is intended solely to provide general concepts of the various aspects of the present disclosure and is not intended to limit the scope of the present disclosure in any way.

FIG. 3 is a perspective view of a known method of connecting one or more silicon dies according to some embodiments of the present disclosure.

FIG. 2a is a perspective view of a silicon die with one or more vertical edge connecting pads according to some embodiments of the present disclosure, and FIG. 2b is a silicon of FIG. 2a according to some embodiments of the present disclosure. It is a side sectional view of a die.

It is a flowchart which shows the process for connecting two or more silicon dies by some embodiments of this disclosure.

4a is a cross-sectional view of a silicon die showing a portion of the process shown in FIG. 3 according to some embodiments of the present disclosure, and FIG. 4b is shown in FIG. 3 according to some embodiments of the present disclosure. FIG. 6 is a cross-sectional view of a silicon die showing a further part of the process.

FIG. 3 is a perspective view of two silicon dies electrically coupled by the process shown in FIG. 3 according to some embodiments of the present disclosure.

It is a bottom view of the solder block according to some embodiments of this disclosure.

It is a flowchart which shows the process of connecting a plurality of silicon dies to form a packaged IC or other packaged silicon apparatus according to some embodiments of the present disclosure.

FIG. 3 is a perspective view of a plurality of silicon dies prepared to be electrically coupled according to some embodiments of the present disclosure.

FIG. 3 is a perspective view of a plurality of electrically coupled silicon dies according to some embodiments of the present disclosure.

FIG. 3 is a perspective view of a plurality of silicon dies coupled to a substrate according to some embodiments of the present disclosure.

It is an alternating arrangement of silicon dies coupled to a substrate according to some embodiments of the present disclosure.

In the following description, in order to understand one or more aspects of the present disclosure, many details such as the configuration of silicon-based dies and the method of electrically interconnecting silicon dies will be described. It will be readily apparent to those skilled in the art that these specific details are merely exemplary and are not intended to limit the scope of this application. The following description is intended solely to provide general concepts of the various aspects of the present disclosure and is not intended to limit the scope of the present disclosure in any way.

Figure 1 connects one or more silicon dies 100 within a traditional packaged integrated circuit (“packaged IC”) or other packaged silicon device (“package”) such as a memory device. It is a perspective view of the method of doing. As shown in FIG. 1, the silicon die 100 includes one or more connection pads 102 provided on its top surface 104. The silicon dies 100 are staggered from each other so that the connection pads 102 of each subsequent silicon die are exposed or made available. This makes it possible to connect the connection pad 102 of the silicon die 100. This staggered arrangement of silicon dies requires additional space within the package, which often results in a large package size. Further, the more dies to be stacked, the more the upper die protrudes, so that the die protrudes away from the center, and as a result, the die may be tilted or cracks may occur due to external force.

FIG. 2a shows a perspective view of a silicon die 200 with one or more connecting pads 202a, 202b provided on a vertical edge 204, according to some embodiments. The die 200 has a substantially planar top surface 206 and a substantially planar bottom surface 208 that is parallel to the top surface 206 and is located at a first distance from the top surface 206. In the illustrated embodiment, the first distance is the width of the die 200. The vertical edge 204 is provided between the top surface 206 and the bottom surface 208 and is perpendicular to them. For example, one or more silicon dies 200 can be stacked one above the other by installing the connection pads 202a, 202b on the vertical edge without shifting or offsetting the silicon dies 200 as shown in FIG. .. This saves space when stacking a plurality of silicon dies 200 in an integrated circuit.

FIG. 2b is a cross-sectional side view of the silicon die 200, showing the connection pad 202a. As shown in FIG. 2b, the connection pad 202a may partially overlap the top surface 206 and the bottom surface 208. However, in some embodiments, the connection pad 202a may not overlap the top surface 206 and / or the bottom surface 208. For example, the connection pad 202a (and connection pad 202b) may be exposed only on the vertical edge 204 and the rest of the connection pad 202a may be located within the silicon die 200. In some embodiments, the connection pad may have a first length of 210 of 25 microns. However, lengths greater than 25 microns or less than 25 microns are also possible. In some embodiments, this length may be the same as the width of the vertical edge 204 of the silicon die 200.

With reference to FIG. 3, a process 300 for connecting two or more silicon dies, according to some embodiments, is shown. In the process block 302, the conductive connecting wire is installed on the first connecting pad of the first silicon die. Connecting wires consist of one or more metals or other conductive materials such as copper, aluminum, gold, palladium, indium, iridium, various silver / tin amalgams, lead, and binary and / or ternary metal alloys. can do. In one embodiment, the connecting wire comprises a metal-plated copper core such as tin that prevents the oxidation of copper. In one embodiment, the connecting line is circular or substantially circular. However, in other examples, the connecting wire may be flat or ribbon-shaped. In some embodiments, the diameter of the connecting wire may be about 24 μm. In other embodiments, the diameter of the connecting wire may be in the range of about 16 μm to about 50 μm. In a further embodiment, the diameter of the connecting wire may be less than 16 μm or more than 50 μm.

In some embodiments, FIG. 4a shows a conductive connection line 400 provided on the connection pad 402 of the silicon die 404. As shown in Figure 4a, the silicon die is provided so that the connecting wire can cross the connecting pad and maintain its position by gravity. However, in other embodiments, the connecting wire may be held in place on the connecting pad by various other methods.

In the process block 304, after installing the connecting wire 400 on the first connecting pad 402 of the first silicon die, liquid solder is applied to the first connecting pad 402 and the connecting wire 400. This is clear from Figure 4b. FIG. 4b shows a lump of liquid solder 406 applied to the first connection pad 402 and surrounding the connection line 400. In some embodiments, the solder is gold solder. In other embodiments, the solder is silver solder, palladium solder, iridium solder, indium solder, silver / tin amalgam solder, one or more binary or ternary metal alloy solders, lead solders, or other applicable solders. It may be a type. Generally, the solder is heated to return it to a liquid state and then discharged to the connection pad 402.

After applying the solder in the process block 306, heat is applied to the solder, the connecting wire 400, and / or the first connecting pad. The heat melts or reflows the solder. Thereby, the solder forms a solder joint between the first connection pad and the connection wire. In some embodiments, the first connecting pad and / or the connecting wire is coated with a flux material to facilitate proper solder joining formed between the first connecting pad and the connecting wire. You may. In process 300 above, we described using solder to connect the connection wire 400 to the first connection pad 402, but other connection processes such as welding, brazing, and laser welding can also be used. Conceivable.

Process 300 can be used across multiple silicon dies. For example, as shown in FIG. 5, a first silicon die 500 having a first connection pad 502 on the first edge 506 has a second connection on the first edge 512 of the second silicon die 508. Aligned with a second silicon die 508 with pad 510. The first silicon die 500 and the second silicon die 508 are the same size and may have their associated connection pads 502, 510 in the same position to facilitate stacking of the silicon dies 500, 508. Conceivable. For process 300, as described above, the connection line 514 is installed across both the first connection pad 502 and the second connection pad 510. Similar to the above, the first connection pad 502 and the second connection pad 510 are provided so as to face upward, and the connection line is held in place by applying a downward force to the connection line 514 by gravity. Install silicon dies 500, 508 to help. Subsequently, the liquid solder is placed on the first block (or "blob") 516 on the first connection pad 502 and then on the second block 518 on the second connection pad 510. Then, by applying heat to reflow the solder, solder bonding between the connection wire 514 and the first connection pad 502 and solder bonding between the connection wire 514 and the second connection pad 510 can be easily performed. do.

In some embodiments, heat may be intensively applied to the connecting pads (and associated solder lumps and connecting wires), such as by flame jets or laser heating. However, in other embodiments, common heat is applied to a silicon die (eg, silicon dies 500, 508) to facilitate melting or reflow of solder in the die connection pads. For example, a silicon die may be placed in a reflow oven or exposed to a general heat source by a diffusion oven or the like.

FIG. 6 shows a bottom view of the solder block 600 according to some embodiments. The solder block 600 can be made of various solder materials such as indium, gold, silver, palladium, iridium, lead, or other applicable solder types. As shown in FIG. 6, the solder block 600 may have a square shape, but other shapes are also conceivable. The solder block 600 may include a first trough or groove 602 and a second trough or groove 604. The first trough 602 can be large enough to accommodate the above connecting lines. In one embodiment, the first trough is about 15 microns wide. However, widths less than 15 microns or more than 15 microns are also possible. The first trough 602 is installed deeper in the solder block 600 than the second trough 604 to allow the second trough 604 to receive all or part of the connection pads as described above. Ru.

As mentioned above, the second trough 604 is configured to receive all or part of the connection pads on the silicon die. In one embodiment, the width of the second trough 604 is 25 microns. However, widths greater than 25 microns or less than 25 microns are also possible. Further, it is understood that the second trough 604 can be large enough to accommodate different sized connection pads, if desired. For example, the second trough 604 may be about 10% wider than the width of the connection pad on the silicon die. However, if desired, the second trough may be more than 10% wider or less than 10% wider than the width of the silicone die connection pad. The second trough 604 can be sized to accept the depth of the connection pad so that it forms an effective solder joint when heating the solder block 600 (described in more detail below). ). For example, the depth of the second trough may be 5 microns. However, depths greater than 5 microns and depths less than 5 microns are also possible.

In some embodiments, the solder block 600 may be coupled to the connecting wire during the manufacture of the connecting wire. For example, the plurality of solder blocks 600 may be coupled to the connecting wire and placed at a distance associated with the spacing between the silicon dies. Thereby, the connecting wire can be arranged in contact with the plurality of silicon dies so that the solder block 600 is provided above the connection pad of each silicon die.

FIG. 7 shows a process 700 of connecting multiple silicon dies to form an integrated circuit, according to some embodiments. In process block 702, install two or more silicon dies together. As mentioned above, the silicon dies can be stacked one above the other so that the edges of the dies are aligned with a common axis. In some examples, a die attach film or a die attach film adhesive can be placed between the silicone dies and fixed in place with respect to each other. In other embodiments, pastes or other liquid adhesives can be placed between the silicone dies to secure them in place with respect to each other. In some embodiments, the die attach film can provide a distance between silicon dies equal to the thickness of the die attach file. For example, the die attach film may be 10 microns thick. However, thicknesses greater than 10 microns or less than 10 microns are also possible. In a further embodiment, the die attach film can be sized so that it does not reach the edge of the die so that it is closely spaced at the edge of the die. In yet another embodiment, spacers such as blank silicon dies can be used to space adjacent dies.

The silicon die may be provided with the connection pad facing up. For example, as further described herein, the connection pad may be rotated upwards to rotate the work chuck holding the die to help hold the connection line in place by gravity. good. In some embodiments, in the wire bonding / soldering process, the work chuck may be configured to rotate the silicon die in multiple positions to allow different connection pads to face up. It is further conceivable to place silicon dies using known die placement techniques.

Figure 8 shows the arrangement of the silicon dies. As shown in FIG. 8, the apparatus includes a first silicon die 802, a second silicon die 804, and a third silicon die 806, according to some embodiments. The silicon die 802 includes two connection pads 808, 810, the silicon die 804 includes two connection pads 812, 814, and the silicon die 806 includes two connection pads 816, 818. The first silicon die 802 and the second silicon die 804 are separated by the first die attach film 820, and the second silicon die 804 and the third silicon die 806 are separated by the second die attach film 822. Will be done. As shown in FIG. 8, the connection pads 808, 812, 816 in the first row form the first set, and the connection pads 810, 814, and 818 in the second row form the second set. To form.

After installing the silicon die in the process block 702, a connecting line with two or more integrated solder blocks in the process block 704 is provided on the two or more silicon dies. In one embodiment, the connecting wire is provided such that the integrated solder block is aligned with a set of vertically aligned connecting pads (ie, a first set or a second set). For example, as shown in FIG. 9, the first connection line 902 is the connection pad 808 of the first silicon die 802, the connection pad 812 of the second silicon die 804, and the connection pad 816 of the third silicon die 806. It is provided on the upper side of. Also, the first connecting wire 902 is spaced apart from the connecting pads 808, 812, and 814 to form a first solder block 906, a second solder block 908, and a third solder block. Has 910. Similarly, the second connection line 904 is provided above the connection pad 810 of the first silicon die 802, the connection pad 814 of the second silicon die 804, and the connection pad 818 of the third silicon die 806. As shown in FIG. 9, the first connecting wire 902 has a first solder block 912, a second solder block 914, and a second solder block 912 spaced apart from each other so as to align with the connecting pads 808, 812, and 814. It has a third solder block 916.

Returning to FIG. 7, after installing the connecting wire in the process block 704, heat is applied in the process block 706 to reflow the solder. In one embodiment, as described above, heat is applied to the solder blocks, connecting pads, and connecting wires. In some embodiments, heat may be intensively applied to the solder blocks (and associated connection pads and connections), such as by flame jets or laser heating. However, in other embodiments, general heat is applied to the silicon die to facilitate melting or reflow of the solder at the die connection pad. For example, a silicon die may be placed in a reflow oven or exposed to a heat source generalized by a diffusion oven or the like.

With reference to FIG. 10, the silicon dies 802, 804, and 806 described above are coupled to the substrate 1000 via connecting lines 902, 904. The substrate 1000 may include a first connection pad 1002 and a second connection pad 1004 for connecting to the first connection line 902 and the second connection line 904, respectively. In some embodiments, the substrate 1000 may include channels 1006. In some embodiments, the channel 1006 allows the connecting lines 902, 904 to be attached to the substrate 1000 without the need for bending or other deformation of the connecting lines. Figures 8, 9, and 10 show examples of three silicon dies connected via two connecting lines, but the process 700 described above would optionally have three or more silicon dies and two or more. It is conceivable that it can be expanded for use in the connection line of. Therefore, the examples in FIGS. 8, 9, and 10 are for illustrative purposes only and should not be construed as limiting the processes described herein to the particular components shown in the figures.

Referring to FIG. 11, the alternating arrangement of silicon dies in assembly 1100 is shown. Assembly 1100 includes a first silicon die 1102, a third silicon die 1104, and a fifth silicon die 1106, which are connected onto the first edge 1110 of the silicon dies 1102, 1104, and 1106. Includes pad 1108. The second silicon die 1112, the fourth silicon die 1114, and the sixth silicon die 1116 alternate between the first silicon die 1102, the third silicon die 1104, and the fifth silicon die 1106, respectively. It will be provided. The second silicon die 1112, the fourth silicon die 1114, and the sixth silicon die 1116 are of the first edge of the first silicon die 1102, the third silicon die 1104, and the fifth silicon die 1106. Includes a connection pad 1118 on the opposite second edge 1120. The first connection line 1122 is coupled to the connection pad 1108 of the first silicon die 1102, the third silicon die 1104, and the fifth silicon die 1106, and the second connection line 1124 is the second silicon die. It is coupled to the connection pads 1118 of the 1112, the fourth silicon die 1114, and the sixth silicon die 1116. The first connection line 1122 is coupled to the board 1126 by the first board connection pad 1128. Similarly, the second connecting line 1124 is coupled to the substrate 1126 via the second connecting pad 1130.

Assembly 1100 is called a two-channel structure that allows die-by-die connections. According to this configuration, since the silicon dies are provided alternately, the space between the connections can be increased, and the risk of short circuit caused by soldering the connection wire to the die connection pad can be reduced. Soldering joining the connecting wire to the connecting pad can be done by the above process such as process 300 and / or process 700. This allows connections to be formed along the vertical sides of each silicon die. In some examples, the 4-channel structure allows each fourth die to be connected to a given edge of the silicon die. The example shown in FIG. 11 is merely an example, and it is considered that a plurality of dies can be connected by using the above-mentioned 2-channel or 4-channel design depending on a predetermined application.

The described embodiments are particularly useful for electrically connecting laminated silicon dies. For example, some versions of electronic memory devices include multiple stacked NAD dies. Therefore, the features and methods of electrical interconnection of dies disclosed herein are useful for memory devices with multiple NADD dies stacked on a substrate.

With respect to the processes, systems, methods, heuristics, etc. described herein, steps such as such processes are described as being performed in a particular ordered order, which is described herein. It should be understood that it can be performed by the described steps, which are performed in an order other than those described in the document. In addition, it should be understood that it is possible to execute several steps simultaneously, add other steps, or omit certain steps described herein. In other words, the description of the process herein is provided for purposes of exemplifying some embodiments and should never be construed to limit the scope of the claims.

As used herein, the term "substantially" means within 10-20% of the plus or minus of a term that is approximately, almost, or amended. For example, "substantially straight" means that the object is within 10-20% of the perfect straight line (ie, straight). Similarly, "substantially circular" means that an object can have a distortion or deviation of 10-20% from a perfect circle.

Therefore, it should be understood that the above description is intended as an example and not as a limitation. Many embodiments and uses other than the examples provided will be apparent by reading the above description. The scope of the present disclosure is not determined by reference to the above description, but by reference to the appended claims, the scope of such claims is determined along with the full range of equivalents entitled. Should be. It is expected and intended that future developments will be made in the techniques discussed herein and that the disclosed devices, methods, and devices will be included in such future embodiments. In short, please understand that this disclosure can be modified and modified.

All terms used in the claims are their broadest rational interpretations and their usual ordinary as understood by those skilled in the art, unless expressly construed herein. Intended to give meaning. In particular, the use of singular articles such as "a", "the", and "said" enumerates one or more of the indicated elements, unless the claim conversely enumerates explicit limitations. Should be interpreted.

This abstract is provided to allow the reader to quickly identify the subject of the technical disclosure. It is provided with the understanding that it is not used to interpret or limit the scope or meaning of the claims. Further, in the above detailed description, it can be seen that in various embodiments, various features are grouped together in order to rationalize the present disclosure. The methods of the present disclosure should not be construed as reflecting the intent that the disclosed embodiments of the present disclosure require more features than are specifically listed in each claim. Rather, the gist of the present disclosure is not in all the features of a single disclosed embodiment, as reflected in the claims below. Therefore, the following claims are incorporated into the form for carrying out the invention, and each claim defines the subject matter claimed individually and exists independently.

Claims (20)

With the board
Two or more silicon dies, the first die is provided on the substrate and the second die is laminated on the first die.
The upper plane parallel to the substrate and
A lower plane that is parallel to the upper plane and is arranged at a first distance from the upper plane,
At least a first edge portion provided between the upper plane and the lower plane and perpendicular to them,
With two or more silicon dies provided at least on the first edge and with at least a first set of connection pads aligned vertically with each other.
A conductive element configured to be coupled to the first set of connection pads,
A device comprising a plurality of solder blocks coupled to the conductive element and spaced apart from each other and associated with a distance between the connection pads of the first set of connection pads. The apparatus of claim 1, wherein the solder block is configured to reflow and be heated to form a soldering connection between the conductive element and the first set of connection pads. The apparatus according to claim 1, wherein the solder block has a width substantially the same as the first distance and includes a first groove configured to internally accept the edge of the silicon die. The apparatus according to claim 3, wherein the width of the first groove is 10% wider than the width of the first edge portion. The apparatus according to claim 4, wherein the width of the first edge portion is 25 microns. The device according to claim 1, wherein the conductive element is electrically connected to the substrate. The apparatus according to claim 6, wherein the substrate includes a channel, and the conductive element is electrically connected to the substrate in the channel. The device of claim 1, further comprising means for attaching the first die to the second die. The apparatus according to claim 1, further comprising a die attach film provided between the first die and the second die and physically connecting them. The apparatus according to claim 1, further comprising means for separating the first die from the second die. The apparatus according to claim 1, wherein the conductive element includes a tin-plated copper wire. The first subset of the two or more silicon dies has the first set of connection pads on the first edge and the second subset of the two or more silicon dies is the second. The device of claim 1, wherein the device has a second set of connection pads on an edge, wherein the second edge is different from the first edge. 12. The two or more silicon dies are provided such that each of the first subsets of the two or more silicon dies is laminated with the second subset of the two or more silicon dies. The device described in. The device according to claim 1, wherein at least one of the conductive element and the connection pad is coated with a flux material. The apparatus of claim 1, wherein the conductive solder comprises at least one selected from the group consisting of gold, indium, iridium, tinned copper, and palladium. A step of stacking a plurality of silicon dies so that one or more edges of the plurality of silicon dies are aligned vertically, wherein the one or more edges include a plurality of connection pads.
A step of installing a substantially linear conductor on an axis substantially perpendicular to the one or more edges, wherein the linear conductor comes into contact with one or more of the plurality of connecting pads. , Process and
A step of applying conductive solder to the one or more connection pads and one or more portions of the linear conductor that come into contact with the one or more connection pads.
A method comprising the steps of applying heat to reflow the solder and physically and electrically coupling the one or more portions of the linear conductor to the one or more connecting pads in contact with the solder. .. 16. The method of claim 16, further comprising covering the linear conductor with a magnetic flux layer. The conductive solder is applied by applying a heated liquid solder to one or more portions of the linear conductor in contact with the one or more connecting pads and the one or more connecting pads. Item 16. The method according to Item 16. A step of stacking a plurality of silicon dies so that one or more edges of the plurality of silicon dies are aligned vertically, wherein the one or more edges include a plurality of connection pads.
In the process of installing the connecting wire on an axis substantially perpendicular to the one or more edges, the connecting wire is at a distance between the aligned first set of connecting pads on the plurality of silicon dies. The process, which comprises a plurality of solder blocks arranged at associated intervals, the connecting line is arranged such that the plurality of solder blocks are in contact with an aligned first set of connecting pads.
A method comprising the steps of applying heat to reflow a solder block and physically joining the connecting wires to an aligned connection pad by the solder block. 19. The method of claim 19, wherein the frame jet heating process is used to reflow the solder block.

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