JP2022039128A - Electronic component - Google Patents

Abstract

To provide an electronic component capable of suppressing deformation of a plating layer on an electrode during individualization.SOLUTION: An electronic component includes a substrate, a first electrode and a second electrode, a first coating layer, a second coating layer, a third coating layer, and a fourth coating layer, and a first plating layer and a second plating layer. The substrate has a first side and a second side facing each other, and has a first main surface between the first side and the second side. The first electrode is formed on the first main surface from the first side to the second side. The second electrode is formed on the first main surface from the first side to the second side, and is separated from the first electrode. The first coating layer is formed from above the corner portion on the second electrode side of the corner portions of the first electrode along the first side up to the first main surface between the first electrode and the second electrode from the corner portion of the second electrode.SELECTED DRAWING: Figure 2

Description

The present disclosure relates to electronic components.

For example, as described in Patent Document 1 (Japanese Unexamined Patent Publication No. 2017-126743), the LED (Light Emitting Diode) package has a substrate. The substrate has a first main surface, a second main surface opposite to the first main surface, and a first electrode and a second electrode arranged on the first main surface. An LED is arranged on the second main surface. The first electrode and the second electrode are electrically connected to the LED. The first electrode and the second electrode are separated from each other in the first direction.

Japanese Unexamined Patent Publication No. 2017-126743

Both ends of the first electrode and the second electrode in the second direction orthogonal to the first direction may extend to reach both ends of the substrate in the second direction. Further, a plating layer may be formed on the first electrode and the second electrode. The substrate of the LED package is separated by cutting with a dicing saw. At this time, the plating layer is deformed, so that the distance between the first electrode and the second electrode changes.

The change in the distance between the first electrode and the second electrode means that when the LED package is soldered, the surface tension of the solder causes the LED package to stand up, or between the first electrode and the second electrode. It causes the formation of a solder bridge.

The present disclosure has been made in view of the above-mentioned problems of the prior art. More specifically, the present disclosure provides electronic components capable of suppressing deformation of the plating layer on the electrode during individualization.

The electronic components of the present disclosure include a substrate, a first electrode and a second electrode, a first coating layer, a second coating layer, a third coating layer and a fourth coating layer, and a first plating layer and a second plating layer. To prepare for. The substrate has a first side and a second side facing each other, and has a first main surface between the first side and the second side. The first electrode is formed on the first main surface from the first side to the second side. The second electrode is formed on the first main surface from the first side to the second side, and is separated from the first electrode. The first coating layer is formed from the corner portion on the second electrode side of the corner portions of the first electrode along the first side to the first main surface between the first electrode and the second electrode. It is formed. The second coating layer is formed from the corner portion of the first electrode along the second side on the second electrode side to the first main surface between the first electrode and the second electrode. It is formed. The third coating layer is formed from the corner portion on the first electrode side of the corner portions of the second electrode along the first side to the first main surface between the first electrode and the second electrode. It is formed. The fourth coating layer is formed from the corner portion on the first electrode side of the corner portions of the second electrode along the second side to the first main surface between the first electrode and the second electrode. It is formed. The first plating layer is formed in a region on the first electrode exposed from the first coating layer and the second coating layer. The second plating layer is formed in a region on the second electrode exposed from the third coating layer and the fourth coating layer.

According to the electronic components of the present disclosure, it is possible to prevent the plating layer on the electrode from being deformed during individualization.

It is a perspective view of the electronic component 100. It is a bottom view of the electronic component 100. It is sectional drawing in III-III of FIG. It is sectional drawing in IVA-IVA of FIG. It is an enlarged view in the region IVB of FIG. 4A. It is a process drawing which shows the manufacturing method of the electronic component 100. It is a bottom view of the substrate 80 prepared in the preparation step S1. It is a bottom view of the substrate 80 after finishing the coating layer forming step S2. It is a perspective view for demonstrating the die bonding process S4. It is a perspective view for demonstrating the wire bonding process S5. It is a perspective view for demonstrating the individualization process S7. It is a bottom view of the electronic component 100A. It is a bottom view of the electronic component 100B. It is a bottom view of the substrate 80 after finishing the coating layer formation step S2 in the manufacturing method of an electronic component 100B.

The embodiments of the present disclosure will be described with reference to the drawings. In the following drawings, the same or corresponding parts shall be designated by the same reference numerals, and duplicate explanations shall not be repeated.

(First Embodiment)
Hereinafter, the configuration of the electronic component (hereinafter referred to as “electronic component 100”) according to the first embodiment will be described.

FIG. 1 is a perspective view of the electronic component 100. As shown in FIG. 1, the electronic component 100 includes a substrate 10, a first electrode 11, a second electrode 12, a first pad 13 and a second pad 14, a first connection portion 15, and a second connection portion 16. , The first plating layer 20 (see FIG. 2), the second plating layer 30 (see FIG. 2), the element 40, the first coating layer 51, the second coating layer 52, the third coating layer 53, and the fourth. It has a coating layer 54 (see FIG. 2), a cathode mark 60 (see FIG. 2), and a sealing resin 70. In FIG. 1, the sealing resin 70 is shown by a dotted line.

The substrate 10 has a first main surface 10a and a second main surface 10b. The second main surface 10b is the opposite surface of the first main surface 10a. The substrate 10 is made of an insulating material. The substrate 10 is formed of, for example, a resin material reinforced with glass fiber. The resin material is, for example, an epoxy resin. The first direction DR1 is, for example, the longitudinal direction of the substrate 10. The direction orthogonal to the first direction DR1 is referred to as the second direction DR2.

The substrate 10 has a first side 10c, a second side 10d, a third side 10e, and a fourth side 10f. The first side 10c and the second side 10d face each other in the second direction DR2. The third side 10e and the fourth side 10f face each other in the first direction DR1. The substrate 10 has a first main surface 10a between the first side 10c and the second side 10d (between the third side 10e and the fourth side 10f). The first main surface 10a is defined by a first side 10c, a second side 10d, a third side 10e, and a fourth side 10f.

FIG. 2 is a bottom view of the electronic component 100. As shown in FIG. 2, the first main surface 10a is divided into a first region R1, a second region R2, and a third region R3 along the first direction DR1. The first region R1 is a region on the third side 10e side of the first main surface 10a. The second region R2 is a region on the fourth side 10f side of the first main surface 10a. The third region R3 is a region sandwiched between the first region R1 and the second region R2.

The first electrode 11 and the second electrode 12 are formed on the first main surface 10a. More specifically, the first electrode 11 is arranged on the first region R1. The second electrode 12 is arranged on the second region R2. That is, the first electrode 11 and the second electrode 12 are separated from each other in the first direction DR1. From another point of view, the third region R3 is the first main surface 10a between the first electrode 11 and the second electrode 12. The first electrode 11 and the second electrode 12 extend from the first side 10c to the second side 10d.

The first pad 13 and the second pad 14 are formed on the second main surface 10b. The first connection portion 15 has a first portion 15a and a second portion 15b. The second connecting portion 16 has a first portion 16a and a second portion 16b.

The first portion 15a is formed on a portion of the second main surface 10b located on the third side 10e side. The second portion 15b is arranged on the side surface on the third side 10e side. The first portion 15a and the second portion 15b are connected to each other. The first pad 13 is connected to the first electrode 11 by the first connecting portion 15.

The first portion 16a is formed on a portion of the second main surface 10b located on the fourth side 10f side. The second portion 16b is arranged on the side surface on the fourth side 10f side. The first portion 16a and the second portion 16b are connected to each other. The second pad 14 is connected to the second electrode 12 by the second connecting portion 16.

The first electrode 11, the second electrode 12, the first pad 13, the second pad 14, the first connecting portion 15, and the second connecting portion 16 are formed of a conductive material. The conductive material is, for example, a metallic material. The metal material is, for example, copper (Cu).

FIG. 3 is a cross-sectional view taken along the line III-III of FIG. As shown in FIG. 3, the first plating layer 20 is formed on the first electrode 11, the first pad 13, and the first connection portion 15. However, the first plating layer 20 is not formed on the region of the first electrode 11 covered with the first coating layer 51 and the second coating layer 52 (see FIGS. 4A and 4B).

The second plating layer 30 is formed on the second electrode 12, the second pad 14, and the second connection portion 16. However, the second plating layer 30 is not formed on the region of the second electrode 12 covered with the third coating layer 53 and the fourth coating layer 54 (see FIGS. 4A and 4B).

The first plating layer 20 and the second plating layer 30 are formed of a conductive material. The conductive material is, for example, a metallic material. The first plating layer 20 and the second plating layer 30 may be formed of a plurality of layers. The plurality of layers are, for example, a gold (Au) layer and a nickel (Ni) layer. In this case, the gold layer is on the surface of the first plating layer 20 and the second plating layer 30, and the nickel layer is the base thereof.

As shown in FIG. 1, the element 40 is arranged on the second main surface 10b. More specifically, the element 40 is arranged on the first pad 13. The element 40 is, for example, an LED. However, the element 40 is not limited to this. The element 40 may be a photo sensor or another semiconductor element.

The element 40 has a first surface 40a and a second surface 40b. The first surface 40a is a surface facing the first pad 13. The second surface 40b is the opposite surface of the first surface 40a. The element 40 has a first electrode 41 (not shown) on the first surface 40a and a second electrode 42 (not shown) on the second surface 40b. The first electrode 41 is the anode of the element 40, and the second electrode 42 is the cathode of the element 40.

The element 40 has an active layer (not shown). The active layer emits light by being biased (forward biased) so that the potential at the first electrode 41 is higher than the potential at the second electrode 42. That is, the element 40 is a polar semiconductor element.

The first electrode 41 is connected to the first pad 13 by a connecting layer (not shown). As a result, the first electrode 41 is electrically connected to the first electrode 11. The connecting layer is formed of, for example, a resin material containing conductive particles. The conductive particles are, for example, silver (Ag) particles, and the resin material is, for example, an epoxy resin.

The second electrode 42 is connected to the second pad 14 by the bonding wire 43. As a result, the second electrode 42 is electrically connected to the second electrode 12. The bonding wire 43 is made of a conductive material. The conductive material is, for example, a metallic material. The metallic material is, for example, gold.

The corner portion on the second electrode 12 side of the corner portions of the first electrode 11 along the first side 10c is referred to as a first corner portion. The corner portion on the second electrode 12 side of the corner portions of the first electrode 11 along the second side 10d is referred to as a second corner portion. The corner portion on the first electrode 11 side of the corner portions of the second electrode 12 along the first side 10c is referred to as a third corner portion. The corner portion on the first electrode 11 side of the corner portions of the second electrode 12 along the second side 10d is referred to as a fourth corner portion.

The first coating layer 51 is formed from above the first corner portion to above the first main surface 10a (third region R3) between the first electrode 11 and the second electrode 12. The second coating layer 52 is formed from above the second corner to the first main surface 10a between the first electrode 11 and the second electrode 12. The third coating layer 53 is formed from above the third corner portion to above the first main surface 10a between the first electrode 11 and the second electrode 12. The fourth coating layer 54 is formed from above the fourth corner to the first main surface 10a between the first electrode 11 and the second electrode 12.

The width of the first coating layer 51 (second coating layer 52, third coating layer 53, fourth coating layer 54) in the second direction DR2 is defined as the width W. Preferably, the width W increases toward the third region R3 side. The first coating layer 51 (second coating layer 52, third coating layer 53, fourth coating layer 54) preferably has a triangular shape in a plan view.

FIG. 4A is a cross-sectional view taken along the line IVA-IVA of FIG. FIG. 4B is an enlarged view of the region IVB of FIG. 4A. As shown in FIGS. 4A and 4B, the thickness of the first coating layer 51 (second coating layer 52, third coating layer 53, fourth coating layer 54) is defined as the thickness T1. The thickness of the first plating layer 20 (second plating layer 30) is defined as the thickness T2. The thickness T1 is preferably not more than or equal to the thickness T2.

The first coating layer 51, the second coating layer 52, the third coating layer 53, and the fourth coating layer 54 are formed of an insulating material. The insulating material is, for example, a resin material. The resin material is, for example, a resist.

As shown in FIG. 2, the cathode mark 60 is arranged on the first main surface 10a (third region R3) between the first electrode 11 and the second electrode 12. The cathode mark 60 is a polarity identification mark of the element 40 indicating which of the first electrode 11 and the second electrode 12 is connected to the cathode (second electrode 42) of the element 40.

For example, the electrode facing the convex portion 61 of the cathode mark 60 is an electrode connected to the cathode of the element 40. In the example of FIG. 2, the cathode mark 60 indicates that the second electrode 12 is an electrode connected to the cathode of the element 40.

The anode mark may be used instead of the cathode mark 60. The anode mark is a polarity identification mark of the element 40 indicating which of the first electrode 11 and the second electrode 12 is connected to the anode (first electrode 41) of the element 40.

The cathode mark 60 (anode mark) is formed of an insulating material. The insulating material is, for example, a resin material. The resin material is, for example, a resist. The cathode mark 60 (anode mark) is preferably formed of the same material as the first coating layer 51, the second coating layer 52, the third coating layer 53, and the fourth coating layer 54.

As shown in FIG. 1, the sealing resin 70 is arranged on the second main surface 10b. The sealing resin 70 seals the element 40 and the bonding wire 43. The sealing resin 70 is made of, for example, a transparent resin. The transparent resin is a resin that transmits light generated in the element 40. The transparent resin is, for example, an epoxy resin.

The manufacturing method of the electronic component 100 will be described below.
FIG. 5 is a process diagram showing a manufacturing method of the electronic component 100. As shown in FIG. 5, the manufacturing method of the electronic component 100 includes a preparation step S1, a coating layer forming step S2, a plating layer forming step S3, a die bonding step S4, a wire bonding step S5, and a molding step S6. And the individualization step S7.

In the preparation step S1, the substrate 80 is prepared. FIG. 6 is a bottom view of the substrate 80 prepared in the preparation step S1. As shown in FIG. 6, the substrate 80 includes a plurality of substrates 10. Each of the substrates 10 included in the substrate 80 is defined by a dicing region 81 extending along the first direction DR1.

FIG. 7 is a bottom view of the substrate 80 after the coating layer forming step S2 is completed. As shown in FIG. 7, in the coating layer forming step S2, the first coating layer 51 to the fourth coating layer 54 are formed. The first coating layer 51 to the fourth coating layer 54 are formed so as to overlap the dicing region 81.

In the coating layer forming step S2, the cathode mark 60 is also formed. For the formation of the first coating layer 51 to the fourth coating layer 54 and the cathode mark 60, the materials constituting the first coating layer 51 to the fourth coating layer 54 and the cathode mark 60 are applied, and the applied material is applied. It is done by curing.

In the plating layer forming step S3, the first plating layer 20 and the second plating layer 30 are formed. The first plating layer 20 and the second plating layer 30 are formed by, for example, an electroless plating method or an electrolytic plating method.

FIG. 8 is a perspective view for explaining the die bonding step S4. As shown in FIG. 8, in the die bonding step S4, the element 40 (first electrode 41) and the first pad 13 are connected to each other.

In the die bonding step S4, first, a resin material containing conductive particles is applied onto the first pad 13. At this point, the resin material has not been cured. Second, the element 40 is placed on the first pad 13. Thirdly, by heating the resin material containing the conductive particles, the resin material is cured and the first electrode 41 and the first pad 13 are connected to each other.

FIG. 9 is a perspective view for explaining the wire bonding step S5. As shown in FIG. 9, in the wire bonding step S5, the element 40 (second electrode 42) and the second pad 14 are connected by performing wire bonding using the bonding wire 43.

In the molding step S6, the element 40 is sealed with resin. In the molding step S6, first, the substrate 80 on which the element 40 is mounted is arranged in the mold. Second, the sealing resin 70 is poured into the mold. Thirdly, by heating, the sealing resin 70 is cured, and the element 40 is resin-sealed.

FIG. 10 is a perspective view for explaining the individualization step S7. As shown in FIG. 10, in the individualization step S7, the substrate 80 on which the element 40 is mounted and the element 40 is sealed by the sealing resin 70 is cut by a dicing saw along the dicing region 81. To. As a result, individualization into the electronic component 100 is performed.

Hereinafter, the effect of the electronic component 100 will be described in comparison with the electronic component (hereinafter referred to as “electronic component 100A”) according to the comparative example.

FIG. 11 is a bottom view of the electronic component 100A. As shown in FIG. 11, the configuration of the electronic component 100A is that the electronic component 100 does not have the first coating layer 51, the second coating layer 52, the third coating layer 53, and the fourth coating layer 54. It is common with the composition of.

The electronic component 100A does not have the first coating layer 51 to the fourth coating layer 54. Therefore, when the dicing saw comes into contact with the first plating layer 20 and the second plating layer 30, the first plating layer 20 and the second plating layer are formed in the first to fourth corners. Bali B is formed at 30. As a result, the distance between the first electrode 11 and the second electrode 12 becomes smaller, the electronic component 100A rises during soldering, and a solder bridge between the first electrode 11 and the second electrode 12 may occur. There is.

On the other hand, in the electronic component 100, the first coating layer 51 to the fourth coating layer 54 suppress the generation of burrs B due to the contact between the dicing saw and the first plating layer 20 and the second plating layer 30. To. Therefore, it is difficult for the electronic component 100 to rise and a solder bridge between the first electrode 11 and the second electrode 12 to occur at the time of soldering.

In the electronic component 100, only the first corner portion to the fourth corner portion are covered with the first coating layer 51 to the fourth coating layer 54, respectively, so that the first coating layer 51 to the fourth coating layer 54 can be formed. It is possible to suppress the accompanying reduction in the electrode area. When the width W becomes smaller toward the third region R3, the reduction of the electrode area due to the formation of the first coating layer 51 to the fourth coating layer 54 can be further suppressed.

When the first coating layer 51 to the fourth coating layer 54 and the cathode mark 60 are formed of the same material, it is necessary to introduce a new step in order to form the first coating layer 51 to the fourth coating layer 54. do not have. Therefore, the electronic component 100 can suppress the generation of burrs B due to the contact between the dicing saw and the first plating layer 20 and the second plating layer 30 without significantly increasing the manufacturing cost.

When the thickness T1 is less than or equal to the thickness T2, the first coating layer 51 to the fourth coating layer 54 do not protrude from the first plating layer 20 and the second plating layer 30. Therefore, in this case, it is possible to prevent the first coating layer 51 to the fourth coating layer 54 from deteriorating the solderability of the electronic component 100.

(Second Embodiment)
Hereinafter, the configuration of the electronic component (hereinafter referred to as “electronic component 100B”) according to the second embodiment will be described. Here, the points different from the configuration of the electronic component 100 will be mainly described, and the duplicated description will not be repeated.

The electronic component 100B includes a substrate 10, a first electrode 11 and a second electrode 12, a first pad 13 and a second pad 14, a first connection portion 15, a second connection portion 16, and a first plating layer 20. It has a second plating layer 30, an element 40, a bonding wire 43, a cathode mark 60, and a sealing resin 70. In this respect, the configuration of the electronic component 100B is common to the configuration of the electronic component 100.

However, the configuration of the electronic component 100B is different from the configuration of the electronic component 100 in that the fifth coating layer 55 and the sixth coating layer 56 are provided in place of the first coating layer 51 to the fourth coating layer 54. There is. The fifth coating layer 55 and the sixth coating layer 56 are made of the same material as the first coating layer 51 to the fourth coating layer 54 (and the cathode mark 60).

FIG. 12 is a bottom view of the electronic component 100B. As shown in FIG. 12, the fifth coating layer 55 includes a first electrode 11, a third region R3 (a first main surface 10a between the first electrode 11 and the second electrode 12), and a second electrode 12. Is continuously formed from the third side 10e to the fourth side 10f along the first side 10c. The sixth coating layer 56 has the first electrode 11, the third region R3 (the first main surface 10a between the first electrode 11 and the second electrode 12), and the second electrode 12 along the second side 10d. Therefore, the third side 10e to the fourth side 10f are continuously formed.

From another point of view, the fifth coating layer 55 includes the first coating layer 51 and the third coating layer 53, and the first electrode 11, the third region R3 and the first along the first side 10c. The two electrodes 12 are continuously formed, and the sixth coating layer 56 includes the second coating layer 52 and the fourth coating layer 54, and the first electrode 11 and the third region R3 are formed along the second side 10d. And the second electrode 12 is continuously formed.

The first plating layer 20 is formed in a region on the first electrode 11 exposed from the fifth coating layer 55 and the sixth coating layer 56. Further, the second plating layer 30 is formed in a region on the second electrode 12 exposed from the fifth coating layer 55 and the sixth coating layer 56.

The manufacturing method of the electronic component 100B will be described below. Here, the points different from the manufacturing method of the electronic component 100 will be mainly described, and the duplicated description will not be repeated.

The manufacturing method of the electronic component 100B includes a preparation step S1, a coating layer forming step S2, a plating layer forming step S3, a die bonding step S4, a wire bonding step S5, a molding step S6, and an individualization step S7. have. In this respect, the manufacturing method of the electronic component 100B is common to the manufacturing method of the electronic component 100. However, the method for manufacturing the electronic component 100B is different from the method for manufacturing the electronic component 100 with respect to the details of the coating layer forming step S2.

FIG. 13 is a bottom view of the substrate 80 after the coating layer forming step S2 in the manufacturing method of the electronic component 100B is completed. As shown in FIG. 13, in the coating layer forming step S2 in the method for manufacturing the electronic component 100B, the coating layer 57 covers the dicing region 81. The width of the covering layer 57 in the second direction DR2 is larger than that of the dicing region 81. Therefore, when the electronic component 100B is fragmented by a dicing saw or the like, the coating layer 57 remains on the side of the dicing region 81 as the fifth coating layer 55 and the sixth coating layer 56.

The effect of the electronic component 100B will be described below. Here, the points different from the effects of the electronic component 100 will be mainly described, and duplicate explanations will not be repeated.

In the electronic component 100B, the fifth coating layer 55 is formed by continuously forming the first electrode 11, the third region R3, and the second electrode 12 along the first side 10c, and the sixth coating layer 56 is the first. It is continuously formed along the second side 10d of the electrode 11, the third region R3, and the second electrode 12. Therefore, according to the electronic component 100B, it is possible to further suppress the generation of burr B due to the contact between the dicing saw and the first plating layer 20 and the second plating layer 30.

Although the embodiments of the present disclosure have been described above, the above-described embodiments can be variously modified. Moreover, the scope of the present invention is not limited to the above-described embodiment. The scope of the present invention is indicated by the scope of claims and is intended to include all modifications within the meaning and scope equivalent to the scope of claims.

100, 100A, 100B Electronic parts, 10 boards, 10a 1st main surface, 10b 2nd main surface, 10c 1st side, 10d 2nd side, 10e 3rd side, 10f 4th side, 11th 1st electrode, 12th 2 electrodes, 13 1st pad, 14 2nd pad, 15 1st connection part, 15a 1st part, 15b 2nd part, 16 2nd connection part, 16a 1st part, 16b 2nd part, 20 1st plating layer , 30 2nd plating layer, 40 elements, 40a 1st surface, 40b 2nd surface, 41 1st electrode, 42 2nd electrode, 43 bonding wire, 51 1st coating layer, 52 2nd coating layer, 53 3rd coating Layer, 54 4th coating layer, 55 5th coating layer, 56 6th coating layer, 57 coating layer, 60 cathode mark, 61 convex part, 70 encapsulating resin, 80 substrate, 81 dicing region, DR1 1st direction, DR2 2nd direction, R1 1st region, R2 2nd region, R3 3rd region, S1 preparation step, S2 coating layer forming step, S3 plating layer forming step, S4 die bonding step, S5 wire bonding step, S6 molding step, S7 Individualization process, B burr, T1, T2 thickness, W width.

Claims (7)

A substrate having a first side and a second side facing each other and having a first main surface between the first side and the second side.
A first electrode formed from the first side to the second side on the first main surface, and
A second electrode formed on the first main surface from the first side to the second side and separated from the first electrode, and
From the corner portion of the first electrode along the first side on the second electrode side to the first main surface between the first electrode and the second electrode. The formed first coating layer and
From the corner portion of the first electrode along the second side on the second electrode side to the first main surface between the first electrode and the second electrode. The formed second coating layer and
From the corner portion of the second electrode along the first side on the first electrode side to the first main surface between the first electrode and the second electrode. The formed third coating layer and
From the corner portion of the second electrode along the second side on the first electrode side to the first main surface between the first electrode and the second electrode. With the formed fourth coating layer,
The first plating layer formed in the region on the first electrode exposed from the first coating layer and the second coating layer, and
An electronic component comprising the third coating layer and a second plating layer formed in a region on the second electrode exposed from the fourth coating layer. The width of each of the first coating layer, the second coating layer, the third coating layer, and the fourth coating layer in the direction in which the first side and the second side face each other is the first electrode. The electronic component according to claim 1, which becomes larger toward the first main surface between the second electrode and the second electrode. A fifth coating layer including the first coating layer and the third coating layer, which is continuously formed on the first electrode, the first main surface, and the second electrode along the first side. When,
A sixth coating layer including the second coating layer and the fourth coating layer, which is continuously formed on the first electrode, the first main surface, and the second electrode along the second side. The electronic component according to claim 1, further comprising. With more light emitting elements
The substrate further has a second main surface, which is the opposite surface of the first main surface.
The light emitting element is arranged on the second main surface, and the light emitting element is arranged on the second main surface.
The electronic component according to any one of claims 1 to 3, wherein the first electrode and the second electrode are electrically connected to the light emitting element. It is arranged on the first main surface between the first electrode and the second electrode, and the first coating layer, the second coating layer, the third coating layer and the fourth coating layer are arranged. The electronic component according to claim 4, further comprising a display indicating the polarity of the first electrode and the second electrode, which are made of the same material as the above. The electronic component according to any one of claims 1 to 5, wherein the first coating layer, the second coating layer, the third coating layer, and the fourth coating layer are formed of a resist. One of claims 1 to 6, wherein the first coating layer, the second coating layer, the third coating layer, and the fourth coating layer are thinner than the first plating layer and the second plating layer. The electronic component according to item 1.

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