JP2001196641A - Surface mount semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a surface mount semiconductor device capable of assuring a conductive structure without giving adverse influence over a soldered bonding wire on mounting by soldering. SOLUTION: A light emitting element 4 is conductively mounted on an electrode 2 of two paired electrodes 2, 3 on an insulating substrate 1, and bonded to another electrode 3 with a wire 5. Further, the light emitting element 4 is sealed with a resin package 6 including the wire 5. A cut out groove 7 is formed between the bonding portion of the light emitting element 4 and the outer periphery of the package for exposing Cu plated layer 3b of a laminated plating layer in the electrode 3. A solder is prevented from creeping into the bonding side by reducing the wettability by using an oxide film on the surface of the plated layer 3b in the case of soldering, resulting in avoiding the floating wire 5 and assuring the conductivity.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a semiconductor light-emitting element or a light-receiving element, and more particularly to a surface-mounted semiconductor device which is mounted on a surface of a printed wiring board and fixed by soldering.

[0002]

2. Description of the Related Art A semiconductor light emitting device using a semiconductor light emitting element includes a shell type LED lamp in which a light emitting element is mounted on a mounting portion of a lead frame, wire-bonded and sealed with an epoxy resin, and a printed wiring board. There is a surface mount type that can be electrically mounted by soldering. Surface-mount type semiconductor light emitting devices can be made smaller and thinner than LED lamps, and are therefore frequently used in various small electronic devices.

FIG. 4A is a perspective view schematically showing a conventional surface-mount type semiconductor light emitting device, and FIG. 4B is a schematic longitudinal sectional view showing a state of mounting on a printed wiring board.

As shown in the figure, a surface-mount type semiconductor light emitting device has a substrate 1 using an insulating resin or the like, a pair of electrodes 2 and 3 formed at both ends thereof, and a conductive mounting on one electrode 2. And a wire 5 for bonding connection between the upper electrode of the light emitting element 4 and the other electrode 3.
And a resin package 6 using an epoxy-based resin for sealing including the wire 5.

The electrodes 2 and 3 are formed by plating from the surface of the substrate to the side and bottom surfaces using slits opened in the base material in a wafer state, and are used for mounting the light emitting element 4, bonding the wires 5, and sealing with resin. Thereafter, it is diced and formed into the shape shown in FIG. As shown in FIG. 5, the electrodes 2 and 3 are copper foils 2a and 3a that cover the surface and bottom of the substrate 1, a Cu plating layer 2b that covers the copper foils 2a and 3a and the side surfaces of the substrate 1. , 3b, Ni plating layers 2c, 3c covering the Cu plating layers 2b, 3b, and Au plating layers 2d, 3d formed on the entire surface.

The surface-mount type semiconductor light-emitting device having such a configuration is electrically mounted on a printed wiring board as shown in FIG. In this conductive mounting, the electrodes 2 and 3 of the semiconductor light emitting device are aligned and mounted on wiring patterns 51a and 51b formed on the surface of the printed wiring board 51.
They are fixed by soldering 52, 53, respectively. Thereby, the light emitting element 4 conducts with the power supply side and emits light when energized.

[0007]

The solders 52 and 53 made of an alloy of tin and lead are melted at about 250 ° C. and soldered to form electrodes 2 and 3 on wiring patterns 51 a and 5, respectively.
1b. However, since the resin package 6 is exposed to a high temperature of about 250 ° C., the solders 52 and 53 easily penetrate into the resin package 6 as shown in FIG.

On the other hand, the wire 5 is die-bonded to the electrode on the upper surface of the light emitting element 4 and then wedge bonded to the bonding area 3e of the electrode 3. The wedge bonding is a method of bonding such that one end of the wire 5 is rubbed against the surface of the bonding area 3e.

However, when the solder 53 infiltrates into the resin package 6, the resin of the resin package 6 at the tip of the wedge-bonded wire 5 becomes hot and softens or expands. Such softening or expansion of the resin acts to lift the wedge bonding of the wire 5 upward, and the tip of the wire 5 may rise from the bonding area 3e. For this reason, the conduction between the wire 5 and the electrode 3 is cut off, and the light emitting element 4 cannot be energized.

As described above, when the wire 5 is wedge-bonded to one electrode 3, the printed wiring board 5
When the light emitting element 4 is mounted on the light emitting element 4, it is affected by the solder 53. Therefore, a problem such as a decrease in the yield of mounted products is caused. The same problem occurs not only in the field of semiconductor light emitting devices but also in all semiconductor devices in which a wire-bonded device such as a light receiving device is resin-sealed and surface-mounted by soldering.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a surface-mount type semiconductor device capable of maintaining a conductive structure by preventing solder from affecting a wire to which solder is attached at the time of mounting by soldering. I do.

[0012]

A surface-mount type semiconductor device according to the present invention comprises a semiconductor element, an electrode electrically connected to a power supply side, and a wire for electrically connecting the semiconductor element and the electrode by bonding. And C on the base layer of the electrode.
In a semiconductor device having a laminated plating structure including a u-plated layer, a cutout groove exposing the Cu-plated layer is formed in the electrode between a position where the wire is bonded and an outer edge where the wire is soldered. It is characterized by.

[0013] Also, an insulating substrate, a pair of electrodes formed on the substrate, a semiconductor element mounted on one of the substrate or the pair of electrodes, and at least one of the semiconductor element and the electrode. A semiconductor device having a laminated plating structure including a wire for bonding between the wires, and a resin package for sealing the semiconductor element and the wire, and including a Cu plating layer in a base layer of the electrode; A plating layer exposing the Cu plating layer may be formed between a position where a wire is bonded and an outer edge where soldering is performed.

[0014]

The invention according to claim 1 comprises a semiconductor element, an electrode electrically connected to a power supply side, and a wire for electrically connecting the semiconductor element and the electrode by bonding. In a semiconductor device having a laminated plating structure in which a Cu plating layer is included in a base layer of the semiconductor device, the electrode has a cutout groove exposing the Cu plating layer between a position where the wire is bonded and an outer edge for soldering. This is a surface-mount type semiconductor device characterized by being formed, and the Cu plating layer exposed by the notch groove is easily oxidized by contacting with air to form an oxide film. This has the effect of preventing the wire from entering the bonding point.

According to a second aspect of the present invention, there is provided an insulating substrate, a pair of electrodes formed on the substrate, a semiconductor element mounted on one of the substrate and the pair of electrodes, and A semiconductor device having a laminated plating structure including a wire for bonding between at least one of the electrode and the electrode, and a resin package for sealing the semiconductor element and the wire, wherein a Cu plating layer is included in a base layer of the electrode. A surface mounting type semiconductor device, wherein a plating layer exposing the Cu plating layer is formed between a position where the wire is bonded and an outer edge where soldering is performed on the electrode; The exposed Cu plating layer is easily oxidized when exposed to air, and forms an oxide film, so that the solderability deteriorates and the progress of the wire to the bonding point is prevented. It has the effect of.

According to a third aspect of the present invention, in the surface-mount type semiconductor device according to the second aspect, the cutout groove is included in a sealing region of the resin package. Since the surface of the plating layer is covered, it has an effect of preventing excessive oxidation of the surface of the Cu plating layer.

An embodiment of the present invention will be described below with reference to the drawings. In this embodiment, a semiconductor light emitting device will be described as an example, and the same components as those in the conventional example shown in FIG.

FIG. 1 is a perspective view schematically showing a semiconductor light emitting device according to an embodiment of the present invention, and FIG. 2 is a schematic vertical sectional view when the semiconductor light emitting device is mounted on a printed wiring board.

Referring to FIGS. 1 and 2, the semiconductor light emitting device has a substrate 1 using an insulating resin or the like, a pair of electrodes 2 and 3 formed at both ends thereof, and a semiconductor light emitting device. A light emitting element 4 conductively mounted on the light emitting element 4;
Area 3e between the upper electrode and the other electrode 3
And a resin package 6 using an epoxy resin for sealing including the wire 5. The electrodes 2 and 3 are, as shown in FIG. 5, copper foils 2a and 3a covering the top and bottom surfaces of the substrate 1, Cu plating layers 2b and 3b covering the copper foils 2a and 3a and the side surfaces of the substrate 1. , This Cu plating layer 2
The laminated structure is composed of Ni plating layers 2c and 3c covering the layers b and 3b and Au plating layers 2d and 3d formed on the entire surface. As is apparent from FIG. 2, a cutout groove 7 is formed on the surface side of the electrode 3 to which the wire 5 is to be wedge bonded and sealed by the resin package 6. The cutout groove 7 is formed by, for example, etching after the plating step, and occupies from the entire width of the electrode 3 to the bonding area 3e.

FIG. 3A is a side view for explaining the depth of the cutout groove 7, and FIG. 3B is a schematic plan view showing the formation range of the cutout groove 7. As shown in FIG.

As is apparent from FIG. 3A, the notch groove 7 is formed so that the Cu plating layer 3b is exposed to a depth such that it has a depth.
It is formed by removing the i-plated layer 3c and the Au-plated layer 3d by etching. That is, as shown in FIG. 5, the cutout groove 7 is formed by leaving the copper foil 3a and the Cu plating layer 3b on the substrate 1 side.

In the above configuration, when the semiconductor light emitting device is mounted and mounted on the printed wiring board 51 as shown in FIG. 2, the electrodes 2 and 3 are mounted in alignment with the wiring patterns 51a and 51b, and the solder 52 and the solder 52 are mounted. The conduction is fixed by 53. On the other hand, after the notch groove 7 is formed, the Cu plating layer 3b is formed.
Since the surface comes into contact with air, the surface is immediately oxidized to form a surface oxide film. Therefore, even if the solder 53 at a high temperature of about 250 ° C. infiltrates into the resin package 6, the Cu oxide film and the composition metal of the solder have poor wettability with Pb.
The flow of the molten solder is blocked by the notch groove 7. Therefore, the solder 53 is prevented from infiltrating into the bonding area 3e, and the softening and expansion of the resin of the resin package 6 is prevented. Therefore, the wedge-bonded wire 5 does not rise from the bonding area 3e, and the conduction structure between the wire 5 and the electrode 3 is reliably maintained.

As described above, a conductive structure to the light emitting element 4 can be ensured only by forming the cutout groove 7 on a part of the surface of the electrode 3, and the yield of the product after mounting on the printed wiring board 51 is greatly reduced. Can be improved.

Although the semiconductor light emitting device has been described in the above example, it is a matter of course that the present invention can be applied to a photocoupler including a light receiving element and other semiconductor devices.

[0025]

According to the present invention, a notch groove is provided in an electrode to reduce Cu
Since the plating layer is exposed and the bonding point of the wire and the outer edge to be soldered are separated by sandwiching the cutout groove, even when soldering at a high temperature, the gap between the wire and the oxide film of the Cu plating layer can be reduced. Since the solderability is poor, the progress of the solder toward the bonding point can be prevented. Therefore, when the wire is sealed with the resin package, the resin is not softened or expanded near the bonding point, and the wire is prevented from floating. Therefore, the conductive structure at the time of surface mounting is preserved, and high-yield manufacturing becomes possible.

[Brief description of the drawings]

FIG. 1 is a schematic perspective view of a surface-mounted semiconductor device of the present invention as an example of a semiconductor light-emitting device.

FIG. 2 is a schematic vertical sectional view showing a main part when the semiconductor light emitting device of FIG. 1 is mounted and mounted on a printed wiring board;

FIG. 3A is a side view for explaining a depth of a notch in the semiconductor light emitting device of FIGS. 1 and 2; FIG.

4A and 4B are schematic views of a conventional example, in which FIG. 4A is a schematic perspective view, and FIG. 4B is a schematic longitudinal sectional view when mounted and mounted on a printed wiring board.

FIG. 5 is an enlarged longitudinal sectional view of a main part showing details of a plating layer formed on the surface of the substrate together with a formation state of a notch groove in the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Substrate 2, 3 Electrode 2a, 3a Copper foil 2b, 3b Cu plating layer 2c, 3c Ni plating layer 2d, 3d Au plating layer 3e Bonding area 4 Light emitting element 5 Wire 6 Resin package 7 Notch groove 51 Printed wiring board 51a, 51b Wiring pattern 52, 53 Solder

Claims (3)

[Claims] 1. A laminated structure comprising a semiconductor element, an electrode electrically connected to a power supply side, and a wire for electrically connecting the semiconductor element and the electrode by bonding, wherein a Cu plating layer is included in a base layer of the electrode. In the semiconductor device having a plating structure, the electrode has a cutout groove exposing the Cu plating layer between a position where the wire is bonded and an outer edge where the wire is soldered. Semiconductor device. 2. An insulating substrate, a pair of electrodes formed on the substrate, a semiconductor element mounted on one of the substrate and the pair of electrodes, and at least one of the semiconductor element and the electrode. A semiconductor device having a laminated plating structure including a wire for bonding between the wires, and a resin package for sealing the semiconductor element and the wire, and including a Cu plating layer in a base layer of the electrode; A surface-mounted semiconductor device, wherein a plating layer exposing the Cu plating layer is formed between a position where a wire is bonded and an outer edge where soldering is performed. 3. The surface-mounted semiconductor device according to claim 2, wherein said notched groove is included in a sealing region of said resin package.