JP2021507412A5 - - Google Patents

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JP2021507412A5
JP2021507412A5 JP2020534391A JP2020534391A JP2021507412A5 JP 2021507412 A5 JP2021507412 A5 JP 2021507412A5 JP 2020534391 A JP2020534391 A JP 2020534391A JP 2020534391 A JP2020534391 A JP 2020534391A JP 2021507412 A5 JP2021507412 A5 JP 2021507412A5
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response
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JP2020534391A
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JP2021507412A (ja
JP6984022B2 (ja
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Priority claimed from US15/850,261 external-priority patent/US10671148B2/en
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JP2020534391A 2017-12-21 2018-09-19 マルチノードシステムの低電力管理 Active JP6984022B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US15/850,261 2017-12-21
US15/850,261 US10671148B2 (en) 2017-12-21 2017-12-21 Multi-node system low power management
PCT/US2018/051789 WO2019125562A1 (en) 2017-12-21 2018-09-19 Multi-node system low power management

Publications (3)

Publication Number Publication Date
JP2021507412A JP2021507412A (ja) 2021-02-22
JP2021507412A5 true JP2021507412A5 (enExample) 2021-11-11
JP6984022B2 JP6984022B2 (ja) 2021-12-17

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JP2020534391A Active JP6984022B2 (ja) 2017-12-21 2018-09-19 マルチノードシステムの低電力管理

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US (1) US10671148B2 (enExample)
EP (1) EP3729233B1 (enExample)
JP (1) JP6984022B2 (enExample)
KR (1) KR102355989B1 (enExample)
CN (1) CN111684426B (enExample)
WO (1) WO2019125562A1 (enExample)

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US12093689B2 (en) * 2020-09-25 2024-09-17 Advanced Micro Devices, Inc. Shared data fabric processing client reset system and method
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CN112612726B (zh) * 2020-12-08 2022-09-27 海光信息技术股份有限公司 基于缓存一致性的数据存储方法、装置、处理芯片及服务器
US11620248B2 (en) * 2021-03-31 2023-04-04 Advanced Micro Devices, Inc. Optical bridge interconnect unit for adjacent processors
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