JP2021034670A - Silicon carbide epitaxial substrate and manufacturing method of the same - Google Patents

Abstract

To provide a silicon carbide epitaxial substrate that is hardly damaged in a manufacturing process of a silicon carbide semiconductor device and a manufacturing method of the same.SOLUTION: A silicon carbide epitaxial substrate 10 includes a silicon carbide semiconductor substrate 1 of a first conductivity type and an epitaxial growth layer 4 provided on one of main surfaces of the silicon carbide semiconductor substrate. In the silicon carbide epitaxial substrate 10, a first orientation flat 8 is provided on a side of a start point of a step-flow growth with respect to a step-flow growth direction parallel to the <1-100> direction of the silicon carbide semiconductor substrate 1 within an angular tolerance of ±5°.SELECTED DRAWING: Figure 1

Description

The present invention relates to a silicon carbide epitaxial substrate and a method for manufacturing a silicon carbide epitaxial substrate.

Conventionally, a silicon (Si) single crystal has been used as a material for a power semiconductor device that controls a high withstand voltage and a large current. There are several types of silicon power semiconductor devices, and the current situation is that they are used properly according to the application. For example, a PiN diode (P-intrinsic-N diode), a bipolar transistor, and an IGBT (Insulated Gate Bipolar Transistor) are so-called bipolar devices. Although these elements can have a high current density, they cannot be switched at high speed, and the limit of use of these elements is several kHz for bipolar transistors and about 20 kHz for IGBTs.

On the other hand, a power MOSFET (Metal Oxide Semiconductor Field Effect Transistor) cannot be used at a large current, but can be used at a high speed of up to several MHz. However, there is a strong demand in the market for power devices that have both large current and high speed, and efforts have been focused on improving silicon IGBTs and power MOSFETs, and development has now progressed to near the physical characteristics of silicon materials. It was.

In addition, materials have been studied from the viewpoint of power semiconductor devices, and silicon carbide (SiC) has recently attracted particular attention as a next-generation power semiconductor device with excellent low-on-voltage, high-speed, and high-temperature characteristics. I'm collecting. This is because SiC is a chemically stable material, and when the polytype is 4H-SiC, the bandgap is as wide as 3.26 eV, and it can be used extremely stably as a semiconductor even at high temperatures, and the maximum electric field. This is because the strength is also an order of magnitude higher than that of silicon. Since SiC has a high possibility of exceeding the material limit of silicon, future growth is expected in power semiconductor applications.

In a silicon carbide semiconductor device, an n-type silicon carbide epitaxial layer is formed by epitaxial growth on the front surface of an ^{n +} type silicon carbide substrate made of single crystal 4H-SiC (four-layer periodic hexagonal silicon carbide). A silicon epitaxial substrate is used. Since the n-type silicon carbide epitaxial layer is formed by epitaxial growth using a high-purity gas for semiconductor manufacturing as a raw material, it is possible to control the dopant concentration and the film thickness to desired values with high purity. Device structures such as SBDs, MOSFETs, IGBTs and PiN diodes are created in the n-type silicon carbide epitaxial layer.

Further, in order to suppress the occurrence of cracks or scratches on the epitaxial wafer, the direction from the main surface orientation [100] to the [01-1], [0-1-1], [011] or [0-1-1] directions. A group III-V compound single crystal semiconductor substrate having a plane orientation of (100) in which a plane intersecting the tilted direction at 60 to 120 ° is a main orientation flat plane is known. (For example, Patent Document 1 below).

Japanese Unexamined Patent Publication No. 7-277886

However, a thick silicon carbide epitaxial substrate in which an n-type silicon carbide epitaxial layer having a thickness of 200 μm or more is formed on a single crystal 4H-SiC substrate is very liable to be damaged in the manufacturing process of the silicon carbide semiconductor device. For example, handling work when handling a silicon carbide epitaxial substrate, polishing processing such as edge polishing of a silicon carbide epitaxial substrate and back surface polishing of a silicon carbide epitaxial substrate, ion implantation processing, RTA (Rapid Thermal Annealing: infrared lamp high-speed annealing) ) It may be damaged during annealing treatment such as treatment. FIG. 12 is a top view showing a conventional damaged silicon carbide semiconductor substrate having a diameter of 4 inches. FIG. 12 shows the silicon carbide epitaxial substrate 110 damaged in the ion implantation step of injecting carbon ions.

An object of the present invention is to provide a silicon carbide epitaxial substrate and a method for manufacturing a silicon carbide epitaxial substrate, which are not easily damaged in the manufacturing process of a silicon carbide semiconductor device, in order to solve the above-mentioned problems caused by the prior art.

In order to solve the above-mentioned problems and achieve the object of the present invention, the silicon carbide epitaxial substrate according to the present invention has the following features. The silicon carbide epitaxial substrate includes a first conductive type silicon carbide semiconductor substrate and an epitaxial growth layer provided on one main surface of the silicon carbide semiconductor substrate. A first orientation flat is provided on the start point side of the step flow growth with respect to the step flow growth direction in a direction parallel to the <1-100> direction of the silicon carbide semiconductor substrate within an angle tolerance of ± 5 °. ing.

Further, in the silicon carbide epitaxial substrate according to the present invention, in the above invention, the arrow height of the first orientation flat is equal to or more than the value obtained by dividing the film thickness of the epitaxial growth layer by the tangent of the off angle of the silicon carbide semiconductor substrate. It is characterized by being.

In order to solve the above-mentioned problems and achieve the object of the present invention, the method for producing a silicon carbide epitaxial substrate according to the present invention has the following features. Grooves or point-like holes indicating the crystal orientation of the first conductive type silicon carbide semiconductor substrate are linear or dotted so that the orientation parallel to <1-100> can be identified within a range of an angle tolerance of ± 5 °. As a mark arranged so as to be recognized as a symbol or a character, the silicon carbide semiconductor is formed on the back surface side or the front surface side of the first conductive type silicon carbide semiconductor substrate, preferably when the first orientation flat is formed. The first step of forming in the region cut off from the substrate is performed. Next, a second step of forming a Si-plane side epitaxial growth layer by epitaxial growth is performed on the silicon carbide semiconductor substrate on which the mark is formed. Next, with reference to the direction indicated by the mark on the silicon carbide semiconductor substrate on which the epitaxial growth layer is formed, step flow growth is performed in a direction parallel to <1-100> within an angle tolerance of ± 5 °. The third step of forming the first orientation flat on the starting point side is performed.

Further, in the method for manufacturing a silicon carbide epitaxial substrate according to the present invention, in the first step, the groove is formed in a string that divides the circumference of the silicon carbide semiconductor substrate, and the groove is formed by the string. The height of the arc is set to be equal to or greater than the value obtained by dividing the film thickness of the epitaxial growth layer by the tangent of the off angle of the silicon carbide semiconductor substrate.

According to the above-described invention, the silicon carbide epitaxial substrate is provided with a first orientation flat on the start point side of the step flow growth with respect to the step flow growth direction in a direction parallel to the <1-100> direction. Since the Crevas-like epitaxial growth defect with 3C-SiC is formed from a portion where there is no step at the end of the substrate, which is the starting point of step flow epi growth, or the step collapses due to the bevel shape, thick film epitaxial growth was performed. Later, by processing the first orientation flat on the start point side of the step flow growth with respect to the step flow growth direction in the direction parallel to the <1-100> direction, the Crevas-like epitaxial growth defect accompanied by 3C-SiC is reduced. Therefore, the silicon carbide epitaxial substrate is less likely to be damaged in the manufacturing process of the silicon carbide semiconductor device.

According to the silicon carbide epitaxial substrate and the method for manufacturing the silicon carbide epitaxial substrate according to the present invention, there is an effect that the silicon carbide semiconductor device is not easily damaged in the manufacturing process.

It is a top view which shows the silicon carbide epitaxial substrate which concerns on embodiment. It is sectional drawing which shows the structure of the silicon carbide epitaxial substrate which concerns on embodiment. The photoluminescence imaging image of the conventional silicon carbide semiconductor substrate is shown. A high-magnification image of the photoluminescence imaging image of the second orientation flat portion of the conventional silicon carbide semiconductor substrate is shown. It is sectional drawing which shows the generation distance of the crevasse-like epitaxial growth defect with 3C-SiC of the silicon carbide semiconductor substrate which concerns on embodiment. It is a top view which shows the 1st orientation flat part of the silicon carbide epitaxial substrate which concerns on embodiment. The epi-illuminated field microscope image of the silicon carbide epitaxial substrate according to the embodiment is shown. An epi-illuminated field microscope image of a silicon carbide epitaxial substrate having a set film thickness of 283 μm using a commercially available n-type silicon carbide bulk substrate as it is is shown. It is a top view which shows typically the state in the process of manufacturing the silicon carbide epitaxial substrate which concerns on embodiment (the 1). It is sectional drawing which shows typically the state in the process of manufacturing the silicon carbide epitaxial substrate which concerns on embodiment (the 1). It is a top view which shows typically the state in the process of manufacturing the silicon carbide epitaxial substrate which concerns on embodiment (the 2). It is sectional drawing which shows typically the state in the process of manufacturing the silicon carbide epitaxial substrate which concerns on embodiment (the 2). It is a top view which shows typically the state in the process of manufacturing the silicon carbide epitaxial substrate which concerns on embodiment (the 3). It is a top view which shows the conventional damaged silicon carbide semiconductor substrate with a diameter of 4 inches.

Hereinafter, preferred embodiments of the silicon carbide epitaxial substrate and the method for manufacturing the silicon carbide epitaxial substrate according to the present invention will be described in detail with reference to the accompanying drawings. In the present specification and the accompanying drawings, it means that electrons or holes are a large number of carriers in the layers and regions marked with n or p, respectively. Further, + and-attached to n and p mean that the impurity concentration is higher and the impurity concentration is lower than that of the layer or region to which it is not attached, respectively. When the notation of n and p including + and-is the same, it means that the concentrations are close to each other, and the concentrations are not necessarily the same. In the following description of the embodiment and the accompanying drawings, the same reference numerals are given to the same configurations, and duplicate description will be omitted. Further, in the present specification, in the notation of the Miller index, "-" means a bar attached to the index immediately after that, and "-" is added before the index to represent a negative index.

(Embodiment)
FIG. 1 is a top view showing a silicon carbide epitaxial substrate according to the embodiment. FIG. 2 is a cross-sectional view showing the structure of the silicon carbide epitaxial substrate according to the embodiment. As shown in FIG. 1, the silicon carbide epitaxial substrate 10 has a first orientation flat on the start point side of the step flow growth with respect to the step flow growth direction in a direction parallel to the <1-100> direction of the silicon carbide semiconductor substrate. 8 is provided. Further, the second orientation flat 9 may or may not be provided at a position 90 ° clockwise from the first orientation flat in a direction parallel to the <-1-120> direction. The orientation flat is provided to indicate the crystal direction of the silicon carbide semiconductor substrate, and as shown in FIG. 1, the edge of the silicon carbide semiconductor substrate is polished to make a part of the circumference linear. It is formed by doing. Many commercially available n-type single crystal 4H-SiC bulk substrates having a diameter of 6 inches φ or more do not have a second orientation flat, but a second orientation flat may or may not be provided. Good.

Further, as shown in FIG. 2, the silicon carbide epitaxial substrate 10 includes an n ⁺ type silicon carbide substrate (first conductive type silicon carbide semiconductor substrate) 1, an n ⁺ type buffer layer 2, and an n ⁻ type drift layer 3. The n ⁺ type buffer layer 2 and the n ^- type drift layer 3 are collectively referred to as a silicon carbide epitaxial layer (epitaxial growth layer) 4. n ⁺ -type buffer layer 2 is provided on the front surface of the n ⁺ -type silicon carbide substrate 1, a semiconductor layer formed by a low epitaxial growth impurity concentration than n ⁺ -type silicon carbide substrate 1. n ^- -type drift layer 3 is provided on the front surface of the n ⁺ -type buffer layer 2, a semiconductor layer formed by a low epitaxial growth impurity concentration than n ⁺ -type buffer layer 2. In FIG. 2, the silicon carbide epitaxial layer 4 is an n-type semiconductor layer, but it may be a p-type semiconductor layer.

In the silicon carbide epitaxial substrate according to the embodiment, the first is in the direction parallel to the <1-100> direction within a range of an angle tolerance of ± 5 °, on the side of the start point side of the step flow growth with respect to the step flow growth direction. By providing the orientation flat 8, it is less likely to be damaged in the manufacturing process of the silicon carbide semiconductor device. The reason for this will be described below.

FIG. 3 shows a photoluminescence imaging image of a single crystal 4H-SiC thick film epitaxial substrate having a set thickness of 295 μm manufactured using a conventional commercially available silicon carbide semiconductor substrate having a diameter of 6 inches φ. In the conventional silicon carbide semiconductor substrate 110, the first orientation flat 108 is located at a position parallel to the <11-20> direction and 90 ° counterclockwise from the start point side of the step flow growth with respect to the step flow growth direction. It is provided. The photoluminescence imaging image is irradiated with excitation light having a higher energy than the band gap (3.26 eV) of the single crystal 4H-SiC, and the excited electrons in the epitaxial film of the silicon carbide epitaxial substrate return to the ground state. It is an image captured by detecting the light emitted at that time with a detector through an optical filter or the like, and is an observation method capable of visualizing the crystallinity of a semiconductor material.

FIG. 4 shows a high-magnification image of the photoluminescence imaging image of the portion of the conventional silicon carbide semiconductor substrate on the start point side of the step flow growth in the <1-100> direction. As shown in FIG. 4, a large number of crevasse (deep crack) -like epitaxial growth defects with 3C-SiC are observed in the portion on the start point side of the step flow growth. That is, it can be seen that the crevasse-like epitaxial growth defect accompanied by 3C-SiC is generated from the start point side of the step flow growth. The Crevas-like epitaxial growth defect accompanied by 3C-SiC is a defect generated when the silicon carbide epitaxial layer 4 is formed, and cracks grow from the epitaxial growth defect to cause silicon carbide in the manufacturing process of the silicon carbide semiconductor device. The epitaxial substrate is easily damaged.

FIG. 5 is a cross-sectional view showing the generation distance of a crevasse-like epitaxial growth defect accompanied by 3C-SiC generated at the end of the silicon carbide semiconductor substrate. As shown in FIG. 5, the epitaxial growth defect proceeds inside the silicon carbide epitaxial layer 4 at an angle θ of the off angle θ of the silicon carbide semiconductor substrate 1. Assuming that the thickness of the silicon carbide epitaxial layer 4 is h, the traveling distance l of the epitaxial growth defect in the lateral direction (direction parallel to the front surface of the silicon carbide semiconductor substrate 1) is l = h / tan θ. The unit of θ is radian. For example, when ^{the film thickness of the n +} type buffer layer 2 is 15 μm, the film thickness of the n ⁻ type drift layer 3 is 280 μm, and the off angle is 4 °, the traveling distance l is 295 / tan (RASIANS (4 °)) ≈ It becomes 4219 μm. However, the lateral length of the crevasse-like epitaxial growth defect with actual 3C-SiC varies. This is because the depth of the starting point varies. RASIANS is a function that changes the unit of angle from ° to radians.

FIG. 6 is a top view showing a first orientation flat portion of the silicon carbide epitaxial substrate according to the embodiment. In the embodiment, the first orientation flat 8 is provided in a direction parallel to the <1-100> direction of the silicon carbide semiconductor substrate 10 and on the start point side of the step flow growth with respect to the step flow growth direction, and the silicon carbide epitaxial is provided. It is formed after the layer 4 is formed. Therefore, the region where a large number of epitaxial growth defects are present is removed when the first orientation flat 8 is formed, and the crevasse-like epitaxial growth defects accompanied by 3C-SiC can be reduced. Therefore, when the silicon carbide semiconductor device is manufactured using the silicon carbide epitaxial substrate according to the embodiment, it is less likely to be damaged in the manufacturing process. It should be noted that the Si plane may be used as the priority plane for epitaxial growth on the Si plane, or the C plane may be used as the priority plane for epitaxial growth on the C plane.

Further, the arrow height y (height of the arc) of the first orientation flat 8 is preferably a traveling distance l or more (y ≧ l). This is because the epitaxial growth defect advances inward up to the traveling distance l, and therefore, by setting the arrow height y to the traveling distance l or more, the epitaxial growth defect that has advanced inward can be removed.

Since the diameter of the 6-inch silicon carbide semiconductor substrate is 150.00 ± 0.20 mm according to the SEMI standard, the radius is 74.9 mm to 75.1 mm, and the length of the first orientation flat 8 is 57.5 according to the SEMI standard. It is ± 2.5 mm, or 47.5 ± 2.5 mm according to the old JEITA standard. In this case, the arrow height of the first orientation flat 8 is about 5.22 mm to about 6.27 mm, or about 3.45 mm to about 4.30 mm. The length of the orientation flat is the length x of a straight line on the circumference of the silicon carbide semiconductor substrate, and the arrow height of the orientation flat is the height of the arc of the orientation flat. As described above, when ^{the film thickness of the n +} type buffer layer 2 is 15 μm, the film thickness of the n ⁻ type drift layer 3 is 235 μm, and the off angle is 4 °, the traveling distance l≈3575 μm. Therefore, in the 6-inch silicon carbide semiconductor substrate, most of the crevasse-like epitaxial growth defects accompanied by 3C-SiC that have progressed inside can be completely or completely removed by the first orientation flat 8.

The diameter of the 4-inch silicon carbide semiconductor substrate is 100.00 ± 0.50 mm according to the SEMI standard, or 100.00 ± 0.20 mm according to the old JEITA standard, so the radius is 49.75 mm to 50.25 mm, or 49. The length is .90 mm to 50.10 mm, and the length of the first orientation flat 8 is 32.5 ± 2.5 mm for both the SEMI standard and the old JEITA standard. In this case, the arrow height of the first orientation flat 8 is about 2.29 mm to about 3.18 mm, or about 2.30 mm to about 3.17 mm. Therefore, in the 4-inch silicon carbide semiconductor substrate, most of the crevasse-like epitaxial growth defects accompanied by 3C-SiC advanced inside can be removed.

FIG. 7 shows an epi-illuminated field microscope image of a silicon carbide epitaxial substrate having a diameter of 4 inches according to the embodiment. In FIG. 7, a silicon carbide epitaxial layer 4 having a set thickness of 283 μm is formed on a silicon carbide semiconductor substrate 10 having an off angle of 4 °, and is parallel to the <1-100> direction with respect to the step flow growth direction. At the start point side of the step flow growth, aiming at a length of 32.5 mm, the position of the first orientation flat 8 and the direction parallel to the <-1-120> direction, 90 ° clockwise from the first orientation flat. The epi-illumination field microscope image of the result of forming the second orientation flat 9 aiming at a length of 18.0 mm is shown. FIG. 8 shows an epi-illuminated field microscope image of a commercially available n-type silicon carbide bulk substrate as it is and a silicon carbide epitaxial substrate having a set film thickness of 283 μm.

As shown in FIGS. 7 and 8, the silicon carbide epitaxial substrate 10 having a diameter of 4 inches according to the embodiment of FIG. 7 has a reduced crevasse-like epitaxial growth defect as compared with the conventional silicon carbide epitaxial substrate 110. You can see that. In the case of the silicon carbide epitaxial substrate 10 having a diameter of 6 inches, the length of the first orientation flat 8 may be aimed at 57.5 mm or 47.5 mm, and the second orientation flat 9 may not be provided. ..

(Method for Manufacturing Silicon Carbide epitaxial Substrate According to Embodiment)
The silicon carbide epitaxial substrate according to the embodiment is manufactured as follows. 9A, 10A, and 11 are top views schematically showing a state in the process of manufacturing the silicon carbide epitaxial substrate according to the embodiment. 9B and 10B are cross-sectional views schematically showing a state in the process of manufacturing the silicon carbide epitaxial substrate according to the embodiment.

^{First, a 6-inch n +} type silicon carbide substrate 1 having a residual thickness of about 350 μm and having no orientation flat processed is prepared. Next, CMP (Chemical Mechanical Polishing) finishing or mirror finishing is performed on one side or both sides of ^{the n + type silicon carbide substrate 1.} For example, as shown in FIG. 9B, the Si surface may have a CMP finish and the C surface may have a mirror finish. The states up to this point are shown in FIGS. 9A and 9B.

Next, after analyzing and determining the crystal axis direction of ^{the n +} type silicon carbide substrate 1 using a method such as an X-ray diffraction method ^{, the back surface (C surface) of the n +} type silicon carbide substrate 1 is <1-100. Parallel to the <1-100> direction by the laser carbide method near the end side of the substrate at the position on the step flow growth start point side with respect to the step flow growth direction so that the direction parallel to the> direction can be identified. A groove M is formed in the direction. The groove M may be formed on the front surface (Si surface) of the ^{n + type silicon carbide substrate 1.} Here, the groove M is preferably a chord that divides the circumference ^{of the n + type silicon carbide substrate 1.} It is preferable that the arrow height y of the arc formed by the strings is formed to be equal to or more than the value obtained by dividing ^{the film thickness of the silicon carbide epitaxial layer 4 formed below by the tangent of the off angle of the n + type silicon carbide substrate 1.} The states up to this point are shown in FIGS. 10A and 10B. As the processing method of the groove M, a processing method such as dry etching processing using photolithography, water jet processing, or cutting processing may be used. Further, if the direction parallel to the <1-100> direction can be identified, the groove M is a linear mark formed by arranging dot-shaped dot patterns, a symbol with linearity such as an arrow, and linearity. You may draw with letters accompanied by.

Furthermore, the serial number of the substrate is determined by laser marking or the like. May be reprocessed into a substrate. The relaser marking position is preferably the C surface near the second orientation flat 9, but may be the Si surface or may not be near the second orientation flat 9. Further, beveling is performed on the edge of the substrate to produce a bevel. The bevel surface may be mirror-finished. The bevel shape may be an R shape or a tapered shape.

Next, ^{the Si surface side of the n +} type silicon carbide substrate 1 is subjected to CMP finishing by grinding and polishing. It is not necessary to grind the Si surface side. Further, when ^{the surface of the n +} type silicon carbide substrate 1 is sufficiently flat, neither grinding nor polishing processing may be performed. Further, ^{the C surface of the n +} type silicon carbide substrate 1 may be polished.

Next, the silicon carbide epitaxial layer 4 is formed on the Si surface side by epitaxial growth ^{on the n +} type silicon carbide substrate 1 in which the groove M is formed. Step Flow An epitaxial growth defect F including a crevasse-like epitaxial growth defect accompanied by 3C-SiC is formed from a portion where there is no step at the end of the substrate which is the starting point of epi-growth or the step collapses due to the bevel shape. The state up to this point is shown in FIG.

Next, the step flow growth starts in the step flow growth direction in a direction parallel to the <1-100> direction of ^{the n +} type silicon carbide substrate 1 in which the crevasse-like epitaxial growth defect F accompanied by 3C-SiC is formed. The first orientation flat 8 is formed on the point side by edge polishing or the like. As a result, the epitaxial growth defect F including the crevasse-like epitaxial growth defect accompanied by 3C-SiC is polished and deleted. At this time, by polishing to the scribe groove M to form the first orientation flat 8, the height of the arrow of the first orientation flat 8 and the thickness of the silicon carbide epitaxial layer 4 are tangent to the off-angle of the ^{n + type silicon carbide substrate 1.} It can be greater than or equal to the value divided by. Further, the length of the first orientation flat 8 is preferably about the same as the length of the first orientation flat 108 of the conventional silicon carbide epitaxial substrate 110.

Next, with the Si surface side as the priority surface, the ^{direction is parallel to the <-1-120> direction of the n +} type silicon carbide substrate 1, and the clock is clockwise from the start point side of the step flow growth with respect to the step flow growth direction. The second orientation flat 9 may be formed at a position of 90 ° around by edge polishing or the like. When actually processing the orientation flat, it is not always completely parallel, and an angle tolerance is generated, but it should be kept within at least ± 5 °, preferably within ± 1 °. The length of the second orientation flat 9 is preferably about the same as the length of the second orientation flat 109 of the conventional silicon carbide epitaxial substrate 110. As described above, the silicon carbide epitaxial substrate 10 of the embodiment shown in FIG. 1 is manufactured.

As described above, the silicon carbide epitaxial substrate of the embodiment is provided with a first orientation flat on the start point side of the step flow growth with respect to the step flow growth direction in a direction parallel to the <1-100> direction. ing. Since the Crevas-like epitaxial growth defect with 3C-SiC is formed from a portion where there is no step at the end of the substrate, which is the starting point of step flow epi growth, or the step collapses due to the bevel shape, thick film epitaxial growth was performed. Later, by processing the first orientation flat on the start point side of the step flow growth with respect to the step flow growth direction in the direction parallel to the <1-100> direction, the Crevas-like epitaxial growth defect accompanied by 3C-SiC is reduced. Therefore, the silicon carbide epitaxial substrate is less likely to be damaged in the manufacturing process of the silicon carbide semiconductor device. The method for manufacturing the silicon carbide epitaxial substrate of the embodiment is such that the thick film epitaxial growth is performed in the direction parallel to the <1-100> direction on the step flow growth start point side with respect to the step flow growth direction. By forming the 1 orientation flat, the Crevas-like epitaxial growth defect accompanied by 3C-SiC can be removed by polishing.

In the above, the present invention can be variously modified without departing from the spirit of the present invention, and in each of the above-described embodiments, for example, the dimensions of each part, the impurity concentration, and the like are set in various ways according to the required specifications and the like. Further, in the present invention, the first conductive type is p-type and the second conductive type is n-type in each embodiment, but in the present invention, the first conductive type is n-type and the second conductive type is p-type. The same holds true.

As described above, the silicon carbide epitaxial substrate and the method for manufacturing the silicon carbide epitaxial substrate according to the present invention are power semiconductors used in power conversion devices such as inverters, power supply devices such as various industrial machines, and igniters of automobiles. Useful for equipment.

1 n ⁺ type silicon carbide semiconductor substrate 2 n ⁺ type buffer layer 3 n ^- type drift layer 4 Silicon carbide epitaxial layer 8,108 1st orientation flat 9,109 2nd orientation flat 10,110 Silicon carbide epitaxial substrate

Claims (4)

First conductive type silicon carbide semiconductor substrate,
An epitaxial growth layer provided on one main surface of the silicon carbide semiconductor substrate,
With
A first orientation flat is provided on the start point side of the step flow growth with respect to the step flow growth direction in a direction parallel to the <1-100> direction of the silicon carbide semiconductor substrate within an angle tolerance of ± 5 °. Silicon carbide epitaxial substrate. The silicon carbide epitaxial substrate according to claim 1, wherein the height of the arrow of the first orientation flat is equal to or greater than a value obtained by dividing the film thickness of the epitaxial growth layer by the tangent of the off angle of the silicon carbide semiconductor substrate. <1-100> A groove or a dotted hole indicating the crystal orientation of the first conductive type silicon carbide semiconductor substrate is linearly formed so that a parallel direction can be identified within a range of ± 5 ° between the direction and the angle tolerance. Alternatively, as a mark arranged so as to be recognized as a symbol or a character, the silicon carbide is formed on the back surface side or the front surface side of the first conductive type silicon carbide semiconductor substrate, preferably when the first orientation flat is formed. The first step of forming in the region cut off from the semiconductor substrate,
A second step of forming an epitaxial growth layer on the Si surface side by epitaxial growth on the silicon carbide semiconductor substrate having the grooves formed therein.
A third step of forming the first orientation flat in the direction indicated by the groove of the silicon carbide semiconductor substrate on which the epitaxial growth layer is formed, and a third step.
A method for producing a silicon carbide epitaxial substrate, which comprises. In the first step, the groove is formed in a string that divides the circumference of the silicon carbide semiconductor substrate, the arrow height of the arc formed by the string is set, and the thickness of the epitaxial growth layer is set off from the silicon carbide semiconductor substrate. The method for manufacturing a silicon carbide epitaxial substrate according to claim 3, wherein the value is equal to or greater than the value divided by the tangents of the corners.

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