JP2021027297A - Epitaxial substrate and manufacturing method of the same - Google Patents

Abstract

To provide an epitaxial substrate in which roughness on a surface of a semiconductor layer made of AlGaN is suppressed.SOLUTION: The epitaxial substrate has a base substrate and a first semiconductor layer formed above the base substrate and composed of AlxGa1-xN (0<x<1). A step-like structure is observed in a 5 μm square area observed by atomic force microscopy on a surface of the first semiconductor layer. Two or more edges that exhibit a first characteristic of having an arc-shaped portion with a radius of curvature of 0.15 μm or more and a length of 0.5 μm or more are observed as edges of steps constituting the step-like structure.SELECTED DRAWING: Figure 4

Description

The present invention relates to an epitaxial substrate and a method for producing the same.

Development of an epitaxial substrate in which a group III nitride semiconductor layer is grown on a silicon (Si) substrate is underway. Such an epitaxial substrate is used, for example, for manufacturing a high electron mobility transistor (HEMT) (see Patent Document 1).

The epitaxial substrate used to fabricate the HEMT has a device cambium containing two-dimensional electron gas (2DEG) that serves as a channel for the HEMT. The device cambium has, for example, a structure in which a Schottky layer made of aluminum gallium nitride (AlGaN) is laminated on top of an active layer made of gallium nitride (GaN). AlGaN constituting the Schottky layer is desired to have high quality.

JP-A-2018-88502

An object of the present invention is to provide an epitaxial substrate in which roughness on the surface of a semiconductor layer made of AlGaN is suppressed.

According to one aspect of the present invention, the base substrate and
A first semiconductor layer formed above the base substrate _{and composed of Al x} Ga _1-x N (0 <x <1) and
Have,
A stepped structure is observed in a region of 5 μm square observed by an atomic force microscope on the surface of the first semiconductor layer, and the radius of curvature is 0.15 μm or more and long as the edge of the step constituting the stepped structure. Provided is an epitaxial substrate in which two or more edges exhibiting the first characteristic of having an arcuate portion having a radius of 0.5 μm or more are observed.

According to another aspect of the invention
The process of preparing the base substrate and
A step of forming a first semiconductor layer composed of _{Al x} Ga _1-x N (0 <x <1) above the base substrate, and a step of forming the first semiconductor layer.
A step of growing a sacrificial layer composed of GaN on the first semiconductor layer by supplying Ga raw material gas and N raw material gas under the condition that GaN grows while lowering the substrate temperature.
A step of etching the sacrificial layer by supplying Ga raw material gas and N raw material gas under the condition that GaN is etched while lowering the substrate temperature.
Have,
On the surface of the first semiconductor layer in a state where the temperature has been lowered to room temperature, a stepped structure is observed in a region of 5 μm square observed by an atomic force microscope, and the stepped structure is observed as an edge of a step constituting the stepped structure. Provided is a method for manufacturing an epitaxial substrate, wherein a surface having two or more edges showing the first feature of having an arcuate portion having a radius of curvature of 0.15 μm or more and a length of 0.5 μm or more is observed.

According to yet another aspect of the invention.
The process of preparing the base substrate and
A step of forming a first semiconductor layer composed of _{Al x} Ga _1-x N (0 <x <1) above the base substrate, and a step of forming the first semiconductor layer.
A step of supplying the Ga raw material gas and the N raw material gas onto the first semiconductor layer under the condition that the GaN is neither grown nor etched while lowering the substrate temperature.
Have,
On the surface of the first semiconductor layer in a state where the temperature has been lowered to room temperature, a stepped structure is observed in a region of 5 μm square observed with an interatomic force microscope, and as the edge of the step forming the stepped structure. Provided is a method for manufacturing an epitaxial substrate, wherein a surface having two or more edges showing a first feature of having an arcuate portion having a radius of curvature of 0.15 μm or more and a length of 0.5 μm or more is observed.

Provided is an epitaxial substrate in which roughness on the surface of a first semiconductor layer composed of Al _x Ga _{1-x N (0 <x <1) is suppressed.}

FIG. 1 is a schematic cross-sectional view showing an epi substrate according to an embodiment of the present invention. FIG. 2 is a timing chart showing the steps from the growth of the Schottky layer to the temperature lowering of the epi substrate to room temperature in one embodiment. FIG. 3A is a graph conceptually showing the tendency of the correspondence between the Ga supply amount and the growth rate (or etching rate) of GaN, and FIG. 3B is a schematic cross-sectional view showing the sacrificial layer. Is. 4 (a) and 4 (b) are AFM images showing a region of 5 μm square on the surface of the Schottky layer according to the embodiment. 5 (a) and 5 (b) are AFM images showing a region of 5 μm square on the surface of the Schottky layer according to a comparative example. FIG. 6A is a schematic plan view showing the outline of the edge of the step observed in the AFM image of the example, and FIG. 6B is a schematic plan view of the edge of the step observed in the AFM image of the comparative example. It is a schematic plan view which shows the contour line. 7 (a) and 7 (b) are AFM images showing a region of 5 μm square on the surface of the Schottky layer according to another embodiment. FIG. 8 is a timing chart showing the steps from the growth of the Schottky layer to the temperature lowering of the epi substrate to room temperature in another embodiment.

<One Embodiment of the present invention>
The epitaxial substrate 100 according to the embodiment of the present invention will be described. FIG. 1 is a schematic cross-sectional view showing an epitaxial substrate 100 (hereinafter, also referred to as epi substrate 100). The epi substrate 100 includes a base substrate 110, a reaction suppression and initial nucleation layer 120, an intermediate layer 130, a stress generating layer 140, an active layer 150, and a Schottky layer 160. The active layer 150 and the Schonky layer 160 constitute the device cambium 170. As will be described below, the epi substrate 100 according to the present embodiment is characterized in that the roughness of the surface 161 of the Schottky layer 160 is suppressed.

A silicon (Si) substrate is preferably used as the base substrate 110, and the main surface of the Si substrate is preferably the (111) surface. The reaction suppression and initial nucleation layer 120, the intermediate layer 130, the stress generation layer 140, and the device formation layer 170 are composed of a group III nitride semiconductor layer heteroepitaxially grown on the base substrate 110. It is preferable to use a Si substrate as the base substrate 110 because a high-quality substrate having a large diameter (for example, a diameter of 150 mm or more) can be obtained at low cost.

A reaction suppression and initial nucleation layer 120 is formed on the base substrate 110. The reaction suppression and initial nucleation layer 120 reacts Si contained in the underlying substrate 110 with gallium (Ga) contained in the group III nitride semiconductor layer formed above the reaction suppression and initial nucleation layer 120. By suppressing (alloying), the surface of the base substrate 110 is protected. The reaction suppression and early nucleation layer 120 also has the function of forming the initial nuclei of the group III nitride semiconductor layer grown above the reaction suppression and initial nucleation layer 120. Hereinafter, the reaction suppression and early nucleation layer 120 will also be referred to as a reaction suppression layer 120 in order to avoid complication of expression. The reaction suppression layer 120 is preferably made of aluminum nitride (AlN). The thickness of the reaction suppression layer 120 is, for example, 30 nm or more and 300 nm or less. As a material constituting the reaction suppression layer 120, Al _x1 Ga _1-x1 N (0.9 ≦ x1 ≦ 1) may be used.

An intermediate layer 130 is formed on the reaction suppression layer 120. The intermediate layer 130 is made of a material in which the lattice constant in the bulk crystal of the intermediate layer 130 is larger than the lattice constant in the bulk crystal of the reaction suppression layer 120. Specifically, the intermediate layer 130 is composed of Al _x2 Ga _1-x2 N (0 <x2 <1), and the Al composition x2 of the intermediate layer 130 is smaller than the Al composition x1 of the reaction suppression layer 120. Be selected. The intermediate layer 130 preferably grows coherently with respect to the reaction suppression layer 120. As a result, compressive stress can be generated in the intermediate layer 130 due to the difference between the lattice constant of the reaction suppression layer 120 and the lattice constant of the intermediate layer 130. It is not essential that the intermediate layer 130 grows completely coherently with respect to the reaction suppression layer 120, and lattice relaxation may occur.

The thickness of the intermediate layer 130 is, for example, 40 nm or more and 1000 nm or less. The intermediate layer 130 expands the initial nuclei formed in the reaction suppression layer 120 and constitutes the lower ground of the stress generating layer 140 grown above the intermediate layer 130. The intermediate layer 130 can also be said to be a flattening layer having an upper surface that is flatter than the upper surface of the reaction suppression layer 120. The intermediate layer 110 may be omitted.

A stress generating layer 140 is formed on the intermediate layer 130. The stress generating layer 140 is located between the base substrate 110 and the device forming layer 170, and generates compressive stress that reduces the warpage of the entire epi substrate 100. The compressive stress can be generated by the strained superlattice structure of the stress generating layer 140.

The stress generating layer 140 has a multi-crystal layer laminated structure in which a plurality of multi-crystal layers 143 composed of a first crystal layer 141 and a second crystal layer 142 are laminated. The first crystal layer 141 has a lattice constant of a1 in the bulk crystal, and the second crystal layer 142 has a lattice constant of a2 (a1 <a2) in the bulk crystal. As a result, in the multiple crystal layer 143, compressive stress can be generated in the second crystal layer 142. The magnitude of the compressive stress generated by the stress generation layer 140 can be controlled by the number of layers of the multiple crystal layers 143, and can be increased by increasing the number of layers of the multiple crystal layers 143.

The first crystal layer 141 is composed of Al _x3 Ga _1-x3 N (0 <x3 ≦ 1), and the second crystal layer 142 is composed of Al _x4 Ga _1-x4 N (0 ≦ x4 <1). .. The Al composition x3 of the first crystal layer 141 preferably satisfies, for example, 0.9 ≦ x3 ≦ 1, and the Al composition x4 of the second crystal layer 142 preferably satisfies, for example, 0 ≦ x4 ≦ 0.3. preferable. The thickness of the first crystal layer 141 is, for example, 1 nm or more and 20 nm or less (preferably 5.0 nm or more and 20 nm or less). The thickness of the second crystal layer 142 is, for example, 5 nm or more and 300 nm or less (preferably 10 nm or more and 300 nm or less). The number of layers of the multilayer crystal layer 143 is, for example, 2 or more and 500 or less.

The mode of the stress generating layer 140 is not limited to that of the above example. For example, the plurality of multiple crystal layers 143 may not be laminated, and may be one layer. Further, for example, the stress generating layer 140 is composed of a multi-crystal layer including a first crystal layer 141 and a second crystal layer 142, and a third crystal layer having a lattice constant of a3 (a2 <a3) in the bulk crystal. May be good. Further, for example, the stress generating layer 140 may be composed of a graded crystal layer in which the lattice constant in the bulk crystal increases continuously or stepwise as the distance from the substrate 110 increases (as it goes upward).

The active layer 150 is formed on the stress generating layer 140, and the Schottky layer (barrier layer) 160 is formed on the active layer 150 (above the active layer 150). The active layer 150 and the Schottky layer 160 constitute the device cambium 170. In the device forming layer 170, another group III nitride semiconductor layer (for example, an AlN layer) may be formed between the active layer 150 and the Schottky layer 160, if necessary. Since the Schottky layer 160 is formed above the active layer 150, a two-dimensional electron gas (2DEG) is generated in the active layer 150. The epi substrate 100 is preferably used as, for example, a member for manufacturing a high electron mobility transistor (HEMT) having 2DEG as a channel of the device forming layer 170.

The active layer 150 is composed of Al _x5 Ga _1-x5 N (0 ≦ x5 <1). The Al composition x5 of the active layer 150 satisfies, for example, 0 ≦ x5 ≦ 0.1, and the active layer 150 is preferably composed of GaN in order to increase crystallinity. The thickness of the active layer 150 is, for example, 100 nm or more and 2000 nm or less (for example, 800 nm).

In the active layer 150, it is preferable that the concentration of impurities such as carbon is reduced as much as possible in the upper layer portion, that is, in the portion near the interface with the Schottky layer 160. This is to increase the mobility by suppressing carrier scattering caused by impurities. The active layer 150 may be a layer having an increased carbon concentration in the lower layer portion. Withstand voltage can be increased by adding carbon.

The Schottky layer 160 is composed of Al _x6 Ga _1-x6 N (0 <x6 <1). The Al composition x6 of the Schottky layer 160 is larger than the Al composition x5 of the active layer 150 so that the bandgap in the Schottky layer 160 is larger than the bandgap in the active layer 150 and 2DEG is generated in the active layer 150. Selected for value. The Al composition x6 of the Schottky layer 160 preferably satisfies, for example, 0.1 <x6 ≦ 0.3. It is known that the 2DEG concentration increases with the film thickness of the Schottky layer 160, and the thickness of the Schottky layer 160 is preferably 10 nm or more, for example. On the other hand, if the Schottky layer 160 is too thick, the crystallinity of the Schottky layer 160 heteroepitaxially grown on the active layer 150 deteriorates because the critical film thickness determined by the lattice constant difference and the dislocation density is exceeded. Therefore, the thickness of the Schottky layer 160 is preferably 100 nm or less, for example. The thickness of the Schottky layer 160 is, for example, 25 nm.

As will be described later, the device forming layer 170 is formed in a high temperature environment (for example, 1000 ° C. or higher) by, for example, metalorganic vapor phase growth (MOVPE). When the temperature is lowered from the crystal growth temperature to room temperature (for example, 25 ° C.), the heat shrinkage of the device forming layer 170 is larger than the heat shrinkage of the base substrate 110, so that tensile stress is generated in the device forming layer 170. By canceling the tensile stress generated in the device forming layer 170 by the compressive stress generated in the stress generating layer 140, it is possible to suppress the warpage of the epi substrate 100 after the temperature is lowered to room temperature.

The Schottky layer 160 is composed of Al _x6 Ga _1-x6 N (0 <x6 <1), that is, AlGaN which is a nitride in which the group III elements contained are Al and Ga. Here, a mode in which the Schottky layer 160 is formed in a high temperature environment and then the temperature is lowered to room temperature as it is is referred to as a comparative form. In the comparative form, in the temperature lowering step after the formation of the Schottky layer 160, the AlGaN constituting the Schottky layer 160 is etched by its thermal decomposition or hydrogen in the atmosphere. In the etching, Ga and N are more easily removed than Al, so that the surface 161 of the Schottky layer 160 is roughened in the comparative form. In particular, the thermal and chemical stability of AlGaN is known to have crystal anisotropy, and in this epitaxial growth on a Si substrate with a large lattice constant difference, dislocations due to the lattice constant difference occur in the crystal. Since there are many, the influence of the etching is remarkable. In the present embodiment, as described below, such roughness on the surface 161 of the Schottky layer 160 is suppressed.

Next, a method of manufacturing the epi substrate 100 according to the present embodiment will be described. A Si substrate is prepared as the substrate 110. The epi substrate 100 is formed by growing the reaction suppressing layer 120, the intermediate layer 130, the stress generating layer 140, the active layer 150, and the Schottky layer 160 above the base substrate 110 by, for example, MOVPE. As the Ga raw material gas among the group III raw material gases, for example, trimethylgallium (Ga (CH ₃ ) ₃ , TMG) gas is used. As the Al source gas among the group III source gases, for example, trimethylaluminum (Al (CH ₃ ) ₃ , TMA) gas is used. As the nitrogen (N) raw material gas which is a group V raw material gas, for example, ammonia (NH ₃ ) is used. The growth temperature can be selected in the range of, for example, 900 ° C. to 1260 ° C., and the flow rate ratio V / III ratio of the group V raw material gas to the group III raw material gas can be selected in the range of, for example, 10 to 10,000. The ratio of the supply amount of each raw material gas is adjusted according to the composition of each layer to be formed. For the thickness of each layer to be formed, for example, the growth time corresponding to the design thickness can be calculated from the growth rate obtained in the preliminary experiment, and the thickness can be controlled by the growth time.

By performing the following steps after growing the Schottky layer 160, the roughness of the surface 161 of the Schottky layer 160 is suppressed. FIG. 2 is a timing chart showing the steps from the growth of the Schottky layer 160 to the temperature lowering of the epi substrate 100 to room temperature in the present embodiment, and is a substrate temperature and a supply amount of Ga raw material gas (hereinafter, also referred to as Ga supply amount). ), The supply amount of Al source gas (hereinafter, also referred to as Al supply amount), and the time change of the supply amount of N source gas (hereinafter, also referred to as N supply amount).

FIG. 3A is a graph conceptually showing the tendency of the correspondence between the Ga supply amount and the growth rate (or etching rate) of GaN. TMG is exemplified as the Ga raw material gas. In FIG. 3A, it is assumed that the temperature is high enough to cause GaN growth or etching, and the N raw material gas is sufficiently supplied. The numerical values shown in FIG. 3 (a) are examples. Further, the exact numerical relationship between the Ga supply amount and the GaN growth rate may change depending on the substrate temperature and the like.

As shown in FIG. 3A, when the TMG supply amount is 0, the growth rate of GaN is negative, and etching of GaN by heat occurs. As the TMG supply amount is increased, the growth rate increases, that is, the etching rate decreases, and in the example of FIG. 3A, when the TMG supply amount is about 10 sccm, the growth rate and the etching rate become 0. When the TMG supply amount is further increased, the growth rate of GaN turns positive and increases according to the TMG supply amount. Here, the TMG supply amount indicates the flow rate of hydrogen flowing through the bubbler containing the TMG. The actual TMG supply amount is calculated from the TMG temperature, the internal pressure of the bubbler, and the hydrogen flow rate. Here, the hydrogen flow rate is described as the TMG supply amount. The amount of TMG supplied such that the growth rate and etching rate of GaN are set to 0, that is, the boundary between the growth and etching of GaN is referred to as the threshold supply amount.

In FIG. 2, first, the Schottky layer 160 composed of AlGaN by supplying Ga raw material gas, Al raw material gas, and N raw material gas in predetermined supply amounts at a predetermined substrate temperature T1 until time t1. To grow.

When the Schottky layer 160 is grown, the Al supply amount is set to 0 and the Ga supply amount is reduced to F1 at time t1. Further, the N supply amount is adjusted so that the V / III ratio becomes a predetermined value according to the change in the Ga supply amount. The Ga supply amount F1 is selected so that the growth rate of GaN is positive (for example, the TMG supply amount is about 20 sccm in FIG. 3A). Hereinafter, changes in the amount of Ga supplied after time t1 will be mainly described. In the timing chart of the N supply amount in FIG. 2, the N supply amount is shown as a constant value in order to simply show that the N raw material gas is also supplied together with the Ga raw material gas. May be adjusted as needed.

After the time t1, the Ga supply amount is reduced from F1 so as to be the threshold supply amount F2 at the time t2, and then further reduced to 0. After the time t1, the substrate temperature is lowered from T1 so as to be T2, which is the lower limit temperature at which GaN etching occurs at the time t3 after the time t2. The Ga supply amount is reduced so that it becomes 0 at time t3, for example. The substrate temperature is further lowered to room temperature after time t3.

Since the Ga supply amount exceeds the threshold supply amount F2 between the time t1 and the time t2, the GaN constituting the sacrificial layer 200 grows on the Schottky layer 160 (see FIG. 3B). On the other hand, after the time t2 and until the time t3, since the Ga supply amount is less than the threshold supply amount F2, the GaN constituting the sacrificial layer 200 is etched. It is preferable that the time from time t2 to time t3 and the etching rate are adjusted so that the total thickness of the sacrificial layer 200 is etched without excess or deficiency at time t3. Such various conditions suitable for the growth and etching of the sacrificial layer 200 can be derived, for example, by preliminary experiments.

FIG. 2 illustrates a mode in which the Ga supply amount is reduced with a constant inclination from the time t1 to the time t3, but the method of reducing the Ga supply amount may be adjusted as necessary. For example, with respect to the slope of the decrease in the Ga supply amount from the time t1 to the time t2, which is the period for growing the sacrificial layer 200, the decrease in the Ga supply amount from the time t2 to the time t3, which is the period for etching the sacrificial layer 200. The inclination of may be different. In the timing chart of the Ga supply amount in FIG. 2, the Ga supply amount is reduced in proportion to the time (linearly) in order to simply show the concept of reducing the Ga supply amount. The change in supply does not necessarily have to be time-proportional (linear) and may be adjusted accordingly.

According to the present embodiment, since the temperature is lowered while the surface 161 of the Schottky layer 160 is protected by the sacrificial layer 200, it is possible to prevent the surface 161 of the Schottky layer 160 from being roughened due to etching during the temperature lowering. .. The sacrificial layer 200 is etched during the temperature decrease, and the etching of the entire thickness is completed at time t3. Even if the surface 161 of the Schottky layer 160 is exposed by eliminating the sacrificial layer 200 at time t3, the substrate temperature drops below T2 after time t3, so that the surface 161 is prevented from being etched and roughened. it can. In order to further suppress the roughness of the surface 161 of the Schottky layer 160, it is preferable that the supply of the N raw material gas is continued even after the time when the supply amount of the Ga raw material gas becomes zero.

In the present embodiment, by supplying the Ga raw material gas exceeding the threshold supply amount F2 together with the N raw material gas while lowering the substrate temperature between the time t1 and the time t2, that is, the Ga raw material gas and the N raw material gas. Is supplied under the condition that GaN grows, so that the sacrificial layer 200 composed of GaN is grown. The Schottky layer 160 does not want to be exposed to an atmosphere as high as possible after growth in order to suppress quality deterioration due to the occurrence of outer peripheral cracks and the like. That is, it is preferable to start lowering the temperature as soon as possible after the Schottky layer 160 has grown. In the present embodiment, by growing the sacrificial layer 200 during the temperature decrease, the sacrificial layer 200 can be grown while suppressing the exposure of the Schottky layer 160 to a high temperature atmosphere.

In the present embodiment, when the sacrificial layer 200 grows, the Ga supply amount is reduced toward the threshold supply amount F2. As a result, the growth rate of GaN can be controlled to be very small, so that very thin GaN can be grown as the sacrificial layer 200. For example, the time from time t1 to time t2 is set to 120 seconds, and the growth rate is reduced in proportion to the time from the growth rate of 0.02 nm / sec at time t1 to the growth rate of 0.00 nm / second at time t2. Considering some aspects, the thickness of the growing GaN is estimated to be 1.2 nm.

In the present embodiment, by supplying the Ga raw material gas having a threshold supply amount of less than F2 together with the N raw material gas while lowering the substrate temperature between the time t2 and the time t3, that is, the Ga raw material gas and the N raw material gas. The sacrificial layer 200 is etched by supplying the raw material gas under the condition that the GaN is etched. As a result, the etching rate is very small (for example, preferably less than 0.02 nm / sec, more preferably less than 0.01 nm / sec) as compared with the embodiment in which the sacrificial layer 200 is etched without supplying any Ga raw material gas. Since it can be controlled, etching can be performed precisely to remove the entire thickness of GaN grown very thinly as the sacrificial layer 200 without excess or deficiency. By forming the sacrificial layer 200 very thinly, it becomes easy to etch the entire thickness of the sacrificial layer 200 even at a very small etching rate. Since the sacrificial layer 200 can be precisely etched, the roughness of the surface 161 of the Schottky layer 160 can be appropriately suppressed.

As described above, according to the present embodiment, it is possible to obtain the epi substrate 100 in which the roughness of the surface 161 of the Schottky layer 160 is suppressed. Since the surface 161 of the Schottky layer 160 constitutes the surface of the device forming layer 170, it is possible to improve the characteristics of the semiconductor device formed by using the epi substrate 100 by suppressing the roughness of the surface 161 of the Schottky layer 160. Can be done. For example, by suppressing the roughness of the surface 161 of the Schottky layer 160, the leakage current of the gate electrode of the HEMT formed by using the epi substrate 100 can be suppressed. As described above, by using the epi substrate 100 of the present embodiment, it is possible to improve the quality of the semiconductor device which is composed of the group III nitride semiconductor and has excellent energy saving effect and the like.

The suppression of roughness of the Schottky layer 160 according to the present embodiment on the surface 161 when the temperature is lowered to room temperature is evaluated by observation with an atomic force microscope (AFM) as described below.

<Example>
Next, with reference to Examples and Comparative Examples, the characteristics of the surface 161 of the Schottky layer 160 according to the above-described embodiment will be described in comparison with the characteristics of the surface 161 of the Schottky layer 160 according to the above-mentioned comparative embodiment. 4 (a) and 4 (b) are AFM images showing a region of 5 μm square on the surface 161 of the Schottky layer 160 according to the embodiment, and FIGS. 5 (a) and 5 (b) are based on a comparative example. 6 is an AFM image showing a region of 5 μm square on the surface 161 of the Schottky layer 160. As the surface roughness of each surface 161, the root mean square roughness RMS (hereinafter, also simply referred to as RMS) was obtained from the AFM image for a region of 5 μm square.

In both the AFM image of the example and the AFM image of the comparative example, a stepped structure (or a structure that looks like overlapping layers, a structure that looks like a scale) is observed. It should be noted that these stepped structures are irregular as compared with the step terrace structure, which is a stepped structure at the atomic level.

As shown in FIGS. 5 (a) and 5 (b), although a stepped structure is observed in the AFM image of the comparative example, the edges of the steps forming the stepped structure have fine irregularities in a plan view. It is wavy with peaks and valleys). As described above, the surface 161 of the Schottky layer 160 according to the comparative example is a rough surface. The RMS of the surface 161 of the comparative example is 0.31 nm. In FIG. 5 (b), a contour line is schematically shown superimposed on a part of the edge of the step observed in the AFM image of FIG. 5 (a).

As shown in FIGS. 4 (a) and 4 (b), in the AFM image of the embodiment, the edges of the steps constituting the stepped structure are generally seen at the edges of the steps of the comparative example (plan view). The surface does not have fine irregularities (in) and the roughness is suppressed. The RMS of the surface 161 of the example is 0.27 nm. In FIG. 4 (b), a contour line is schematically shown superimposed on a part of the edge of the step observed in the AFM image of FIG. 4 (a).

FIG. 6A is a schematic plan view showing contour lines 11 to 16 of the edges of the steps observed in the AFM image of the embodiment illustrated in FIG. 4B. 6 (b) is a schematic plan view showing contour lines 21 and 22 of the edges of the steps observed in the AFM image of the comparative example illustrated in FIG. 5 (b). 6 (a) and 6 (b) show a scale bar 31 having a radius of 0.5 μm, a circle 32 having a radius of 0.2 μm, and a circle 33 having a radius of 0.15 μm.

The edge of the step corresponding to the contour lines 11 to 16 is an example in which the edge of a part of the steps observed in the AFM image of the embodiment is arbitrarily selected. Each contour line 11 or the like represents at least an exemplary, arbitrarily selected portion of the corresponding edge of each step. The edges of the steps corresponding to the contour lines 21 and 22 are exemplary and arbitrarily selected from the edges of some of the steps observed in the AFM image of the comparative example. Each contour line 21, etc. indicates at least an exemplary, arbitrarily selected portion of the corresponding edge of each step.

As can be seen from FIG. 6A, the edge of the step constituting the stepped structure observed in the AFM image of the embodiment has an arc-shaped portion having a length of, for example, 0.5 μm or more, and for example, 0.7 μm or more. For example, two or more edges, for example five or more, are observed. Each of the contour lines 11 to 16 shows such an arcuate portion. Here, the arc-shaped portion indicates a portion having a shape in which the convex direction is not reversed on the portion. That is, it indicates that the portion does not have a wavy curved shape (in a plan view) so as to have irregularities (peaks and valleys) on the portion. It is presumed that the edge of the step looks zigzag (sawtooth) when expanded to the atomic level, but here, for example, the unevenness that fits within the width of 0.02 μm, which is the thickness of the contour line shown in the figure, is Evaluate the shape of the edge of the step, smoothing it to ignore. Further, the length of the edge of the step means the length along the edge.

In the embodiment, the edge of the step is bent more gently than in the comparative example. Among the contour lines 11 to 16 illustrated in FIG. 6A, the contour line 14 has a portion having the steepest bend. As one typical example, the radius of curvature of the contour line 14 is evaluated. The radius of curvature of the portion of the contour line 14 where the bending is the steepest is estimated to be 0.2 μm from the comparison with the circle 32, and is estimated to exceed 0.15 μm from the comparison with the circle 33. Based on this, each of the arcuate portions shown by the contour lines 11 to 16 has a radius of curvature of, for example, 0.15 μm or more, and for example, 0.2 μm or more. The radius of curvature of the arc-shaped portion means the radius of curvature of the position where the radius of curvature is the smallest in the arc-shaped portion. It should be noted that it is arbitrary which part of the edge of the step is regarded as an arc-shaped part (with a length of, for example, 0.5 μm or more, and for example, 0.7 μm or more). For example, in the contour line 14 shown in FIG. 6A, when the portion on the lower end side of the paper surface is reinterpreted as an arc-shaped portion except for the upper end side of the paper surface, the radius of curvature of the re-captured arc-shaped portion exceeds 0.2 μm. ing.

As described above, in the embodiment, the stepped structure is observed in the region of 5 μm square observed in the AFM image of the surface 161 of the Schottky layer 160, and the radius of curvature is, for example, 0 as the edge of the step forming the stepped structure. There are, for example, two or more (and, for example, five or more) edges characterized by having an arcuate portion of .15 μm or more (and, for example, 0.2 μm or more) and, for example, 0.5 μm or more (and, for example, 0.7 μm or more) in length. ) Observed. Such features are also hereinafter referred to as arc-shaped features.

In the examples, although a stepped structure in which roughness is suppressed is observed, a striped pattern in which edges extending in one direction are arranged in parallel over the entire 5 μm square region (or in a region of 1 μm square or more) of the AFM image. It is not possible to obtain a regular stepped structure in which a pattern can be observed.

The irregularity of the stepped structure of the embodiment is expressed as follows, for example. In a region of 5 μm square of the AFM image, the angle formed by the extending direction at a certain edged position showing an arc-shaped feature and the extending direction at another edged position showing an arc-shaped feature is, for example, 45 °. Above, for example 60 ° or more, and even more, for example 75 ° or more, some edges and other edges are observed. That is, one edge and another edge are observed that are significantly out of parallel (with an angle of 0 °).

In FIG. 6A, such an edge and another edge are illustrated by the edge shown by the contour line 14 and the edge shown by the contour line 15. The angle 40 formed by the broken line 14t indicating the extending direction at the edged position indicated by the contour line 14 and the dashed line 15t indicating the extending direction at the edged position indicated by the contour line 15 is 80 in this example. °.

The irregularities of the stepped structure of the examples are also expressed, for example, as follows. In the region of 5 μm square of the AFM image, a portion where one edge showing arc-shaped features and another edge showing arc-shaped features overlap (in a plan view) is observed. That is, a part where one edge and another edge appear to branch (in a plan view) is observed.

In FIG. 6A, as such an edge and another edge, the edge indicated by the contour line 11 and the edge indicated by the contour line 12 are exemplified. An arrow 50 indicates a portion where the edge indicated by the contour line 11 and the edge indicated by the contour line 12 overlap (a portion that appears to branch).

As can be seen from FIG. 6B, the edge of the step constituting the stepped structure observed in the AFM image of the comparative example has a wavy portion curved in a wavy shape within a range of, for example, 0.5 μm or less in length. The edges are observed. Further, such a wavy portion has a portion curved with a radius of curvature of, for example, 0.15 μm or less, and for example, 0.2 μm or less. Each of the contour lines 21 and 22 has such a wavy portion. The feature of having such a wavy portion is also hereinafter referred to as a wavy feature.

As can be seen from FIGS. 4 (a) and 4 (b), in the stepped structure of the example, the edge showing the wavy feature is not observed or is very much compared with the stepped structure of the comparative example. Few. That is, in the stepped structure of the embodiment, there are fewer edges showing wavy features than edges showing arc-shaped features.

7 (a) and 7 (b) are AFM images showing a region of 5 μm square on the surface 161 of the Schottky layer 160 according to another embodiment. The RMS of the surface 161 of the other embodiment is 0.20 nm. In FIG. 7 (b), a contour line is schematically shown superimposed on a part of the edge of the step observed in the AFM image of FIG. 7 (a).

In the other examples as well, as in the above-described embodiment, for example, two or more (and for example, five or more) edges exhibiting arcuate features are observed. Also, in the other examples, the irregularities described for the above-mentioned examples are observed. Also in other embodiments, there are fewer edges showing wavy features than edges showing arc-shaped features.

The RMS in the region of 5 μm square is 0.27 nm and 0.20 nm in the two examples with respect to 0.31 nm in the comparative example, which are almost the same between the comparative example and the example (in other comparative examples). An RMS of 0.19 nm has also been obtained). Therefore, it is difficult to evaluate the effect of suppressing the roughness of the surface 161 according to the examples by the difference in RMS. However, the AFM images are clearly different between the comparative example and the example, and as described above, the effect of suppressing the roughness of the surface 161 by the example is evaluated by the shape characteristics of the edges of the steps constituting the stepped structure. It becomes possible to do.

<Other embodiments>
The embodiment of the present invention has been specifically described above. However, the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the gist thereof.

In the above-described embodiment, after the Schottky layer 160 has grown, the sacrificial layer 200 is grown while the substrate temperature is lowered, and the grown sacrificial layer 200 is etched to suppress the roughness of the surface 161 of the Schottky layer 160. An embodiment is illustrated. However, it is not essential to grow the sacrificial layer 200 in order to suppress the roughness of the surface 161 of the Schottky layer 160. Hereinafter, as another embodiment, an embodiment in which the surface 161 of the Schottky layer 160 is suppressed from being roughened without growing the sacrificial layer 200 will be illustrated.

FIG. 8 is a timing chart showing the steps from the growth of the Schottky layer 160 to the temperature lowering of the epi substrate 100 to room temperature in another embodiment, and the time of the substrate temperature, the Ga supply amount, the Al supply amount, and the N supply amount. Show change. The difference from FIG. 2 described in the above-described embodiment is the timing chart of the Ga supply amount. Although the N supply amount is simply shown by a constant value as in FIG. 2, the N supply amount may be appropriately adjusted as necessary.

In the present embodiment, the Ga supply amount is set to the threshold supply amount F2 such that the growth rate and etching rate of GaN are 0 from time t1 to time t3. That is, from time t1 to time t3, the Ga raw material gas and the N raw material gas are supplied onto the Schottky layer 160 under the condition that GaN is neither grown nor etched while lowering the substrate temperature. In the timing chart of the Ga supply amount in FIG. 8, the Ga supply amount is shown as a constant value in order to simply show the concept of supplying the Ga raw material gas with the threshold supply amount F2 (that is, the threshold supply amount). Although the amount F2 is shown as a constant value), the threshold supply amount F2 can fluctuate depending on the temperature. Therefore, in the actual Ga raw material gas supply, the Ga supply amount may be adjusted so as to match the threshold supply amount F2 that fluctuates according to the temperature.

In the present embodiment, by maintaining the Ga supply amount during temperature reduction at the threshold supply amount F2, GaN does not grow and the sacrificial layer 200 is not formed, but on the other hand, the etching of GaN is also suppressed, so that the Schottky layer 160 The loss of Ga and N on the surface 161 is suppressed. Thereby, as in the above-described embodiment, the roughness of the surface 161 of the Schottky layer 160 can be suppressed.

Still other embodiments include the following aspects. A cap layer 165 may be formed on the Schottky layer 160, if necessary (see FIG. 1). That is, the cap layer 165 may be further grown after the Schottky layer 160 is formed. The cap layer 165 is composed of Al _x7 Ga _1-x7 N (0 ≦ x7 <x6, x6 is the Al composition of the Schottky layer 160), and is preferably composed of GaN. The thickness of the cap layer 165 is, for example, 2 nm or more and 200 nm or less (preferably 5 nm or less and 100 nm or less). The cap layer 165 may contain p-type impurities in a part in the thickness direction, or may contain p-type impurities in the total thickness. By supplying a p-type impurity such as magnesium (Mg) as a dopant during the growth of the cap layer 165, the cap layer 165 can be made into a layer containing the p-type impurity. If the doping amount is too high, the crystallinity of the cap layer 165 may be deteriorated. Therefore, the doping amount of the p-type impurity is preferably ^{4 × 10 19} cm- ^{2 or less, for example.} The cap layer 165 is provided, for example, to improve the device characteristics (controllability of the threshold voltage, etc.) of the HEMT. The cap layer 165 may be regarded as a part of the device forming layer 170. Since the roughness of the surface 161 of the Schottky layer 160 is suppressed as described in the above-described embodiment, the film thickness of the cap layer 165 formed on the surface 161 can be precisely controlled. ..

<Preferable Aspect of the Present Invention>
Hereinafter, preferred embodiments of the present invention will be added.

(Appendix 1)
Underground board and
A first semiconductor layer formed above the base substrate _{and composed of Al x} Ga _1-x N (0 <x <1) and
Have,
A stepped structure is observed in a region of 5 μm square observed by an atomic force microscope on the surface of the first semiconductor layer, and the radius of curvature is, for example, 0.15 μm or more as the edge of the step forming the stepped structure ( Further, there are, for example, two or more (and, for example, five or more) edges showing the first characteristic that the arc-shaped portion has, for example, 0.2 μm or more and a length of, for example, 0.5 μm or more (and 0.7 μm or more). Observed epitaxial substrate.

(Appendix 2)
In the region, the angle formed by the extending direction at the position with the first edge showing the first feature and the extending direction at the position with the second edge showing the first feature is, for example, The epitaxial substrate according to Appendix 1, wherein the first edge and the second edge are observed so as to be 45 ° or more (and, for example, 60 ° or more, further, for example, 75 ° or more).

(Appendix 3)
The epitaxial substrate according to Appendix 1 or 2, wherein in the region, a portion where the third edge showing the first feature and the fourth edge showing the first feature overlap is observed.

(Appendix 4)
In the region, among the edges of the steps constituting the stepped structure, a wavy portion having a wavy curve within a range of 0.5 μm or less in length is provided, and the wavy portion is, for example, 0.15 μm or less (and, for example, 0). The epitaxial substrate according to any one of Supplementary note 1 to 3, wherein the edge showing the second feature of having a portion curved with a radius of curvature of .2 μm or less is less than the edge showing the first feature. ..

(Appendix 5)
The epitaxial substrate according to any one of Supplementary note 1 to 4, wherein the Al composition x of the first semiconductor layer is a value within the range of 0.1 <x ≦ 0.3.

(Appendix 6)
The epitaxial substrate according to any one of Appendix 1 to 5, wherein the thickness of the first semiconductor layer is 10 nm or more.

(Appendix 7)
The epitaxial substrate according to any one of Supplementary note 1 to 6, wherein the thickness of the first semiconductor layer is 100 nm or less.

(Appendix 8)
Wherein formed between the base substrate and the first semiconductor _layer, a second semiconductor layer formed of _{Al y Ga 1-y N (} 0 ≦ y <1),
Have,
The invention described in any one of Supplementary note 1 to 7, wherein a two-dimensional electron gas is generated in the second semiconductor layer by forming the first semiconductor layer above the second semiconductor layer. Epitaxial substrate.

(Appendix 9)
The epitaxial substrate according to Appendix 8, wherein the Al composition y of the second semiconductor layer is a value within the range of 0 ≦ y ≦ 0.1.

(Appendix 10)
The base substrate is a Si substrate.
The epitaxial substrate according to any one of Supplementary note 1 to 9, wherein a stress generating layer that generates compressive stress is formed between the base substrate and the first semiconductor layer.

(Appendix 11)
The base substrate is a Si substrate.
The epitaxial substrate according to any one of Supplementary note 1 to 10, wherein a reaction suppressing layer for suppressing the reaction between Si and Ga is formed between the base substrate and the first semiconductor layer.

(Appendix 12)
The epitaxial substrate according to any one of Supplementary note 1 to 11, further comprising a third semiconductor layer formed on the first semiconductor layer _{and composed of Al z} Ga _{1-z N (0 ≦ z <x).} ..

(Appendix 13)
The process of preparing the base substrate and
A step of forming a first semiconductor layer composed of _{Al x} Ga _1-x N (0 <x <1) above the base substrate, and a step of forming the first semiconductor layer.
A step of growing a sacrificial layer composed of GaN on the first semiconductor layer by supplying Ga raw material gas and N raw material gas under the condition that GaN grows while lowering the substrate temperature.
A step of etching the sacrificial layer by supplying Ga raw material gas and N raw material gas under the condition that GaN is etched while lowering the substrate temperature.
Have,
On the surface of the first semiconductor layer in a state where the temperature has been lowered to room temperature, a stepped structure is observed in a region of 5 μm square observed by an atomic force microscope, and the stepped structure is observed as an edge of a step constituting the stepped structure. The edge showing the first feature of having an arcuate portion having a radius of curvature of, for example, 0.15 μm or more (and, for example, 0.2 μm or more) and a length of, for example, 0.5 μm or more (and, for example, 0.7 μm or more) is, for example, 2. A method for manufacturing an epitaxial substrate, which comprises one or more (and, for example, five or more) observed surfaces.

(Appendix 14)
The method for manufacturing an epitaxial substrate according to Appendix 12, wherein in the step of growing the sacrificial layer, the supply amount of the Ga raw material gas is reduced.

(Appendix 15)
The process of preparing the base substrate and
A step of forming a first semiconductor layer composed of _{Al x} Ga _1-x N (0 <x <1) above the base substrate, and a step of forming the first semiconductor layer.
A step of supplying the Ga raw material gas and the N raw material gas onto the first semiconductor layer under the condition that the GaN is neither grown nor etched while lowering the substrate temperature.
Have,
On the surface of the first semiconductor layer in a state where the temperature has been lowered to room temperature, a stepped structure is observed in a region of 5 μm square observed by an atomic force microscope, and the stepped structure is observed as an edge of a step constituting the stepped structure. The edge showing the first feature of having an arcuate portion having a radius of curvature of, for example, 0.15 μm or more (and, for example, 0.2 μm or more) and a length of, for example, 0.5 μm or more (and, for example, 0.7 μm or more) is, for example, 2. A method for manufacturing an epitaxial substrate, which comprises one or more (and, for example, five or more) observed surfaces.

(Appendix 16)
A step of forming a third semiconductor layer composed of Al _z Ga _1-z N (0 ≦ z <x) on the first semiconductor layer.
The method for manufacturing an epitaxial substrate according to any one of Appendix 13 to 15.

100 ... Epi substrate, 110 ... Underground substrate, 120 ... Reaction suppression layer, 130 ... Intermediate layer, 140 ... Stress generation layer, 141 ... First crystal layer, 142 ... Second crystal layer, 143 ... Multiple crystal layer, 150 ... Activity Layer, 160 ... Schottky layer, 161 ... Surface (of Schottky layer), 170 ... Device cambium, 200 ... Sacrificial layer, 11, 12, 13, 14, 15, 16, 21, 22 ... Contour line

Claims (11)

Underground board and
A first semiconductor layer formed above the base substrate _{and composed of Al x} Ga _1-x N (0 <x <1) and
Have,
A stepped structure is observed in a region of 5 μm square observed by an atomic force microscope on the surface of the first semiconductor layer, and the radius of curvature is 0.15 μm or more and long as the edge of the step constituting the stepped structure. An epitaxial substrate in which two or more edges exhibiting the first characteristic of having an arcuate portion having a radius of 0.5 μm or more are observed. In the region, the angle formed by the extending direction at the position with the first edge showing the first feature and the extending direction at the position with the second edge showing the first feature is 45. The epitaxial substrate according to claim 1, wherein the first edge and the second edge are observed so as to be greater than or equal to °. The epitaxial substrate according to claim 1 or 2, wherein in the region, a portion where the third edge showing the first feature and the fourth edge showing the first feature overlap is observed. In the region, among the edges of the steps constituting the stepped structure, a wavy portion having a wavy curve within a range of 0.5 μm or less in length is provided, and the wavy portion is curved with a radius of curvature of 0.15 μm or less. The epitaxial substrate according to any one of claims 1 to 3, wherein the edge showing the second feature of having a portion to be formed is less than the edge showing the first feature. Wherein formed between the base substrate and the first semiconductor _layer, a second semiconductor layer formed of _{Al y Ga 1-y N (} 0 ≦ y <1),
Have,
The invention according to any one of claims 1 to 4, wherein a two-dimensional electron gas is generated in the second semiconductor layer by forming the first semiconductor layer above the second semiconductor layer. Epitaxial substrate. The base substrate is a Si substrate.
The epitaxial substrate according to any one of claims 1 to 5, wherein a stress generating layer that generates compressive stress is formed between the base substrate and the first semiconductor layer. The epitaxial according to any one of claims 1 to 6, further comprising a third semiconductor layer formed on the first semiconductor layer _{and composed of Al z} Ga _{1-z N (0 ≦ z <x).} substrate. The process of preparing the base substrate and
A step of forming a first semiconductor layer composed of _{Al x} Ga _1-x N (0 <x <1) above the base substrate, and a step of forming the first semiconductor layer.
A step of growing a sacrificial layer composed of GaN on the first semiconductor layer by supplying Ga raw material gas and N raw material gas under the condition that GaN grows while lowering the substrate temperature.
A step of etching the sacrificial layer by supplying Ga raw material gas and N raw material gas under the condition that GaN is etched while lowering the substrate temperature.
Have,
On the surface of the first semiconductor layer in a state where the temperature has been lowered to room temperature, a stepped structure is observed in a region of 5 μm square observed by an atomic force microscope, and the stepped structure is observed as an edge of a step constituting the stepped structure. A method for manufacturing an epitaxial substrate, wherein two or more edges are observed as a surface having an arcuate portion having a radius of curvature of 0.15 μm or more and a length of 0.5 μm or more. The method for manufacturing an epitaxial substrate according to claim 7, wherein in the step of growing the sacrificial layer, the supply amount of the Ga raw material gas is reduced. The process of preparing the base substrate and
A step of forming a first semiconductor layer composed of _{Al x} Ga _1-x N (0 <x <1) above the base substrate, and a step of forming the first semiconductor layer.
A step of supplying the Ga raw material gas and the N raw material gas onto the first semiconductor layer under the condition that the GaN is neither grown nor etched while lowering the substrate temperature.
Have,
On the surface of the first semiconductor layer in a state where the temperature has been lowered to room temperature, a stepped structure is observed in a region of 5 μm square observed by an atomic force microscope, and the stepped structure is observed as an edge of a step constituting the stepped structure. A method for manufacturing an epitaxial substrate, wherein two or more edges are observed as a surface having an arcuate portion having a radius of curvature of 0.15 μm or more and a length of 0.5 μm or more. A step of forming a third semiconductor layer composed of Al _z Ga _1-z N (0 ≦ z <x) on the first semiconductor layer.
The method for manufacturing an epitaxial substrate according to any one of claims 8 to 10.