JP2021002538A - Wiring board and manufacturing method of wiring board - Google Patents

Abstract

To simplify a structure and improve the reliability of a wiring board.SOLUTION: A wiring board 1 in an embodiment comprises: a first internal conductor layer 2 which includes a shield pattern 21; a first interlayer insulation layer 3 which is laminated on the first internal conductor layer 2; a first external conductor layer 4, formed on the first interlayer insulation layer 3, which includes a line pattern 41 having a predetermined line width; a first solder resist layer 5 which covers the first external conductor layer 4 and the first interlayer insulation layer 3; and a shield film 6, formed on the first solder resist layer 5, which covers at least the line pattern 41 so as to constitute, together with the shield pattern 21 and the line pattern 41, a strip line 40. The shield film 6 is a solidified product of conductive paste or conductive ink.SELECTED DRAWING: Figure 1

Description

The present invention relates to a wiring board and a method for manufacturing a wiring board.

Patent Document 1 discloses a printed wiring board including a signal line having a stripline structure formed on one surface side of a core substrate. In this printed wiring board, the outermost conductor layer on the side having the stripline structure constitutes the ground layer of the stripline structure.

Japanese Unexamined Patent Publication No. 2004-342871

In the printed wiring board disclosed in Patent Document 1, since a ground layer is provided as the outermost conductor layer in order to form a stripline structure, a set of conductor layers including a signal line having a stripline structure is placed on the ground layer. The insulating layer and the conductor layer are laminated. Therefore, the number of laminated conductor layers and insulating layers in the printed wiring board may unintentionally increase.

The wiring board of the present invention is formed on an inner layer conductor layer including a shield pattern, an interlayer insulating layer laminated on the inner layer conductor layer, and the interlayer insulating layer, and has a predetermined line width. The shield pattern and the line are formed on the outer layer conductor layer including the line pattern, the solder resist layer covering the outer layer conductor layer and the interlayer insulating layer, and at least covering the line pattern. It includes a shield film that constitutes a strip line together with the pattern. The shield film is a solidified product of a conductive paste or a conductive ink.

The method for manufacturing a wiring board of the present invention has a conductor layer including a predetermined conductor pattern, an insulating layer formed on the conductor layer, and a predetermined line width on the insulating layer. A conductor layer including the line pattern is formed, a solder resist layer including the line pattern and the insulating layer is formed, and a conductor film covering the line pattern is formed on the solder resist layer. This includes forming a strip line composed of the conductor film, the line pattern, and the predetermined conductor pattern. Then, forming the conductor film includes printing a conductive paste or applying a conductive ink by an inkjet method.

According to the embodiment of the present invention, in a wiring board having a strip line on the surface, a conductor layer including a signal transmission line constituting the strip line can be provided on the outermost layer of the conductor layers in the wiring board. It may be possible to reduce the number of layers of the conductor layer and the insulating layer on the wiring board. In addition, the reliability of the wiring board may be improved as the number of layers is reduced.

The cross-sectional view which shows an example of the wiring board of one Embodiment of this invention. The plan view which shows the wiring board of the example of FIG. Enlarged view of Part III of FIG. FIG. 5 is a cross-sectional view showing another example of the strip line of FIG. FIG. 5 is a cross-sectional view showing an example of a state after formation of the first inner layer conductor layer in the method for manufacturing a wiring board according to an embodiment of the present invention. The cross-sectional view which shows an example of the state after formation of the 1st outer layer conductor layer in the manufacturing method of the wiring board of one Embodiment. The cross-sectional view which shows an example of the state after formation of the solder resist layer in the manufacturing method of the wiring board of one Embodiment. The cross-sectional view which shows an example of the process of forming a shield film in the manufacturing method of the wiring board of one Embodiment. The cross-sectional view which shows an example of the completed wiring board in the manufacturing method of the wiring board of one Embodiment.

A wiring board according to an embodiment of the present invention will be described with reference to the drawings. 1 and 2 show a cross-sectional view and a plan view of the wiring board 1 which is an example of the wiring board of one embodiment, respectively. FIG. 1 is a cross-sectional view taken along the line II shown in FIG. Further, FIG. 3 shows an enlarged view of part III of FIG.

As shown in FIGS. 1 to 3, the wiring board 1 has an inner layer conductor layer (first inner layer conductor layer 2) including a shield pattern 21 and an interlayer insulating layer laminated on the first inner layer conductor layer 2. (First interlayer insulating layer 3), an outer layer conductor layer (first outer layer conductor layer 4) formed on the first interlayer insulating layer 3, and further, a first outer layer conductor layer 4 and a first interlayer insulating layer. A solder resist layer (first solder resist layer 5) that covers 3 is provided. The first outer layer conductor layer 4 includes a line pattern 41 having a predetermined line width. The shield pattern 21 of the first inner layer conductor layer 2 functions as an electromagnetic shield for the line pattern 41. The wiring board 1 of the present embodiment further includes a shield film 6 formed on the first solder resist layer 5. The shield film 6 is made of a conductive material and covers at least the line pattern 41 via the first solder resist layer 5. The shield film 6 functions as an electromagnetic shield against the line pattern 41 by covering the line pattern 41, and constitutes the strip line 40 together with the shield pattern 21 and the line pattern 41. In the example of FIG. 1, the shield film 6 is a solidified product of a conductive paste or a conductive ink.

The wiring board 1 of the example of FIG. 1 further includes an insulating core layer 10, a second inner layer conductor layer 2b, a second interlayer insulating layer 3b, a second outer layer conductor layer 4b, and a second solder resist layer 5b. I have. The core layer 10 has a first surface 10a, which is one of two main surfaces orthogonal to the thickness direction, and a second surface 10b facing the first surface 10a. At least the first outer layer conductor layer 4, the first solder resist layer 5, and the shield film 6 are formed on the first surface 10a side of the core layer 10. In the example of FIG. 1, the first interlayer insulating layer 3 and the first inner layer conductor layer 2 are also formed on the first surface 10a side. On the other hand, a second inner layer conductor layer 2b, a second interlayer insulating layer 3b, a second outer layer conductor layer 4b, and a second solder resist layer 5b are formed on the second surface 10b of the core layer 10. In the example of FIG. 1, the shield film is not formed on the second surface 10b side of the core layer 10, for example, on the second solder resist layer 5b.

In the description of the wiring board 1, the side far from the core layer 10 in the thickness direction of the wiring board 1 is also referred to as "upper" or "upper", or simply "upper", and the side closer to the core layer 10 is "lower". Also referred to as "side" or "down", or simply "down". Further, in each conductor layer and each insulating layer, the surface facing the side opposite to the core layer 10 is also referred to as "upper surface", and the surface facing the core layer 10 side is also referred to as "lower surface". Further, the thickness direction of the wiring board 1 is also simply referred to as "Z direction".

In the present embodiment, the line pattern 41, which is the signal transmission line of the strip line 40, is included in the first outer layer conductor layer 4. The first outer layer conductor layer 4 is the outermost conductor layer on the first surface 10a side of the core layer 10 in the wiring board 1. That is, the conductor layer and the insulating layer are not further laminated on the first outer layer conductor layer 4. However, a shield film 6 is formed on the line pattern 41 of the first outer layer conductor layer 4 via the first solder resist layer 5. By providing the shield film 6, it is possible to form a strip line 40 in which the line pattern 41 is sandwiched between the shield film 6 and the shield pattern 21.

As described above, in the present embodiment, the strip line 40 is provided without laminating the insulating layer and the conductor layer on the conductor layer (first outer layer conductor layer 4) including the signal transmission line (line pattern 41) of the strip line 40. Can be formed. A wiring board having a stripline structure on the surface layer may be realized with a small number of layers. It may be possible to realize a simplification of the structure of the wiring board, a cost reduction, and / or an improvement in reliability due to a reduction in the number of layers.

Further, in the first outer layer conductor layer 4, which is the outermost conductor layer, in addition to the line pattern 41, a connection pad for an external member (not shown) such as an electronic component can be provided. For example, in the wiring board 1 of FIG. 1, the first outer layer conductor layer 4 includes a connection pad 42 (first connection pad) for an external member. In the wiring board 1, the electronic components and the like to be mounted and the inside are compared with the case where the ground layer formed on the outer layer side of the line pattern 41 to have the stripline structure is provided with the mounting pads for the external members and the like. It may be possible to connect to a particular conductor pattern via a short path. It may be possible to improve the characteristics of the electronic device using the wiring board 1.

Further, the first solder resist layer 5 interposed between the first outer layer conductor layer 4 and the shield film 6 is provided with an opening 52 for exposing the connection pad 42. The first solder resist layer 5 prevents short-circuit defects related to the mounting of an external member (not shown) on the connection pad 42. Further, the shield film 6 and the first solder resist layer 5 can be in good contact with each other by appropriately selecting the material of the shield film 6. For example, the shield film 6 and the first solder resist layer 5 can adhere to each other more firmly than the solder resist layer and the conductor layer when the conductor layer is laminated on the cured solder resist layer. It is presumed that peeling between the shield film 6 and the first solder resist layer 5 is less likely to occur as compared with the case where the stripline structure is formed by providing the conductor layer on the first solder resist layer 5. It may contribute to improving the reliability of the wiring board 1.

In the wiring board 1 of the example of FIG. 1, the core board of the wiring board 1 is formed by the core layer 10 and the first and second inner layer conductor layers 2 and 2b laminated on both sides thereof. A build-up layer including the first interlayer insulating layer 3 and the first outer layer conductor layer 4 and a build-up layer including the second interlayer insulating layer 3b and the second outer layer conductor layer 4b are formed across the core substrate. There is. The core layer 10 is formed with a through-hole conductor 10c that connects the first inner layer conductor layer 2 and the second inner layer conductor layer 2b. The number of conductor layers and insulating layers included in the wiring board 1 is not limited to the example of FIG. For example, one or more sets of conductor layers and insulating layers may be further formed between the first inner layer conductor layer 2 and the first surface 10a of the core layer 10. That is, the first inner layer conductor layer 2 does not necessarily have to be the conductor layer constituting the core substrate, and may be the conductor layer in the build-up layer on the first surface 10a side.

Each conductor layer (first and second inner layer conductor layers 2, 2b, and first and second outer layer conductor layers 4, 4b) may include, for example, a metal foil and a plating film. Each conductor layer can be formed, for example, with any metal such as copper, nickel, silver, palladium, alone or in combination.

Each conductor layer may contain any conductor pattern. For example, the first inner layer conductor layer 2 may include at least a shield pattern 21, and may further include any conductor pattern other than the shield pattern 21. However, since the first inner layer conductor layer 2 contains the shield pattern 21, it preferably contains only a conductor pattern having little potential fluctuation, such as a ground conductor pattern or a power supply conductor pattern. More preferably, the first inner layer conductor layer 2 contains only a conductor pattern connected to the ground potential. For example, the shield pattern 21 is formed in a solid shape on one surface of the upper surface of the insulating layer (core layer 10 in the example of FIG. 1) under the first inner layer conductor layer 2 except for the pad 2a for the through-hole conductor 10c. You may.

The first outer layer conductor layer 4 includes at least a line pattern 41, and may further include any conductor pattern such as a connection pad 42. For example, the first outer layer conductor layer 4 may include any wiring pattern that constitutes or does not form a strip line, in addition to the line pattern 41. In the example of FIG. 1, the line pattern 41 and the strip line 40 are on both sides of a group of connection pads 42 provided in the central portion of the wiring board 1 in the direction orthogonal to the Z direction (X direction in FIG. 1) in the X direction. It is provided in.

In the example of FIG. 1, the second outer layer conductor layer 4b includes the terminal pad 4b2. The terminal pad 4b2 is a conductor pad connected to an external member (not shown) such as an external wiring board.

Each conductor layer can have any thickness. For example, as the thickness of each conductor layer, values of about 3 μm or more and 100 μm or less are exemplified, but the thickness of each conductor layer is not limited to this range. However, the first outer layer conductor layer 4 including the line pattern 41 is formed to have a thickness set so that the strip line 40 including the line pattern 41 has a predetermined characteristic impedance. The line pattern 41 has a predetermined line width set so that the strip line 40 has a predetermined characteristic impedance.

The first interlayer insulating layer 3 includes a via conductor 31 that penetrates the first interlayer insulating layer 3 and connects the first outer layer conductor layer 4 and the first inner layer conductor layer 2. Similarly, the second interlayer insulating layer 3b includes a via conductor 31b that penetrates the second interlayer insulating layer 3b and connects the second outer layer conductor layer 4b and the second inner layer conductor layer 2b. The connection pad 42 of the first outer layer conductor layer 4 and the terminal pad 4b2 of the second outer layer conductor layer 4b are electrically connected via the via conductor 31, the through-hole conductor 10c, and the via conductor 31b.

The via conductors 31 and 31b are so-called filled vias formed by filling through holes penetrating each of the first and second interlayer insulating layers 3 and 3b with a conductor. The via conductors 31 and 31b are integrally formed with the respective upper conductor layers. The via conductors 31 and 31b are formed of, for example, an electroless plating film and an electrolytic plating film made of copper, nickel, or the like. The through-hole conductor 10 is also formed of an electroless plating film and an electrolytic plating film made of copper, nickel, or the like.

Each insulating layer (first and second interlayer insulating layers 3, 3b) and the core layer 10 are formed by using an arbitrary insulating material. Examples of the insulating material include epoxy resin, bismaleimide triazine resin (BT resin), and phenol resin. Each insulating layer formed by using these resins may contain a reinforcing material such as glass fiber or aramid fiber and / or an inorganic filler such as silica. The characteristic impedance of the strip line 40 correlates with the relative permittivity of each of the first interlayer insulating layer 3 and the first solder resist layer 5. Therefore, for the first interlayer insulating layer 3, a material having a relative permittivity selected so that the strip line 40 has a predetermined characteristic impedance is used. For example, the first interlayer insulating layer 3 and the first solder resist layer 5 may have substantially the same relative permittivity. In that case, since the strip line 40 can be easily designed, it is considered that a characteristic impedance close to the design value can be easily obtained.

Each insulating layer can have an arbitrary thickness, for example, each insulating layer is formed to a thickness of 10 μm or more and 200 μm or less. The characteristic impedance of the strip line 40 also correlates with the thickness of the first interlayer insulating layer 3 and the first solder resist layer 5. Therefore, the first interlayer insulating layer 3 has a predetermined thickness set so that the strip line 40 has a predetermined characteristic impedance. The first interlayer insulating layer 3 and the first solder resist layer 5 may have the same thickness as each other. In that case, since the strip line 40 can be easily designed, it is considered that a characteristic impedance close to the design value can be easily obtained.

The first and second solder resist layers 5, 5b can be formed by using any material having an insulating property. The first and second solder resist layers 5, 5b are formed by using a photosensitive resin containing, for example, an epoxy resin or a polyimide resin as a main raw material. The first solder resist layer 5 is interposed between the first outer layer conductor layer 4 and the shield film 6. The thickness and relative permittivity of the first solder resist layer 5 are related to the characteristic impedance of the strip line 40. The first solder resist layer 5 may be formed by using a material having a relative permittivity substantially the same as that of the first interlayer insulating layer 3. Further, the first solder resist layer 5 may be formed to have substantially the same thickness as the first interlayer insulating layer 3. As mentioned above, it may be advantageous in the design regarding the characteristic impedance of the strip line 40. The second solder resist layer 5b is formed, for example, by using the same material as the first solder resist layer 5 and having the same thickness as the first solder resist layer 5.

In the example of FIG. 1, the first solder resist layer 5 exposes a part of the upper surface of the connection pad 42 in the opening 52. The wiring board 1 of the example of FIG. 1 includes a conductive bump 42a formed on the exposed surface of the connection pad 42. The bump 42a joins a terminal (not shown) of an external member such as an electronic component to the connection pad 42. The first solder resist layer 5 may be exposed not only as a part of the upper surface of the connection pad 42 but as a whole in the opening 52.

An opening 5b2 is provided on the terminal pad 4b2 in the second solder resist layer 5b, and a part of the terminal pad 4b2 is exposed in the opening 5b2. A conductive bump 4ba is provided on the terminal pad 4b2 exposed to the opening 5b2. The bump 4ba joins the terminal of an external member such as a motherboard to the terminal pad 4b2. The conductive bumps 42a on the connection pad 42 and the conductive bumps 4ba on the terminal pads 4b2 are formed using, for example, any metal such as solder, gold, or copper, or a resin containing conductive particles. ..

In the examples of FIGS. 1 and 2, the wiring board 1 is provided with a group of connection pads 42 arranged in a matrix in the central portion of the wiring board 1 in a plan view. An external member (not shown) connected to the connection pad 42 is arranged in a mounting area MA that includes this group of connection pads 42. As shown in FIG. 2, in the wiring board 1 of the examples of FIGS. 1 and 2, the shield film 6 is formed so as to surround the mounting region MA over the entire circumference in a plan view, and is a frame-shaped flat surface. It has a shape. A line pattern 41 is arranged under each of the four sides of the frame-shaped planar shield film 6.

In the wiring board 1 illustrated in FIG. 2, the only conductor formed on the first solder resist layer 5 is the shield film 6. That is, a conductor pattern for transmitting an electric signal or connecting specific circuit nodes is not formed on the first solder resist layer 5. In the examples of FIGS. 1 and 2, the upper surface of the first solder resist layer 5 has a region not covered by the shield film 6, but the shield film 6 is the entire upper surface of the first solder resist layer 5. It may be formed so as to cover.

The strip line 40 and the shield film 6 will be described in more detail with reference to FIG. The shield film 6 is formed on the surface of the first solder resist layer 5 and covers the line pattern 41 via the first solder resist layer 5. In the example of FIG. 3, the shield film 6 has a connecting portion 61 that penetrates the first solder resist layer 5 and is in contact with the first outer layer conductor layer 4. The connecting portion 61 is formed by filling the opening 51 provided in the first solder resist layer 5 with a material forming the shield film 6. The connecting portion 61 may have an arbitrary shape in a cross section orthogonal to the Z direction. For example, the connecting portion 61 may have a substantially circular shape in a cross section orthogonal to the Z direction. The portion of the shield film 6 above the first solder resist layer 5 is electrically connected to the shield pattern 21 via the connecting portion 61 and the via conductor 31. It is considered that a good shielding action is obtained by the shielding film 6.

The shield film 6 can be formed by using any conductive material. The shield film 6 uses, for example, a material that can have fluidity during its formation so that it can have a portion (connecting portion 61) that fills the opening 51 of the first solder resist 5 as in the example of FIG. Is formed. For example, the shield film 6 is formed by using a paste-like or liquid resin containing a conductive material such as conductive particles or fibers, such as a so-called conductive paste or conductive ink. Therefore, the shield film 6 may be a solidified product of the conductive paste or a solidified product of the conductive ink. The upper portion of the first solder resist 5 and the connecting portion 61 of the shield film 6 are integrally formed of the same material.

Examples of the material for forming the shield film 6 include any conductive resin such as silver paste, tin / silver paste, or copper paste, or conductive ink containing silver nanoparticles or the like. Therefore, the shield film 6 may contain arbitrary metal particles such as silver, tin, copper, nickel, aluminum, palladium, titanium and molybdenum. Examples of the resin constituting the conductive paste forming the shield film 6 include epoxy, acrylic, and phenol, but the resin that can be contained in the shield film 6 is not limited to these. The wiring board 1 may have a resin-filled via conductor formed by filling a through hole provided in an arbitrary insulating layer with a conductive resin. In that case, the shield film 6 may be formed by using the same material as the resin-filled via conductor.

In the example of FIG. 3, the surface 6a of the shield film 6 opposite to the first solder resist layer 5 side is curved so as to be convex in the direction opposite to the first solder resist layer 5. That is, the thickness of the shield film 6 is the thickest at the central portion in the direction orthogonal to the direction in which the line pattern 41 extends (the X direction in FIG. 3). It is considered that an effective shielding action on the line pattern 41 located at the center of the shield film 6 in the X direction can be obtained. The surface 6a of the shield film 6 may be substantially flat, may be recessed substantially entirely or partially on the side of the first solder resist layer 5, and the opening 51 of the first solder resist layer 5 may be recessed. It may be partially recessed just above.

The characteristic impedance of the strip line 40 includes the relative permittivity of each of the first interlayer insulating layer 3 and the first solder resist layer 5, the thickness T of the line pattern 41, the line width W, and the line pattern 41 and the shield pattern 21. It is determined based on the distances H1 and H2 from each of the shield films 6. Therefore, the materials and thicknesses of the first interlayer insulating layer 3 and the first solder resist layer 5 are selected so that the desired characteristic impedance can be obtained in the strip line 40, and the thickness T of the line pattern 41 (that is, the first outer layer) is selected. The thickness of the conductor layer 4) and the line width W are determined. For example, the first interlayer insulating layer 3 and the first solder resist layer 5 have a thickness and a relative permittivity selected so that the strip line 40 has a characteristic impedance of 30 Ω or more and 150 Ω or less.

As shown in FIG. 3, the wiring board 1 may include at least a surface protective film 8 that covers the shield film 6. The surface protective film 8 is formed by using, for example, a water-soluble preflux containing imidazole as a main component, preferably a heat-resistant water-soluble preflux. In the examples of FIGS. 1 to 3, the shield film 6 is exposed on the first solder resist layer 5, but by providing the surface protective film 8, it is possible to prevent oxidation and rust from occurring in the shield film 6. ..

FIG. 4 shows a strip line 40a which is a modification of the strip line 40 in the wiring board 1 of FIG. As shown in FIG. 4, the strip line 40a includes a line pattern 41a having two lines arranged so as to run side by side with a predetermined interval G. That is, the differential transmission line is formed by the two lines forming the line pattern 41a. The strip line 40a is advantageous for, for example, transmitting a high frequency signal having a minute amplitude. In the wiring board 1 of the present embodiment, the shield film 6 and the shield pattern 21 may sandwich a line pattern 41 which is a differential transmission line between them, whereby a strip line including the differential transmission line may be sandwiched between them. 40a may be configured.

In the example of FIG. 4, the surface protective film 8 in the example of FIG. 3 is not formed. As shown in FIG. 4, the wiring board 1 of the present embodiment does not necessarily have to include a surface protective film that covers the shield film 6.

The structure of the strip line 40a and its surrounding portion in the example of FIG. 4 includes the strip line 40 and the strip line 40 of FIG. 3 except that the line pattern 41a is a differential transmission line and the surface protective film 8 is not formed. It is the same as the surrounding part. The same components as those shown in FIG. 3 are designated by the same reference numerals as those shown in FIG. 3 in FIG. 4, and the description thereof will be omitted.

Next, the method for manufacturing the wiring board of one embodiment will be described with reference to FIGS. 5A to 5E, using the wiring board 1 shown in FIG. 1 as an example.

In the method for manufacturing a wiring board of the present embodiment, as shown in FIG. 5A, a conductor layer (first inner layer conductor layer 2) including a predetermined conductor pattern 21 is formed on an insulating layer (core layer 10). Includes. The predetermined conductor pattern 21 is a conductor pattern that functions as an electromagnetic shield for the line pattern 41 (see FIG. 5B) formed in a later process, and is also referred to as a "shield pattern 21" below. In the example of FIG. 5A, the first inner layer conductor layer 2 is formed on one of the two main surfaces (first surface 10a) of the insulating layer constituting the core layer 10. A second inner layer conductor layer 2b is formed on the other main surface (second surface 10b) of the core layer 10.

For example, a double-sided copper-clad laminate having an insulating substrate to be the core layer 10 and copper foil laminated on both sides thereof is prepared. A through hole for forming a through-hole conductor 10c is formed in the double-sided copper-clad laminate by laser processing, and a conductor film is formed on the inner wall of the through hole and the surface of the double-sided copper-clad laminate by electroless plating or sputtering. Is formed. Then, by a subtractive method including electroplating using this conductor film as a seed layer and a feeding layer, and etching using an appropriate mask, the first inner layer conductor layer 2 and the second inner layer conductor having desired conductor patterns, respectively. The layer 2b and the through-hole conductor 10c are formed. That is, the core substrate of the wiring board 1 is formed. The first and second inner layer conductor layers 2, 2b and the through-hole conductor 10c may be formed by a semi-additive method. Further, in the present embodiment, the first inner layer conductor layer 2 does not necessarily have to be formed on the insulating layer constituting the core layer 10. For example, the first inner layer conductor layer 2 may be formed on any interlayer insulating layer other than the core layer.

As shown in FIG. 5B, in the method for manufacturing a wiring board of the present embodiment, an insulating layer (first interlayer insulating layer 3) is further provided on the first surface 10a of the core layer 10 and on the first inner layer conductor layer 2. It includes forming and forming a conductor layer (first outer layer conductor layer 4) on the first interlayer insulating layer 3. The first outer layer conductor layer 4 is formed so as to include the line pattern 41. The line pattern 41 is formed so as to have a predetermined line width. In the example of FIG. 5B, forming the first outer layer conductor layer 4 includes forming a connection pad 42 for an external member (not shown), and a plurality of line patterns 41 are formed between the two line patterns 41. A connection pad 42 is formed. A via conductor 31 is formed in the first interlayer insulating layer 3 so as to penetrate the first interlayer insulating layer 3 and connect the first inner layer conductor layer 2 and the first outer layer conductor layer 4.

In the example of FIG. 5B, the second interlayer insulating layer 3b and the second outer layer conductor layer 4b are formed on the second surface 10b and the second inner layer conductor layer 2b of the core layer 10. The second outer layer conductor layer 4b is formed so as to include the terminal pad 4b2. Further, a via conductor 31b is formed which penetrates the second interlayer insulating layer 3b and connects the second inner layer conductor layer 2b and the second outer layer conductor layer 4b.

The first and second interlayer insulating layers 3 and 3b are formed by, for example, laminating a film-shaped epoxy resin and thermocompression bonding. In the formation of the first and second interlayer insulating layers 3, 3b, a metal foil such as a copper foil may be thermocompression bonded onto each of the first and second interlayer insulating layers 3, 3b. Holes for forming the via conductors 31 and 31b are formed at predetermined positions in the first and second interlayer insulating layers 3 and 3b by irradiation with carbon dioxide laser light or the like.

Then, for example, by the semi-additive method, the first outer layer conductor layer 4 including at least the line pattern 41 is formed on the first interlayer insulating layer 3, and the via conductor 31 is formed in the first interlayer insulating layer 3. Further, a second layer having a desired conductor pattern on the second interlayer insulating layer 3b at the same time as the formation of the first outer layer conductor layer 4 is preferably performed by the same method as the method for forming the first outer layer conductor layer 4 and the via conductor 31. 2 The outer conductor layer 4b is formed, and the via conductor 31b is formed in the second interlayer insulating layer 3b.

As shown in FIG. 5C, the method for manufacturing a wiring board of the present embodiment further comprises a solder resist layer (first solder) that covers the first outer layer conductor layer 4 including the line pattern 41 and the first interlayer insulating layer 3. It includes forming a resist layer 5). In the example of FIG. 5C, the second solder resist layer 5b is formed on the second interlayer insulating layer 3b and the second outer layer conductor layer 4b on the second surface 10b side of the core layer 10. The first and second solder resist layers 5, 5b are formed on each conductor layer and each insulating layer by a method such as coating, spraying, or printing, for example, a film containing a photosensitive epoxy resin or polyimide resin. It is formed by forming a film.

As shown in FIG. 5C, the formation of the first solder resist layer 5 may include forming an opening 51 and an opening 52 in the first solder resist layer 5 that expose a part of the first outer layer conductor layer 4. The opening 51 exposes the via pad 43 of the via conductor 31, and the opening 52 exposes part or all of the connecting pad 42. In the example of FIG. 5C, the second solder resist layer 5b is also formed with an opening 5b2 for exposing the terminal pad 4b2. For example, the opening 51, the opening 52, and the opening 5b2 are formed by performing exposure and development using an appropriate exposure mask.

After the formation of the openings 51, 52, 5b2, the first and second solder resist layers 5, 5b can be completely cured, for example by heating. In the method for manufacturing a wiring board of the present embodiment, a conductor layer (for example, a shield layer of a strip line) is not formed on each of the solder resist layers 5 and 5b. Therefore, even if each solder resist layer 5, 5b is completely cured before the strip line 40 (see FIG. 5D) is formed, there can be no concern about peeling at the interface with the conductor layer.

As shown in FIG. 5D, the method for manufacturing a wiring board of the present embodiment further includes forming a conductor film to be a shield film 6 functioning as an electromagnetic shield on the first solder resist layer 5. .. This conductor film is formed so as to cover the line pattern 41, and therefore functions as an electromagnetic shield against the line pattern 41. The strip line 40 is formed by the shield film 6, the line pattern 41, and the shield pattern 21. As described above, in the method for manufacturing the wiring board of the present embodiment, by forming a conductor film on the first solder resist layer 5, a shield film 6 made of the conductor film, a line pattern 41, and a shield pattern 21 are formed. Includes forming a strip line 40 composed of.

The shield film 6 is formed by supplying an arbitrary material having conductivity to the upper portion of the line pattern 41 in the first solder resist layer 5. The material of the shield film 6 is preferably one that can adhere well to the first solder resist layer 5. For example, the material of the shield film 6 may contain a resin of the same type as the resin used for the first solder resist layer 5, for example, an epoxy resin. Further, the conductivity of the shield film 6 can be imparted by any conductive material such as metal particles. For example, the shield film 6 is formed by using a conductive paste such as silver paste, tin / silver paste, or copper paste, or a conductive ink containing silver nanoparticles or the like. By using a paste-like or liquid material, good adhesion to the first solder resist layer 5 may be obtained.

Any method is used to supply the material of the shield film 6 onto the first solder resist layer 5. For example, when a paste-like or liquid material such as a conductive paste is used, forming the conductor film (shield film 6) may include printing the conductive paste through a printing mask. Good. Alternatively, forming the conductor film (shield film 6) may include applying the conductive ink 60 to the first solder resist layer 5 by an inkjet method, as shown in FIG. 5D. In the example of FIG. 5D, a mask M having an appropriate opening M1 in the region corresponding to the formation region of the shield film 6 is provided on the first solder resist layer 5. The opening M1 is formed in a region including at least a region directly above the line pattern 41. Further, the opening M1 is formed in a size (width) such that the shield film 6 formed in the opening M1 can exert a sufficient shielding action on the line pattern 41.

The conductive ink 60 is applied toward the mask M. The wiring board 1x in the process of being manufactured is moved in the direction indicated by the arrow A in FIG. 5D, and the conductive ink 60 applied through the mask M is deposited in each opening M1. As a result, a shield film 6 covering the line pattern 41 is formed in each opening M1. During the formation of the shield film 6, the second surface 10b side of the core layer 10 may be covered with an arbitrary protective film such as resist R so that the conductive ink 60 does not unintentionally adhere.

In the example of FIG. 5D, the opening M1 of the mask M is provided in the region where the opening 51 of the first solder resist layer 5 is exposed. Therefore, the formation of the conductor film (shield film 6) may include forming a part (connection portion 61) of the shield film 6 in the opening 51 of the first solder resist layer 5. That is, the formation of the shield film 6 may include connecting a portion of the shield film 6 above the first solder resist layer 5 and a portion of the first outer layer conductor layer 4 by a connecting portion 61. In the example of FIG. 5D, the shield film 6 is connected to the via pad 43 of the via conductor 31, and as a result, the shield film 6 and the shield pattern 21 are electrically connected.

After forming the shield film 6, the mask M is removed. When the shield film 6 is formed using a paste-like or liquid material, the shield film 6 may be cured by heating, for example, before or after the removal of the mask M. The material of the shield film 6 may be supplied by printing or by ejecting from a nozzle of a resin dispenser instead of using an inkjet as in the example of FIG. 5D.

As shown in FIG. 5E, the method for manufacturing a wiring board of the present embodiment may further include forming a surface protective film 8 on the shield film 6. The surface protective film 8 may be formed not only on the shield film 6 but also on the exposed surfaces of the first and second outer layer conductor layers 4 and 4b, respectively. The surface protective film 8 is formed, for example, by immersing the wiring board 1x after the formation of the shield film 6 in a solution of a water-soluble preflux, preferably a heat-resistant water-soluble preflux.

Further, as shown in FIG. 5E, the method for manufacturing the wiring board of the present embodiment may further include forming a conductive bump 42a on the connection pad 42. Similarly, a conductive bump 4ba may be formed on the terminal pad 4b2. The bumps 42a and 4ba are formed, for example, by arranging solder balls on the connection pad 42 and the terminal pad 4b2 and heating and melting them. The bumps 42a and 4ba may be formed before the formation of the shield film 6. By going through the above steps, the wiring board 1 of FIG. 1 is completed.

The wiring board of the embodiment is not limited to the structure exemplified in each drawing and the structure, shape, and material exemplified in this specification. For example, the wiring board 1 does not have to include the connection pad 42. The strip line 40 may be provided at an arbitrary position on the wiring board 1 in a plan view. The shield film 6 and the shield pattern 21 do not necessarily have to be connected in the vicinity of the line pattern 41. The wiring board 1 may be a so-called coreless substrate in which a conductor layer and an insulating layer are laminated in one direction without having a core layer. Further, the via conductors 31 and 31b, the connecting portion 61 of the shield film 6, and the through-hole conductor 10c do not necessarily have to be formed.

The method for manufacturing the wiring board of the embodiment is not limited to the method described with reference to each drawing. For example, the first and second outer conductor layers 4, 4b may be patterned by the subtractive method. In addition to each of the above-mentioned steps, any step may be added to the method for manufacturing the wiring board of the embodiment, or a part of the above-mentioned steps may be omitted.

1 Wiring board 10 Core layer 10a First surface 10b Second surface 2 First inner layer Conductor layer 21 Shield pattern (predetermined conductor pattern)
3 First interlayer insulating layer 31, 31b Via conductor 4 First outer layer conductor layer 40, 40a Strip line 41, 41a Line pattern 42 Connection pad (first connection pad)
42a Bump 5 First solder resist layer 51, 52 Aperture 6 Shield film 61 Connection part 6a Shield film surface 8 Surface protective film

Claims (11)

The inner conductor layer including the shield pattern and
An interlayer insulating layer laminated on the inner conductor layer and
An outer conductor layer formed on the interlayer insulating layer and including a line pattern having a predetermined line width,
A solder resist layer covering the outer conductor layer and the interlayer insulating layer,
A shield film formed on the solder resist layer and forming a strip line together with the shield pattern and the line pattern by covering at least the line pattern.
It is a wiring board equipped with
The shield film is a solidified product of a conductive paste or a conductive ink. In the wiring board according to claim 1, the surface of the shield film on the side opposite to the solder resist layer side is curved so as to be convex in the direction opposite to the solder resist layer. The wiring board according to claim 1, wherein the outer conductor layer further includes a connection pad for an outer member.
The solder resist layer has an opening that exposes the connection pad. The wiring board according to claim 1, wherein the shield film has a connecting portion that penetrates the solder resist layer and is in contact with the outer conductor layer. The wiring board according to claim 4.
The interlayer insulating layer includes a via conductor penetrating the interlayer insulating layer.
The shield film is electrically connected to the shield pattern via the connection portion and the via conductor. The wiring board according to claim 1, further comprising a surface protective film that covers the shield film. The wiring board according to claim 1, wherein the solder resist layer has a thickness and a relative permittivity selected so that the strip line has a characteristic impedance of 30 Ω or more and 150 Ω or less. Forming a conductor layer containing a predetermined conductor pattern and
Forming an insulating layer on the conductor layer and
Forming a conductor layer including a line pattern having a predetermined line width on the insulating layer,
Forming a conductor layer including the line pattern and a solder resist layer covering the insulating layer,
By forming a conductor film covering the line pattern on the solder resist layer, a strip line composed of the conductor film, the line pattern, and the predetermined conductor pattern can be formed.
Is a method of manufacturing a wiring board that includes
Forming the conductor film includes printing a conductive paste or applying a conductive ink by an inkjet method. The method for manufacturing a wiring board according to claim 8.
Forming the solder resist layer includes forming an opening in the solder resist layer that exposes a part of the conductor layer including the line pattern.
Forming the conductor film includes connecting the conductor film and the conductor layer including the line pattern by forming a part of the conductor film in the opening. The method for manufacturing a wiring board according to claim 8, further comprising forming a surface protective film on the conductor film. The method for manufacturing a wiring board according to claim 8.
Forming a conductor layer containing the line pattern includes forming a connecting pad to an external member.

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