JP2021002536A - Wiring board and manufacturing method of wiring board - Google Patents

Abstract

To improve characteristics and quality of a wiring board.SOLUTION: A wiring board 1 in an embodiment comprises: a first internal conductor layer 2 which includes a shield pattern 21; a first interlayer insulation layer 3 which is laminated on the first internal conductor layer 2; a first external conductor layer 4, formed on the first interlayer insulation layer 3, which includes a connection pad 42; and a first external insulation layer 5, formed on the first external conductor layer, from which the connection pad 42 is at least partially exposed. The first external conductor layer 4 further includes a line pattern 41 having a predetermined line width. On the first external insulation layer 5, there is provided a shield film 6 which covers at least the line pattern 41, and which constitutes, together with the shield pattern 21 and the line pattern 41, a strip line 40. The shield film 6 has a metal foil layer and a plated film layer.SELECTED DRAWING: Figure 1

Description

The present invention relates to a wiring board and a method for manufacturing a wiring board.

Patent Document 1 discloses a printed wiring board including a signal line having a stripline structure formed on one surface side of a core substrate. The outermost conductor layer on the side of the printed wiring board having the signal line of the stripline structure constitutes the ground layer of the stripline structure.

Japanese Unexamined Patent Publication No. 2004-342871

In the printed wiring board disclosed in Patent Document 1, when the component mounting pad is provided on the side having the stripline structure, since the outermost conductor layer is the ground layer, it is expected that the component mounting pad is provided on this ground layer. Will be done. The connection path between the external component mounted on the component mounting pad and the wiring layer including the signal line of the stripline structure may be long.

The wiring board of the present invention is formed on an inner layer conductor layer including a shield pattern, an interlayer insulating layer laminated on the inner layer conductor layer, and the interlayer insulating layer, and provides a connection pad for an external member. It includes an outer layer conductor layer including the outer layer conductor layer, and a first outer layer insulating layer formed on the outer layer conductor layer and exposing the connection pad at least partially. The outer layer conductor layer further includes a line pattern having a predetermined line width, and at least covers the line pattern on the first outer layer insulating layer to form a strip line together with the shield pattern and the line pattern. A shield film is provided, and the shield film has a metal foil layer and a plating film layer.

The method for manufacturing a wiring substrate of the present invention comprises forming a conductor layer containing a predetermined conductor pattern on an insulating layer, forming an interlayer insulating layer on the conductor layer, and forming the interlayer insulating layer on the interlayer insulating layer. Forming a conductor layer including a line pattern having a predetermined line width and a connection pad for an external member, forming an outer layer insulating layer on the conductor layer including the line pattern, and forming the outer layer insulating layer. By laminating a metal foil on the metal foil, forming through holes in the outer layer insulating layer and the metal foil to reach the conductor layer including the line pattern, and making metal on the metal foil and in the through holes. By forming a film and forming a plating film covering the line pattern on the metal film, the metal foil, the shield film including the plating film, the line pattern, and the predetermined conductor pattern It includes forming a strip line composed of the above and forming an opening that penetrates the outer layer insulating layer and exposes the connection pad.

According to the embodiment of the present invention, since an external member such as an electronic component can be connected to the conductor layer including the signal line of the stripline structure, the external member and the conductor layer inside the wiring board can be connected by a short path. May be electrically connected. As a result, the characteristics of electronic devices and the like that use a wiring board may be improved.

The cross-sectional view which shows an example of the wiring board of one Embodiment of this invention. The plan view which shows the wiring board of the example of FIG. Enlarged view of Part III of FIG. FIG. 5 is a cross-sectional view showing another modified example of the wiring board of FIG. FIG. 5 is a cross-sectional view showing an example of a state after formation of the first inner layer conductor layer in the method for manufacturing a wiring board according to an embodiment of the present invention. The cross-sectional view which shows an example of the state after formation of the 1st outer layer conductor layer in the manufacturing method of the wiring board of one Embodiment. FIG. 5 is a cross-sectional view showing an example of a state after forming a through hole in the first outer layer insulating layer in the method for manufacturing a wiring board of one embodiment. The cross-sectional view which shows an example of the state after formation of a metal film in the manufacturing method of the wiring board of one Embodiment. The cross-sectional view which shows an example of the state after formation of the shield film in the manufacturing method of the wiring board of one Embodiment. An enlarged view of the VF portion of FIG. 5E. FIG. 5 is a cross-sectional view showing an example of a state after forming an opening in the first outer layer insulating layer in the method for manufacturing a wiring board of one embodiment. The cross-sectional view which shows an example of the completed wiring board in the manufacturing method of the wiring board of one Embodiment.

A wiring board according to an embodiment of the present invention will be described with reference to the drawings. 1 and 2 show a cross-sectional view and a plan view of the wiring board 1 which is an example of the wiring board of one embodiment, respectively. FIG. 1 is a cross-sectional view taken along the line II shown in FIG. Further, FIG. 3 shows an enlarged view of part III of FIG.

As shown in FIGS. 1 to 3, the wiring board 1 has an inner layer conductor layer (first inner layer conductor layer 2) including a shield pattern 21 and an interlayer insulating layer laminated on the first inner layer conductor layer 2. (First interlayer insulating layer 3), an outer layer conductor layer (first outer layer conductor layer 4) formed on the first interlayer insulating layer 3, and a first outer layer conductor layer 4 formed on the first outer layer conductor layer 4. 1 The outer layer insulating layer 5 and the like are provided. The first outer layer conductor layer 4 includes a line pattern 41 having a predetermined line width and a connection pad 42 for an external member (not shown). The shield pattern 21 of the first inner layer conductor layer 2 functions as an electromagnetic shield for the line pattern 41. In the wiring board 1 of the present embodiment, a shield film 6 that covers at least the line pattern 41 is provided on the first outer layer insulating layer 5. The shield film 6 can function as an electromagnetic shield for the wiring pattern 41. The strip line 40 is composed of the shield film 6, the shield pattern 21, and the line pattern 41. Although not shown in FIG. 1, the shield film 6 has a metal foil layer 6a and a plating film layer 6c (see FIG. 3).

The wiring board 1 of the example of FIG. 1 further includes a core layer 10 having an insulating property, a second inner layer conductor layer 2b, a second interlayer insulating layer 3b, a second outer layer conductor layer 4b, and a second outer layer insulating layer 5b. I have. The core layer 10 has a first surface 10a which is one of two main surfaces orthogonal to the thickness direction, and a second surface 10b which faces the first surface 10a. At least the first outer layer conductor layer 4, the first outer layer insulating layer 5, and the shield film 6 are formed on the first surface 10a side of the core layer 10. In the example of FIG. 1, the first interlayer insulating layer 3 and the first inner layer conductor layer 2 are also formed on the first surface 10a side. On the other hand, a second inner layer conductor layer 2b, a second interlayer insulating layer 3b, a second outer layer conductor layer 4b, and a second outer layer insulating layer 5b are formed on the second surface 10b of the core layer 10. The second outer layer insulating layer 5b constitutes a surface of the wiring board 1 opposite to the surface on the first outer layer insulating layer 5 side. In the example of FIG. 1, the shield film is not formed on the second surface 10b side of the core layer 10, for example, on the second outer layer insulating layer 5b.

In the description of the wiring board 1, the side far from the core layer 10 in the thickness direction of the wiring board 1 is also referred to as "upper" or "upper", or simply "upper", and the side closer to the core layer 10 is "lower". Also referred to as "side" or "down", or simply "down". Further, in each conductor layer and each insulating layer, the surface facing the side opposite to the core layer 10 is also referred to as "upper surface", and the surface facing the core layer 10 side is also referred to as "lower surface". Further, the thickness direction of the wiring board 1 is also simply referred to as "Z direction".

The first outer layer insulating layer 5 has an opening 52 provided on the connection pad 42, and the connection pad 42 is exposed in the opening 52. In the example of FIG. 1, the first outer layer insulating layer 5 is formed by using the same material as the first interlayer insulating layer 3. Therefore, as will be described later, a metal layer (for example, a metal foil layer or a plating film layer) having good adhesion to the first outer layer insulating layer 5 can be laminated on the first outer layer insulating layer 5. ..

In the present embodiment, the first outer layer conductor layer 4 includes both a line pattern 41 which is a signal transmission line of the strip line 40 and a connection pad 42 for an external member (not shown) such as an electronic component. The first outer layer conductor layer 4 is a conductor layer formed on the outer layer of the wiring board 1, but since the shield film 6 is formed on the line pattern 41 via the first outer layer insulating layer 5, the shield film 6 is formed. The strip line 40 including the line pattern 41 can be formed. Further, since the first outer layer insulating layer 5 exposes the connection pad 42, external electronic components and the like can be mounted on the connection pad 42. Therefore, an electronic component (not shown) mounted on the wiring board 1 and a conductor pattern included in the wiring board 1 such as the line pattern 41 may be connected by a short path.

Further, in general, a solder resist layer is formed on the conductor layer including the connection pad in order to prevent a short circuit failure. Therefore, when the conductor layer includes the signal transmission line of the strip line, it is necessary to provide the conductor layer on the solder resist layer in order to form the shield layer of the strip line. However, if the conductor layer is formed on the solder resist layer that has been formed earlier and has already been cured, sufficient adhesion may not be obtained between the solder resist layer and the conductor layer. On the other hand, in the wiring board 1 of the example of FIG. 1, the shield film 6 forming the upper shield layer of the strip line 40 is the first outer layer insulation formed by using the same material as the first interlayer insulating layer 3. Formed on top of layer 5. Therefore, sufficient adhesion can be obtained between the shield film 6 and the first outer layer insulating layer 5. Therefore, it is considered that the peeling of the shield layer constituting the strip line 40 can be suppressed, which can contribute to the improvement of the quality of the wiring board. The first outer layer insulating layer 5 does not necessarily have to be formed by using the same material as the first interlayer insulating layer 3. As the material of the first outer layer insulating layer 5, any insulating material capable of exhibiting appropriate adhesion to the shield film 6 is used.

In the wiring board 1 of the example of FIG. 1, the core board of the wiring board 1 is formed by the core layer 10 and the first and second inner layer conductor layers 2 and 2b laminated on both sides thereof. A build-up layer including the first interlayer insulating layer 3, the first outer layer conductor layer 4, the first outer layer insulating layer 5, and the shield film 6 and the second interlayer insulating layer 3b and the second outer layer conductor are sandwiched between the core substrates. A build-up layer including the layer 4b and the second outer layer insulating layer 5b is formed. The core layer 10 is formed with a through-hole conductor 10c that connects the first inner layer conductor layer 2 and the second inner layer conductor layer 2b. The number of conductor layers and insulating layers included in the wiring board 1 is not limited to the example of FIG. 1, for example, one or more sets are further between the first inner layer conductor layer 2 and the first surface 10a of the core layer 10. The conductor layer and the insulating layer may be formed. That is, the first inner layer conductor layer 2 does not necessarily have to be the conductor layer constituting the core substrate, and may be the conductor layer in the build-up layer on the first surface 10a side.

Each conductor layer (first and second inner layer conductor layers 2, 2b, and first and second outer layer conductor layers 4, 4b) may include a metal foil and a plating film. Each conductor layer can be formed, for example, with any metal such as copper, nickel, silver, palladium, alone or in combination.

Each conductor layer may contain any conductor pattern. For example, the first inner layer conductor layer 2 may include at least a shield pattern 21, and may further include any conductor pattern other than the shield pattern 21. However, since the first inner layer conductor layer 2 contains the shield pattern 21, it preferably contains only a conductor pattern having little potential fluctuation, such as a ground conductor pattern or a power supply conductor pattern. More preferably, the first inner layer conductor layer 2 contains only a conductor pattern connected to the ground potential. For example, the shield pattern 21 is formed in a solid shape on one surface of the upper surface of the insulating layer (core layer 10 in the example of FIG. 1) under the first inner layer conductor layer 2 except for the pad 2a for the through-hole conductor 10c. You may.

The first outer layer conductor layer 4 includes at least a line pattern 41 and a connection pad 42, and may further include an arbitrary conductor pattern. For example, the first outer layer conductor layer 4 may include any wiring pattern that constitutes or does not form a strip line, in addition to the line pattern 41. Further, the line pattern 41 may be composed of two line-shaped conductor patterns arranged side by side in order to form a differential transmission line. In the example of FIG. 1, the line pattern 41 and the strip line 40 are on both sides of a group of connection pads 42 provided in the central portion of the wiring board 1 in the direction orthogonal to the Z direction (X direction in FIG. 1) in the X direction. It is provided in.

In the example of FIG. 1, the second outer layer conductor layer 4b includes the terminal pad 4b2. The terminal pad 4b2 is a conductor pad connected to an external member (not shown) such as an external wiring board.

Each conductor layer can have any thickness. For example, the thickness of each conductor layer is exemplified by a value of about 3 μm or more and 50 μm or less, but the thickness of each conductor layer is not limited to this range. However, the first outer layer conductor layer 4 including the line pattern 41 is formed to have a thickness set so that the strip line 40 including the line pattern 41 has a predetermined characteristic impedance, as will be described later. Further, the line pattern 41 has a predetermined line width set so that the strip line 40 has a predetermined characteristic impedance.

The first interlayer insulating layer 3 includes a via conductor 31 that penetrates the first interlayer insulating layer 3 and connects the first outer layer conductor layer 4 and the first inner layer conductor layer 2. Similarly, the second interlayer insulating layer 3b includes a via conductor 31b that penetrates the second interlayer insulating layer 3b and connects the second outer layer conductor layer 4b and the second inner layer conductor layer 2b. Further, the first outer layer insulating layer 5 includes a via conductor 51 that penetrates the first outer layer insulating layer 5 and connects the shield film 6 and the first outer layer conductor layer 4. The connection pad 42 of the first outer layer conductor layer 4 and the terminal pad 4b2 of the second outer layer conductor layer 4b are electrically connected via the via conductor 31, the through-hole conductor 10c, and the via conductor 31b.

The via conductors 31 and 31b are so-called filled vias formed by filling through holes penetrating each of the first and second interlayer insulating layers 3 and 3b with a conductor. The via conductors 31 and 31b are integrally formed with the respective upper conductor layers. The via conductors 31 and 31b are formed of, for example, an electroless plating film and an electrolytic plating film made of copper, nickel, or the like. The through-hole conductor 10 is also formed of an electroless plating film and an electrolytic plating film made of copper, nickel, or the like.

On the other hand, the via conductor 51 is formed by filling a through hole penetrating the first outer layer insulating layer 5 with a conductor, and is integrally formed with the shield film 6. The via conductor 51 is also formed of, for example, an electroless plating film and an electrolytic plating film made of copper, nickel, or the like.

Each insulating layer (first and second interlayer insulating layers 3, 3b, and first and second outer layer insulating layers 5, 5b) and a core layer 10 are formed by using an arbitrary insulating material. Examples of the insulating material include epoxy resin, bismaleimide triazine resin (BT resin), and phenol resin. Each insulating layer formed by using these resins may contain a reinforcing material such as glass fiber or aramid fiber and / or an inorganic filler such as silica. The characteristic impedance of the strip line 40 correlates with the relative permittivity of the first interlayer insulating layer 3 and the first outer layer insulating layer 5. Therefore, for the first interlayer insulating layer 3 and the first outer layer insulating layer 5, a material having a relative permittivity selected so that the strip line 40 has a predetermined characteristic impedance is used.

As described above, the first outer layer insulating layer 5 is formed by using a material that can form the first interlayer insulating layer 3. Therefore, the first outer layer insulating layer 5 and the first interlayer insulating layer 3 may have substantially the same relative permittivity. Preferably, the first outer layer insulating layer 5 and the first interlayer insulating layer 3 are formed by using substantially the same material. In that case, since the strip line 40 can be easily designed, it is considered that a characteristic impedance close to the design value can be easily obtained.

The first outer layer insulating layer 5 has an opening 52 that exposes the connection pad 42. However, as will be described later, the opening 52 can be formed by irradiation with laser light, drilling, or the like, similarly to the through hole drilled in the first outer layer insulating layer 5 for forming the via conductor 51. That is, the opening 52 is formed without using, for example, a photolithography technique. Therefore, in the example of FIG. 1, the first outer layer insulating layer 5 is formed by using a non-photosensitive resin, for example, a thermosetting resin.

Each insulating layer can have an arbitrary thickness, for example, each insulating layer is formed to a thickness of 10 μm or more and 100 μm or less. Since the characteristic impedance of the strip line 40 also correlates with the thickness of the first interlayer insulating layer 3 and the first outer layer insulating layer 5, the strip line 40 is used for the first interlayer insulating layer 3 and the first outer layer insulating layer 5, respectively. It has a predetermined thickness set to have a predetermined characteristic impedance. The first interlayer insulating layer 3 and the first outer layer insulating layer 5 may have the same thickness as each other. In that case, since the strip line 40 can be easily designed, it is considered that a characteristic impedance close to the design value can be easily obtained.

In the example of FIG. 1, the first outer layer insulating layer 5 exposes a part of the upper surface of the connection pad 42 in the opening 52. However, the first outer layer insulating layer 5 may expose the entire upper surface of the connection pad 42, not a part of the upper surface. That is, an opening 52 is formed in the first outer layer insulating layer 5 so as to expose the connection pad 42 at least partially. The wiring board 1 of the example of FIG. 1 further includes a conductive bump 42a formed on the exposed surface of the connection pad 42. The bump 42a joins the terminal of an external member such as an electronic component to the connection pad 42.

On the other hand, an opening 5b2 is provided on the terminal pad 4b2 in the second outer layer insulating layer 5b, and a part of the terminal pad 4b2 is exposed in the opening 5b2 of the second outer layer insulating layer 5b. The wiring board 1 is provided with a conductive bump 4ba on the terminal pad 4b2 exposed to the opening 5b2. The bump 4ba joins the terminal of an external member such as a motherboard to the terminal pad 4b2. The conductive bumps 42a on the connection pad 42 and the conductive bumps 4ba on the terminal pads 4b2 are formed using, for example, any metal such as solder, gold, or copper, or a resin containing conductive particles. Has been done.

In the examples of FIGS. 1 and 2, the wiring board 1 is provided with a group of connection pads 42 arranged in a matrix in the central portion of the wiring board 1 in a plan view. An external member (not shown) connected to the connection pad 42 is arranged in a mounting area MA that includes this group of connection pads 42. As shown in FIG. 2, in the wiring board 1 of the examples of FIGS. 1 and 2, the shield film 6 is formed so as to surround the mounting region MA over the entire circumference in a plan view, and is a frame-shaped flat surface. It has a shape. A line pattern 41 is arranged under each of the four sides of the frame-shaped planar shield film 6.

In the wiring board 1 illustrated in FIG. 2, the only conductor on the first outer layer insulating layer 5 is the shield film 6. That is, on the first outer layer insulating layer 5, no conductor pattern for transmitting an electric signal or connecting between specific circuit nodes is formed, and only the shield film 6 is formed. In the examples of FIGS. 1 and 2, the upper surface of the first outer layer insulating layer 5 has a region not covered by the shield film 6, but the shield film 6 covers the entire upper surface of the first outer layer insulating layer 5. It may be formed so as to cover it.

The strip line 40 and the shield film 6 will be described in more detail with reference to FIG. As shown in FIG. 3, the strip line 40 is formed by the line pattern 41 and the shield pattern 21 and the shield film 6 sandwiching the line pattern 41 via the first interlayer insulating layer 3 and the first outer layer insulating layer 5. There is. In the example of FIG. 3, the shield film 6 is electrically connected to the shield pattern 21 via a via conductor 51 penetrating the first outer layer insulating layer 5 and a via conductor 31 penetrating the first interlayer insulating layer 3. Has been done. It is considered that a good shielding action is obtained by the shielding film 6.

The shield film 6 is formed by using an arbitrary metal such as copper, nickel, or palladium, similarly to the first outer layer conductor layer 4 and the like. Further, although the shield film 6 is shown in FIG. 1 to have a single-layer structure for simplification, it has a multi-layer structure like the first outer layer conductor layer 4. In the example of FIG. 3, the shield film 6 has a metal foil layer 6a and a plating film layer 6c. The metal foil layer 6a is formed of a metal foil such as a copper foil. The plating film layer 6c is, for example, a conductor film made of a metal such as copper formed by electrolytic plating.

FIG. 3 shows an example in which the plating film layer 6c is formed by electrolytic plating. Therefore, the shield film 6 includes a metal film layer 6b that functions as a seed layer and a feeding layer when the plating film layer 6c is formed by electrolytic plating. The metal film layer 6b is a metal film formed by, for example, electroless plating or sputtering. The plating film layer 6c may be formed by electroless plating, in which case the shield film 6 may include only the metal foil layer 6a and the plating film layer 6c.

The via conductor 51 integrally formed with the shield film 6 also includes the metal film layer 6b and the plating film layer 6c in the example of FIG. The via conductor 51 may also include only the plating film layer 6c, similarly to the shield film 6.

As shown in FIG. 3, the wiring board 1 may further include a surface protective film 8 that covers at least the shield film 6. The surface protective film 8 is formed by using, for example, a water-soluble preflux containing imidazole as a main component, preferably a heat-resistant water-soluble preflux. In the examples of FIGS. 1 to 3, the shield film 6 is not covered with a solder resist or the like, but by providing the surface protective film 8, it is possible to prevent oxidation and rust from occurring in the shield film 6. The surface protective film 8 may be formed not only on the shield film 6 but also on the first and second outer layer insulating layers 5 and 5b, respectively.

A modified example of the wiring board 1 of the present embodiment shown in FIG. 1 will be described with reference to FIG. FIG. 4 shows a wiring board 1a which is another modification of the wiring board 1 of FIG. As shown in FIG. 4, the wiring board 1a does not include the second outer layer insulating layer 5b provided in the wiring board 1 of FIG. Therefore, in the wiring board 1a, the number of layers of the insulating layer formed on the second surface side 10b side of the core layer 10 is one less than the number of layers of the insulating layer formed on the first surface 10a side. Since the wiring board 1 of FIG. 1 is not provided with the conductor layer above the second outer layer conductor layer 4b, the formation of the insulating layer covering the second outer layer conductor layer 4b is omitted as in the example of FIG. You may.

In the example of FIG. 4, the solder resist layer 7bb is formed on the surface of the wiring board 1a opposite to the surface of the first outer layer insulating layer 5 side, that is, on the second interlayer insulating layer 3b and the second outer layer conductor layer 4b. It is formed. The solder-resist layer 7bb is formed with an opening 7b1 that exposes the terminal pad 4b2. Although not shown in FIG. 4, the terminal pad 4b2 exposed to the opening 7b1 may be formed with the same material as the surface protective film 8 covering the shield film 6 described above. Further, a conductive bump 4ba may be formed on the terminal pad 4b2 as in FIG. 1.

The structure of the wiring board 1a in the example of FIG. 4 is the same as that of the wiring board 1 of FIG. 1 except that the solder resist layer 7bb is formed instead of the second outer layer insulating layer 5b. The same components as those of the wiring board 1 of FIG. 1 are designated by the same reference numerals as those shown in FIG. 1 in FIG. 4, and the description thereof will be omitted.

Next, the method of manufacturing the wiring board of one embodiment will be described with reference to FIGS. 5A to 5H, using the wiring board 1 shown in FIG. 1 as an example.

In the method for manufacturing a wiring board of the present embodiment, as shown in FIG. 5A, a conductor layer (first inner layer conductor layer 2) including a predetermined conductor pattern 21 is formed on an insulating layer (core layer 10). Includes. The predetermined conductor pattern 21 is a conductor pattern that functions as an electromagnetic shield for the line pattern 41 (see FIG. 5B) formed in a later process, and is also referred to as a "shield pattern 21" below. In the example of FIG. 5A, the first inner layer conductor layer 2 is formed on one of the two main surfaces (first surface 10a) of the insulating layer constituting the core layer 10. A second inner layer conductor layer 2b is formed on the other main surface (second surface 10b) of the core layer 10.

For example, a double-sided copper-clad laminate having an insulating substrate to be the core layer 10 and copper foil laminated on both sides thereof is prepared. A through hole for forming a through-hole conductor 10c is formed in the double-sided copper-clad laminate by laser processing, and a conductor film is formed on the inner wall of the through hole and the surface of the double-sided copper-clad laminate by electroless plating or sputtering. Is formed. Then, by a subtractive method including electroplating using this conductor film as a seed layer and a feeding layer, and etching using an appropriate mask, the first inner layer conductor layer 2 and the second inner layer conductor having desired conductor patterns, respectively. The layer 2b and the through-hole conductor 10c are formed. That is, the core substrate of the wiring board 1 is formed. The first inner layer conductor layer 2 is formed so as to include the shield pattern 21. The first and second inner layer conductor layers 2, 2b and the through-hole conductor 10c may be formed by a semi-additive method. Further, the first inner layer conductor layer 2 does not necessarily have to be formed on the insulating layer constituting the core layer 10. For example, the first inner layer conductor layer 2 may be formed on any interlayer insulating layer other than the core layer.

As shown in FIG. 5B, the method for manufacturing the wiring board of the present embodiment further comprises an interlayer insulating layer (first interlayer insulating layer 3) on the first surface 10a of the core layer 10 and on the first inner layer conductor layer 2. This includes forming a conductor layer (first outer layer conductor layer 4) on the first interlayer insulating layer 3. The first outer layer conductor layer 4 is formed so as to include a line pattern 41 and a connection pad 42 for an external member (not shown). The line pattern 41 is formed so as to have a predetermined line width. A via conductor 31 is formed in the first interlayer insulating layer 3 so as to penetrate the first interlayer insulating layer 3 and connect the first inner layer conductor layer 2 and the first outer layer conductor layer 4.

In the example of FIG. 5B, the second interlayer insulating layer 3b and the second outer layer conductor layer 4b are formed on the second surface 10b and the second inner layer conductor layer 2b of the core layer 10. The second outer layer conductor layer 4b is formed so as to include the terminal pad 4b2. Further, a via conductor 31b is formed which penetrates the second interlayer insulating layer 3b and connects the second inner layer conductor layer 2b and the second outer layer conductor layer 4b.

The first and second interlayer insulating layers 3 and 3b are formed by, for example, laminating a film-shaped epoxy resin and thermocompression bonding. In the formation of the first and second interlayer insulating layers 3, 3b, a metal foil such as a copper foil may be thermocompression bonded onto each of the first and second interlayer insulating layers 3, 3b. Holes for forming the via conductors 31 and 31b are formed at predetermined positions in the first and second interlayer insulating layers 3 and 3b by irradiation with carbon dioxide laser light or the like.

Then, for example, by the semi-additive method, at least the first outer layer conductor layer 4 including the line pattern 41 and the connection pad 42 is formed on the first interlayer insulating layer 3, and the via conductor 31 is formed in the first interlayer insulating layer 3. Is formed. Further, a second layer having a desired conductor pattern on the second interlayer insulating layer 3b at the same time as the formation of the first outer layer conductor layer 4 is preferably performed by the same method as the method for forming the first outer layer conductor layer 4 and the via conductor 31. 2 The outer conductor layer 4b is formed, and the via conductor 31b is formed in the second interlayer insulating layer 3b.

As shown in FIG. 5C, the method for manufacturing a wiring board of the present embodiment further forms an outer layer insulating layer (first outer layer insulating layer 5) on the first outer layer conductor layer 4 and the first interlayer insulating layer 3. That, the metal foil 6a1 is laminated on the first outer layer insulating layer 5, and the through hole 51a that reaches the first outer layer conductor layer 4 is formed in the first outer layer insulating layer 5 and the metal foil 6a1. , Including. In the example of FIG. 5C, the second outer layer insulating layer 5b is formed on the second outer layer conductor layer 4b and the second interlayer insulating layer 3b. The first outer layer insulating layer 5 and the second outer layer insulating layer 5b are formed by, for example, laminating a film-shaped epoxy resin and thermocompression bonding, similarly to the first interlayer insulating layer 3.

The metal foil 6a1 is formed by forming the first and second outer layer insulating layers 5, 5b by using, for example, a film-like epoxy resin including the metal leaf 6a1 made of an arbitrary metal such as copper. It is laminated on each of the outer layer insulating layers 5 and 5b of 2. By laminating the metal foils 6a1, it is possible to prevent the surfaces of the first and second outer layer insulating layers 5, 5b from being unintentionally roughened by the desmear treatment described later.

The through hole 51a is formed by irradiation with carbon dioxide laser light, drilling, or the like. The through hole 51a is formed so as to expose a part of the conductor pattern included in the first outer layer conductor layer 4. In the example of FIG. 5C, a part of the via pad 43 of the via conductor 31 connecting the shield pattern 21 and the first outer layer conductor layer 4 is exposed in the through hole 51a. After the formation of the through hole 51a, a desmear treatment for removing the resin residue (smear) remaining in the through hole 51a is preferably performed.

As shown in FIG. 5D, the method for manufacturing a wiring board of the present embodiment further includes forming a metal film 6b1 on the metal foil 6a1 and in the through hole 51a. Note that FIG. 5D is an enlarged view of a portion corresponding to the VD portion of FIG. 5C in the state after the formation of the metal film 6b1. The metal film 6b1 is formed by, for example, electroless plating or sputtering, but the method for forming the metal film 6b1 is not limited to these methods. Although not shown in FIG. 5D, a metal film 6b1 may be formed on the metal foil 6a1 on the second outer layer insulating layer 5b.

As shown in FIG. 5E, the method of manufacturing a wiring board of the present embodiment further includes forming a strip line 40 composed of a shield film 6, a line pattern 41, and a shield pattern 21. .. As a method for forming the shield film 6, a pattern plating method using a plating resist R is exemplified. An opening R1 is provided in the region where the shield film 6 is formed in the plating resist R. During the formation of the shield film 6 by the pattern plating method, the second surface 10b side of the core layer 10 is covered with the plating resist R. The shield film 6 of the wiring board 1 specifically has a multilayer structure as shown in FIG. 5F, which is an enlarged view of the VF portion of FIG. 5E. The method of forming the shield film 6 will be further described with reference to FIG. 5F.

As shown in FIG. 5F, a plating resist R having an opening R1 in the forming region of the shield film 6 is formed on the metal film 6b1 by, for example, laminating, exposing and developing a resist film. The opening R1 is formed in a region including at least a region directly above the line pattern 41. Further, the opening R1 is formed in a size (width) such that the shield film 6 formed in the opening R1 can exert a sufficient shielding action on the line pattern 41.

Then, the plating film 6c1 covering the line pattern 41 is formed on the metal film 6b1 by electrolytic plating using the metal film 6b1 as the feeding layer and the seed layer. As a result, a shield film 6 including a part of each of the metal foil 6a1 and the metal film 6b1 and the plating film 6c1 and covering the line pattern 41 is formed. By forming the shield film 6, the strip line 40 composed of the shield film 6, the line pattern 41, and the shield pattern 21 is formed.

Forming the shield film 6 forms a via conductor 51 in the first outer layer insulating layer 5 so that the shield film 6 is electrically connected to the shield pattern 21, as shown in FIGS. 5E and 5F. Including that. The via conductor 51 penetrates the first outer layer insulating layer 5 and connects the shield film 6 and the first outer layer conductor layer 4. Specifically, the via conductor 51 connects the via pad 43 of the via conductor 31 and the shield film 6. The via conductor 51 is formed by filling the through holes 51a with a plating film when the plating film 6c1 is formed by electrolytic plating.

After forming the shield film 6, the plating resist R on both the first surface 10a side and the second surface 10b side of the core layer 10 is removed. Then, the portions of the metal skin cover 6b1 and the metal foil 6a1 that are not covered by the plating film 6c1 are removed by etching. As a result, the shield film in the final form including the metal foil layer (remaining portion of the metal foil 6a1), the metal skin covering layer (remaining part of the metal skin covering 6b1), and the plating film layer (plating film 6c1) described above, respectively. 6 is obtained. The second outer layer insulating layer 5b is exposed on the second surface 10b side of the core layer 10.

As shown in FIG. 5G, the method of manufacturing a wiring board of the present embodiment further includes forming an opening 52 that penetrates the first outer layer insulating layer 5 and exposes the connection pad 42. In the example of FIG. 5G, the second outer layer insulating layer 5b is formed with an opening 5b2 that penetrates the second outer layer insulating layer 5b and exposes the terminal pad 4b2. The opening 52 and the opening 5b2 are formed, for example, by irradiation with a carbon dioxide laser beam or drilling. The opening 52 and the opening 5b2 are formed after the formation of the metal film 6b1. Therefore, the upper surface of the connection pad 42 that has not been covered with the metal film 6b1 is exposed in the opening 52, and the upper surface of the terminal pad 4b2 that has not been covered by the metal film 6b1 is inside the opening 5b2. Is exposed.

After forming the openings 52 and 5b2, a surface protective film that covers at least the shield film 6 may be formed. The surface protective film may be formed not only on the shield film 6, but also on the exposed surfaces of the first and second outer layer insulating layers 5, 5b and the first and second outer layer conductor layers 4, 4b, respectively. .. The surface protective film is formed, for example, by immersing the wiring board 1 after forming the openings 52 and 5b2 in a solution of a water-soluble preflux, preferably a heat-resistant water-soluble preflux.

As shown in FIG. 5H, the method of manufacturing a wiring board of this embodiment may further include forming a conductive bump 42a on the connection pad 42. Similarly, a conductive bump 4ba may be formed on the terminal pad 4b2. The bumps 42a and 4ba are formed, for example, by arranging solder balls on the connection pad 42 and the terminal pad 4b2 and heating and melting them. By going through the above steps, the wiring board 1 of FIG. 1 is completed.

In the steps described with reference to FIGS. 5E to 5G, the opening 52 may be formed before the shield film 6 is formed.

The wiring board of the embodiment is not limited to the structure exemplified in each drawing and the structure, shape, and material exemplified in this specification. For example, the strip line 40 may be provided at an arbitrary position on the wiring board 1 in a plan view. The shield film 6 and the shield pattern 21 do not necessarily have to be connected in the vicinity of the line pattern 41. The wiring board 1 may be a so-called coreless substrate in which a conductor layer and an insulating layer are laminated in one direction without having a core layer. Further, the via conductors 31, 31b, 51 and the through-hole conductor 10c do not necessarily have to be formed.

The method for manufacturing the wiring board of the embodiment is not limited to the method described with reference to each drawing. For example, the first and second outer conductor layers 4, 4b may be patterned by the subtractive method. Further, the metal foil 6a1 may be provided only on the first outer layer insulating layer 5 side, and the metal film 6b1 may also be formed only on the first outer layer insulating layer 5 side. In addition to each of the above-mentioned steps, any step may be added to the method for manufacturing the wiring board of the embodiment, or a part of the above-mentioned steps may be omitted.

1, 1a Wiring board 10 Core layer 10a First surface 10b Second surface 2 First inner layer Conductor layer 2b Second inner layer Conductor layer 21 Shield pattern (predetermined conductor pattern)
3 First interlayer insulating layer 31, 31b Via conductor 4 First outer layer conductor layer 40 Strip line 41 Line pattern 42 Connection pad 42a Bump 5 First outer layer insulating layer 51 Via conductor 52 Opening 5b Second outer layer insulating layer 4b2 Terminal pad 4ba Bump 6 Shield film 6a Metal foil layer 6b1 Metal film 6c Plating film layer 6c1 Plating film 7bb Solder resist layer

Claims (12)

The inner conductor layer including the shield pattern and
An interlayer insulating layer laminated on the inner conductor layer and
An outer conductor layer formed on the interlayer insulating layer and including a connection pad for an external member,
A first outer layer insulating layer formed on the outer layer conductor layer that exposes the connection pad at least partially.
It is a wiring board equipped with
The outer conductor layer further includes a line pattern having a predetermined line width.
On the first outer layer insulating layer, a shield film that covers at least the line pattern and constitutes a strip line together with the shield pattern and the line pattern is provided.
The shield film has a metal foil layer and a plating film layer. The wiring board according to claim 1, wherein the first outer layer insulating layer is formed by using a thermosetting resin. The wiring board according to claim 1, wherein the first outer layer insulating layer is formed by using the same material as the interlayer insulating layer. The wiring board according to claim 1.
The interlayer insulating layer includes a via conductor penetrating the interlayer insulating layer.
The first outer layer insulating layer includes a via conductor penetrating the first outer layer insulating layer, and the shield film is via the via conductor penetrating the first outer layer insulating layer and the via conductor penetrating the interlayer insulating layer. It is electrically connected to the shield pattern. The wiring board according to claim 1, further comprising a conductive bump formed on the connection pad. The wiring board according to claim 1, further comprising a surface protective film that covers the shield film. In the wiring board according to claim 1, the conductor on the first outer layer insulating layer is only the shield film. The wiring board according to claim 1.
The wiring board further includes a second outer layer insulating layer forming a surface opposite to the surface on the first outer layer insulating layer side, and a terminal pad exposed to an opening of the second outer layer insulating layer. The wiring board according to claim 1, further, a solder resist layer is formed on a surface opposite to the surface on the first outer layer insulating layer side. Forming a conductor layer containing a predetermined conductor pattern on the insulating layer,
Forming an interlayer insulating layer on the conductor layer and
Forming a conductor layer including a line pattern having a predetermined line width and a connection pad for an external member on the interlayer insulating layer.
To form an outer layer insulating layer on the conductor layer including the line pattern,
By laminating a metal foil on the outer layer insulating layer,
To form through holes in the outer layer insulating layer and the metal foil to reach the conductor layer including the line pattern.
Forming a metal film on the metal foil and in the through hole,
By forming a plating film covering the line pattern on the metal film, a strip line composed of the metal foil, a shield film containing the plating film, the line pattern, and the predetermined conductor pattern can be formed. To form and
To form an opening that penetrates the outer layer insulating layer and exposes the connection pad.
A method of manufacturing a wiring board that includes. The method for manufacturing a wiring board according to claim 10, wherein the plating film is formed before the opening is formed. The method for manufacturing a wiring board according to claim 10, wherein the plating film is formed by connecting the plating film and the line pattern so that the plating film is electrically connected to the predetermined conductor pattern. It includes forming a via conductor connecting the conductor layer including the via conductor in the through hole.

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