JP2020502606A5 - - Google Patents

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Publication number
JP2020502606A5
JP2020502606A5 JP2019513815A JP2019513815A JP2020502606A5 JP 2020502606 A5 JP2020502606 A5 JP 2020502606A5 JP 2019513815 A JP2019513815 A JP 2019513815A JP 2019513815 A JP2019513815 A JP 2019513815A JP 2020502606 A5 JP2020502606 A5 JP 2020502606A5
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JP
Japan
Prior art keywords
data
storage
command
memory element
storage operation
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Pending
Application number
JP2019513815A
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English (en)
Japanese (ja)
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JP2020502606A (ja
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Publication date
Priority claimed from US15/410,746 external-priority patent/US10552045B2/en
Application filed filed Critical
Publication of JP2020502606A publication Critical patent/JP2020502606A/ja
Publication of JP2020502606A5 publication Critical patent/JP2020502606A5/ja
Pending legal-status Critical Current

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JP2019513815A 2016-11-16 2017-08-31 記憶動作待ち行列 Pending JP2020502606A (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201662423129P 2016-11-16 2016-11-16
US62/423,129 2016-11-16
US15/410,746 US10552045B2 (en) 2016-11-16 2017-01-19 Storage operation queue
US15/410,746 2017-01-19
PCT/US2017/049742 WO2018093442A1 (en) 2016-11-16 2017-08-31 Storage operation queue

Publications (2)

Publication Number Publication Date
JP2020502606A JP2020502606A (ja) 2020-01-23
JP2020502606A5 true JP2020502606A5 (https=) 2020-03-05

Family

ID=62107112

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2019513815A Pending JP2020502606A (ja) 2016-11-16 2017-08-31 記憶動作待ち行列

Country Status (5)

Country Link
US (1) US10552045B2 (https=)
JP (1) JP2020502606A (https=)
CN (1) CN110088738A (https=)
DE (1) DE112017005782T5 (https=)
WO (1) WO2018093442A1 (https=)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019045910A (ja) * 2017-08-29 2019-03-22 東芝メモリ株式会社 半導体記憶装置
US10908986B2 (en) * 2018-04-02 2021-02-02 Sandisk Technologies Llc Multi-level recovery reads for memory
US10826990B2 (en) * 2018-07-23 2020-11-03 EMC IP Holding Company LLC Clustered storage system configured for bandwidth efficient processing of writes at sizes below a native page size
TWI660346B (zh) * 2018-09-07 2019-05-21 大陸商深圳大心電子科技有限公司 記憶體管理方法以及儲存控制器
CN109579220B (zh) * 2018-10-15 2022-04-12 平安科技（深圳）有限公司 空调系统故障检测方法、装置、电子设备
US11366760B2 (en) * 2020-03-12 2022-06-21 Micron Technology, Inc. Memory access collision management on a shared wordline
US11294598B2 (en) * 2020-04-24 2022-04-05 Western Digital Technologies, Inc. Storage devices having minimum write sizes of data
JP2022010951A (ja) * 2020-06-29 2022-01-17 キオクシア株式会社 半導体記憶装置
CN113918216B (zh) * 2020-07-10 2025-09-30 富泰华工业（深圳）有限公司 数据读/写处理方法、装置及计算机可读存储介质
KR20220135786A (ko) * 2021-03-31 2022-10-07 에스케이하이닉스 주식회사 메모리 시스템에 포함된 복수의 메모리 장치에서 수행되는 동작에 대해 스케줄링하는 장치 및 방법
US12517925B2 (en) * 2021-10-01 2026-01-06 Kinaxis Inc. Asynchronous transaction conflict resolution
US11853174B1 (en) * 2022-07-12 2023-12-26 Dell Products L.P. Multiple drive failure data recovery
WO2024030707A1 (en) * 2022-08-01 2024-02-08 Qualcomm Incorporated Using retired pages history for instruction translation lookaside buffer (tlb) prefetching in processor-based devices
US12579075B2 (en) * 2022-08-01 2026-03-17 Qualcomm Incorporated Using retired pages history for instruction translation lookaside buffer (TLB) prefetching in processor-based devices

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2246001B (en) 1990-04-11 1994-06-15 Digital Equipment Corp Array architecture for high speed cache memory
US6286075B1 (en) * 1998-11-16 2001-09-04 Infineon Technologies Ag Method of speeding up access to a memory page using a number of M page tag registers to track a state of physical pages in a memory device having N memory banks where N is greater than M
US6976122B1 (en) * 2002-06-21 2005-12-13 Advanced Micro Devices, Inc. Dynamic idle counter threshold value for use in memory paging policy
US7120075B1 (en) 2003-08-18 2006-10-10 Integrated Device Technology, Inc. Multi-FIFO integrated circuit devices that support multi-queue operating modes with enhanced write path and read path queue switching
US8112574B2 (en) 2004-02-26 2012-02-07 Super Talent Electronics, Inc. Swappable sets of partial-mapping tables in a flash-memory system with a command queue for combining flash writes
US20050253858A1 (en) * 2004-05-14 2005-11-17 Takahide Ohkami Memory control system and method in which prefetch buffers are assigned uniquely to multiple burst streams
US8046527B2 (en) 2007-02-22 2011-10-25 Mosaid Technologies Incorporated Apparatus and method for using a page buffer of a memory device as a temporary cache
WO2008115720A1 (en) 2007-03-21 2008-09-25 Sandisk Corporation Methods for storing memory operations in a queue
US7920423B1 (en) 2007-07-31 2011-04-05 Synopsys, Inc. Non volatile memory circuit with tailored reliability
US20090113116A1 (en) * 2007-10-30 2009-04-30 Thompson E Earle Digital content kiosk and methods for use therewith
WO2010077414A1 (en) * 2008-12-09 2010-07-08 Rambus Inc. Non-volatile memory device for concurrent and pipelined memory operations
US8473669B2 (en) 2009-12-07 2013-06-25 Sandisk Technologies Inc. Method and system for concurrent background and foreground operations in a non-volatile memory array
US8942248B1 (en) 2010-04-19 2015-01-27 Altera Corporation Shared control logic for multiple queues
US9047178B2 (en) * 2010-12-13 2015-06-02 SanDisk Technologies, Inc. Auto-commit memory synchronization
US8462561B2 (en) 2011-08-03 2013-06-11 Hamilton Sundstrand Corporation System and method for interfacing burst mode devices and page mode devices
KR20130114486A (ko) 2012-04-09 2013-10-17 삼성전자주식회사 씨에이유 별 병렬 큐를 가진 비휘발성 메모리 장치, 이를 포함하는 시스템, 및 비휘발성 메모리 장치의 동작 방법
JP2014026388A (ja) * 2012-07-25 2014-02-06 Toshiba Corp 記憶装置、コントローラ、および書き込み制御方法
KR102254099B1 (ko) 2014-05-19 2021-05-20 삼성전자주식회사 메모리 스와핑 처리 방법과 이를 적용하는 호스트 장치, 스토리지 장치 및 데이터 처리 시스템
US8874836B1 (en) 2014-07-03 2014-10-28 Pure Storage, Inc. Scheduling policy for queues in a non-volatile solid-state storage
US20170123991A1 (en) * 2015-10-28 2017-05-04 Sandisk Technologies Inc. System and method for utilization of a data buffer in a storage device
US10467157B2 (en) * 2015-12-16 2019-11-05 Rambus Inc. Deterministic operation of storage class memory

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