JP2020502606A - 記憶動作待ち行列 - Google Patents
記憶動作待ち行列 Download PDFInfo
- Publication number
- JP2020502606A JP2020502606A JP2019513815A JP2019513815A JP2020502606A JP 2020502606 A JP2020502606 A JP 2020502606A JP 2019513815 A JP2019513815 A JP 2019513815A JP 2019513815 A JP2019513815 A JP 2019513815A JP 2020502606 A JP2020502606 A JP 2020502606A
- Authority
- JP
- Japan
- Prior art keywords
- data
- storage
- pointer
- memory
- command
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
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Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/061—Improving I/O performance
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operations
- G06F11/1402—Saving, restoring, recovering or retrying
- G06F11/1405—Saving, restoring, recovering or retrying at machine instruction level
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
- G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
- G06F12/0808—Multiuser, multiprocessor or multiprocessing cache systems with cache invalidating means
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0659—Command handling arrangements, e.g. command buffers, queues, command scheduling
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0683—Plurality of storage devices
- G06F3/0688—Non-volatile semiconductor memory arrays
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/72—Details relating to flash memory management
- G06F2212/7205—Cleaning, compaction, garbage collection, erase control
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Human Computer Interaction (AREA)
- Quality & Reliability (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Memory System (AREA)
- Read Only Memory (AREA)
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201662423129P | 2016-11-16 | 2016-11-16 | |
| US62/423,129 | 2016-11-16 | ||
| US15/410,746 US10552045B2 (en) | 2016-11-16 | 2017-01-19 | Storage operation queue |
| US15/410,746 | 2017-01-19 | ||
| PCT/US2017/049742 WO2018093442A1 (en) | 2016-11-16 | 2017-08-31 | Storage operation queue |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2020502606A true JP2020502606A (ja) | 2020-01-23 |
| JP2020502606A5 JP2020502606A5 (https=) | 2020-03-05 |
Family
ID=62107112
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2019513815A Pending JP2020502606A (ja) | 2016-11-16 | 2017-08-31 | 記憶動作待ち行列 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US10552045B2 (https=) |
| JP (1) | JP2020502606A (https=) |
| CN (1) | CN110088738A (https=) |
| DE (1) | DE112017005782T5 (https=) |
| WO (1) | WO2018093442A1 (https=) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11853174B1 (en) * | 2022-07-12 | 2023-12-26 | Dell Products L.P. | Multiple drive failure data recovery |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2019045910A (ja) * | 2017-08-29 | 2019-03-22 | 東芝メモリ株式会社 | 半導体記憶装置 |
| US10908986B2 (en) * | 2018-04-02 | 2021-02-02 | Sandisk Technologies Llc | Multi-level recovery reads for memory |
| US10826990B2 (en) * | 2018-07-23 | 2020-11-03 | EMC IP Holding Company LLC | Clustered storage system configured for bandwidth efficient processing of writes at sizes below a native page size |
| TWI660346B (zh) * | 2018-09-07 | 2019-05-21 | 大陸商深圳大心電子科技有限公司 | 記憶體管理方法以及儲存控制器 |
| CN109579220B (zh) * | 2018-10-15 | 2022-04-12 | 平安科技(深圳)有限公司 | 空调系统故障检测方法、装置、电子设备 |
| US11366760B2 (en) * | 2020-03-12 | 2022-06-21 | Micron Technology, Inc. | Memory access collision management on a shared wordline |
| US11294598B2 (en) * | 2020-04-24 | 2022-04-05 | Western Digital Technologies, Inc. | Storage devices having minimum write sizes of data |
| JP2022010951A (ja) * | 2020-06-29 | 2022-01-17 | キオクシア株式会社 | 半導体記憶装置 |
| CN113918216B (zh) * | 2020-07-10 | 2025-09-30 | 富泰华工业(深圳)有限公司 | 数据读/写处理方法、装置及计算机可读存储介质 |
| KR20220135786A (ko) * | 2021-03-31 | 2022-10-07 | 에스케이하이닉스 주식회사 | 메모리 시스템에 포함된 복수의 메모리 장치에서 수행되는 동작에 대해 스케줄링하는 장치 및 방법 |
| US12517925B2 (en) * | 2021-10-01 | 2026-01-06 | Kinaxis Inc. | Asynchronous transaction conflict resolution |
| WO2024030707A1 (en) * | 2022-08-01 | 2024-02-08 | Qualcomm Incorporated | Using retired pages history for instruction translation lookaside buffer (tlb) prefetching in processor-based devices |
| US12579075B2 (en) * | 2022-08-01 | 2026-03-17 | Qualcomm Incorporated | Using retired pages history for instruction translation lookaside buffer (TLB) prefetching in processor-based devices |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090113116A1 (en) * | 2007-10-30 | 2009-04-30 | Thompson E Earle | Digital content kiosk and methods for use therewith |
| US20090113121A1 (en) * | 2004-02-26 | 2009-04-30 | Super Talent Electronics Inc. | Swappable Sets of Partial-Mapping Tables in a Flash-Memory System With A Command Queue for Combining Flash Writes |
| WO2010077414A1 (en) * | 2008-12-09 | 2010-07-08 | Rambus Inc. | Non-volatile memory device for concurrent and pipelined memory operations |
| JP2014026388A (ja) * | 2012-07-25 | 2014-02-06 | Toshiba Corp | 記憶装置、コントローラ、および書き込み制御方法 |
Family Cites Families (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2246001B (en) | 1990-04-11 | 1994-06-15 | Digital Equipment Corp | Array architecture for high speed cache memory |
| US6286075B1 (en) * | 1998-11-16 | 2001-09-04 | Infineon Technologies Ag | Method of speeding up access to a memory page using a number of M page tag registers to track a state of physical pages in a memory device having N memory banks where N is greater than M |
| US6976122B1 (en) * | 2002-06-21 | 2005-12-13 | Advanced Micro Devices, Inc. | Dynamic idle counter threshold value for use in memory paging policy |
| US7120075B1 (en) | 2003-08-18 | 2006-10-10 | Integrated Device Technology, Inc. | Multi-FIFO integrated circuit devices that support multi-queue operating modes with enhanced write path and read path queue switching |
| US20050253858A1 (en) * | 2004-05-14 | 2005-11-17 | Takahide Ohkami | Memory control system and method in which prefetch buffers are assigned uniquely to multiple burst streams |
| US8046527B2 (en) | 2007-02-22 | 2011-10-25 | Mosaid Technologies Incorporated | Apparatus and method for using a page buffer of a memory device as a temporary cache |
| WO2008115720A1 (en) | 2007-03-21 | 2008-09-25 | Sandisk Corporation | Methods for storing memory operations in a queue |
| US7920423B1 (en) | 2007-07-31 | 2011-04-05 | Synopsys, Inc. | Non volatile memory circuit with tailored reliability |
| US8473669B2 (en) | 2009-12-07 | 2013-06-25 | Sandisk Technologies Inc. | Method and system for concurrent background and foreground operations in a non-volatile memory array |
| US8942248B1 (en) | 2010-04-19 | 2015-01-27 | Altera Corporation | Shared control logic for multiple queues |
| US9047178B2 (en) * | 2010-12-13 | 2015-06-02 | SanDisk Technologies, Inc. | Auto-commit memory synchronization |
| US8462561B2 (en) | 2011-08-03 | 2013-06-11 | Hamilton Sundstrand Corporation | System and method for interfacing burst mode devices and page mode devices |
| KR20130114486A (ko) | 2012-04-09 | 2013-10-17 | 삼성전자주식회사 | 씨에이유 별 병렬 큐를 가진 비휘발성 메모리 장치, 이를 포함하는 시스템, 및 비휘발성 메모리 장치의 동작 방법 |
| KR102254099B1 (ko) | 2014-05-19 | 2021-05-20 | 삼성전자주식회사 | 메모리 스와핑 처리 방법과 이를 적용하는 호스트 장치, 스토리지 장치 및 데이터 처리 시스템 |
| US8874836B1 (en) | 2014-07-03 | 2014-10-28 | Pure Storage, Inc. | Scheduling policy for queues in a non-volatile solid-state storage |
| US20170123991A1 (en) * | 2015-10-28 | 2017-05-04 | Sandisk Technologies Inc. | System and method for utilization of a data buffer in a storage device |
| US10467157B2 (en) * | 2015-12-16 | 2019-11-05 | Rambus Inc. | Deterministic operation of storage class memory |
-
2017
- 2017-01-19 US US15/410,746 patent/US10552045B2/en not_active Expired - Fee Related
- 2017-08-31 WO PCT/US2017/049742 patent/WO2018093442A1/en not_active Ceased
- 2017-08-31 CN CN201780056817.2A patent/CN110088738A/zh active Pending
- 2017-08-31 JP JP2019513815A patent/JP2020502606A/ja active Pending
- 2017-08-31 DE DE112017005782.5T patent/DE112017005782T5/de not_active Withdrawn
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090113121A1 (en) * | 2004-02-26 | 2009-04-30 | Super Talent Electronics Inc. | Swappable Sets of Partial-Mapping Tables in a Flash-Memory System With A Command Queue for Combining Flash Writes |
| US20090113116A1 (en) * | 2007-10-30 | 2009-04-30 | Thompson E Earle | Digital content kiosk and methods for use therewith |
| WO2010077414A1 (en) * | 2008-12-09 | 2010-07-08 | Rambus Inc. | Non-volatile memory device for concurrent and pipelined memory operations |
| US20110208905A1 (en) * | 2008-12-09 | 2011-08-25 | Rambus Inc. | Non-Volatile Memory Device For Concurrent And Pipelined Memory Operations |
| JP2012511789A (ja) * | 2008-12-09 | 2012-05-24 | ラムバス・インコーポレーテッド | 並行且つパイプライン化されたメモリ動作用の不揮発性メモリデバイス |
| JP2014026388A (ja) * | 2012-07-25 | 2014-02-06 | Toshiba Corp | 記憶装置、コントローラ、および書き込み制御方法 |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11853174B1 (en) * | 2022-07-12 | 2023-12-26 | Dell Products L.P. | Multiple drive failure data recovery |
| US20240020208A1 (en) * | 2022-07-12 | 2024-01-18 | Dell Products L.P. | Multiple drive failure data recovery |
Also Published As
| Publication number | Publication date |
|---|---|
| US10552045B2 (en) | 2020-02-04 |
| CN110088738A (zh) | 2019-08-02 |
| WO2018093442A9 (en) | 2019-06-20 |
| US20180136840A1 (en) | 2018-05-17 |
| DE112017005782T5 (de) | 2019-10-24 |
| WO2018093442A1 (en) | 2018-05-24 |
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Legal Events
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| A521 | Request for written amendment filed |
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