JP2020202726A - Electronic apparatus and control method - Google Patents

Abstract

To reduce conduction loss generated when a plurality of switching elements having different characteristics connected in parallel are driven.SOLUTION: An electronic apparatus (10) includes a first switch, a second switch that is connected in parallel with the first switch and has characteristics different from those of the first switch, driving means that drives the first switch and the second switch, and control means that sets a penetration current prevention period according to the characteristics of the first switch in first control, and sets a penetration current prevention period according to the characteristics of the second switch in second control.SELECTED DRAWING: Figure 4

Description

The present invention relates to an electronic device having a power supply circuit, a control method thereof, and the like.

Patent Document 1 describes that in a configuration in which a plurality of switching elements are connected in parallel, the number of switching elements to be driven is changed according to the magnitude of the load current. Patent Document 2 describes a configuration in which a plurality of DC / DC converters are connected in parallel.

Japanese Unexamined Patent Publication No. 2003-319645 Japanese Unexamined Patent Publication No. 2015-128345

However, in Patent Document 1, since it is premised that a plurality of switching elements having the same characteristics are switched and driven, it is possible to reduce the conduction loss due to the parasitic diode even if the plurality of switching elements having different parasitic capacitances are configured. Can not. Such a problem cannot be solved by the configuration described in Patent Document 2.

Therefore, an object of the present invention is to reduce the conduction loss that occurs when driving a plurality of switching elements connected in parallel and having different characteristics.

The electronic device according to the present invention includes a first switch, a second switch that is connected in parallel to the first switch and has characteristics different from those of the first switch, the first switch, and the second switch. In the driving means for driving the switch and in the first control, the penetration current prevention period is set according to the characteristics of the first switch, and in the second control, it corresponds to the characteristics of the second switch. It has a control means for setting the through current prevention period.

The control method according to the present invention is a control method for an electronic device, wherein the electronic device is connected in parallel to a first switch and the first switch, and has characteristics different from those of the first switch. The switch and the driving means for driving the first switch and the second switch are provided, and the control method is to prevent a through current according to the characteristics of the first switch in the first control. The second control includes a step of setting the period and a step of setting the through current prevention period according to the characteristics of the second switch.

According to the present invention, it is possible to reduce the conduction loss generated when driving a plurality of switching elements having different characteristics connected in parallel.

It is a block diagram for demonstrating the component of the electronic device 10 in Embodiment 1. FIG. It is a block diagram for demonstrating the component | component of the DC / DC converter 100 in Embodiment 1. FIG. It is a figure for demonstrating the example of the voltage / current waveform of the DC / DC converter 100 in Embodiment 1. FIG. It is a block diagram for demonstrating the component of the switch circuit 102, 104 in Embodiment 1. FIG. It is a figure for demonstrating the operation example of the switch circuits 102, 104 which are driven by a multi-phase drive. It is a timing chart for demonstrating the operation example of the switch circuits 102, 104 in Embodiment 1.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, the present invention is not limited to the following embodiments.

[Embodiment 1]
First, the components of the electronic device 10 according to the first embodiment will be described with reference to FIG. However, the components of the electronic device 10 in the first embodiment are not limited to the components shown in FIG. The electronic device 10 can operate as any or at least one of an image pickup device (eg, a digital camera), a mobile phone (eg, a smartphone), and a mobile terminal (eg, a tablet terminal).

The battery 27 is a power source for the DC / DC converter 100 and a power source for the electronic device 10.

The DC / DC converter 100 is a power supply circuit that converts the output voltage of the battery 27 into a predetermined voltage and supplies it to each component of the electronic device 10.

The control unit 11 has a CPU (Central Processing Unit) or an MPU (Micro Processing Unit), and controls all the components of the electronic device 10.

The operation unit 12 has switches for inputting seed operations related to photography, such as a power button, a recording start button, a zoom adjustment button, and an autofocus button. In addition, the operation unit 12 includes a menu display button, a decision button, other cursor keys, a pointing device, a touch panel, and the like. The operation unit 12 transmits an operation signal to the control unit 11 when operated by the user.

The bus 13 is a general-purpose bus for transmitting various data, control signals, instruction signals, and the like to each component of the electronic device 10.

The memory 14 has a RAM (Random Access Memory) and the like. The memory 14 is used as a buffer memory for temporarily storing image data (still image data or moving image data) generated by the imaging unit 15.

The control unit 11 executes various processes (programs) in response to an operation signal from the operation unit 12 that receives an operation from the user to control each component of the electronic device 10 or transfer data between the components. To control. The control unit 11 may be a microcomputer in which the CPU and the memory are configured as a hardware processor.

The image pickup unit 15 has an image sensor composed of a CCD (Charge-Coupled Device) or a CMOS (Complementary metal-xide MOSFET). The imaging unit 15 generates image data from an optical image of a subject imaged on an image sensor via a lens unit 25. The image data (still image data or moving image data) generated by the imaging unit 15 is temporarily stored in the memory 14.

The image processing unit 16 processes the image data (still image data or moving image data) generated by the imaging unit 15 by executing a predetermined image processing. The predetermined image processing is based on, for example, a set value set by the user or a set value determined from the characteristics of the image, such as white balance, color, and brightness of still image data or moving image data generated by the imaging unit 15. Includes image quality adjustment processing to adjust. After the predetermined image processing is executed, the image processing unit 16 supplies the moving image data or the still image data to the display control unit 20 and the recording / reproducing unit 21.

The voice input unit 17 generates voice data from sound (including voice) collected by, for example, an omnidirectional microphone built in the electronic device 10 or an external microphone connected to a voice input terminal. The voice data generated by the voice input unit 17 is temporarily stored in the memory 14.

The voice processing unit 18 processes the voice data generated by the voice input unit 17 by executing a predetermined voice processing. After the predetermined voice processing is executed, the voice processing unit 18 supplies the voice data to the recording / playback unit 21 and the speaker unit. The speaker unit outputs the voice data supplied from the voice processing unit 18 to the outside.

The display control unit 20 causes the display unit 19 to display the image data (still image data or moving image data) supplied from the image processing unit 16. The display unit 19 may be, for example, a liquid crystal display panel or an organic EL display panel, or may be a display device connected to the electronic device 10.

The recording / reproducing unit 21 records the still image data or the moving image data supplied from the image processing unit 16 and the audio data from the audio processing unit 18 on the recording medium 22. Here, the recording medium 22 may be a recording medium built in the electronic device 10 or a recording medium removable from the electronic device 10. The recording medium 22 may be, for example, any of a hard disk, an optical disk, a magneto-optical disk, a CD-R, a DVD-R, a magnetic tape, a non-volatile semiconductor memory, and a flash memory.

The recording / playback unit 21 can reproduce at least one of the still image data, the moving image data, and the audio data recorded on the recording medium 22 from the recording medium 22. The still image data or moving image data reproduced from the recording medium 22 is supplied to the display control unit 20. The audio data reproduced from the recording medium 22 is supplied to the speaker unit. The display control unit 20 causes the display unit 19 to display the still image data or the moving image data supplied from the recording / playback unit 21. The speaker unit outputs the voice data supplied from the voice processing unit 18 to the outside.

The output unit 23 is an audio output terminal or an image output terminal that outputs image data or audio data as an analog signal to an external device.

The communication unit 24 is a communication unit that communicates with an external device by wired communication or wireless communication.

The lens unit 25 includes a lens that captures an optical image of the subject into the electronic device 10, an aperture mechanism that controls the amount of light, a focus mechanism that focuses the subject image, and a shutter mechanism that controls the exposure time to the image sensor. ..

The mechanism control unit 26 controls the aperture mechanism, the focus mechanism, and the shutter mechanism of the lens unit 25 based on the control signal from the control unit 11.

Next, the configuration and operation of the DC / DC converter 100 of the first embodiment will be described with reference to FIGS. 2 and 3.

FIG. 2 shows a component of one power supply unit of the DC / DC converter 100 according to the first embodiment.

The DC / DC converter 100 that supplies electric power to the electronic device 10 constitutes a synchronous rectification type step-down electric circuit. The feedback mechanism for maintaining the voltage is realized by pulse control according to the voltage loop signal. The voltage loop signal is obtained by dividing the output voltage by the output setting resistor 130 and amplifying it by comparison with the reference voltage 122 by the error amplifier 123. A voltage loop signal and a signal of OSC131, which is a reference clock for pulse duty control, are connected to the drive control unit 112. The drive signal from the drive control unit 112 controls the high-side switch circuit 102 and the low-side switch circuit 104 to be on or off. The switch circuit 102 has one or more switching elements. Each of the switching elements of the switch circuit 102 may be composed of, for example, a P-type MOSFET. The switch circuit 104 has one or more switching elements. Each of the switching elements of the switch circuit 104 is composed of, for example, an N-type MOSFET. The drive control unit 112 independently turns one or more switching elements in the switch circuit 102 and one or more switching elements in the switch circuit 104 into an on or off state.

The current flowing through the inductor 108 is controlled by turning on or off the switch circuit 102 and the switch circuit 104, and a constant output voltage is obtained by smoothing with the capacitor 110.

The inductor 108 is a power inductor for accumulating exciting energy from the battery 27 and rectifying the voltage stepped down by the switch circuit 102 when the switch circuit 102 is in the on state and the switch circuit 104 is in the off state. The capacitor 110 smoothes the voltage and current pulsating currents of the inductor 108.

When the output voltage of the switch circuit 102 and the switch circuit 104 is low due to load fluctuation or the like, the output of the error amplifier 123 increases and the on-duty of the switch circuit 102 increases, so that the output voltage is controlled to increase. To. On the contrary, when the output voltage is high, the output of the error amplifier 123 is lowered and the on-duty of the switch circuit 102 is reduced, so that the output voltage is controlled to be lowered.

FIG. 3 shows an example of the voltage / current waveform of the DC / DC converter 100 in the first embodiment. FIG. 3A shows the reference clock (OSC) 131 of the DC / DC converter 100. Each component of the DC / DC converter 100 operates in synchronization with the signal of the OSC 131. FIG. 3B shows a load current drawn from the DC / DC converter 100, and is a sine wave having a frequency of fL for simplification of description. FIG. 3C shows the output voltage from the DC / DC converter 100. The output voltage is ideally a constant value, but in reality, as shown in FIG. 3 (c), a component that cannot follow the load fluctuation of FIG. 3 (b) and fluctuates, and a ripple voltage component synchronized with the switching operation. Exists. FIG. 3D shows the result of the error amplifier 123 amplifying the difference between the divided output voltage of FIG. 3C and the reference value. FIG. 3 (e) is a waveform showing an on state or an off state of the switch circuit 102, and FIG. 3 (f) is a waveform showing an on state or an off state of the switch circuit 104. For convenience, the on state is shown in High and the off state is shown in Low. There is. The one-cycle cycle including the on-state and the off-state is always equal to the cycle of the OSC131. A dead time, which is a through current prevention period, is added to FIG. 3 (f). FIG. 3 (g) shows the current flowing through the inductor 108. When the switch circuit 102 is turned on, energy is stored in the inductor 108 by flowing the load current Io through the inductor 108 in the path from the battery 27 to the inductor 108 via the switch circuit 102. When the switch circuit 102 is on and the switch circuit 104 is off, the current slope dI / dt_on is expressed by the following equation 1.
(Equation 1)
dI / dt_on = (Vin-Vo) / L
Vin: Voltage of battery 27 Vo: Output voltage L: Inductance value of inductor 108 Since Vin, Vo, and L are almost constant under normal conditions, dI / dt_on is a fixed value, and the current flowing through the inductor 108 is linear. Increases to. When the switch circuit 102 is in the on state, the switch circuit 104 is in the off state so that the battery 27 does not short-circuit to the ground portion (GND). After that, when the output of the error amplifier 123 rises and the switch circuit 102 is turned off, the switch circuit 104 is turned on, and the energy stored in the inductor 108 is connected from the GND to the inductor 108 via the switch circuit 104. It is released. When the switch circuit 102 is in the off state and the switch circuit 104 is in the on state, the current slope dI / dt_off is expressed by the following equation 2.
(Equation 2)
dI / dt_off = -Vo / L
Since Vo and L are substantially constant under normal conditions, dI / dt_off becomes a fixed value, and the current flowing through the inductor 108 decreases linearly. In the cycle in which the switch circuit 102 and the switch circuit 104 are alternately turned on or off, the current flowing through the inductor 108 becomes a triangular wave-shaped current, and the average current thereof becomes equal to the load current shown in FIG. 3 (b).

Next, the configuration and operation of the switch circuits 102 and 104 will be described with reference to FIG. FIG. 4 shows the components of the switch circuits 102 and 104 according to the first embodiment.

The drive control unit 112 includes a gate driver 402, a gate driver 404, and a PWM controller 406. The PWM controller 406 is a controller for controlling the switch circuits 102 and 104 by pulse width modulation. The gate driver 402 is a gate drive buffer circuit for turning on or off the switch circuit 102 and the switch circuit 104. The gate driver 402 includes a through current prevention circuit for preventing a through current from flowing through the switch circuit 102 and the switch circuit 104. The gate driver 404 is a gate drive buffer circuit for turning on or off the switch circuit 102 and the switch circuit 104. The gate driver 404 includes a through current prevention circuit for preventing a through current from flowing through the switch circuit 102 and the switch circuit 104.

The switch circuit 102 has switching elements SW102A and SW102B connected in parallel. The switch circuit 104 has switching elements SW104A and SW104B connected in parallel.

The SW102A is between the power supply Vin and the SW104A, and the source electrode is connected to the power supply Vin and the drain electrode is connected to the switch node portion Vsw to which the inductor 108 is connected. The SW102B is connected between the power supply Vin and the SW104B, the source electrode is connected to the power supply Vin, and the drain electrode is connected to the switch node portion Vsw to which the inductor 108 is connected. The SW104A is connected between the SW102A and the grounding portion GND, the source electrode is connected to the grounding portion GND, and the drain electrode is connected to the switch node portion Vsw. The SW104B is connected between the SW102B and the grounded portion GND, the source electrode is connected to the grounded portion GND, and the drain electrode is connected to the switch node portion Vsw to which the inductor 108 is connected.

SW102A of the switch circuit 102 is a switching element that switches to an on state or an off state by the drive signal VG1 from the gate driver 402. SW102B of the switch circuit 102 is a switching element that switches to an on state or an off state by the drive signal VG2 from the gate driver 404. SW104A of the switch circuit 104 is a switching element that switches to an on state or an off state by the drive signal VG3 from the gate driver 402. SW104B of the switch circuit 104 is a switching element that switches to an on state or an off state by the drive signal VG4 from the gate driver 404. In this way, the SW102A and SW102B of the switch circuit 102 are switched on or off according to the load of the electronic device 10 by the drive signals VG1 and VG2 from the gate drivers 402 and 404. The SW104A and SW104B of the switch circuit 104 are switched on or off depending on the load of the electronic device 10 by the drive signals VG3 and VG4 from the gate drivers 402 and 404. In the case of current feedback type current control, the current flowing through the switch circuits 102 and 104 is detected, the analog value converted into current and voltage is input to the comparator and A / D converter, and a predetermined threshold value is compared with the detected value. Perform the same control with. The current detection may be performed by the high-side switch circuit 102 or the low-side switch circuit 104. Since known methods can be applied to the current detection and control method, detailed description thereof will be omitted.

The inductor 108A is a power inductor for accumulating exciting energy from the battery 27 and rectifying the voltage stepped down by the SW102A when the SW102A is on and the SW104A is off. The inductor 108B is a power inductor for accumulating exciting energy from the battery 27 and rectifying the voltage stepped down by the SW102B when the SW102B is on and the SW104B is off. In multi-phase drive in which switching elements connected in parallel are driven by switching phases, as shown in FIG. 5, a predetermined phase difference (180 ° in FIG. 5) is provided to provide a pair of SW102A and SW104A and SW102B and SW104B. The drive signal is controlled to drive the pair. If the conduction resistance of the switching element is the same, the current flowing through the inductors 108A and 108B is half that of the single-phase drive that drives only the pair of SW102A and SW104A, and the capacitor 110 has two pulsating currents superimposed on it. Smooth the current.

In the first embodiment, when the load current value of the electronic device 10 is less than a predetermined current threshold value, the SW102A and SW104A are paired, and while accumulating exciting energy in the inductor 108A, the single-phase drive is performed as shown in FIG. Will be done. When the value of the load current of the electronic device 10 is equal to or higher than a predetermined current threshold value, the pair of SW102A and SW104A and the pair of SW102B and SW104B are multi-phase driven as shown in FIG. FIG. 5 shows an operation example of the switch circuits 102 and 104 driven by multi-phase drive. FIG. 5A shows the reference clock (OSC) 131 of the DC / DC converter 100. FIG. 5B shows an ON state or an OFF state of SW102A of the switch circuit 102. FIG. 5C shows an ON state or an OFF state of SW104A of the switch circuit 104. FIG. 5D shows an ON state or an OFF state of SW102B of the switch circuit 102. FIG. 5E is a waveform showing the ON state or the OFF state of the SW104B of the switch circuit 104, and the ON state is indicated by High and the OFF state is indicated by Low for convenience.

In the first embodiment, different through current prevention periods (dead time) DTs are set in the through current prevention circuits of the gate driver 402 and the gate driver 404, except when the SW102A and SW102B, SW104A and SW104B connected in parallel are driven at the same time. ing. The setting of the dead time DT in the switching control of the first embodiment will be described later.

In the first embodiment, a plurality of switching elements having different characteristics are connected in parallel. For example, if the switching element is a MOSFET, the SW102A of the switch circuit 102 has a larger FET element area than the SW102B, and reduces the conduction (ON) resistance Ron between the drain and the source when the FET is on. In this way, it mainly contributes to the reduction of conduction loss between the drain and the source in the switch circuit under heavy load. On the contrary, SW102B of the switch circuit 102 makes the element area of the FET smaller than that of SW102A, and makes the amount of charge (gate capacitance) Qg input to the gate electrode smaller when the FET is turned on. In this way, it mainly contributes to the reduction of switching drive loss from a light load to a heavy load. Similarly, SW104A and SW104B of the switch circuit 104 connected in parallel are composed of FETs having different characteristics. The conduction resistance Ron and the gate capacitance Qg are important characteristics for a switching element for a power supply. When the element area of the FET is increased, the conduction resistance Ron becomes smaller but the gate capacitance Qg increases, so that the conduction resistance Ron and the gate capacitance Qg increase. Are in a trade-off relationship. In recent years, while the technology for reducing the FOM (Figure of Meritt), which is the product of the conduction resistance Ron and the gate capacitance Qg, has advanced by improving the element structure of the FET, there is also a movement to replace the material from Si with GaN or SiC. .. In the first embodiment, FETs of any material or structure may be used as long as a plurality of switching elements having different characteristics of gate capacitance Qg are connected in parallel.

In the first embodiment, a gate driver suitable for a plurality of switching elements having different characteristics (material, structure) is provided, and the dead time DT setting is a variable component. In the first embodiment, the gate driver provided according to the characteristics of the switching element may be connected to different power supplies or may be connected to a plurality of power supplies.

Next, the setting of the dead time DT in the switching control of the first embodiment will be described with reference to FIGS. 5 and 6.

First, when the SW102B and SW104B are paired and performing a switching operation, a transient state in which the SW102B switches from the on state to the off state and the SW104B switches from the off state to the on state will be described.

The gate driver 404 receives the signal from the PWM controller 406 and switches the drive signal VG2 from the Low level to the High level in order to control the SW102B to the off state. The voltage waveform of the drive signal VG2 rises with the inclination shown in FIG. 6 due to the drive capability of the gate driver 404 and the gate capacitance Qg of the SW102B (T1 → T3). In that case, when the drive signal VG2 reaches the threshold voltage Vth for starting the operation of SW102B (T1 → T2), SW102B is completely turned off and no current flows from the power supply Vin to SW102B. Then, the recirculation current IOFF for releasing the exciting energy stored in the inductor 108 to the capacitor 110 flows through the parasitic diode of SW104B (T2 → T4). Meanwhile, the drive signal VG2 of SW102B rises to a predetermined High level (T2 → T3).

The gate driver 404 receives the signal from the PWM controller 406 and switches the drive signal VG4 from the Low level to the High level in order to control the SW104B in the ON state. The voltage waveform of the drive signal VG4 rises with the inclination shown in FIG. 6 due to the drive capability of the gate driver 404 and the gate capacitance Qg of the SW104B (T4 →). In that case, when the drive signal VG4 reaches the threshold voltage Vth for starting the operation of SW104B (T4 → T5), SW104B is completely turned on and the recirculation current IOFF flows only between the drain and the source of SW104B. The dead time DT in this case is DT1 (T1 → T4). DT1 is a preset value so that a through current does not flow from the voltage Vin to SW102B and SW104B, and the conduction loss due to the parasitic diode of the recirculation current IOFF and SW104B can be suppressed to a small value.

Next, a transient state in which the SW104B switches from the on state to the off state and the SW102B switches from the off state to the on state will be described.

The gate driver 404 receives the signal from the PWM controller 406 and switches the drive signal VG4 from the high level to the low level in order to control the SW104B to the off state. The voltage waveform of the drive signal VG4 descends with the inclination shown in FIG. 6 due to the drive capability of the gate driver 404 and the gate capacitance Qg of the SW104B (T6 → T8). In that case, when the drive signal VG4 reaches the threshold voltage Vth for starting the operation of SW104B (T6 → T7), SW104B is completely turned off and the recirculation current IOFF flows only to the parasitic diode of SW104B. After the drive signal VG4 of the SW104B falls to a predetermined Low level, the gate driver 404 switches the drive signal VG2 from the High level to the Low level in order to turn on the SW102B (T8 → T9). When the voltage waveform of the drive signal VG2 falls and reaches the threshold voltage Vth for starting the operation of SW102B (T9 → T10), SW102B is completely turned on and a current flows from the power supply Vin to SW102B. The dead time DT in this case is DT2 (T6 → T9).

As an actual transient phenomenon, the recovery current IR flows until the carriers accumulated in the parasitic diode disappear due to the recirculation current IOFF, and the parasitic inductance and the ringing due to the parasitic diode occur at the time of current recovery.

Next, a transient state in which the SW102A switches from the on state to the off state and the SW104A switches from the off state to the on state when the SW102A and the SW104A are paired and performing the switching operation will be described. The state transition of SW102A and SW104A is the same as that of SW102B and SW104B. However, in the switch circuits 102 and 104 of the first embodiment, a plurality of switching elements having different characteristics of the gate capacitance Qg are connected in parallel. Therefore, when the SW102A and SW104A are paired and switched, the rise time and fall time of the drive signal VG1 and the drive signal VG3 are different from those when the SW102B and SW104B are paired and switched. Come on. DT3 shown in FIG. 6 is longer than DT1 by ΔT1, and DT4 is longer than DT2 by ΔT2. Therefore, when the SW102A and SW104A are switched and the gate driver 402 has the same dead time DT1 and DT2 as the gate driver 404, a through current flows from the power supply Vin to the SW102A and SW104A. On the contrary, when the SW102B and SW104B are switched and the gate driver 404 has the same dead time DT3 and DT4 as the gate driver 402, the period during which the recirculation current IOFF flows through the parasitic diode of the SW104B becomes unnecessarily long. Therefore, the conduction loss due to the parasitic diode increases.

In this way, by setting the dead time DT of the gate driver suitable for the characteristics of the gate capacitance Qg of the switching element, the conduction loss due to the parasitic diode can be reduced.

[Embodiment 2]
The various functions, processes or methods described in the first embodiment can also be realized by a personal computer, a microcomputer, a CPU (central processing unit), a processor or the like by using a program. Hereinafter, in the second embodiment, a personal computer, a microcomputer, a CPU (central processing unit), a processor, and the like are referred to as "computer X". Further, in the second embodiment, a program for controlling the computer X and for realizing various functions, processes, or methods described in the first embodiment is referred to as a "program Y".

The various functions, processes or methods described in the first embodiment are realized by the computer X executing the program Y. In this case, the program Y is supplied to the computer X via a computer-readable storage medium. The computer-readable storage medium according to the second embodiment includes at least one such as a hard disk device, a magnetic storage device, an optical storage device, a photomagnetic storage device, a memory card, a volatile memory, and a non-volatile memory. The computer-readable storage medium according to the second embodiment is a non-transitory storage medium.

10 ... Electronic device 100 ... DC / DC converter 102, 104 ... Switch circuit 102A, 102B, 104A, 104B ... Switching element 112 ... Drive control unit 402, 404 ... Gate driver 406 ... PWM controller

Claims (7)

The first switch and
A second switch that is connected in parallel with the first switch and has characteristics different from those of the first switch.
The driving means for driving the first switch and the second switch,
In the first control, the penetration current prevention period is set according to the characteristics of the first switch, and in the second control, the penetration current prevention period is set according to the characteristics of the second switch. An electronic device characterized by having means. In the control means, the penetration current prevention period when driving the first switch in the first control is longer than the penetration current prevention period when driving the second switch in the second control. The electronic device according to claim 1, wherein the electronic device is set so as to be. Further having a current detecting means for detecting the load current of the electronic device,
The first or second aspect of the present invention, wherein the control means performs the first control when the load current is equal to or more than a threshold value, and performs the second control when the load current is less than the threshold value. Electronic equipment. The electronic device according to any one of claims 1 to 3, wherein the second control drives the first switch and the second switch with a predetermined phase difference. It further has a third switch connected between the first switch and the grounding portion, and a fourth switch connected in parallel with the third switch and having characteristics different from those of the third switch. And
The control means switches the on state and the off state of the first switch and the third switch in the first control, and turns on the second switch and the fourth switch in the second control. The electronic device according to any one of claims 1 to 4, wherein the electronic device is switched between a state and an off state. It has a first inductor connected to the first switch and a second inductor connected to the second switch.
The first control drives the first switch and the third switch to control the current flowing through the first inductor.
The electronic device according to claim 5, wherein the second control drives the second switch and the fourth switch to control a current flowing through the second inductor. It is a control method for electronic devices.
The electronic device is
The first switch and
A second switch that is connected in parallel with the first switch and has characteristics different from those of the first switch.
It has a first switch and a driving means for driving the second switch.
The control method is
In the first control, a step of setting a through current prevention period according to the characteristics of the first switch, and
The second control method comprises a step of setting a through current prevention period according to the characteristics of the second switch.

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