JP6086963B1 - Voltage output circuit - Google Patents

Abstract

Overshoot and undershoot that occur during transient operation of an output voltage are suppressed when an output voltage feedback resistor is switched to change the output voltage of a regulator. A regulator for converting a DC input voltage into a DC output voltage corresponding to a differential voltage between a reference voltage and a feedback voltage, a plurality of feedback resistors and an electronic switch, and an external feedback resistor A feedback resistor circuit unit that outputs, as a feedback voltage, a voltage obtained by dividing the output voltage by two voltage dividing resistance values according to the switching signal, and a control unit that outputs a feedback resistor switching signal. A primary control that outputs at least one of the falling edge and the rising edge of the feedback resistor switching signal with a first-order lag characteristic, and controls the on / off operation so that at least one of the on / off operations of the electronic switch has the first-order lag characteristic. A delay time constant circuit is further included. [Selection] Figure 1

Description

  The present invention includes a DC-DC converter circuit (that is, a regulator) that converts an input voltage into an output voltage, and a controller that controls the output voltage by adjusting a feedback voltage obtained by dividing the output voltage. The present invention relates to an output circuit, and more particularly to a voltage output circuit characterized by a switching method of a voltage dividing resistor (hereinafter referred to as a feedback resistor) that creates a feedback voltage from the output voltage.

  A conventional DC-DC converter circuit uses a switch to switch a feedback resistor disposed in a voltage regulator (hereinafter referred to as a series regulator) that obtains an output voltage stepped down from an input voltage in order to change the output voltage. (For example, refer to Patent Document 1).

  That is, the reference voltage and the value obtained by dividing the output voltage by the feedback resistor are input to the differential amplifier. Then, the differential voltage is output from the differential amplifier and input to the gate terminal of a FET (Field Effect Transistor), which is connected to the differential amplifier and is a control semiconductor element for stepping down the input voltage. The resistance value between the drain and source of the FET is controlled by this differential voltage, and the FET is controlled so that the output voltage becomes a constant value.

  In order to change the output voltage, the feedback resistance value may be changed. That is, by changing the feedback resistance value, the difference from the reference voltage changes, and as a result, the differential voltage output from the differential amplifier changes. As the gate voltage of the FET changes due to the change of the differential voltage, the resistance value between the drain and the source changes as a result, and the output voltage also changes.

  FIG. 14 is a circuit diagram relating to a conventional feedback resistance switching circuit unit in Patent Document 1. In FIG.

  As another conventional technique, there is a method of increasing the startup time without causing an overshoot of the output voltage at startup in a switching regulator (see, for example, Patent Document 2).

  According to this Patent Document 2, a PMOS transistor is arranged separately from a PMOSFET (P Channel Metal Oxide Semiconductor FET) and an NMOSFET (N Channel MOSFET) that turn on and off to control the steady voltage of the switching regulator at the output of the switching regulator. It is installed.

  Further, a soft start circuit is disposed on the input side of the comparator of the feedback voltage of the output voltage and the reference voltage. Until the output voltage reaches 90%, the PMOS transistor is turned on to output the input voltage input to the switching regulator as it is.

  On the other hand, when the output voltage exceeds 90%, the PMOS transistor is turned off, the difference between the soft start circuit, the feedback of the output voltage, and the reference voltage is output from the error amplifier, and the magnitude of the output is gradually changed. And overshoot is suppressed.

JP 2001-069677 A JP 2007-236051 A

However, the prior art has the following problems.
In Patent Document 1, the feedback resistance value is instantaneously switched using a switch. Therefore, the frequency band of the differential amplifier that compares the feedback value of the output voltage corresponding to the switched resistance value and the reference voltage is exceeded, and as a result, the output voltage changes during the switching of the feedback resistance value (hereinafter referred to as From the time of transition to the steady output, there is a problem that the output voltage of the differential amplifier causes overshoot or undershoot.

  Further, Patent Document 2 can suppress an overshoot of the output voltage when the switching regulator is started. However, there is a problem in that it cannot cope with a change in output voltage during a transition such as when the feedback resistance value is changed after shifting to a steady output state.

  The present invention has been made to solve the above-described problems. Even in a transient state when the feedback resistance value is switched in order to change the output voltage of the regulator, the output voltage overshoots or undershoots. Shooting can be suppressed, and in the steady state, the original frequency response band of the regulator can be maintained with respect to load fluctuations, realizing both compatibility with load fluctuations and stable voltage output. It is an object to obtain a voltage output circuit that can be used.

A voltage output device according to the present invention includes a regulator that converts a DC input voltage into a DC output voltage corresponding to a differential voltage between a reference voltage and a feedback voltage, a plurality of feedback resistors, and an external feedback resistor switching. And an electronic switch that switches the connection configuration by a plurality of feedback resistors to divide into two voltage dividing resistance values by performing an on / off operation according to the on / off state of the signal, and divides the output voltage by the two voltage dividing resistance values. A feedback resistor circuit unit that outputs the compressed voltage as a feedback voltage, and a feedback resistor switching signal that is switched and output to control the feedback voltage output from the feedback resistor circuit unit, so that the output voltage becomes a desired value. A feedback resistor circuit unit, a falling signal when the feedback resistor switching signal is switched from on to off, or At least one of the rising signals when the feedback resistor switching signal is switched from OFF to ON is converted into a primary delay signal, and the primary delay signal is used to convert the primary switch to at least one of the ON / OFF operations of the electronic switch. The circuit further includes a first-order lag time constant circuit that is controlled so as to have an on / off operation having a delay characteristic, and that gradually changes the feedback resistance value without instantaneous switching using an electronic switch .

  According to the present invention, the feedback resistance value is gradually changed, that is, the first order delay can be applied to the change of the feedback resistance value. As a result, overshoot and undershoot of the output voltage can be suppressed even in a transient state when the feedback resistance value is switched in order to change the output voltage of the regulator. A voltage output circuit capable of maintaining the original frequency response band of the regulator and realizing both compatibility with load fluctuations and stable voltage output is obtained.

It is a block diagram of the linear regulator circuit which concerns on Embodiment 1 of this invention. It is a circuit diagram showing the inside of the feedback resistance selection circuit in Embodiment 1 of this invention. It is the figure which showed the waveform of each part in the resistance switching circuit using the conventional linear regulator. It is the figure which showed the waveform of each part in the resistance switching circuit using the linear regulator in Embodiment 1 of this invention. It is a figure for demonstrating the suppression effect of an overshoot and an undershoot by the resistance switching circuit using the linear regulator in Embodiment 1 of this invention. It is a circuit diagram showing the inside of the feedback resistance switching circuit in Embodiment 2 of this invention. It is a circuit diagram which showed the internal structure of the primary delay time constant circuit 324a arrange | positioned in the feedback resistance switching circuit in Embodiment 3 of this invention. It is a circuit diagram which showed the internal structure of the primary delay time constant circuit arrange | positioned in the feedback resistance switching circuit in Embodiment 4 of this invention. It is a circuit diagram which showed the internal structure of the primary delay time constant circuit 324a arrange | positioned in the feedback resistance switching circuit in Embodiment 5 of this invention. It is the block diagram which showed the 1st Example of the voltage output circuit in Embodiment 6 of this invention. It is the block diagram which showed the 2nd Example of the voltage output circuit in Embodiment 6 of this invention. It is the block diagram which showed the 3rd Example of the voltage output circuit in Embodiment 6 of this invention. It is the block diagram which showed the 4th Example of the voltage output circuit in Embodiment 6 of this invention. FIG. 10 is a circuit diagram relating to a conventional feedback resistance switching circuit unit in Patent Document 1.

Preferred embodiments of the voltage output circuit according to the present invention will be described below with reference to the drawings.
In addition, the same number also shows a same component including a prior art figure.

Embodiment 1 FIG.
FIG. 1 is a configuration diagram of a linear regulator circuit according to Embodiment 1 of the present invention. Compared with the configuration of FIG. 14 which is the prior art, the configuration of the feedback resistor circuit unit in FIG. 1 of the first embodiment is different. The feedback resistance circuit unit 3 according to the first embodiment in FIG. 1 includes feedback resistance switching circuits 32a to 32d each including feedback resistors 31a to 31d and electronic switches 322a to 322d.

  Here, the feedback resistance switching circuits 32a to 32d are respectively connected between the feedback resistors 31a and 31b, between the feedback resistors 31b and 31c, between the feedback resistors 31c and 31d, and between the feedback resistors 31d and 32e. It is arranged. An H level signal is input from the CPU 7 to any one of the terminals 323a to 323d, and an L level signal is input to the other three terminals.

  As a result, any of the feedback resistance switching circuits 32a to 32d to which the H level signal is input is turned on, and is connected to the output voltage feedback terminal 83 of the linear regulator 8 via any one of the terminals 322a to 322d. The

  In addition to the output voltage feedback terminal 83, the linear regulator 8 includes a terminal 81 for inputting the input voltage 5 and a terminal 82 for outputting the output voltage 102a, and also includes the differential amplifier 1, the FET 2, and the reference voltage 4. It is configured.

  The differential amplifier 1 compares the voltage 103a input via the output voltage feedback terminal 83 with the voltage of the reference voltage 4, and outputs an output voltage 104a. The FET 2 outputs the voltage 101 of the input voltage 5 input through the terminal 81 from the terminal 82 as the output voltage 102a corresponding to the change in the resistance value between the drain and the source.

  The capacitor 6 is a smoothing capacitor that smoothes the output voltage 102 a output from the output terminal 82 of the linear regulator 8.

  FIG. 2 is a circuit diagram showing the inside of feedback resistance switching circuit 32a in the first embodiment of the present invention. Although the four feedback resistance switching circuits 32a to 32d shown in FIG. 1 have the same configuration, FIG. 2 shows the inside of the feedback resistance switching circuit 32a as an example. As a representative example, the feedback resistance switching circuit 32a will be described.

  As shown in FIG. 2, the feedback resistance switching circuit 32a is connected to a terminal 321a connected to the feedback resistor 31a, a terminal 322a connected to the negative side of the differential amplifier 1, and a feedback resistance switching signal 105 from the CPU 7. The terminal 323a has three terminals. Further, an electronic switch 326a whose resistance value changes according to the voltage value of the on / off signal is disposed between the terminals 321a and 322a.

  Further, the feedback resistance switching circuit 32a includes a first-order lag time constant circuit 324a and a buffer circuit 325a, and functions as follows. The buffer circuit 325a includes a transistor, an operational amplifier, and the like for converting the drive capacity and voltage even when the drive capacity of the feedback resistance switching signal 105 from the CPU 7 is small or when the voltage is different.

  The first-order lag time constant circuit 324a converts the vertical rise and fall of the output signal from the buffer circuit 325a into a first-order lag signal. The primary delay time constant circuit 324a controls the on / off operation of the electronic switch 326a with a temporary delay, and as a result, the resistance value until the electronic switch 326a is completely turned on / off is similarly controlled with the primary delay. Will be.

  In the case of FIG. 2, the feedback resistance switching signal 105 from the CPU 7 is an H level signal, and the electronic switch 326a is turned on (short-circuited). When the electronic switch 326a is turned on, the terminals 321a and 322a are connected, and the feedback resistance is divided into the value of the feedback resistor 31a and the value obtained by adding the feedback resistors 31b to 31e.

  The voltage divided by these resistance values is input to the output voltage feedback terminal 83 of the linear regulator 8. That is, the voltage of the output voltage feedback terminal 83 is a value obtained by dividing the output voltage 102a by two resistance values divided by turning on the electronic switch 326a.

  In this way, by turning on and off the electronic switch 326a by the first order lag operation, the feedback voltage 103a input to the output voltage feedback terminal 83 has a first order lag characteristic when the feedback resistors 31a to 31d are switched. be able to.

  As a result, the differential amplifier 1 in the linear regulator 8 can be controlled gently according to the feedback voltage 103a that changes with a first-order lag when the feedback voltage when the feedback resistance changes is in a transient state, and switches to a steady voltage. After that, control can be performed in the original frequency band of the differential amplifier 1, and stable voltage control can be realized.

  Next, specific responses in the voltage output circuit according to the first embodiment having a configuration in which the feedback voltage 103a has a first-order lag characteristic and a conventional voltage output circuit not having a configuration in which a first-order lag characteristic is provided. The difference in waveform will be described.

  FIG. 3 is a diagram showing waveforms at various parts in a resistance switching circuit using a conventional linear regulator. On the other hand, FIG. 4 is a diagram showing waveforms of respective parts in the resistance switching circuit using the linear regulator in the first embodiment of the present invention. Specifically, when the selection of the feedback resistor circuit is changed between the feedback resistors 31a and 31b and between the feedback resistors 31d and 31e, the waveforms of the respective parts corresponding to the configuration of FIG. 14 correspond to FIG. 1 corresponds to FIG. 4. The waveform of each part corresponding to the configuration of FIG.

  As shown in FIG. 3, the output voltage obtained in the transient state where the feedback resistor is sharply switched between the feedback resistors 31a and 31b by the electronic switch or the mechanical switch between the feedback resistors 31a and 31e. Overshoots 106a and 106b and undershoots 107a and 107b are generated in 102a.

  On the other hand, as shown in FIG. 4, it is understood that the occurrence of overshoot and undershoot of the output voltage 102a can be suppressed when the transient state at the time of switching the feedback resistor is given a first-order lag characteristic.

  The reason why overshoot and undershoot can be suppressed will be described with reference to FIG. FIG. 5 is a diagram for explaining the effect of suppressing overshoot and undershoot by the resistance switching circuit using the linear regulator in the first embodiment of the present invention. Specifically, the output voltage 102a and the feedback voltage are illustrated. This corresponds to an enlarged view of the transition state 103a.

  14 and 1, when the feedback resistor is switched, the feedback signal 103 or 103 a changes. Therefore, by controlling the differential amplifier 1 so that the difference between the feedback signal and the reference voltage 4 is constant, a desired value can be obtained. Until the output voltage 102 or 102a is obtained.

When the circuit that controls the output by the differential amplifier 1 is sufficiently fast, as in the first embodiment, when the feedback voltage 103a is changed by applying a time constant according to the first-order lag characteristic, T1 is changed from the feedback resistor. When the obtained change time of the feedback voltage 103a and T2 is the change time of the output voltage 102a,
T1 ≒ T2
The relationship is obtained.

  At this time, the change amount ΔV1 of the feedback voltage 103a per unit time ΔT1 becomes small. For this reason, the output signal change amount ΔV2 per unit time ΔT2 of the output signal is similarly reduced.

  When the feedback voltage 103a changes, the time T2 until the output voltage 102a reaches a steady state depends on the differential amplifier 1 and the frequency band of the calculation, that is, the operation speed. Therefore, when the amount of change (V2−V2 ′) in the output voltage 102a changes abruptly, the frequency response of the differential amplifier 1 and the circuit that controls the output by the calculation thereof deteriorates. That is, when the operation speed is high, overshoot and undershoot occurring in the obtained output signal are proportional to the amount of change in the output voltage 102a.

  Therefore, in the voltage output circuit according to the first embodiment, the on-time of the electronic switches 326a to 326d is set as a first-order lag, a time constant is provided, the feedback voltage 103a is gradually controlled, and the resistance value between the electronic switches is moderated. It is changing. That is, the voltage output circuit according to the first embodiment behaves so that, for example, the electronic switch is gradually changed like a variable resistance element and the feedback resistance value between the feedback resistors 31a to 31d is gradually changed. To function.

  Since the feedback resistance value between each of the feedback resistors 31a to 31d gradually changes, the output voltage 102a also gradually changes in the same manner as the feedback voltage 103a. Therefore, in the circuit that determines the gain or output signal of the differential amplifier 1 by feedback using a resistor, the gain or output signal change amount ΔV2 per unit time ΔT2 is reduced, and overshoot and undershoot of the output voltage 102a can be suppressed. .

  As described above, according to the first embodiment, the feedback resistance value is gradually changed, that is, the first delay is applied to the change of the feedback resistance value. As a result, overshoot and undershoot of the output voltage can be suppressed even in a transient state when the feedback resistance value is switched in order to change the output voltage of a series regulator or a switching regulator.

  Furthermore, in the steady state, the original frequency response band of the series regulator and the switching regulator can be held against load fluctuations. Therefore, it is possible to obtain a voltage output circuit that can realize both coping with load fluctuation and stable voltage output.

Embodiment 2. FIG.
FIG. 6 is a circuit diagram showing the inside of feedback resistance switching circuits 32a to 34a in the second embodiment of the present invention. In FIG. 6 as well, as in FIG. 2 in the first embodiment, the feedback resistance switching circuit 32a will be representatively described.

  In the feedback resistance switching circuit 32a in the first embodiment shown in FIG. 2, the electronic switch 326a is used as a switch between the terminal 321a and the terminal 322a. On the other hand, in the feedback resistance switching circuit 32a in the first embodiment shown in FIG. 6, a MOSFET 327a is used instead of the electronic switch 326a as a switch between the terminal 321a and the terminal 322a.

  When the electronic switch 326a is the MOSFET 327a, the drive current can be reduced. As a result, the buffer circuit 325a in the feedback resistance switching circuit 32a can be deleted.

  As described above, according to the second embodiment, the feedback resistance switching circuit is configured by adopting the MOSFET as the on / off function switch. As a result, an effect similar to that of the first embodiment can be obtained. Further, the buffer current in the feedback resistance switching circuit can be eliminated by reducing the drive current, and a further effect of simplifying the circuit configuration can be obtained.

Embodiment 3 FIG.
In the third embodiment, a specific example of the internal configuration of the first-order lag time constant circuits 324a to 324d described in the first and second embodiments will be described. FIG. 7 is a circuit diagram showing an internal configuration of first-order lag time constant circuit 324a arranged in feedback resistance switching circuit 32a according to the third embodiment of the present invention. The internal configurations of the first-order lag time constant circuits 324a to 324d are the same, and FIG. 7 shows a first-order lag time constant circuit 324a provided inside the feedback resistance switching circuit 32a as an example. As a representative example, description will be given using the first-order lag time constant circuit 324a.

  The first-order lag time constant circuit 324a in the third embodiment shown in FIG. 7 includes only one resistor 3241a and one capacitor 3242a. The resistor 3241a is connected in series between the output signal from the buffer circuit 325a and the on / off terminal of the electronic switch 326a.

  The capacitor 3242a has one end connected between the on / off terminal of the electronic switch 326a and the resistor 3241a, and the other end connected to the ground. A circuit composed of the resistor 3241a and the capacitor 3242a gives a first-order lag signal to the electronic switch on / off signal 301a to be applied to the on / off terminal of the electronic switch 326a.

  Normally, when the MOSFET 327a is used as an electronic switch, a resistor is provided between the gate terminal of the MOSFET 327a and the gate signal, and has a time constant at the time of on and off due to this resistance value and the parasitic capacitance between the gate and source terminals of the MOSFET. It is common to make it.

  However, the capacitance between the gate and the source is about several hundred pF in the case of a normal small signal MOSFET, and a large resistance of about several hundred kΩ is required to make a time constant lower than the frequency band of the differential amplifier 1. A device is required, and the gate current is insufficient or is susceptible to noise.

  Therefore, the third embodiment employs the first-order lag time constant circuit 324a in which the resistance value of the resistor 3241 in FIG. 7 is 100 kΩ or less and the capacitance of the capacitor is 1000 pF or more.

  As described above, according to the third embodiment, a first-order lag time constant circuit is configured by resistors and capacitors, and a desired time constant can be easily realized by appropriately selecting a resistance value and a capacitance value. can do. In addition, individual time constants can be easily set in each first-order lag time constant circuit as required.

Embodiment 4 FIG.
In the fourth embodiment, an internal configuration of first-order lag time constant circuits 324a to 324d having a configuration different from that of the third embodiment will be described. FIG. 8 is a circuit diagram showing an internal configuration of first-order lag time constant circuit 324a arranged in feedback resistance switching circuit 32a according to the fourth embodiment of the present invention. The internal configurations of the primary delay time constant circuits 324a to 324d are the same, and FIG. 8 shows, as an example, a primary delay time constant circuit 324a provided in the feedback resistance switching circuit 32a. As a representative example, description will be given using the first-order lag time constant circuit 324a.

  The first-order lag time constant circuit 324a in the fourth embodiment further includes a diode 3243a in addition to the configuration of the first-order lag time constant circuit 324a in the third embodiment.

  Specifically, in the fourth embodiment, the diode 3243a is arranged in parallel with the resistor 3241a, the anode side is on the electronic switch on / off signal 301a side, and the cathode is compared with the configuration of FIG. 7 in the previous third embodiment. It is connected to the buffer circuit 325a side.

  The diode 3243a can provide a path for quickly discharging the capacitor 3242a. As a result, a first-order lag time constant can be applied when the output signal of the buffer amplifier 325a is on (H level) during resistance switching between the feedback resistors 31a to 31d, and on the other hand, when the output signal is off (L level). The first-order lag time constant can be eliminated.

  In the circuit of FIG. 8, when the feedback resistance switching signal 105 is turned on, if the resistance value of the resistor 3241a is R1 and the capacitance C1 of the capacitor 3242a, the first-order lag time constant τ is expressed by τ = R1 × C1. The When turned off, the charge of the capacitor C1 passes through the diode 3243a, so the first-order lag time constant is left to the internal impedance of the buffer circuit 325a.

  As described above, according to the fourth embodiment, the first-order lag time constant circuit is configured by the resistor, the capacitor, and the diode, and the same effect as in the third embodiment can be obtained.

Embodiment 5 FIG.
In the fifth embodiment, an internal configuration of first-order lag time constant circuits 324a to 324d having a configuration different from those of the third and fourth embodiments will be described. FIG. 9 is a circuit diagram showing an internal configuration of first-order lag time constant circuit 324a arranged in feedback resistance switching circuit 32a according to the fifth embodiment of the present invention. The internal configurations of the primary delay time constant circuits 324a to 324d are the same, and FIG. 9 shows a primary delay time constant circuit 324a provided inside the feedback resistance switching circuit 32a as an example. As a representative example, description will be given using the first-order lag time constant circuit 324a.

  The first-order lag time constant circuit 324a in the fifth embodiment is further provided with a resistor 3244a and diodes 3243a and 3245a in addition to the configuration of the first-order lag time constant circuit 324a in the third embodiment.

  Specifically, in the fifth embodiment, compared to FIG. 7 of the previous third embodiment, between the buffer circuit 325a and the resistor 3241a, the anode of the diode 3245a is on the buffer circuit 325a side, and the cathode is the resistor. Connect to the 3241a side.

  In addition, a series connection circuit of the resistor 3244a and the diode 3243a is connected in parallel with the series connection circuit of the diode 3245a and the resistor 3241a. The diode 3243a has an anode connected to the resistor 3244a side and a cathode connected to the buffer circuit 325a side.

  By setting it as such a structure, a different time constant can also be applied with respect to the change at the time of resistance switching between each of the feedback resistors 31a-31d. In the circuit of FIG. 9, when the feedback resistor switching signal 105 is turned on, the resistance value of the resistor 3241a is R1, the capacitance of the capacitor 3242a is C1, and the voltage drop of the diode is ignored. = R1 × c1.

  If the resistance value of the resistor 3244a is R2 when the feedback resistor switching signal 105 is turned off, the first-order lag time constant is similarly expressed by τ = R2 × C1.

  As described above, according to the fifth embodiment, the same effect as in the third and fourth embodiments can be obtained by configuring the first-order lag time constant circuit with a circuit different from the third and fourth embodiments. Can be obtained.

Embodiment 6 FIG.
In the sixth embodiment, four examples to which the above-described voltage output circuit of the present invention is applied will be described.

<First embodiment>
FIG. 10 is a configuration diagram illustrating a first example of the voltage output circuit according to the sixth embodiment of the present invention. The first embodiment shows a circuit that short-circuits a feedback resistor in a step-down circuit using a series regulator.

  More specifically, when the series regulator 8a having the same control method as that of FIG. 1 is used, the circuit configuration of the feedback resistor circuit unit 3a is changed to 3b, and the feedback resistor 33c is changed using the electronic switch 326e. This is an example of a circuit that raises the output voltage of the series regulator 8a by short-circuiting.

  As shown in FIG. 10, when the feedback resistance switching signal 105 is turned on, the electronic switch 326e causes the first-order lag time constant circuit 324e to gradually change the resistance value of the electronic switch 326e, thereby short-circuiting the feedback resistor 33c. Thus, by changing the resistance value of the electronic switch 326e in accordance with the output waveform of the first-order lag time constant circuit 324e, overshoot and undershoot when the output voltage 102b rises can be suppressed.

  Resistors 9 and 10 are for securing a current limit and a gate-source voltage when a MOSFET is used as an electronic switch, and do not affect the present invention.

<Second embodiment>
FIG. 11 is a configuration diagram showing a second example of the voltage output circuit according to the sixth embodiment of the present invention. The second embodiment is a booster circuit using a switching regulator 18a, and is an example of a circuit that further raises the voltage by short-circuiting the feedback resistor 34c as in FIG.

  In a booster circuit using a general switching regulator 18a, current flows to the ground via the coil 11 and the switching element 13 when the switching element 13 is on, and energy is stored in the switching coil 19, and the coil 11 is energized when the switching element 13 is off. The stored energy is output as an output voltage 102c via the diode 12. Therefore, in the steady operation of the booster circuit, the on-duty of the switching element 13 does not become 100%.

  If the feedback resistor 34c is instantaneously short-circuited and the voltage of the booster circuit is increased, if the increase of the output voltage is large, the switching regulator 18a causes the maximum duty in the transient operation after switching of the feedback resistor 34c. Limitation may occur, and the output voltage may decrease conversely.

  In addition, when the switching regulator 18 is combined with a low voltage start prevention circuit, the low voltage start prevention circuit may operate and the switching regulator 18a may restart.

  On the other hand, in the second embodiment shown in FIG. 11, in the booster circuit, the electronic switch 326f is used to short-circuit the feedback resistor 34c, and the first-order lag time constant circuit when the electronic switch 326f is turned on / off. 324f is used to prevent the feedback resistor 34c from being short-circuited instantaneously.

  Further, as the primary delay time constant circuit 324f, when the diode 3243f is combined as shown in FIG. 8, the primary delay time constant is added only when the output resistor 102c is increased by short-circuiting the feedback resistor 34c. When the electronic switch 326f is released, the output voltage 102c can be decreased with a time constant depending on the impedance of the discharge circuit of the capacitor 3242f.

  Therefore, for a transient operation when the feedback resistor 34c is short-circuited, an overshoot and undershoot that occur in the output voltage 102c are suppressed by equivalently applying a time constant to the feedback resistance change amount per unit time. be able to.

<Third embodiment>
FIG. 12 is a configuration diagram showing a third example of the voltage output circuit according to the sixth embodiment of the present invention. This third embodiment is an example of a step-down circuit using a switching regulator 18b, and by short-circuiting an electronic switch 326g in which a feedback resistor 35c is connected in parallel to the feedback resistor 35c, as in FIG. This is an example of a circuit that raises the voltage.

  By connecting the first-order lag time constant circuit 324g to the on / off terminals of the electronic switch 326g that short-circuits the feedback resistor 35c, when the feedback resistor 35c is short-circuited, Undershoot can be suppressed.

<Fourth embodiment>
FIG. 13 is a configuration diagram illustrating a fourth example of the voltage output circuit according to the sixth embodiment of the present invention. The fourth embodiment is an example of a step-down circuit using a shunt regulator 28, and by short-circuiting an electronic switch 326h in which a feedback resistor 36c is connected in parallel to the feedback resistor 36c as in FIG. It is an example of the circuit which raises a voltage.

  By connecting a first-order lag time constant circuit 324h to the on / off terminals of the electronic switch 326h that short-circuits the feedback resistor 36c, when the feedback resistor 36c is short-circuited, an overshoot or undershoot at the time of a voltage rise transient of the output voltage 102e Shooting can be suppressed.

  As described above, an electronic switch is used as a changeover switch of the present invention at the time of feedback resistor switching, and by providing a first-order lag time constant circuit at the on / off terminals, stable operation at the time of voltage change is as follows. It can be set separately from the frequency band of the control element used in the DC-DC converter. Therefore, it is possible to set a wide frequency band of the control element, and it is possible to improve followability to a sudden load change during steady operation while stabilizing the transient operation during output voltage switching.

  When the present invention is applied to a switching regulator, any switching regulator that changes the output voltage by feeding back the output voltage with two or more resistors can be used for boosting, stepping down, inverting, step-up / down, flyback, and so on. Other circuit methods such as a method using a transformer may be used.

Moreover, the following can be considered as a concrete usage example.
When the feedback resistor switching method of the present invention is applied to the feedback circuit of the series regulator type linear regulator of FIG. 10, it can be used for a general-purpose stabilized power supply circuit or the like.

  Further, in the step-down circuit using the switching regulator 18a of FIG. 12, the core power supply of the microprocessor which requires multi-step voltage switching and requires transient response capable of withstanding sudden load change by the feedback resistor switching method of the present invention. It can be used for

  Furthermore, when applied to a voltage output circuit using a series regulator type linear regulator that uses the shunt regulator of FIG. 13 and the control semiconductor element 20 such as a transistor or MOSFET, it is used for a stabilized power supply circuit that maintains a high ripple rejection ratio. it can.

  In the present invention, the element and discharge method used in the first-order lag time constant circuit connected to the on / off terminals of the electronic switch directly or through a resistor are not limited to diodes. Instead of the diode, it is sufficient if the charge of the capacitor can be forcibly discharged by using a pseudo diode using the emitter-base of the transistor, or an electronic switch such as a transistor or a MOS-FET.

  The buffer circuit connected between the first-order lag time constant circuit and the feedback resistor switching signal is such a buffer circuit as long as the feedback resistor switching signal has a power supply capacity and voltage that can drive the electronic switch. There is no need to dispose. Further, the feedback resistor switching signal need not be a signal directly sent from the CPU.

  Furthermore, in the first to fifth embodiments of the present invention described above, as a method of changing the feedback resistance value for changing the voltage output, a feedback resistor is provided in series, and an intermediate between the resistors is selected or a resistance. The example which short-circuited one of was given. However, in the present invention, as long as the feedback resistor is connected, released, and short-circuited using an electronic switch, no matter how the electronic switch is arranged, a plurality of electronic switches are arranged. However, if each of the electronic switches or each of the electronic switches is provided with a first-order lag time constant circuit and, if necessary, a buffer circuit in at least one of the on and off terminals, the same effect can be obtained.

  3 Feedback resistor circuit section, 8 linear regulator, 8a series regulator, 13, 13a switching element, 18, 18a, 18b switching regulator, 28 shunt regulator, 31a, 31b, 31c, 31d, 31e, 33a, 33b, 33c, 34a, 34b, 34c, 35a, 35b, 35c, 36a, 36b, 36c Feedback resistor, 32a, 32b, 32c, 32d Feedback resistance switching circuit, 324a, 324b, 324c, 324d Primary delay time constant circuit part, 325a, 325b, 325c 325d buffer amplifier, 326a, 326b, 326c, 326d electronic switch, 327a, 327b, 327c, 327d MOSFET

Claims (6)

A regulator that converts a DC input voltage into a DC output voltage corresponding to a differential voltage between a reference voltage and a feedback voltage;
A plurality of feedback resistors, and an electronic switch that divides the connection configuration by the plurality of feedback resistors into two voltage dividing resistor values by performing an on / off operation according to an on / off state of a feedback resistor switching signal from the outside. A feedback resistor circuit unit that outputs a voltage obtained by dividing the output voltage by the two voltage dividing resistor values as the feedback voltage;
A control unit that controls the feedback voltage to be a desired value by controlling the feedback voltage output from the feedback resistor circuit unit by switching and outputting the feedback resistor switching signal; and
The feedback resistor circuit unit receives at least one of a falling signal when the feedback resistor switching signal is switched from on to off or a rising signal when the feedback resistor switching signal is switched from off to on. converted to a primary delay signal, controlled to be turned on and off with the converted at least one or the other to the first-order lag characteristics of the on-off operation of said electronic switch by using a primary delay signal, using said electronic switch A voltage output circuit further comprising a first-order lag time constant circuit that gradually changes the feedback resistance value without instantaneously switching . The voltage output circuit according to claim 1, wherein the electronic switch includes a MOSFET, and the first-order lag signal from the first-order lag time constant circuit is input to a gate terminal of the MOSFET. The voltage output circuit according to claim 1, wherein the first-order lag time constant circuit includes a resistor and a capacitor. The voltage output circuit according to claim 1, wherein the first-order lag time constant circuit includes a resistor, a capacitor, and a diode. The voltage output circuit according to claim 1, wherein the regulator is a switching regulator. The voltage output circuit according to claim 1, wherein the regulator is a series regulator.

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