JP2020150095A - Method for manufacturing glass circuit board - Google Patents

Method for manufacturing glass circuit board Download PDF

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JP2020150095A
JP2020150095A JP2019045471A JP2019045471A JP2020150095A JP 2020150095 A JP2020150095 A JP 2020150095A JP 2019045471 A JP2019045471 A JP 2019045471A JP 2019045471 A JP2019045471 A JP 2019045471A JP 2020150095 A JP2020150095 A JP 2020150095A
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hole
glass substrate
glass
plating
circuit board
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JP7227798B2 (en
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清水 敬介
Keisuke Shimizu
敬介 清水
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Ibiden Co Ltd
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Ibiden Co Ltd
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Abstract

To reduce investment and running cost of a polishing facility.SOLUTION: A method for manufacturing a glass circuit board obtained by forming a pattern wiring on a glass surface of a glass substrate 2 includes forming a through hole 3 on the glass substrate, forming a trench wiring pattern for forming a trench wiring part 5 on the surface of the glass substrate with an insulating material, seed plating the glass substrate formed with the through hole and the trench wiring pattern, subjecting the seed plating to through hole plating, filling the through hole subjected to the through hole plating with a resin and embedding a hole, partially removing the hole-embedding resin, subjecting the surface of the glass substrate from which the hole-embedding resin has been partially removed to lid plating, polishing the portion of the lid plating and the through hole plating and a part of the trench wiring pattern formed of the insulating material by machining processing, and forming a pattern wiring formed of a through hole plating part 4 and a trench wiring part 5.SELECTED DRAWING: Figure 1

Description

本発明は、ガラス基板のガラス表面にパターン配線を形成してなるガラス回路基板の製造方法に関する。 The present invention relates to a method for manufacturing a glass circuit board obtained by forming pattern wiring on the glass surface of the glass substrate.

ガラス基板のガラス表面、例えば表裏の両面にパターン配線を形成してなるガラス回路基板が知られている。このようなガラス回路基板を製造する場合、表裏両面のパターン配線の導通をとるために貫通スルーホールをガラス基板に設け、貫通スルーホールを銅などの金属でめっきする必要がある。この場合、その後にSAP等で配線形成の場合、ガラス表面に残っためっき金属を除去することが必要となる。また、パターン配線の上の保護膜を除去することが必要になる。ガラス基板に対する上記のような処理は、下地のガラス基板にダメージを与えないように、CMP(化学機械研磨)により行うことが通常である(例えば、特許文献1)。 A glass circuit board in which pattern wiring is formed on the glass surface of a glass substrate, for example, both front and back surfaces, is known. When manufacturing such a glass circuit board, it is necessary to provide through holes in the glass substrate and to plate the through holes with a metal such as copper in order to make the pattern wiring on both the front and back surfaces conductive. In this case, when the wiring is subsequently formed by SAP or the like, it is necessary to remove the plated metal remaining on the glass surface. It is also necessary to remove the protective film on the pattern wiring. The above treatment on the glass substrate is usually performed by CMP (chemical mechanical polishing) so as not to damage the underlying glass substrate (for example, Patent Document 1).

特開2016−154252号公報Japanese Unexamined Patent Publication No. 2016-154252

しかしながら、CMPを実施する設備は高価であり、また、CMPで用いる研磨剤等は高コストであった。そのため、CMPを実施するガラス回路基板の製造方法では、設備の投資やランニングコストが高くなる問題があった。また、CMPによる研磨を行っているため、ガラス回路基板の製造にかかる時間が長くなる問題もあった。 However, the equipment for carrying out CMP is expensive, and the abrasives and the like used in CMP are expensive. Therefore, in the method of manufacturing a glass circuit board in which CMP is carried out, there is a problem that equipment investment and running cost are high. Further, since polishing is performed by CMP, there is also a problem that it takes a long time to manufacture a glass circuit board.

本発明に係るガラス回路基板の製造方法は、ガラス基板のガラス表面にパターン配線を形成してなるガラス回路基板の製造方法であって、ガラス基板にスルーホールを形成し、ガラス基板の表面に絶縁材料でトレンチ配線部を形成するためのトレンチ配線パターンを形成し、スルーホールおよびトレンチ配線パターンを形成したガラス基板にシードめっきを施し、シードめっき上にスルーホールめっきを施し、スルーホールめっきを施したスルーホールに樹脂を埋めて穴埋めを実施し、穴埋め樹脂を部分除去し、穴埋め樹脂を部分除去したガラス基板の表面に蓋めっきを施し、蓋めっきおよびスルーホールめっきの部分と絶縁材料からなるトレンチ配線パターンの一部を機械加工で研磨し、スルーホールめっき部およびトレンチ配線部からなるパターン配線を形成する。 The method for manufacturing a glass circuit board according to the present invention is a method for manufacturing a glass circuit board in which pattern wiring is formed on the glass surface of the glass substrate, and a through hole is formed in the glass substrate to insulate the surface of the glass substrate. A trench wiring pattern for forming a trench wiring part was formed from a material, seed plating was applied to a glass substrate on which a through hole and a trench wiring pattern were formed, through hole plating was applied on the seed plating, and through hole plating was applied. Fill the holes with resin by filling the through holes, partially remove the hole filling resin, apply lid plating to the surface of the glass substrate from which the hole filling resin has been partially removed, and perform trench wiring consisting of the lid plating and through hole plating parts and the insulating material. A part of the pattern is machined to form a pattern wiring consisting of a through-hole plating portion and a trench wiring portion.

本発明の実施形態によれば、スルーホールと配線が同時に形成されるため、研磨対象が蓋めっき部分およびスルーホール部分と絶縁材料(樹脂)からなるトレンチ配線部分であり、ガラス基板のもろいガラス表面に研磨を加える必要がなく、CMPを用いる必要がない、グラインダやバイトなどによる機械加工で研磨を実施できる。そのため、研磨設備の投資やランニングコストが低減できる。 According to the embodiment of the present invention, since the through hole and the wiring are formed at the same time, the polishing target is the lid plating portion, the through hole portion and the trench wiring portion made of the insulating material (resin), and the brittle glass surface of the glass substrate. It is not necessary to add polishing to the glass, and it is not necessary to use CMP. Polishing can be performed by machining with a grinder or a cutting tool. Therefore, investment in polishing equipment and running cost can be reduced.

本発明に係るガラス配線基板の製造方法に従って製造したガラス配線基板の一例を示す断面図である。It is sectional drawing which shows an example of the glass wiring board manufactured according to the manufacturing method of the glass wiring board which concerns on this invention. 本発明が対象とするガラス回路基板の通常の製造方法の一工程を示す断面図である。It is sectional drawing which shows one step of the usual manufacturing method of the glass circuit board which is the object of this invention. 本発明が対象とするガラス回路基板の通常の製造方法の他の工程を示す断面図である。It is sectional drawing which shows the other process of the usual manufacturing method of the glass circuit board which is the object of this invention. 本発明が対象とするガラス回路基板の通常の製造方法のさらに他の工程を示す断面図である。It is sectional drawing which shows the other process of the usual manufacturing method of the glass circuit board which is the object of this invention. 本発明が対象とするガラス回路基板の通常の製造方法のさらに他の工程を示す断面図である。It is sectional drawing which shows the other process of the usual manufacturing method of the glass circuit board which is the object of this invention. 本発明が対象とするガラス回路基板の通常の製造方法のさらに他の工程を示す断面図である。It is sectional drawing which shows the other process of the usual manufacturing method of the glass circuit board which is the object of this invention. 本発明が対象とするガラス回路基板の通常の製造方法のさらに他の工程を示す断面図である。It is sectional drawing which shows the other process of the usual manufacturing method of the glass circuit board which is the object of this invention. 本発明が対象とするガラス回路基板の通常の製造方法のさらに他の工程を示す断面図である。It is sectional drawing which shows the other process of the usual manufacturing method of the glass circuit board which is the object of this invention. 本発明が対象とするガラス回路基板の通常の製造方法のさらに他の工程を示す断面図である。It is sectional drawing which shows the other process of the usual manufacturing method of the glass circuit board which is the object of this invention. 本発明が対象とするガラス回路基板の通常の製造方法のさらに他の工程を示す断面図である。It is sectional drawing which shows the other process of the usual manufacturing method of the glass circuit board which is the object of this invention. 本発明に係るガラス回路基板の製造方法の一工程を示す断面図である。It is sectional drawing which shows one step of the manufacturing method of the glass circuit board which concerns on this invention. 本発明に係るガラス回路基板の製造方法の他の工程を示す断面図である。It is sectional drawing which shows the other process of the manufacturing method of the glass circuit board which concerns on this invention. 本発明に係るガラス回路基板の製造方法のさらに他の工程を示す断面図である。It is sectional drawing which shows the other process of the manufacturing method of the glass circuit board which concerns on this invention. 本発明に係るガラス回路基板の製造方法のさらに他の工程を示す断面図である。It is sectional drawing which shows the other process of the manufacturing method of the glass circuit board which concerns on this invention. 本発明に係るガラス回路基板の製造方法のさらに他の工程を示す断面図である。It is sectional drawing which shows the other process of the manufacturing method of the glass circuit board which concerns on this invention. 本発明に係るガラス回路基板の製造方法のさらに他の工程を示す断面図である。It is sectional drawing which shows the other process of the manufacturing method of the glass circuit board which concerns on this invention. 本発明に係るガラス回路基板の製造方法のさらに他の工程を示す断面図である。It is sectional drawing which shows the other process of the manufacturing method of the glass circuit board which concerns on this invention. 本発明に係るガラス回路基板の製造方法のさらに他の工程を示す断面図である。It is sectional drawing which shows the other process of the manufacturing method of the glass circuit board which concerns on this invention. 本発明に係るガラス回路基板の製造方法のさらに他の工程を示す断面図である。It is sectional drawing which shows the other process of the manufacturing method of the glass circuit board which concerns on this invention.

<本発明が対象とするガラス回路基板>
図1は、本発明に係るガラス配線基板の製造方法に従って製造したガラス配線基板の一例を示す断面図である。図1において、ガラス配線基板1は、ガラス基板2に2つのスルーホール3を形成し、ガラス基板2の表裏両面に、スルーホールめっき部4とトレンチ配線部5とを設けている。なお、6はスルーホールめっき部4の内部に設けた穴埋め樹脂部である。
<Glass circuit board targeted by the present invention>
FIG. 1 is a cross-sectional view showing an example of a glass wiring board manufactured according to the method for manufacturing a glass wiring board according to the present invention. In FIG. 1, the glass wiring board 1 has two through holes 3 formed in the glass substrate 2, and through hole plating portions 4 and trench wiring portions 5 are provided on both the front and back surfaces of the glass substrate 2. Reference numeral 6 denotes a hole-filling resin portion provided inside the through-hole plating portion 4.

<本発明が対象とするガラス回路基板の通常の製造方法>
以下、図2A〜図2Iを参照して、本発明が対象とするガラス回路基板の通常の製造方法について説明する。なお、図2A〜図2Iに示す例において、スルーホールの数や各層の厚みなどの寸法は一例を模式的に示したものであり、実際の数や寸法に合わせたものではない。また、符号は1つのスルーホールについて記載しているが、その他のスルーホールの部分でも符号を付していないが同じ構成である。
<Normal manufacturing method of glass circuit board targeted by the present invention>
Hereinafter, a normal manufacturing method of the glass circuit board targeted by the present invention will be described with reference to FIGS. 2A to 2I. In the examples shown in FIGS. 2A to 2I, the dimensions such as the number of through holes and the thickness of each layer are schematically shown as an example, and are not matched to the actual number and dimensions. Further, although the reference numerals are given for one through hole, the other through holes are also not marked but have the same configuration.

まず、ガラス基板から所望の大きさのガラス基板を板取りして、図2Aに示すようなガラス基板10を準備する。次に、図2Bに示すように、ガラス基板10にスルーホール11を形成する。次に、図2Cに示すように、スルーホール11を形成したガラス基板10の表面全体に薄いめっきを施し、シードめっき層12を形成する。次に、図2Dに示すように、シードめっき層12上に銅メッキを施し、スルーホールめっき層13を形成する。次に、図2Eに示すように、スルーホール11のスルーホールめっき層13の空間部に樹脂を充填し、穴埋め樹脂層14を形成する。次に、図2Fに示すように、穴埋め樹脂層14の一部を除去して、スルーホールめっき層13の表面より低いものとする。次に、図2Gに示すように、穴埋め樹脂層14の一部を除去したガラス基板10の全体に銅めっきを施し、蓋めっき層15を形成する。 First, a glass substrate having a desired size is removed from the glass substrate, and a glass substrate 10 as shown in FIG. 2A is prepared. Next, as shown in FIG. 2B, a through hole 11 is formed in the glass substrate 10. Next, as shown in FIG. 2C, the entire surface of the glass substrate 10 on which the through holes 11 are formed is lightly plated to form the seed plating layer 12. Next, as shown in FIG. 2D, copper plating is applied on the seed plating layer 12 to form a through-hole plating layer 13. Next, as shown in FIG. 2E, the space of the through-hole plating layer 13 of the through-hole 11 is filled with resin to form the hole-filling resin layer 14. Next, as shown in FIG. 2F, a part of the hole-filling resin layer 14 is removed so that it is lower than the surface of the through-hole plating layer 13. Next, as shown in FIG. 2G, copper plating is applied to the entire glass substrate 10 from which a part of the hole-filling resin layer 14 has been removed to form a lid plating layer 15.

その後、蓋めっき層15を形成したガラス基板10の表裏の両表面を、化学機械研磨(GMP)により研磨し、ガラス基板10の両表面を研磨する。このCMPによる研磨により、ガラス基板10の表面の蓋めっき層15、スルーホールめっき層13およびシードめっき層12を除去するとともに、ガラス基板10の表面を露出させる。そして、セミアディティブ法(SAP)に従って、スルーホールめっき層13の上にスルーホールめっき部4を形成するとともに、露出したガラス基板10の表面上にトレンチ配線部5を形成する。 Then, both the front and back surfaces of the glass substrate 10 on which the lid plating layer 15 is formed are polished by chemical mechanical polishing (GMP), and both surfaces of the glass substrate 10 are polished. By polishing with this CMP, the lid plating layer 15, the through-hole plating layer 13 and the seed plating layer 12 on the surface of the glass substrate 10 are removed, and the surface of the glass substrate 10 is exposed. Then, according to the semi-additive method (SAP), the through-hole plating portion 4 is formed on the through-hole plating layer 13, and the trench wiring portion 5 is formed on the surface of the exposed glass substrate 10.

図2A〜図2Iに従った、本発明が対象とするガラス回路基板の通常の製造方法によれば、図1に示す構成のガラス回路基板を製造することができる。しかしながら、ガラス基板10を研磨する必要があるため高価なCMPを用いる必要がある。そのため、研磨設備の投資やランニングコストが高くなる。 According to the usual manufacturing method of the glass circuit board targeted by the present invention according to FIGS. 2A to 2I, the glass circuit board having the configuration shown in FIG. 1 can be manufactured. However, since it is necessary to polish the glass substrate 10, it is necessary to use an expensive CMP. Therefore, the investment of polishing equipment and the running cost are high.

<本発明に係るガラス回路基板の製造方法>
以下、図3A〜図3Iを参照して、本発明に係るガラス回路基板の製造方法について説明する。なお、図3A〜図3Iに示す例において、スルーホールの数や各層の厚みなどの寸法は一例を模式的に示したものであり、実際の数や寸法に合わせたものではない。また、符号は1つのスルーホールについて記載しているが、その他のスルーホールの部分でも符号を付していないが同じ構成である。
<Manufacturing method of glass circuit board according to the present invention>
Hereinafter, a method for manufacturing a glass circuit board according to the present invention will be described with reference to FIGS. 3A to 3I. In the examples shown in FIGS. 3A to 3I, the dimensions such as the number of through holes and the thickness of each layer are schematically shown as an example, and are not matched to the actual number and dimensions. Further, although the reference numerals are given for one through hole, the other through holes are also not marked but have the same configuration.

まず、ガラス基板から所望の大きさのガラス基板を板取りして、図3Aに示すようなガラス基板10を準備する。ガラス基板10の材料としては、通常用いられているいずれのガラス基板の材料をも使用することができる。例えば、ホウ珪酸ガラス、無アルカリガラス、ソーダ石灰ガラス、アルミノシリカートガラス、合成石英ガラスにより、ガラス基板10を構成することができる。 First, a glass substrate having a desired size is removed from the glass substrate, and a glass substrate 10 as shown in FIG. 3A is prepared. As the material of the glass substrate 10, any commonly used glass substrate material can be used. For example, the glass substrate 10 can be made of borosilicate glass, non-alkali glass, soda-lime glass, aluminosilicate glass, and synthetic quartz glass.

次に、図3Bに示すように、ガラス基板10にスルーホール11を形成する。ガラス基板10にスルーホール11を形成する方法は、ドリル加工やレーザー加工などの従来から知られている方法を用いることができる。スルーホール11の内壁には、必要に応じて、従来から知られているように、デスミア処理を施す。 Next, as shown in FIG. 3B, a through hole 11 is formed in the glass substrate 10. As a method of forming the through hole 11 on the glass substrate 10, a conventionally known method such as drilling or laser processing can be used. If necessary, the inner wall of the through hole 11 is subjected to desmear treatment as is conventionally known.

次に、図3Cに示すように、スルーホール11を形成したガラス基板10の表面に、絶縁材料でトレンチ配線部5を形成するためのトレンチ配線パターン21を形成する。トレンチ配線パターン21は、従来から知られているように、ガラス基板10の表面に絶縁材料からなる絶縁層を形成し、絶縁層に対しマスクを用いたエッチング処理を行うことで、形成することができる。 Next, as shown in FIG. 3C, a trench wiring pattern 21 for forming the trench wiring portion 5 with an insulating material is formed on the surface of the glass substrate 10 on which the through holes 11 are formed. As is conventionally known, the trench wiring pattern 21 can be formed by forming an insulating layer made of an insulating material on the surface of the glass substrate 10 and etching the insulating layer with a mask. it can.

次に、図3Dに示すように、スルーホール11およびトレンチ配線パターン21を形成したガラス基板10の表面全体に薄いめっきを施し、シードめっき層12を形成する。シードめっき層12は、従来から知られているように、その上に銅めっき層を形成するために設けられものであり、スパッタリングや無電解めっきによりニッケルやクロムなどの金属の層を形成すること得ることができる。 Next, as shown in FIG. 3D, the entire surface of the glass substrate 10 on which the through holes 11 and the trench wiring pattern 21 are formed is lightly plated to form the seed plating layer 12. As is conventionally known, the seed plating layer 12 is provided for forming a copper plating layer on the seed plating layer 12, and forms a metal layer such as nickel or chromium by sputtering or electroless plating. Obtainable.

次に、図3Eに示すように、シードめっき層12上に銅めっきを施し、スルーホールめっき層13を形成する。スルーホールめっき層13は、従来から知られているように、シードめっき層12を陰極として用いて銅などを電気めっきすることで形成することができる。このとき、シードめっき層12は、ガラス基板10とスルーホールめっき層13との密着強度を安定化する機能を有している。 Next, as shown in FIG. 3E, copper plating is performed on the seed plating layer 12 to form the through-hole plating layer 13. As is conventionally known, the through-hole plating layer 13 can be formed by electroplating copper or the like using the seed plating layer 12 as a cathode. At this time, the seed plating layer 12 has a function of stabilizing the adhesion strength between the glass substrate 10 and the through-hole plating layer 13.

次に、図3Fに示すように、スルーホール11のスルーホールめっき層13の空間部に樹脂を充填し、穴埋め樹脂層14を形成する。穴埋め樹脂層14は、従来から知られているように、スルーホール11に樹脂ペーストをスクリーン印刷することで形成することができる。もしくは、ABFのラミネートによって形成する事もできる。このとき、穴埋め樹脂層14は、部品の搭載スペースを確保するために用いられる。 Next, as shown in FIG. 3F, the space of the through-hole plating layer 13 of the through-hole 11 is filled with resin to form the hole-filling resin layer 14. The hole-filling resin layer 14 can be formed by screen-printing a resin paste on the through holes 11, as is conventionally known. Alternatively, it can be formed by laminating ABF. At this time, the hole filling resin layer 14 is used to secure a mounting space for the parts.

次に、図3Gに示すように、穴埋め樹脂層14の一部を除去して、スルーホールめっき層13の表面より低いものとする。穴埋め樹脂層14の一部の除去は、従来から知られているように、レーザー加工またはブラスト加工で行うことができる。 Next, as shown in FIG. 3G, a part of the hole-filling resin layer 14 is removed so that it is lower than the surface of the through-hole plating layer 13. Partial removal of the hole-filling resin layer 14 can be performed by laser processing or blasting, as is conventionally known.

次に、図3Hに示すように、穴埋め樹脂層14の一部を除去したガラス基板10の全体に銅めっきを施し、蓋めっき層15を形成する。蓋めっき層15は、従来から知られているように、銅などの電解めっきにより形成することができる。 Next, as shown in FIG. 3H, copper plating is applied to the entire glass substrate 10 from which a part of the hole-filling resin layer 14 has been removed to form a lid plating layer 15. The lid plating layer 15 can be formed by electrolytic plating such as copper, as is conventionally known.

その後、図3Iに示すように、蓋めっき層15およびスルーホールめっき層13の部分と絶縁材料からなるトレンチ配線パターン21の一部を機械加工で研磨し、スルーホールめっき部4およびトレンチ配線部5からなるパターン配線を形成する。ここで、機械加工は、グラインダまたは切削バイトによる機械加工とすることができる。 After that, as shown in FIG. 3I, a part of the trench wiring pattern 21 made of the lid plating layer 15 and the through hole plating layer 13 and the insulating material is machined, and the through hole plating part 4 and the trench wiring part 5 are polished. A pattern wiring consisting of is formed. Here, the machining can be performed by a grinder or a cutting tool.

切削バイトを用いた機械加工のためには、例えば、(株)ディスコ製DAS8930のサーフェースプラナーを用いて平坦化加工を行うことができる。この際の切削条件の一例は、回転数:100〜5000rpm、ステージの送り速度:0.5〜5mm/secが好ましい。 For machining using a cutting tool, for example, flattening can be performed using a surface planner of DAS8930 manufactured by DISCO Corporation. As an example of the cutting conditions at this time, the rotation speed: 100 to 5000 rpm and the feed rate of the stage: 0.5 to 5 mm / sec are preferable.

図3A〜図3Iに示す本発明の実施形態によれば、研磨対象が、蓋めっき部分およびスルーホール部分と絶縁材料(樹脂)からなるトレンチ配線部分であり、ガラス基板の部分を研磨する必要がない。そのため、CMPを用いる必要がなく、ダマシンプロセス同様にグラインダやバイトなどによる機械加工で研磨を実施でき、研磨設備の投資やランニングコストが低減できる。 According to the embodiment of the present invention shown in FIGS. 3A to 3I, the object to be polished is a lid plating portion, a through-hole portion, and a trench wiring portion made of an insulating material (resin), and it is necessary to polish the portion of the glass substrate. Absent. Therefore, it is not necessary to use CMP, and polishing can be performed by machining with a grinder or a cutting tool as in the damascene process, and investment in polishing equipment and running cost can be reduced.

1 ガラス配線基板
2、10 ガラス基板
3、11 スルーホール
4 スルーホールめっき部
5 トレンチ配線部
6 穴埋め樹脂部
12 シードめっき層
13 スルーホールめっき層
14 穴埋め樹脂層
15 蓋めっき層
21 トレンチ配線パターン
1 Glass wiring board 2, 10 Glass substrate 3, 11 Through hole 4 Through hole plating part 5 Trench wiring part 6 Hole filling resin part 12 Seed plating layer 13 Through hole plating layer 14 Hole filling resin layer 15 Lid plating layer 21 Trench wiring pattern

Claims (2)

ガラス基板のガラス表面にパターン配線を形成してなるガラス回路基板の製造方法であって、
ガラス基板にスルーホールを形成し、
ガラス基板の表面に絶縁材料でトレンチ配線部を形成するためのトレンチ配線パターンを形成し、
スルーホールおよびトレンチ配線パターンを形成したガラス基板にシードめっきを施し、
シードめっき上にスルーホールめっきを施し、
スルーホールめっきを施したスルーホールに樹脂を埋めて穴埋めを実施し、
穴埋め樹脂を部分除去し、
穴埋め樹脂を部分除去したガラス基板の表面に蓋めっきを施し、
蓋めっきおよびスルーホールめっきの部分と絶縁材料からなるトレンチ配線パターンの一部を機械加工で研磨し、スルーホールめっき部およびトレンチ配線部からなるパターン配線を形成する。
A method for manufacturing a glass circuit board in which pattern wiring is formed on the glass surface of the glass substrate.
Through holes are formed on the glass substrate,
A trench wiring pattern for forming a trench wiring part with an insulating material is formed on the surface of the glass substrate.
Seed plating is applied to the glass substrate on which the through-hole and trench wiring patterns are formed.
Through-hole plating is applied on the seed plating,
Through-holes The plated through-holes are filled with resin to fill the holes.
Partially remove the fill-in-the-blank resin
The surface of the glass substrate from which the hole-filling resin has been partially removed is plated with a lid.
A part of the trench wiring pattern made of the lid plating and the through hole plating part and the insulating material is polished by machining to form the pattern wiring consisting of the through hole plating part and the trench wiring part.
請求項1に記載のガラス回路基板の製造方法であって、
前記機械加工が、グラインダまたは切削バイトによる機械加工である。
The method for manufacturing a glass circuit board according to claim 1.
The machining is machining with a grinder or a cutting tool.
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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003060350A (en) * 2001-08-10 2003-02-28 Ibiden Co Ltd Multilayer printed wiring board and manufacturing method therefor
JP2005064451A (en) * 2003-07-31 2005-03-10 Fujitsu Ltd Method for manufacturing semiconductor device, and semiconductor device
JP2006049804A (en) * 2004-07-07 2006-02-16 Shinko Electric Ind Co Ltd Manufacturing method of wiring board
JP2006339350A (en) * 2005-06-01 2006-12-14 Daisho Denshi:Kk Printed wiring board and its manufacturing method
JP2012060100A (en) * 2010-08-09 2012-03-22 Sk Link:Kk Wafer level package structure and manufacturing method of the same
JP2016096262A (en) * 2014-11-14 2016-05-26 凸版印刷株式会社 Wiring circuit board, semiconductor device, method of manufacturing wiring circuit board, and method of manufacturing semiconductor device
JP2018160607A (en) * 2017-03-23 2018-10-11 大日本印刷株式会社 Through-electrode substrate, mounting board with through-electrode substrate, and method for manufacturing through-electrode substrate

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003060350A (en) * 2001-08-10 2003-02-28 Ibiden Co Ltd Multilayer printed wiring board and manufacturing method therefor
JP2005064451A (en) * 2003-07-31 2005-03-10 Fujitsu Ltd Method for manufacturing semiconductor device, and semiconductor device
JP2006049804A (en) * 2004-07-07 2006-02-16 Shinko Electric Ind Co Ltd Manufacturing method of wiring board
JP2006339350A (en) * 2005-06-01 2006-12-14 Daisho Denshi:Kk Printed wiring board and its manufacturing method
JP2012060100A (en) * 2010-08-09 2012-03-22 Sk Link:Kk Wafer level package structure and manufacturing method of the same
JP2016096262A (en) * 2014-11-14 2016-05-26 凸版印刷株式会社 Wiring circuit board, semiconductor device, method of manufacturing wiring circuit board, and method of manufacturing semiconductor device
JP2018160607A (en) * 2017-03-23 2018-10-11 大日本印刷株式会社 Through-electrode substrate, mounting board with through-electrode substrate, and method for manufacturing through-electrode substrate

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