JP2020102769A - Switching circuit - Google Patents

Abstract

To detect values of sense currents flowing through two sense resistors using a common comparison device and an A/D converter.SOLUTION: A switching circuit comprises: high-potential wiring: low-potential wiring; a first main switching element connected between the high-potential wiring and the low-potential wiring; a first sense switching element and a first sense resistor connected in series between the high-potential wiring and the low-potential wiring; a second main switching element connected between the high-potential wiring and the low-potential wiring; a second sense switching element and a second sense resistor connected between the high-potential wiring and the low-potential wiring; a comparison device for outputting an output voltage having a correlation with a differential value obtained by subtracting the voltage generated in the second sense resistor from the voltage generated in the first sense resistor; and an A/D converter for performing A/D conversion of the output voltage from the comparison device.SELECTED DRAWING: Figure 1

Description

The technology disclosed in this specification relates to a switching circuit.

Patent Document 1 discloses a switching circuit for switching a switching element. This switching circuit has a main switching element connected between a high potential wiring and a low potential wiring. A series circuit of a sense switching element and a sense resistor is connected between the high potential wiring and the low potential wiring. The gate of the main switching element is connected to the gate of the sense switching element. Therefore, when the main switching element is turned on, the sense switching element is also turned on. The series circuit of the sense switching element and the sense resistor is provided to detect the current of the main switching element. When a current flows through the main switching element, a sense current having a magnitude having a correlation with the magnitude of the current flows through the series circuit of the sense switching element and the sense resistor. Therefore, a voltage corresponding to the magnitude of the sense current is generated in the sense resistor. The switching circuit of Patent Document 1 has a comparator (differential amplifier) that detects the voltage generated in the sense resistor and an A/D converter that A/D converts the output voltage of the comparator. Therefore, the sense current can be detected as a digital value by the A/D converter.

JP, 2006-271098, A

Two main switching elements may be connected in parallel between the high potential wiring and the low potential wiring. In this case, in order to detect the current of each main switching element, two series circuits of the sense switching element and the sense resistor can be connected in parallel between the high potential wiring and the low potential wiring. In this case, if a comparator and an A/D converter are provided for each sense resistor, the switching circuit becomes large. Therefore, the present specification proposes a technique capable of detecting the value of the sense current flowing through the two sense resistors by a common comparator and A/D converter.

A switching circuit disclosed in the present specification includes a high potential wiring, a low potential wiring, a first main switching element connected between the high potential wiring and the low potential wiring, the high potential wiring and the low potential wiring. A first sense switching element and a first sense resistor connected in series between the wiring, a second main switching element connected between the high potential wiring and the low potential wiring, the high potential wiring and the low potential wiring. An output voltage having a correlation with a difference value obtained by subtracting a voltage generated in the second sense resistor from a voltage generated in the first sense resistor and a second sense switching element and a second sense resistor connected in series between the potential wirings. And a A/D converter for A/D converting the output voltage of the comparator. The gate of the first main switching element is connected to the gate of the first sense switching element. The gate of the second main switching element is connected to the gate of the second sense switching element.

The “output voltage having a correlation with the difference value” may be the difference value itself, a voltage obtained by multiplying the difference value by a constant, or a difference value or a voltage obtained by multiplying the difference value by a constant. May be a level-shifted voltage.

In this switching circuit, a sense current (hereinafter, referred to as a first sense current) corresponding to the first main switching element flows in a series circuit of the first sense switching element and the first sense resistor, and the second sense switching element and the second sense A sense current (hereinafter referred to as the second sense current) corresponding to the second main switching element flows in the series circuit of the resistors. When the first sense current is flowing and the second sense current is not flowing, the difference value is generated from the voltage generated in the first sense resistor (that is, the voltage proportional to the first sense current) to the second sense resistor. It has a value obtained by subtracting the voltage (that is, approximately 0 V). That is, the difference value becomes a positive value, and its absolute value is proportional to the magnitude of the first sense current. When the second sense current is flowing and the first sense current is not flowing, the difference value is from the voltage generated in the first sense resistor (that is, approximately 0 V) to the voltage generated in the second sense resistor (that is, the second sense resistor). The voltage is proportional to the sense current). That is, the difference value becomes a negative value, and its absolute value is proportional to the magnitude of the second sense current. Therefore, it can be known which of the first sense current and the second sense current is flowing depending on whether the difference value is positive or negative. Further, the magnitude of the first sense current and the second sense current can be known from the absolute value of the difference value. The comparator outputs an output voltage having a correlation with the difference value, and the output voltage is A/D converted by the A/D converter. Therefore, it is possible to know which of the first sense current and the second sense current is flowing and the magnitude of the first sense current and the second sense current from the value obtained by A/D conversion by the A/D converter. As described above, according to this switching circuit, the first sense current and the second sense current can be detected by the common comparator and the A/D converter.

The circuit diagram of the switching circuit of an embodiment. The graph which shows the change of each voltage during operation of the switching circuit of an embodiment. The circuit diagram of the switching circuit of the 1st modification. The graph which shows the change of each voltage during operation|movement of the switching circuit of a 1st modification. The circuit diagram of the switching circuit of the 2nd modification.

The switching circuit 10 of the embodiment shown in FIG. 1 includes a high potential wiring 12, a ground 14 (low potential wiring), a semiconductor chip 16, a semiconductor chip 18, a sense resistor 20, and a sense resistor 22. .. A potential higher than that of the ground 14 is applied to the high potential wiring 12. The semiconductor chip 16 and the semiconductor chip 18 each include a switching element that controls a current flowing from the high potential wiring 12 to the ground 14.

The semiconductor chip 16 has a main IGBT (insulated gate bipolar transistor) 16m and a sense IGBT 16s. The main IGBT 16m and the sense IGBT 16s are provided in a common silicon substrate and have substantially the same structure. The size of the sense IGBT 16s is smaller than the size of the main IGBT 16m. The collector of the main IGBT 16m is connected to the high potential wiring 12. The emitter of the main IGBT 16m is directly connected to the ground 14. The collector of the sense IGBT 16s is connected to the high potential wiring 12. The emitter of the sense IGBT 16s is connected to the ground 14 via the sense resistor 20. That is, a series circuit of the sense IGBT 16s and the sense resistor 20 is connected between the high potential wiring 12 and the ground 14. The sense resistor 20 has a resistance value R20. The gate of the main IGBT 16m and the gate of the sense IGBT 16s are connected to each other. The gate of the main IGBT 16m and the gate of the sense IGBT 16s are connected to a common gate drive circuit 24. The gate drive circuit 24 controls the gate voltage Vg16 of the main IGBT 16m and the sense IGBT 16s. Therefore, the main IGBT 16m and the sense IGBT 16s are turned on/off at the same time. When the main IGBT 16m and the sense IGBT 16s are turned on, the main current I16m flows through the main IGBT 16m and the sense current I16s flows through the sense IGBT 16s. Since the size of the sense IGBT 16s is smaller than the size of the main IGBT 16m, the sense current I16s is smaller than the main current I16m. The ratio of the sense current I16s and the main current I16m is substantially equal to the ratio of the size of the sense IGBT 16s and the size of the main IGBT 16m. Therefore, the sense current I16s is smaller than the main current I16m and has a correlation with the main current I16m. The sense current I16s flows to the ground 14 through the sense resistor 20. Therefore, a voltage proportional to the sense current I16s is generated across the sense resistor 20. That is, the emitter potential V16s of the sense IGBT 16s is proportional to the sense current I16s. The potential V16s satisfies the relationship of V16s=R20·I16s.

The semiconductor chip 18 has a main FET (field effect transistor) 18m and a sense FET 18s. Main FET 18m and sense FET 18s are provided in a common silicon carbide substrate and have substantially the same structure. The size of the sense FET 18s is smaller than the size of the main FET 18m. The drain of the main FET 18m is connected to the high potential wiring 12. The source of the main FET 18m is directly connected to the ground 14. The drain of the sense FET 18s is connected to the high potential wiring 12. The source of the sense FET 18s is connected to the ground 14 via the sense resistor 22. That is, a series circuit of the sense FET 18s and the sense resistor 22 is connected between the high potential wiring 12 and the ground 14. The sense resistor 22 has a resistance value R22. The gate of the main FET 18m and the gate of the sense FET 18s are connected to each other. The gate of the main FET 18m and the gate of the sense FET 18s are connected to a common gate drive circuit 26. The gate drive circuit 26 controls the gate voltage Vg18 of the main FET 18m and the sense FET 18s. Therefore, the main FET 18m and the sense FET 18s are turned on/off at the same time. When the main FET 18m and the sense FET 18s are turned on, the main current I18m flows through the main FET 18m and the sense current I18s flows through the sense FET 18s. Since the size of the sense FET 18s is smaller than the size of the main FET 18m, the sense current I18s is smaller than the main current I18m. The ratio of the sense current I18s and the main current I18m is substantially equal to the size of the sense FET 18s and the size of the main FET 18m. Therefore, the sense current I18s is a current smaller than the main current I18m and having a correlation with the main current I18m. The sense current I18s flows to the ground 14 through the sense resistor 22. Therefore, a voltage proportional to the sense current I18s is generated across the sense resistor 22. That is, the source potential V18s of the sense FET 18s is proportional to the sense current I18s. The potential V18s satisfies the relationship of V18s=R22·I18s.

The switching circuit 10 includes a comparator 30, a temperature sensor 32, and a control board 40.

The non-inverting input terminal of the comparator 30 is connected to the emitter of the sense IGBT 16s. The potential V16s of the emitter of the sense IGBT 16s is applied to the non-inverting input terminal. The inverting input terminal of the comparator 30 is connected to the source of the sense FET 18s. The source potential V18s of the sense FET 18s is applied to the inverting input terminal. The comparator 30 outputs, as the output voltage Vout, a potential equal to a value obtained by multiplying the difference value obtained by subtracting the potential V18s from the potential V16s by the amplification factor A. That is, the relationship of Vout=A (V16s-V18s) is satisfied.

The temperature sensor 32 measures the temperature of the semiconductor chips 16 and 18.

The control board 40 has an A/D converter 42, an A/D converter 44, a computing unit 46, and a memory 48. The A/D converter 42 A/D converts the output voltage Vout of the comparator 30. The A/D converter 44 A/D converts the output voltage of the temperature sensor 32 (that is, a value indicating the temperature). The memory 48 stores the control rules for the semiconductor chips 16 and 18. The calculator 46 drives the gate according to the output value of the A/D converter 42 (that is, the output voltage Vout), the output value of the A/D converter 44 (that is, the temperature), and the control rule stored in the memory 48. The command value is transmitted to the circuits 24 and 26. The gate drive circuits 24 and 26 control the semiconductor chips 16 and 18 according to the command value.

The computing unit 46 controls the current flowing from the high potential wiring 12 to the ground 14 by repeatedly switching the main IGBT 16m and the main FET 18m. The main IGBT 16m has a larger current capacity than the main FET 18m, but is more susceptible to loss than the main FET 18m. When the current flowing from the high-potential wiring 12 to the ground 14 is small, the computing unit 46 maintains the main IGBT 16m in the off state and switches the main FET 18m to control this current. This reduces the loss generated in the switching element. When the current flowing from the high-potential wiring 12 to the ground 14 is large, the arithmetic unit 46 maintains the main FET 18m in the off state and switches the main IGBT 16m having a large current capacity to control this current.

FIG. 2 shows changes in each potential during the operation of the switching circuit 10. In the period T1 of FIG. 2, the gate voltage Vg16 is maintained at the gate-on voltage Vgon and the gate voltage Vg18 is maintained at the gate-off voltage Vgoff. Therefore, in the period T1, the main IGBT 16m and the sense IGBT 16s are on, and the main FET 18m and the sense FET 18s are off. In this case, the main current I16m flows through the main IGBT 16m and the sense current I16s flows through the sense IGBT 16s. Therefore, the potential V16s of the emitter of the sense IGBT 16s becomes a potential proportional to the sense current I16s. On the other hand, since no current flows through the main FET 18m and the sense FET 18s, the sense current I18s becomes substantially zero. Therefore, the source potential V18s of the sense FET 18s becomes approximately 0V. Therefore, in the period T1, the output voltage Vout of the comparator 30 satisfies the relationship of Vout=A·V16s. Thus, in the period T1, the output voltage Vout has a positive value, and the absolute value of the output voltage Vout indicates the magnitude of the sense current I16s. Since the sense current I16s has a correlation with the main current I16m, the absolute value of the output voltage Vout in the period T1 indicates the magnitude of the main current I16m.

In the period T2 of FIG. 2, the gate voltage Vg18 is maintained at the gate-on voltage Vgon and the gate voltage Vg16 is maintained at the gate-off voltage Vgoff. Therefore, in the period T2, the main FET 18m and the sense FET 18s are on, and the main IGBT 16m and the sense IGBT 16s are off. In this case, the main current I18m flows through the main FET 18m and the sense current I18s flows through the sense FET 18s. Therefore, the source potential V18s of the sense FET 18s becomes a potential proportional to the sense current I18s. On the other hand, since no current flows in the main IGBT 16m and the sense IGBT 16s, the sense current I16s becomes substantially zero. Therefore, the potential V16s of the emitter of the sense IGBT 16s becomes approximately 0V. Therefore, in the period T2, the output voltage Vout of the comparator 30 satisfies the relationship of Vout=−A·V18s. Thus, in the period T2, the output voltage Vout becomes a negative value, and the absolute value of the output voltage Vout indicates the magnitude of the sense current I18s. Since the sense current I18s has a correlation with the main current I18m, the absolute value of the output voltage Vout in the period T2 indicates the magnitude of the main current I18m.

As described above, when the semiconductor chip 16 (that is, the main IGBT 16m and the sense IGBT 16s) is on, the output voltage Vout has a positive value, and its absolute value indicates the magnitude of the main current I16m. Further, when the semiconductor chip 18 (that is, the main FET 18m and the sense FET 18s) is on, the output voltage Vout has a negative value, and its absolute value indicates the magnitude of the main current I18m. The A/D converter 42 converts the output voltage Vout into a digital value and sends the digital value to the calculator 46. The computing unit 46 determines whether the semiconductor chip 16 is on or the semiconductor chip 18 is on by determining whether the received output voltage Vout is a positive value or a negative value. You can Further, the computing unit 46 can specify the magnitude of the main current I16m or the main current I18m from the absolute value of the received output voltage Vout. Therefore, the calculator 46 can send a command to the gate drive circuits 24 and 26 based on the specified current value.

As described above, according to the switching circuit 10 of the embodiment, the common comparator 30 and the A/D converter 42 detect both the current flowing through the semiconductor chip 16 and the current flowing through the semiconductor chip 18. You can Since it is not necessary to provide a comparator and an A/D converter for each semiconductor chip, the switching circuit can be downsized.

FIG. 3 shows a switching circuit of the first modification. In the switching circuit of FIG. 3, the level shift circuit 34 is provided on the input side of the comparator 30. The other configuration of the switching circuit of FIG. 3 is the same as that of the switching circuit 10 of FIG.

The potential V16s of the emitter of the sense IGBT 16s is input to the level shift circuit 34. The level shift circuit 34 outputs a potential (V16s+Vref) obtained by raising the potential V16s by the reference voltage Vref. The potential (V16s+Vref) is input to the non-inverting input terminal of the comparator 30. Further, the potential V18s of the source of the sense FET 18s is input to the level shift circuit 34. The level shift circuit 34 outputs a potential (V18s-Vref) obtained by reducing the potential V18s by the reference voltage Vref. The potential (V18s-Vref) is input to the inverting input terminal of the comparator 30. Therefore, the output voltage Vout of the comparator 30 satisfies the relationship of Vout=A(V16s-V18s+2Vref).

FIG. 4 shows changes in each potential during the operation of the switching circuit of the first modification. As shown in FIG. 4, during the period T1 in which the semiconductor chip 16 is on, the output voltage Vout satisfies the relationship of Vout=A(V16s+2Vref). Further, during the period T2 in which the semiconductor chip 18 is on, the output voltage Vout satisfies the relationship of Vout=A(-V18s+2Vref). The reference voltage Vref is set so that the output voltage Vout in the period T2 has a positive value. In this way, by providing the level shift circuit 34, the output voltage Vout can always be a positive value. Therefore, even when the input voltage range of the A/D converter 42 is limited to a positive voltage, the A/D converter 42 can operate normally. The computing unit 46 can determine that the semiconductor chip 16 is on when the output voltage Vout is higher than the reference voltage 2A·Vref. In this case, the computing unit 46 can detect the absolute value of the difference value (that is, A·V16s) between the output voltage Vout and the reference voltage 2A·Vref as the value indicating the main current I16m. Further, the computing unit 46 can determine that the semiconductor chip 18 is on when the output voltage Vout is lower than the reference voltage 2A·Vref. In this case, the computing unit 46 can detect the absolute value of the difference value (that is, −A·V18s) between the output voltage Vout and the reference voltage 2A·Vref as the value indicating the main current I18m.

Instead of the level shift circuit 34 of FIG. 3 or in addition to the level shift circuit 34, a level shift circuit may be provided between the output terminal of the comparator 30 and the input terminal of the A/D converter 42. Even with such a configuration, it is possible to always apply a positive voltage to the input terminal of the A/D converter 42.

FIG. 5 shows a switching circuit of the second modification. In FIG. 5, the A/D converters 42 and 44 are separated from the control board 40. In the switching circuit of FIG. 5, the A/D converters 42 and 44 operate with the ground 14 as a reference potential, while the control board 40 operates with a potential lower than the ground 14 as a reference potential. Therefore, the insulating element 60 (for example, a photocoupler or the like) is interposed between the A/D converter 42 and the control board 40, and the A/D converter 42 is connected to the control board 40 via the insulating element 60. The signal is transmitted. An insulating element 62 is interposed between the A/D converter 44 and the control board 40, and a signal is transmitted from the A/D converter 44 to the control board 40 via the insulating element 62. In this manner, the control board 40 and the A/D converters 42 and 44 are insulated from each other, and signals can be transmitted and received between them.

Although the embodiments have been described in detail above, these are merely examples and do not limit the scope of the claims. The technology described in the claims includes various modifications and changes of the specific examples illustrated above. The technical elements described in the present specification or the drawings exhibit technical utility alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. Further, the technique illustrated in the present specification or the drawings achieves a plurality of purposes at the same time, and achieving the one purpose among them has technical utility.

10: switching circuit 12: high-potential wiring 14: ground 16: semiconductor chip 16m: main IGBT
16s: Sense IGBT
18: Semiconductor chip 18m: Main FET
18s: Sense FET
20: sense resistor 22: sense resistor 24: gate drive circuit 26: gate drive circuit 30: comparator 32: temperature sensor 40: control board 42: A/D converter 44: A/D converter 46: calculator 48: memory

Claims (1)

A switching circuit,
High potential wiring,
Low potential wiring,
A first main switching element connected between the high potential wiring and the low potential wiring;
A first sense switching element and a first sense resistor connected in series between the high potential wiring and the low potential wiring;
A second main switching element connected between the high potential wiring and the low potential wiring;
A second sense switching element and a second sense resistor connected in series between the high potential wiring and the low potential wiring;
A comparator that outputs an output voltage having a correlation with a difference value obtained by subtracting the voltage generated in the second sense resistor from the voltage generated in the first sense resistor;
An A/D converter for A/D converting the output voltage of the comparator,
Have
A gate of the first main switching element is connected to a gate of the first sense switching element,
A gate of the second main switching element is connected to a gate of the second sense switching element,
Switching circuit.

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