JP7211068B2 - switching circuit - Google Patents

Description

The technology disclosed in this specification relates to switching circuits.

Patent Literature 1 discloses a switching circuit that switches a switching element. The switching circuit has a main switching element connected between a high potential wire and a low potential wire. A series circuit of a sense switching element and a sense resistor is connected between the high potential wiring and the low potential wiring. The gate of the main switching element is connected to the gate of the sense switching element. Therefore, when the main switching element turns on, the sense switching element also turns on. A series circuit of a sense switching element and a sense resistor is provided for sensing current in the main switching element. When a current flows through the main switching element, a sense current having a magnitude correlated with the magnitude of the current flows through the series circuit of the sense switching element and the sense resistor. Therefore, a voltage corresponding to the magnitude of the sense current is generated across the sense resistor. The switching circuit of Patent Document 1 has a comparator (differential amplifier) that detects the voltage generated in the sense resistor, and an A/D converter that A/D converts the output voltage of the comparator. Therefore, the A/D converter can detect the sense current as a digital value.

JP 2006-271098 A

Two main switching elements may be connected in parallel between the high-potential wiring and the low-potential wiring. In this case, two series circuits of a sense switching element and a sense resistor can be connected in parallel between the high potential wiring and the low potential wiring in order to detect the current of each main switching element. In this case, if a comparator and an A/D converter are provided for each sense resistor, the size of the switching circuit will increase. Therefore, this specification proposes a technique that can detect the values of the sense currents flowing through the two sense resistors using a common comparator and A/D converter.

A switching circuit disclosed in this specification includes a high potential wiring, a low potential wiring, a first main switching element connected between the high potential wiring and the low potential wiring, the high potential wiring and the low potential wiring. a first sense switching element and a first sense resistor connected in series between wires; a second main switching element connected between the high potential wire and the low potential wire; A second sense switching element and a second sense resistor connected in series between potential wirings, and an output voltage correlated with a difference value obtained by subtracting the voltage generated across the second sense resistor from the voltage generated across the first sense resistor. and an A/D converter for A/D converting the output voltage of the comparator. A gate of the first main switching element is connected to a gate of the first sense switching element. A gate of the second main switching element is connected to a gate of the second sense switching element.

The "output voltage having a correlation with the difference value" may be the difference value itself, a voltage obtained by multiplying the difference value by a constant, or a voltage obtained by multiplying the difference value or the difference value by a constant. may be a voltage level-shifted from .

In this switching circuit, a sense current (hereinafter referred to as first sense current) corresponding to the first main switching element flows through the series circuit of the first sense switching element and the first sense resistor, and the second sense switching element and the second sense resistor flow through the series circuit. A sense current (hereinafter referred to as a second sense current) corresponding to the second main switching element flows through the series circuit of resistors. When the first sense current is flowing and the second sense current is not flowing, a difference value is developed across the second sense resistor from the voltage across the first sense resistor (i.e., a voltage proportional to the first sense current). It becomes a value obtained by subtracting the voltage (that is, approximately 0 V). That is, the difference value becomes a positive value, and its absolute value is proportional to the magnitude of the first sense current. When the second sense current is flowing and the first sense current is not flowing, the difference value is the voltage across the first sense resistor (i.e., approximately 0V) to the voltage across the second sense resistor (i.e., the second voltage proportional to the sense current). That is, the difference value becomes a negative value, and its absolute value is proportional to the magnitude of the second sense current. Therefore, depending on whether the difference value is positive or negative, it can be determined whether the first sense current or the second sense current is flowing. Also, the magnitudes of the first sense current and the second sense current can be known from the absolute values of the difference values. The comparator outputs an output voltage having a correlation with the difference value, and the output voltage is A/D converted by the A/D converter. Therefore, from the value A/D-converted by the A/D converter, it can be known which of the first sense current and the second sense current is flowing, and the magnitude of the first sense current and the second sense current. Thus, according to this switching circuit, the first sense current and the second sense current can be detected by the common comparator and A/D converter.

1 is a circuit diagram of a switching circuit according to an embodiment; FIG. 4 is a graph showing changes in voltages during operation of the switching circuit of the embodiment; The circuit diagram of the switching circuit of a 1st modification. 7 is a graph showing changes in voltages during operation of the switching circuit of the first modified example; The circuit diagram of the switching circuit of a 2nd modification.

The switching circuit 10 of the embodiment shown in FIG. 1 has a high potential wiring 12, a ground 14 (low potential wiring), a semiconductor chip 16, a semiconductor chip 18, a sense resistor 20, and a sense resistor 22. . A potential higher than the ground 14 is applied to the high potential wiring 12 . The semiconductor chip 16 and the semiconductor chip 18 have switching elements that control current flowing from the high-potential wiring 12 to the ground 14 .

The semiconductor chip 16 has a main IGBT (insulated gate bipolar transistor) 16m and a sense IGBT 16s. The main IGBT 16m and the sense IGBT 16s are provided in a common silicon substrate and have substantially the same structure. The size of sense IGBT 16s is smaller than the size of main IGBT 16m. A collector of the main IGBT 16 m is connected to the high potential wiring 12 . The emitter of the main IGBT 16m is directly connected to the ground 14. A collector of the sense IGBT 16 s is connected to the high potential wiring 12 . The emitter of sense IGBT 16 s is connected to ground 14 via sense resistor 20 . That is, a series circuit of the sense IGBT 16 s and the sense resistor 20 is connected between the high potential wiring 12 and the ground 14 . Sense resistor 20 has a resistance value R20. The gate of the main IGBT 16m and the gate of the sense IGBT 16s are connected together. A gate of the main IGBT 16 m and a gate of the sense IGBT 16 s are connected to a common gate drive circuit 24 . The gate drive circuit 24 controls the gate voltage Vg16 of the main IGBT 16m and the sense IGBT 16s. Therefore, the main IGBT 16m and the sense IGBT 16s are turned on and off at the same time. When the main IGBT 16m and the sense IGBT 16s are turned on, the main current I16m flows through the main IGBT 16m and the sense current I16s flows through the sense IGBT 16s. Since the size of sense IGBT 16s is smaller than the size of main IGBT 16m, sense current I16s is smaller than main current I16m. The ratio between the sense current I16s and the main current I16m is approximately equal to the ratio between the size of the sense IGBT 16s and the size of the main IGBT 16m. Therefore, the sense current I16s is a current that is smaller than the main current I16m and has a correlation with the main current I16m. Sense current I 16 s flows through sense resistor 20 to ground 14 . Thus, a voltage is developed across sense resistor 20 that is proportional to sense current I16s. That is, the emitter potential V16s of the sense IGBT 16s is proportional to the sense current I16s. The potential V16s satisfies the relationship of V16s=R20·I16s.

The semiconductor chip 18 has a main FET (field effect transistor) 18m and a sense FET 18s. The main FET 18m and sense FET 18s are provided in a common silicon carbide substrate and have substantially the same structure. The size of sense FET 18s is smaller than the size of main FET 18m. A drain of the main FET 18m is connected to the high-potential wiring 12 . The source of the main FET 18m is directly connected to the ground 14. A drain of the sense FET 18 s is connected to the high potential wiring 12 . The source of sense FET 18 s is connected to ground 14 through sense resistor 22 . That is, a series circuit of the sense FET 18 s and the sense resistor 22 is connected between the high potential wiring 12 and the ground 14 . The sense resistor 22 has a resistance value R22. The gate of the main FET 18m and the gate of the sense FET 18s are connected together. The gate of the main FET 18m and the gate of the sense FET 18s are connected to a common gate drive circuit 26. FIG. Gate drive circuit 26 controls gate voltage Vg18 of main FET 18m and sense FET 18s. Therefore, main FET 18m and sense FET 18s are turned on and off at the same time. When the main FET 18m and the sense FET 18s are turned on, the main current I18m flows through the main FET 18m and the sense current I18s flows through the sense FET 18s. Since the size of sense FET 18s is smaller than the size of main FET 18m, sense current I18s is smaller than main current I18m. The ratio of sense current I18s to main current I18m is substantially equal to the ratio of the size of sense FET 18s to the size of main FET 18m. Therefore, the sense current I18s is a current that is smaller than the main current I18m and has a correlation with the main current I18m. Sense current I 18 s flows through sense resistor 22 to ground 14 . Thus, a voltage is developed across sense resistor 22 that is proportional to sense current I18s. That is, the source potential V18s of the sense FET 18s is proportional to the sense current I18s. The potential V18s satisfies the relationship of V18s=R22·I18s.

The switching circuit 10 has a comparator 30 , a temperature sensor 32 and a control board 40 .

A non-inverting input terminal of the comparator 30 is connected to the emitter of the sense IGBT 16s. A potential V16s of the emitter of the sense IGBT 16s is applied to the non-inverting input terminal. The inverting input terminal of comparator 30 is connected to the source of sense FET 18s. A source potential V18s of the sense FET 18s is applied to the inverting input terminal. The comparator 30 outputs a potential equal in magnitude to a value obtained by multiplying the difference value obtained by subtracting the potential V18s from the potential V16s by the amplification factor A as the output voltage Vout. That is, the relationship of Vout=A(V16s-V18s) is satisfied.

A temperature sensor 32 measures the temperature of the semiconductor chips 16 and 18 .

The control board 40 has an A/D converter 42 , an A/D converter 44 , a calculator 46 and a memory 48 . The A/D converter 42 A/D-converts the output voltage Vout of the comparator 30 . The A/D converter 44 A/D-converts the output voltage of the temperature sensor 32 (that is, the value indicating the temperature). The memory 48 stores control rules for the semiconductor chips 16 and 18 . The calculator 46 drives the gate according to the output value of the A/D converter 42 (that is, the output voltage Vout), the output value of the A/D converter 44 (that is, temperature), and the control rule stored in the memory 48. A command value is sent to the circuits 24 and 26 . The gate drive circuits 24, 26 control the semiconductor chips 16, 18 according to the command values.

The calculator 46 controls the current flowing from the high-potential wiring 12 to the ground 14 by repeatedly switching the main IGBT 16m and the main FET 18m. The main IGBT 16m has a larger current capacity than the main FET 18m, but is more susceptible to loss than the main FET 18m. When the current flowing from the high-potential wiring 12 to the ground 14 is small, the arithmetic unit 46 keeps the main IGBT 16m in an off state and switches the main FET 18m to control this current. This reduces the loss caused by the switching element. Further, when the current flowing from the high-potential wiring 12 to the ground 14 is large, the calculator 46 keeps the main FET 18m in an OFF state and switches the main IGBT 16m having a large current capacity to control this current.

FIG. 2 shows changes in each potential during operation of the switching circuit 10 . In the period T1 of FIG. 2, the gate voltage Vg16 is maintained at the gate-on voltage Vgon, and the gate voltage Vg18 is maintained at the gate-off voltage Vgoff. Therefore, during the period T1, the main IGBT 16m and the sense IGBT 16s are on, and the main FET 18m and the sense FET 18s are off. In this case, the main current I16m flows through the main IGBT 16m, and the sense current I16s flows through the sense IGBT 16s. Therefore, the emitter potential V16s of the sense IGBT 16s becomes a potential proportional to the sense current I16s. On the other hand, since no current flows through the main FET 18m and the sense FET 18s, the sense current I18s becomes substantially zero. Therefore, the potential V18s of the source of the sense FET18s is approximately 0V. Therefore, in the period T1, the output voltage Vout of the comparator 30 satisfies the relationship Vout=A·V16s. Thus, in the period T1, the output voltage Vout has a positive value, and the absolute value of the output voltage Vout indicates the magnitude of the sense current I16s. Since the sense current I16s has a correlation with the main current I16m, the absolute value of the output voltage Vout in the period T1 indicates the magnitude of the main current I16m.

In the period T2 of FIG. 2, the gate voltage Vg18 is maintained at the gate-on voltage Vgon, and the gate voltage Vg16 is maintained at the gate-off voltage Vgoff. Therefore, during the period T2, the main FET 18m and the sense FET 18s are on, and the main IGBT 16m and the sense IGBT 16s are off. In this case, the main current I18m flows through the main FET 18m, and the sense current I18s flows through the sense FET 18s. Therefore, the source potential V18s of the sense FET 18s becomes a potential proportional to the sense current I18s. On the other hand, since no current flows through the main IGBT 16m and the sense IGBT 16s, the sense current I16s becomes substantially zero. Therefore, the potential V16s of the emitter of the sense IGBT 16s is approximately 0V. Therefore, in the period T2, the output voltage Vout of the comparator 30 satisfies the relationship of Vout=-A·V18s. Thus, in the period T2, the output voltage Vout has a negative value, and the absolute value of the output voltage Vout indicates the magnitude of the sense current I18s. Since the sense current I18s has a correlation with the main current I18m, the absolute value of the output voltage Vout in the period T2 indicates the magnitude of the main current I18m.

As described above, when the semiconductor chip 16 (that is, the main IGBT 16m and the sense IGBT 16s) is on, the output voltage Vout has a positive value and its absolute value indicates the magnitude of the main current I16m. Also, when the semiconductor chip 18 (that is, the main FET 18m and the sense FET 18s) is on, the output voltage Vout has a negative value, and its absolute value indicates the magnitude of the main current I18m. The A/D converter 42 converts the output voltage Vout into a digital value and transmits the digital value to the calculator 46 . The calculator 46 determines whether the semiconductor chip 16 is on or the semiconductor chip 18 is on by determining whether the received output voltage Vout is a positive value or a negative value. can be done. Further, the calculator 46 can specify the magnitude of the main current I16m or the main current I18m from the received absolute value of the output voltage Vout. Therefore, the calculator 46 can send commands to the gate drive circuits 24, 26 based on the specified current value.

As described above, according to the switching circuit 10 of the embodiment, both the current flowing through the semiconductor chip 16 and the current flowing through the semiconductor chip 18 can be detected by the common comparator 30 and A/D converter 42. can be done. Since it is not necessary to provide a comparator and an A/D converter for each semiconductor chip, the size of the switching circuit can be reduced.

FIG. 3 shows a switching circuit of a first modification. In the switching circuit of FIG. 3, a level shift circuit 34 is provided on the input side of the comparator 30 . Other configurations of the switching circuit of FIG. 3 are the same as the switching circuit 10 of FIG.

The potential V16s of the emitter of the sense IGBT 16s is input to the level shift circuit 34 . The level shift circuit 34 outputs a potential (V16s+Vref) obtained by increasing the potential V16s by the reference voltage Vref. A potential (V16s+Vref) is input to the non-inverting input terminal of the comparator 30. FIG. Also, the potential V18s of the source of the sense FET 18s is input to the level shift circuit 34 . The level shift circuit 34 outputs a potential (V18s-Vref) obtained by lowering the potential V18s by the reference voltage Vref. A potential (V18s-Vref) is input to the inverting input terminal of the comparator 30. FIG. Therefore, the output voltage Vout of the comparator 30 satisfies the relationship of Vout=A(V16s-V18s+2Vref).

FIG. 4 shows changes in each potential during operation of the switching circuit of the first modified example. As shown in FIG. 4, during the period T1 in which the semiconductor chip 16 is on, the output voltage Vout satisfies the relationship of Vout=A(V16s+2Vref). Also, during the period T2 in which the semiconductor chip 18 is on, the output voltage Vout satisfies the relationship of Vout=A(-V18s+2Vref). The reference voltage Vref is set so that the output voltage Vout in the period T2 has a positive value. By providing the level shift circuit 34 in this manner, the output voltage Vout can always be a positive value. Therefore, even if the input voltage range of the A/D converter 42 is limited to only positive voltages, the A/D converter 42 can operate normally. The calculator 46 can determine that the semiconductor chip 16 is on when the output voltage Vout is higher than the reference voltage 2A·Vref. In this case, the calculator 46 can detect the absolute value of the difference between the output voltage Vout and the reference voltage 2A·Vref (that is, A·V16s) as a value indicating the main current I16m. Further, the calculator 46 can determine that the semiconductor chip 18 is on when the output voltage Vout is lower than the reference voltage 2A·Vref. In this case, the computing unit 46 can detect the absolute value of the difference value between the output voltage Vout and the reference voltage 2A·Vref (that is, −A·V18s) as the value indicating the main current I18m.

A level shift circuit may be provided between the output terminal of the comparator 30 and the input terminal of the A/D converter 42 instead of or in addition to the level shift circuit 34 of FIG. Even with such a configuration, a positive voltage can always be applied to the input terminal of the A/D converter 42 .

FIG. 5 shows a switching circuit of a second modification. 5, the A/D converters 42, 44 are separated from the control board 40. In FIG. In the switching circuit of FIG. 5, the A/D converters 42 and 44 operate with the ground 14 as a reference potential, while the control board 40 operates with a potential lower than the ground 14 as a reference potential. For this reason, an isolation element 60 (for example, a photocoupler or the like) is interposed between the A/D converter 42 and the control board 40 . A signal is sent. An insulating element 62 is interposed between the A/D converter 44 and the control board 40 , and signals are transmitted from the A/D converter 44 to the control board 40 via the insulating element 62 . Thus, signals can be transmitted and received between the control board 40 and the A/D converters 42 and 44 while they are insulated from each other.

Although the embodiments have been described in detail above, they are merely examples and do not limit the scope of the claims. The technology described in the claims includes various modifications and changes of the specific examples illustrated above. The technical elements described in this specification or drawings exhibit technical usefulness alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. In addition, the techniques exemplified in this specification or drawings simultaneously achieve a plurality of purposes, and achieving one of them has technical utility in itself.

10: switching circuit 12: high potential wiring 14: ground 16: semiconductor chip 16m: main IGBT
16s: sense IGBT
18: Semiconductor chip 18m: Main FET
18s: Sense FET
20 : Sense resistor 22 : Sense resistor 24 : Gate drive circuit 26 : Gate drive circuit 30 : Comparator 32 : Temperature sensor 40 : Control board 42 : A/D converter 44 : A/D converter 46 : Calculator 48 : memory

Claims (1)

A switching circuit,
high potential wiring,
low potential wiring and
a first main switching element connected between the high potential wiring and the low potential wiring;
a first sense switching element and a first sense resistor connected in series between the high potential wiring and the low potential wiring;
a second main switching element connected between the high potential wiring and the low potential wiring;
a second sense switching element and a second sense resistor connected in series between the high potential wiring and the low potential wiring;
a level shift circuit for outputting a first voltage obtained by increasing the voltage generated across the first sense resistor by a reference voltage and outputting a second voltage obtained by decreasing the voltage generated across the second sense resistor by the reference voltage;
a comparator that outputs an output voltage correlated with a difference value obtained by subtracting the second voltage from the first voltage ;
an A/D converter that A/D converts the output voltage of the comparator;
has
a gate of the first main switching element is connected to a gate of the first sense switching element;
a gate of the second main switching element is connected to a gate of the second sense switching element;
wherein the reference voltage is greater than half the voltage developed across the second sense resistor;
switching circuit.

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