JP2020088245A - Wiring board, electronic device, and electronic module - Google Patents

Wiring board, electronic device, and electronic module Download PDF

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JP2020088245A
JP2020088245A JP2018222541A JP2018222541A JP2020088245A JP 2020088245 A JP2020088245 A JP 2020088245A JP 2018222541 A JP2018222541 A JP 2018222541A JP 2018222541 A JP2018222541 A JP 2018222541A JP 2020088245 A JP2020088245 A JP 2020088245A
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wiring board
insulating substrate
via conductor
conductor group
notch
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JP7145739B2 (en
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三千男 今吉
Michio Imayoshi
三千男 今吉
和史 中村
Kazufumi Nakamura
和史 中村
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Kyocera Corp
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Kyocera Corp
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Abstract

To provide a wiring board, an electronic device, and an electronic module that can be operated for a long period.SOLUTION: A wiring board 1 comprises: an insulating substrate 11 that has a square shape in plan view, opens on principal faces and lateral faces, and has notch parts 12 that are long in a side direction; inner face electrodes 13 that are located on inner faces of the notch parts 12; and a via conductor group 14G that includes a plurality of via conductors 14 both end parts of each of which are located in a thickness direction of the insulating substrate 11, and is located in the insulating substrate 11. In a side direction of the insulating substrate 13, the width W2 of the via conductor group 14G is larger than the width W1 of the notch parts 12.SELECTED DRAWING: Figure 1

Description

本発明は、配線基板、電子装置および電子モジュールに関するものである。 The present invention relates to a wiring board, an electronic device and an electronic module.

従来、セラミックスからなる絶縁基板の主面に電子部品を搭載する配線基板が知られている。 Conventionally, a wiring board is known in which an electronic component is mounted on the main surface of an insulating substrate made of ceramics.

このような配線基板は、主面および側面に開口し、辺方向に長手である切欠き部を有する絶縁基板と、切欠き部の内面に位置する内面電極と、内面電極に接続された絶縁基板の表面および内部に設けられた配線導体とを有している(例えば、特許文献1を参照。)。 Such a wiring board is an insulating substrate having a notch portion that is open in the main surface and the side surface and that is long in the side direction, an inner surface electrode that is located on the inner surface of the notch portion, and an insulating substrate that is connected to the inner surface electrode. And a wiring conductor provided on the inside (see, for example, Patent Document 1).

特開2013-232610号公報JP 2013-232610

近年、電子装置の小型化、高機能化が求められている。電子部品を長時間作動した際、電子部品の熱が切欠き部に伝わり、熱による応力により、配線導体と内面電極との接続部において接続が不良となることが懸念される。 In recent years, miniaturization and high functionality of electronic devices have been demanded. When the electronic component is operated for a long time, the heat of the electronic component is transferred to the notch, and the stress due to the heat may cause a poor connection at the connection between the wiring conductor and the inner surface electrode.

本開示の配線基板は、平面視で方形状であり、主面および側面に開口し、辺方向に長手である切欠き部を有する絶縁基板と、前記切欠き部の内面に位置する内面電極と、それぞれの両端部が前記絶縁基板の厚み方向に位置した複数のビア導体を含み、前記絶縁基板に位置したビア導体群とを有しており、前記絶縁基板の辺方向において、前記ビア導体群の幅が前記切欠き部の幅より大きい。 The wiring substrate of the present disclosure has a rectangular shape in a plan view, an insulating substrate that has a notch portion that is open in the main surface and side surfaces and that is long in the side direction, and an inner surface electrode that is located on the inner surface of the notch portion. , Each end portion includes a plurality of via conductors located in the thickness direction of the insulating substrate, and has a via conductor group located in the insulating substrate, in the side direction of the insulating substrate, the via conductor group Is larger than the width of the cutout portion.

本開示の電子装置は、上記構成の配線基板と、該配線基板に搭載された電子部品とを有している。 The electronic device of the present disclosure includes the wiring board having the above configuration and electronic components mounted on the wiring board.

本開示の電子モジュールは、接続パッドを有するモジュール用基板と、接続パッドにはんだを介して接続された上記構成の電子装置とを有する。 The electronic module of the present disclosure includes a module substrate having a connection pad, and the electronic device having the above-described configuration connected to the connection pad via solder.

本開示の配線基板は、平面視で方形状であり、主面および側面に開口し、辺方向に長手である切欠き部を有する絶縁基板と、切欠き部の内面に位置する内面電極と、それぞれの両端部が絶縁基板の厚み方向に位置した複数のビア導体を含み、絶縁基板に位置したビア導体群とを有しており、絶縁基板の辺方向において、ビア導体群の幅が切欠き部の幅より大きい。上記構成により、電子部品の熱は、平面視にて切欠き部の幅よりも配線基板の外側に大きく広がるので、電子部品の熱が切欠き部に伝わりにくいものとなり、切欠き部への熱による応力を低減させることで、切欠き部の角部において、内面電極と配線導体との接続部における断線を抑制することができる。 The wiring board of the present disclosure has a rectangular shape in a plan view, an insulating substrate having a notch portion that is open in the main surface and the side surface and is long in the side direction, and an inner surface electrode that is located on the inner surface of the notch portion, Each end part includes a plurality of via conductors positioned in the thickness direction of the insulating substrate, and has a via conductor group positioned in the insulating substrate, and the width of the via conductor group is notched in the side direction of the insulating substrate. It is larger than the width of the part. With the above configuration, the heat of the electronic component spreads to the outside of the wiring board more than the width of the cutout portion in plan view, so that the heat of the electronic component is less likely to be transmitted to the cutout portion, and the heat to the cutout portion is reduced. By reducing the stress due to, it is possible to suppress disconnection at the connection between the inner surface electrode and the wiring conductor at the corner of the notch.

本開示の電子装置は、上記構成の配線基板と、配線基板に搭載された電子部品とを有していることによって、小型で高機能な長期信頼性に優れた電子装置とすることができる。 Since the electronic device of the present disclosure has the wiring board having the above-described configuration and the electronic components mounted on the wiring board, the electronic apparatus can be a small-sized electronic device with high functionality and excellent long-term reliability.

本開示の電子モジュールは、接続パッドを有するモジュール用基板と、接続パッドにはんだを介して接続された上記構成の電子装置とを有する装置と、電子装置が接続されたモジュール用基板とを有することによって、長期信頼性に優れたものとすることができる。 An electronic module according to an embodiment of the present disclosure includes a module substrate having a connection pad, a device having the above-configured electronic device connected to the connection pad via solder, and a module substrate to which the electronic device is connected. Thus, the long-term reliability can be improved.

(a)は、第1の実施形態における電子装置を示す上面図であり、(b)は(a)の下面図である。(A) is a top view showing the electronic device according to the first embodiment, and (b) is a bottom view of (a). (a)は、図1に示した電子装置における配線基板を示す上面図であり、(b)は、配線基板の内部上面図である。1A is a top view showing a wiring board in the electronic device shown in FIG. 1, and FIG. 1B is an internal top view of the wiring board. (a)は、図1(a)に示した配線基板のA−A線における縦断面図であり、(b)は、図1(a)に示した配線基板のB−B線における縦断面図である。1A is a vertical sectional view taken along line AA of the wiring board shown in FIG. 1A, and FIG. 1B is a vertical sectional view taken along line BB of the wiring board shown in FIG. 1A. It is a figure. (a)は、第2の実施形態における電子装置を示す上面図であり、(b)は(a)の下面図である。(A) is a top view showing an electronic device according to a second embodiment, and (b) is a bottom view of (a). (a)は、図4に示した電子装置における配線基板を示す上面図であり、(b)は、配線基板の内部上面図である。4A is a top view showing a wiring board in the electronic device shown in FIG. 4, and FIG. 6B is an inner top view of the wiring board. (a)は、図4(a)に示した配線基板のA−A線における縦断面図であり、(b)は、図4(a)に示した配線基板のB−B線における縦断面図である。4A is a vertical sectional view taken along line AA of the wiring board shown in FIG. 4A, and FIG. 4B is a vertical sectional view taken along line BB of the wiring board shown in FIG. 4A. It is a figure. (a)は、第3の実施形態における電子装置を示す上面図であり、(b)は(a)の下面図である。(A) is a top view which shows the electronic device in 3rd Embodiment, (b) is a bottom view of (a). (a)は、図7に示した電子装置における配線基板を示す上面図であり、(b)は、配線基板の内部上面図である。FIG. 8A is a top view showing a wiring board in the electronic device shown in FIG. 7, and FIG. 8B is an internal top view of the wiring board. (a)は、図7(a)に示した配線基板のA−A線における縦断面図であり、(b)は、図7(a)に示した配線基板のB−B線における縦断面図である。7A is a vertical sectional view taken along line AA of the wiring board shown in FIG. 7A, and FIG. 7B is a vertical sectional view taken along line BB of the wiring board shown in FIG. 7A. It is a figure.

本開示のいくつかの例示的な実施形態について、添付の図面を参照しつつ説明する。 Several exemplary embodiments of the present disclosure will be described with reference to the accompanying drawings.

(第1の実施形態)
第1の実施形態における配線基板1は、図1〜図3に示された例のように、絶縁基板11と、絶縁基板11に形成された切欠き部12と、切欠部の内面に位置する内面電極13と、絶縁基板の厚み方向に位置する複数のビア導体14と、絶縁基板11の表面および内部に位置する配線導体15とを含んでいる。電子装置は、配線基板1と、配線基板1に搭載された電子部品2とを含んでいる。電子装置は、例えば電子モジュールを構成するモジュール用基板上の接続パッドに接合材を用いて接続される。
(First embodiment)
The wiring board 1 in the first embodiment is located on the insulating substrate 11, the cutout portion 12 formed in the insulating substrate 11, and the inner surface of the cutout portion, as in the example shown in FIGS. 1 to 3. It includes an inner surface electrode 13, a plurality of via conductors 14 positioned in the thickness direction of the insulating substrate, and wiring conductors 15 positioned on the surface and inside of the insulating substrate 11. The electronic device includes a wiring board 1 and an electronic component 2 mounted on the wiring board 1. The electronic device is connected to a connection pad on a module substrate that constitutes an electronic module, for example, using a bonding material.

本実施形態における配線基板1は、平面視で方形状であり、主面および側面に開口し、辺方向に長手である切欠き部12を有する絶縁基板11と、切欠き部12の内面に位置する内面電極13と、それぞれの両端部が絶縁基板13の厚み方向に位置した複数のビア導体14を含み、絶縁基板11に位置したビア導体群14Gとを有しており、絶縁基板13の辺方向において、ビア導体群14Gの幅W2が切欠き部12の幅W1より大きくなっている(W2>W1)。図1〜図3において、上方向とは、仮想のz軸の正方向のことをいう。なお、以下の説明における上下の区別は便宜的なものであり、実際に配線基板1等が使用される際の上下を限定するものではない。 The wiring board 1 in the present embodiment has a rectangular shape in a plan view, and is located on the inner surface of the notch 12 and the insulating board 11 that has a notch 12 that is open in the main surface and side surfaces and that is long in the side direction. The inner surface electrode 13 and a plurality of via conductors 14 each having both ends located in the thickness direction of the insulating substrate 13 and a via conductor group 14G located on the insulating substrate 11; In the direction, the width W2 of the via conductor group 14G is larger than the width W1 of the cutout portion 12 (W2>W1). 1 to 3, the upward direction means the positive direction of the virtual z axis. The distinction between upper and lower sides in the following description is for convenience, and does not limit the upper and lower sides when the wiring board 1 or the like is actually used.

内面電極13は、図1〜図3に示す例において、網掛けにて示している。ビア導体14は、図2に示す例において、ビア導体14の側面と重なる領域を点線にて示している。配線導体15は、図1〜図3に示す例において、網掛けにて示している。 The inner surface electrode 13 is shown by hatching in the examples shown in FIGS. In the example shown in FIG. 2, the via conductor 14 shows a region overlapping with the side surface of the via conductor 14 by a dotted line. The wiring conductor 15 is shaded in the examples shown in FIGS.

絶縁基板11は、一方主面(図1〜図3では上面)および一方主面に相対する他方主面(図1〜図3では下面)と、側面とを有している。絶縁基板11は、複数の絶縁層からなり、
平面視にて、主面および側面に開口し、辺方向に長手である切欠き部12を有している。絶縁基板11は、平面視すなわち主面に垂直な方向から見ると方形状を有している。絶縁基板11は、電子部品2を支持するための支持体として機能する。
The insulating substrate 11 has one main surface (upper surface in FIGS. 1 to 3), the other main surface (lower surface in FIGS. 1 to 3) facing the one main surface, and side surfaces. The insulating substrate 11 is composed of a plurality of insulating layers,
It has a notch 12 that is open in the main surface and the side surface and is long in the side direction in a plan view. The insulating substrate 11 has a rectangular shape when seen in a plan view, that is, a direction perpendicular to the main surface. The insulating substrate 11 functions as a support for supporting the electronic component 2.

絶縁基板11は、例えば、酸化アルミニウム質焼結体(アルミナセラミックス),窒化アルミニウム質焼結体,窒化珪素質焼結体、ムライト質焼結体またはガラスセラミックス焼結体等のセラミックスを用いることができる。絶縁基板11は、例えば酸化アルミニウム質焼結体である場合であれば、酸化アルミニウム(Al),酸化珪素(SiO),酸化マグネシウム(MgO),酸化カルシウム(CaO)等の原料粉末に適当な有機バインダーおよび溶剤等を添加混合して泥漿物を作製する。この泥漿物を、従来周知のドクターブレード法またはカレンダーロール法等を採用してシート状に成形することによってセラミックグリーンシートを作製する。次に、このセラミックグリーンシートに適当な打ち抜き加工を施すとともに、セラミックグリーンシートを複数枚積層して生成形体を形成し、この生成形体を高温(約1400℃)で焼成することによって絶縁基板11が製作される。 The insulating substrate 11 may be made of a ceramic such as an aluminum oxide sintered body (alumina ceramics), an aluminum nitride sintered body, a silicon nitride sintered body, a mullite sintered body, or a glass ceramic sintered body. it can. If the insulating substrate 11 is, for example, an aluminum oxide sintered body, raw material powder of aluminum oxide (Al 2 O 3 ), silicon oxide (SiO 2 ), magnesium oxide (MgO), calcium oxide (CaO), or the like. An appropriate organic binder, a solvent, etc. are added and mixed to prepare a slurry. A ceramic green sheet is produced by forming this sludge into a sheet shape by employing a conventionally known doctor blade method, calendar roll method, or the like. Next, the ceramic green sheet is appropriately punched, a plurality of ceramic green sheets are laminated to form a green body, and the green body is fired at a high temperature (about 1400° C.), so that the insulating substrate 11 is formed. It is produced.

切欠き部12は、絶縁基板11の側面に、絶縁基板11の主面および側面に開口して設けられている。切欠き部12は、図1〜図3に示す例のように、平面視にて角部が円弧状の矩形状に形成されている。なお、切欠き部12は、平面視において、半楕円形状または半長円形状であっても、あるいは複数の段差を有する矩形状であっても構わない。切欠き部12は、絶縁基板11の辺方向に沿って長く形成されており、幅が深さよりも大きくなっている。切欠き部12は、絶縁基板11の一方主面から他方主面にかけて設けられていてもよいし、絶縁基板14の側面の途中から主面にかけて設けられていても構わない。このような切欠き部12は、絶縁基板11用のセラミックグリーンシートのいくつかに、レーザー加工または金型による打ち抜き加工等によって、切欠き部12となる貫通孔を形成しておくことにより形成される。 The cutout portion 12 is provided on the side surface of the insulating substrate 11 with an opening in the main surface and the side surface of the insulating substrate 11. The notch 12 is formed in a rectangular shape whose corners are arcuate in plan view, as in the example shown in FIGS. 1 to 3. The cutout 12 may have a semi-elliptical shape, a semi-elliptical shape, or a rectangular shape having a plurality of steps in a plan view. The notch 12 is formed long along the side direction of the insulating substrate 11 and has a width larger than its depth. The notch 12 may be provided from one main surface to the other main surface of the insulating substrate 11, or may be provided from the middle of the side surface of the insulating substrate 14 to the main surface. The notch 12 is formed by forming through holes to be the notch 12 in some of the ceramic green sheets for the insulating substrate 11 by laser processing, punching with a die or the like. It

内面電極13は、図1〜図3に示す例のように、切欠き部12の内面に位置しており、絶縁基板11の厚み方向に位置している。配線導体15は、絶縁基板11の主面および内部に位置している。配線導体15は、絶縁基板11の表面および内部に位置する配線層と絶縁基板11を構成する絶縁層を貫通して上下位置する配線層同士を電気的に接続する貫通導体とを含んでいる。配線導体15は、図1〜図3に示す例において、絶縁基板11の主面に位置している。内面電極13は、図1〜図3に示す例のように、配線導体15に電気的に接続されている。内面電極13および配線導体15は、配線基板1に搭載された電子部品2と外部のモジュール用基板とを電気的に接続するためのものである。 The inner surface electrode 13 is located on the inner surface of the notch 12 as in the example shown in FIGS. 1 to 3, and is located in the thickness direction of the insulating substrate 11. The wiring conductor 15 is located on the main surface and the inside of the insulating substrate 11. The wiring conductor 15 includes a wiring layer located on the surface and inside of the insulating substrate 11 and a penetrating conductor that penetrates through the insulating layer forming the insulating substrate 11 and electrically connects the wiring layers located above and below. The wiring conductor 15 is located on the main surface of the insulating substrate 11 in the example shown in FIGS. The inner surface electrode 13 is electrically connected to the wiring conductor 15 as in the example shown in FIGS. The inner surface electrodes 13 and the wiring conductors 15 are for electrically connecting the electronic component 2 mounted on the wiring board 1 and an external module substrate.

内面電極13または配線導体15は、タングステン(W),モリブデン(Mo),マンガン(Mn),銀(Ag),銅(Cu)等の金属粉末メタライズから成る。WまたはMo等の高融点金属材料を用いる場合には、例えばCuと混合または合金化して用いても構わない。 The inner surface electrode 13 or the wiring conductor 15 is made of metal powder metallization such as tungsten (W), molybdenum (Mo), manganese (Mn), silver (Ag), copper (Cu). When a refractory metal material such as W or Mo is used, it may be mixed with or alloyed with Cu, for example.

内面電極13または配線導体15は、例えば絶縁基板11用のセラミックグリーンシートに配線導体15用のメタライズペーストをスクリーン印刷法等の印刷手段によって印刷塗布し、絶縁基板11用のセラミックグリーンシートとともに焼成することによって形成される。また、貫通導体は、例えば絶縁基板11用のセラミックグリーンシートに金型またはパンチングによる打ち抜き加工またはレーザー加工等の加工方法によって貫通導体用の貫通孔を形成し、この貫通孔に貫通導体用のメタライズペーストを上記印刷手段によって充填しておき、絶縁基板11用のセラミックグリーンシートとともに焼成することによって形成される。 For the inner surface electrode 13 or the wiring conductor 15, for example, a ceramic green sheet for the insulating substrate 11 is printed and applied with a metallizing paste for the wiring conductor 15 by a printing means such as a screen printing method, and is baked together with the ceramic green sheet for the insulating substrate 11. Formed by. Further, the through conductor is formed by forming a through hole for the through conductor in a ceramic green sheet for the insulating substrate 11 by a processing method such as punching by a die or punching or laser processing, and metalizing the through conductor in the through hole. It is formed by filling the paste with the above-mentioned printing means and firing it together with the ceramic green sheet for the insulating substrate 11.

ビア導体14は、配線基板1に実装された電子部品2で生じる熱を配線基板1の外に逃が
して、配線基板1の放熱性を高めるためのものであり、両端部が絶縁基板11の厚み方向に位置している。ビア導体14は、円形状の柱状の形状を有している。なお、ビア導体14は、絶縁基板11内に複数位置しており、ビア導体群14Gを形成している。図1〜図3に示す例において、ビア導体群14Gは、9個のビア導体により形成されている。ビア導体群14Gは、平面透視にて、配線基板1に搭載される電子部品2と重なる位置に形成されている。それぞれのビア導体14は主成分としてCuWを含んでいる。
The via conductors 14 are for releasing the heat generated in the electronic component 2 mounted on the wiring board 1 to the outside of the wiring board 1 to enhance the heat dissipation of the wiring board 1, and both ends thereof have the thickness of the insulating board 11. Located in the direction. The via conductor 14 has a circular columnar shape. A plurality of via conductors 14 are located in the insulating substrate 11 and form a via conductor group 14G. In the example shown in FIGS. 1 to 3, the via conductor group 14G is formed by nine via conductors. The via conductor group 14G is formed at a position overlapping the electronic component 2 mounted on the wiring board 1 when seen in a plan view. Each via conductor 14 contains CuW as a main component.

このような複数のビア導体14は、絶縁基板11用のセラミックグリーンシートに金型またはパンチングによる打ち抜き加工またはレーザー加工によって複数の穴を設けた後、設けられた複数の穴にビア導体14用の金属ペーストを配置することによって作製される。 Such a plurality of via conductors 14, after forming a plurality of holes in the ceramic green sheet for the insulating substrate 11 by punching or laser processing by a die or punching, the via conductors 14 for the via conductor 14 in the plurality of holes provided. It is made by placing a metal paste.

ビア導体14は、主成分としてCuWを含んだ金属粉末メタライズからなる。金属粉末は、混合、合金のいずれの形態であってもよい。例えば、Wの金属粉末とCuの金属粉末に、有機バインダーおよび有機溶剤、また必要に応じて分散剤等を加えて製作したビア導体14用のメタライズペーストを、セラミックグリーンシートに形成した複数の穴にスクリーン印刷法等を用いて印刷して充填することにより製作される。ビア導体14を構成する成分中においては、主成分であるCuWの含有量が最も多い。また、ビア導体14を構成する成分中においては、CuWが50質量%以上含まれていればよく、好ましくは、CuWが80質量%以上含まれていることが好ましい。 The via conductor 14 is made of metal powder metallization containing CuW as a main component. The metal powder may be in the form of a mixture or an alloy. For example, a metallized paste for a via conductor 14 made by adding an organic binder, an organic solvent, and a dispersant if necessary to a metal powder of W and a metal powder of Cu is formed in a plurality of holes formed in a ceramic green sheet. It is manufactured by printing by using a screen printing method or the like and filling. Among the components forming the via conductor 14, the content of CuW which is the main component is the largest. Further, in the component forming the via conductor 14, it is sufficient that CuW is contained at 50% by mass or more, and preferably CuW is contained at 80% by mass or more.

また、図2に示す例のように、絶縁基板11の厚み方向におけるビア導体群14Gの両端部に、平面透視にてビア導体群14Gと重なるように金属層16が位置していてもよい。このような金属層16は、ビア導体14と同様に、主成分としてCuWを含んでいることが好ましい。 Further, as in the example shown in FIG. 2, the metal layers 16 may be located at both ends of the via conductor group 14G in the thickness direction of the insulating substrate 11 so as to overlap the via conductor group 14G in a plan view. Like the via conductor 14, such a metal layer 16 preferably contains CuW as a main component.

金属層16は、ビア導体16と同様な方法により形成された金属層16用のメタライズペーストを、セラミックグリーンシート上に埋設された複数のビア導体14用のメタライズペーストに重なるように、スクリーン印刷法等を用いて印刷することにより製作される。また、金属層16を構成する成分中においては、CuWが50質量%以上含まれていればよく、好ましくは、80質量%以上含まれていることが好ましい。 The metal layer 16 is formed by a method similar to that of the via conductor 16 so that the metallizing paste for the metal layer 16 is overlapped with the metallizing paste for the plurality of via conductors 14 embedded on the ceramic green sheet by a screen printing method. It is manufactured by printing using the etc. Further, in the component forming the metal layer 16, it is sufficient that CuW is contained in an amount of 50% by mass or more, and preferably 80% by mass or more.

本実施形態の電子装置の配線導体が、例えば、モジュール用基板の接続パッドにはんだを介して接続されて、電子モジュールとなる。電子装置は、切欠き部12の内面に位置する内面電極13と配線基板1の他方主面に位置する配線導体15とが、モジュール用基板の接続パッドに接続される。 The wiring conductor of the electronic device of the present embodiment is connected to the connection pad of the module substrate via solder, for example, to form an electronic module. In the electronic device, the inner surface electrode 13 located on the inner surface of the notch 12 and the wiring conductor 15 located on the other main surface of the wiring board 1 are connected to the connection pads of the module board.

本実施形態の配線基板1によれば、平面視で方形状であり、主面および側面に開口し、辺方向に長手である切欠き部12を有する絶縁基板11と、切欠き部12の内面に位置する内面電極13と、それぞれの両端部が絶縁基板11の厚み方向に位置した複数のビア導体14を含み、絶縁基板11に位置したビア導体群14Gとを有しており、絶縁基板13の辺方向において、ビア導体群14Gの幅W2が切欠き部12の幅W1より大きい(W2>W1)。上記構成により、電子部品2の熱は、平面視にて切欠き部12の幅よりも配線基板1の外側に大きく広がるので、電子部品2の熱が切欠き部12に伝わりにくいものとなり、切欠き部12への熱による応力を低減させることで、切欠き部12の角部において、内面電極13と配線導体15との接続部における断線を抑制することができる。 According to the wiring board 1 of the present embodiment, the insulating substrate 11 has a rectangular shape in a plan view, has a notch 12 that is open in the main surface and side surfaces, and is long in the side direction, and the inner surface of the notch 12. And an inner surface electrode 13 located on the insulating substrate 11 and a plurality of via conductors 14 each having both ends located in the thickness direction of the insulating substrate 11, and a via conductor group 14G located on the insulating substrate 11. The width W2 of the via conductor group 14G is larger than the width W1 of the cutout portion 12 in the side direction (W2>W1). With the above configuration, the heat of the electronic component 2 spreads to the outside of the wiring board 1 more than the width of the cutout portion 12 in a plan view, so that the heat of the electronic component 2 is less likely to be transferred to the cutout portion 12. By reducing the stress on the notch 12 due to heat, it is possible to suppress disconnection at the connection between the inner surface electrode 13 and the wiring conductor 15 at the corner of the notch 12.

また、電子部品2が発光素子である場合、長期間にわたって切欠き部12への熱による応力を低減させることで、切欠き部12の角部において、内面電極13と配線導体15との接続部における断線を抑制することができ、良好に光を放出することができる小型の発光装置用の配線基板1とすることができる。 Further, when the electronic component 2 is a light emitting element, the stress due to heat to the cutout 12 is reduced for a long period of time, so that the connection portion between the inner surface electrode 13 and the wiring conductor 15 is formed at the corner of the cutout 12. It is possible to obtain the wiring board 1 for a small-sized light emitting device which can suppress the disconnection in the above and can satisfactorily emit light.

また、絶縁基板11の辺方向において、切欠き部12における幅方向の両端部がビア導体群14Gにおける幅方向の両端部より内側に位置していると、電子部品2の熱は、平面視にて切欠き部12の角よりも配線基板1の外側に放熱されやすくなり、切欠き部12への熱による応力を低減させることで、切欠き部12の角部において、内面電極13と配線導体15との接続部における断線をより効果的に抑制することができる。 Further, when the widthwise both ends of the notch 12 are located inside the widthwise both ends of the via conductor group 14G in the side direction of the insulating substrate 11, the heat of the electronic component 2 is seen in a plan view. The heat is more easily radiated to the outside of the wiring board 1 than the corners of the notch 12, and the stress due to the heat to the notch 12 is reduced, so that the inner surface electrode 13 and the wiring conductor are formed at the corners of the notch 12. It is possible to more effectively suppress disconnection in the connection portion with 15.

なお、切欠き部12における幅方向の両端部とは、図1〜図3に示す例のように、切り欠き部12が位置する絶縁基板11の辺方向における切り欠き部12の幅方向における両端部を示している。 It should be noted that the widthwise both ends of the notch 12 are, as in the example shown in FIGS. 1 to 3, both ends in the width direction of the notch 12 in the side direction of the insulating substrate 11 where the notch 12 is located. Parts are shown.

また、ビア導体群14Gにおける幅方向の両端部とは、図1〜図3に示す例のように、上記の切り欠き部12が位置する絶縁基板11の辺方向におけるビア導体群14Gにおける幅方向の両端部を示している。 In addition, the widthwise ends of the via conductor group 14G mean the widthwise direction of the via conductor group 14G in the side direction of the insulating substrate 11 where the above-mentioned cutout 12 is located, as in the example shown in FIGS. Shows both ends of.

また、図1〜図3に示す例のように、平面透視において、ビア導体群14Gは、ビア導体群14Gから切欠き部12に向かう方向に対して傾斜した傾斜部を有していると、切欠き部12側におけるビア導体群14Gにおける幅が小さくなり、切欠き部12側への伝熱が低減されるので、切欠き部12への熱による応力を低減させることで、切欠き部12の角部において、内面電極13と配線導体15との接続部における断線を抑制することができる。なお、平面透視において、ビア導体群14Gの傾斜部は、ビア導体群14Gから切欠き部12に向かう方向に対して複数のビア導体14が傾斜して並んでいる。 In addition, as in the example shown in FIGS. 1 to 3, when seen in a plan view, the via conductor group 14G has an inclined portion that is inclined with respect to the direction from the via conductor group 14G to the cutout portion 12, Since the width of the via conductor group 14G on the side of the cutout portion 12 becomes smaller and the heat transfer to the side of the cutout portion 12 is reduced, the stress due to the heat on the cutout portion 12 is reduced, and thus the cutout portion 12 is reduced. It is possible to suppress disconnection at the connection between the inner surface electrode 13 and the wiring conductor 15 at the corner of the. In the plan view perspective, the inclined portion of the via conductor group 14G is formed by arranging a plurality of via conductors 14 inclined with respect to the direction from the via conductor group 14G to the notch 12.

ビア導体群14Gの両端部に位置する金属層16は、図1〜図3に示す例のように、平面透視にて、ビア導体群14Gを構成する複数のビア導体14と重なるようにそれぞれ位置すると、複数のビア導体群14のそれぞれと金属層16との間で効率よく伝熱することができ、切欠き部12への熱による応力を低減させることで、切欠き部12の角部において、内面電極13と配線導体15との接続部における断線をより効果的に抑制することができる。 The metal layers 16 located at both ends of the via conductor group 14G are positioned so as to overlap the plurality of via conductors 14 forming the via conductor group 14G in plan view, as in the example shown in FIGS. 1 to 3. Then, heat can be efficiently transferred between each of the plurality of via conductor groups 14 and the metal layer 16, and by reducing the stress due to heat to the notch 12, the corner of the notch 12 can be reduced. Therefore, it is possible to more effectively suppress the disconnection in the connection portion between the inner surface electrode 13 and the wiring conductor 15.

電子装置は、上記構成の配線基板1と、配線基板1に搭載された電子部品2とを有していることによって、小型で高機能な長期信頼性に優れた電子装置とすることができる。 Since the electronic device has the wiring board 1 having the above-described configuration and the electronic component 2 mounted on the wiring board 1, the electronic device can be a small-sized electronic device with high functionality and excellent long-term reliability.

電子モジュールは、接続パッドを有するモジュール用基板と、接続パッドにはんだを介して接続された上記構成の電子装置とを有する装置と、電子装置が接続されたモジュール用基板とを有することによって、長期信頼性に優れたものとすることができる。 The electronic module has a module substrate having a connection pad, a device having the electronic device of the above configuration connected to the connection pad via solder, and a module substrate to which the electronic device is connected. It can be made highly reliable.

(第2の実施形態)
次に、第2の実施形態による配線基板1について、図4〜図6を参照しつつ説明する。
(Second embodiment)
Next, the wiring board 1 according to the second embodiment will be described with reference to FIGS. 4 to 6.

第2の実施形態における配線基板1において、上記した実施形態の配線基板1と異なる点は、平面透視において、ビア導体群14Gは、切欠き部12の長手方向と平行な辺部を有している点である。 The wiring board 1 according to the second embodiment is different from the wiring board 1 according to the above-described embodiment in that the via conductor group 14G has a side portion parallel to the longitudinal direction of the cutout portion 12 in plan view. That is the point.

内面電極13は、図4〜図6に示す例において、網掛けにて示している。ビア導体14は、図5に示す例において、ビア導体14の側面と重なる領域を点線にて示している。配線導体15は、図4〜図6に示す例において、網掛けにて示している。 The inner surface electrode 13 is shown by hatching in the examples shown in FIGS. In the example shown in FIG. 5, the via conductor 14 is shown by a dotted line in a region overlapping the side surface of the via conductor 14. The wiring conductor 15 is shaded in the examples shown in FIGS.

第2の実施形態による配線基板1において、図4〜図6に示す例において、ビア導体群14Gは、19個のビア導体により形成されている。ビア導体群14Gは、平面透視にて、配線基板1に搭載される電子部品2と重なる位置に形成されている。それぞれのビア導体14は
主成分としてCuWを含んでいる。
In the wiring board 1 according to the second embodiment, in the example shown in FIGS. 4 to 6, the via conductor group 14G is formed by 19 via conductors. The via conductor group 14G is formed at a position overlapping the electronic component 2 mounted on the wiring board 1 when seen in a plan view. Each via conductor 14 contains CuW as a main component.

第2の実施形態における配線基板1によれば、上記した実施形態の配線基板1と同様に、電子部品2の熱は、平面視にて切欠き部12の幅よりも配線基板1の外側に大きく広がるので、電子部品2の熱が切欠き部12に伝わりにくいものとなり、切欠き部12への熱による応力を低減させることで、切欠き部12の角部において、内面電極13と配線導体15との接続部における断線を抑制することができる。 According to the wiring board 1 of the second embodiment, as in the wiring board 1 of the above-described embodiment, the heat of the electronic component 2 is outside the width of the notch 12 in the plan view to the outside of the wiring board 1. Since it spreads greatly, the heat of the electronic component 2 is less likely to be transferred to the cutout portion 12, and the stress due to the heat to the cutout portion 12 is reduced, so that the inner surface electrode 13 and the wiring conductor are formed at the corners of the cutout portion 12. It is possible to suppress disconnection at the connection portion with 15.

また、平面透視において、ビア導体群14Gは、図4〜図6に示す例のように、切欠き部12の長手方向と平行な辺部を有していると、切欠き部12の辺に沿って均等に伝熱されやすくなり、切欠き部12の角部における伝熱を抑制し、内面電極13と配線導体15との接続部における断線を抑制することができる。なお、平面透視において、ビア導体群14Gの辺部は、切欠き部12の長手方向と平行に複数のビア導体14が並んでいる。 Further, in the plan view, when the via conductor group 14G has a side portion parallel to the longitudinal direction of the cutout portion 12 as in the examples shown in FIGS. The heat can be easily transferred evenly along the corners, heat transfer at the corners of the notch 12 can be suppressed, and disconnection at the connection between the inner surface electrode 13 and the wiring conductor 15 can be suppressed. In plan view, a plurality of via conductors 14 are arranged in parallel with the longitudinal direction of the notch 12 in the side portion of the via conductor group 14G.

また、図4〜図6に示す例のように、絶縁基板11の辺方向において、ビア導体群14Gにおける辺部の両端部が切欠き部12における幅方向の両端部より内側に位置していると、電子部品2の熱が切欠き部12に伝わりにくいものとなり、切欠き部12への熱による応力を低減させることで、切欠き部12の角部において、内面電極13と配線導体15との接続部における断線を抑制することができる。また、切欠き部12の幅W1がビア導体群14Gにおける辺部の幅W3より大きくなっている(W1>W3)。 Further, as in the examples shown in FIGS. 4 to 6, both ends of the side portion of the via conductor group 14G are located inside the both ends of the cutout portion 12 in the width direction in the side direction of the insulating substrate 11. Then, the heat of the electronic component 2 is less likely to be transferred to the notch 12, and the stress due to the heat to the notch 12 is reduced, so that the inner surface electrodes 13 and the wiring conductors 15 are formed at the corners of the notch 12. It is possible to suppress disconnection at the connection portion of. Further, the width W1 of the cutout portion 12 is larger than the width W3 of the side portion of the via conductor group 14G (W1>W3).

第2の実施形態の配線基板1は、その他は上述の実施形態の配線基板1と同様の製造方法を用いて製作することができる。 The wiring board 1 of the second embodiment can be manufactured by using the same manufacturing method as that of the wiring board 1 of the above-described embodiment except for the above.

(第3の実施形態)
次に、第3の実施形態による配線基板1について、図7〜図9を参照しつつ説明する。
(Third Embodiment)
Next, the wiring board 1 according to the third embodiment will be described with reference to FIGS. 7 to 9.

第3の実施形態における配線基板1において、上記した実施形態の配線基板1と異なる点は、切欠き部12における幅方向の両端部に段部12aが位置しており、内面電極13を有する領域の外側に内面電極13を有していない領域が位置している点である。 The wiring board 1 of the third embodiment is different from the wiring board 1 of the above-described embodiment in that the stepped portions 12 a are located at both ends of the cutout portion 12 in the width direction, and the area having the inner electrode 13 is formed. The point is that a region not having the inner surface electrode 13 is located outside the.

内面電極13は、図7〜図9に示す例において、網掛けにて示している。ビア導体14は、図8に示す例において、ビア導体14の側面と重なる領域を点線にて示している。配線導体15は、図7〜図9に示す例において、網掛けにて示している。 The inner surface electrode 13 is shown by hatching in the examples shown in FIGS. In the example shown in FIG. 8, the via conductor 14 is indicated by a dotted line in a region overlapping the side surface of the via conductor 14. The wiring conductor 15 is shaded in the examples shown in FIGS.

第3の実施形態による配線基板1において、図7〜図9に示す例において、ビア導体群14Gは、19個のビア導体により形成されている。ビア導体群14Gは、平面透視にて、配線基板1に搭載される電子部品2と重なる位置に形成されている。それぞれのビア導体14は主成分としてCuWを含んでいる。 In the wiring board 1 according to the third embodiment, in the example shown in FIGS. 7 to 9, the via conductor group 14G is formed by 19 via conductors. The via conductor group 14G is formed at a position overlapping the electronic component 2 mounted on the wiring board 1 when seen in a plan view. Each via conductor 14 contains CuW as a main component.

第3の実施形態による配線基板において、切欠き部12における幅方向の両端部とは、図7〜図9に示す例のように、内面電極13が形成された切欠き部12が形成された領域、すなわち切欠き部12の段部12aよりも中央側に位置する領域を示している。 In the wiring board according to the third embodiment, the notch 12 having the inner electrode 13 is formed at both end portions in the width direction of the notch 12 as in the examples shown in FIGS. 7 to 9. The region, that is, the region located closer to the center than the step 12a of the cutout 12 is shown.

第3の実施形態における配線基板1によれば、上記した実施形態の配線基板1と同様に、電子部品2の熱は、平面視にて切欠き部12の幅よりも配線基板1の外側に大きく広がるので、電子部品2の熱が切欠き部12に伝わりにくいものとなり、切欠き部12への熱による応力を低減させることで、切欠き部12の角部において、内面電極13と配線導体15との接続部における断線を抑制することができる。 According to the wiring board 1 of the third embodiment, as in the wiring board 1 of the above-described embodiment, the heat of the electronic component 2 is located outside the wiring board 1 beyond the width of the notch 12 in plan view. Since it spreads greatly, the heat of the electronic component 2 is less likely to be transferred to the cutout portion 12, and the stress due to the heat to the cutout portion 12 is reduced, so that the inner surface electrode 13 and the wiring conductor are formed at the corners of the cutout portion 12. It is possible to suppress disconnection at the connection portion with 15.

また、図7〜図9に示す例のように、絶縁基板13の辺方向において、ビア導体群14Gの幅W2が切欠き部12の幅W1より大きく、切欠き部12における幅方向の両端部に段部12aが位置しており、内面電極13を有する領域の外側に内面電極13を有していない領域が位置していると、電子部品2の熱が切欠き部12に伝わりにくいものとなり、内面電極13を有する切欠き部12の角部において、切欠き部12への熱による応力を低減させることで、内面電極13と配線導体15との接続部における断線を抑制することができる。 Further, as in the example shown in FIGS. 7 to 9, the width W2 of the via conductor group 14G is larger than the width W1 of the cutout portion 12 in the side direction of the insulating substrate 13, and the widthwise end portions of the cutout portion 12 are If the stepped portion 12a is located at, and the region not having the inner surface electrode 13 is located outside the region having the inner surface electrode 13, it becomes difficult for the heat of the electronic component 2 to be transferred to the notch portion 12. By reducing the stress due to heat to the notch 12 at the corner of the notch 12 having the inner electrode 13, it is possible to suppress disconnection at the connection between the inner electrode 13 and the wiring conductor 15.

また、上記した第2の実施形態の配線基板1と同様に、平面透視において、ビア導体群14Gは、図7〜図9に示す例のように、切欠き部12の長手方向と平行な辺部を有していると、切欠き部12の辺に沿って均等に伝熱されやすくなり、切欠き部12の角部における伝熱を抑制し、内面電極13と配線導体15との接続部における断線を抑制することができる。なお、平面透視において、ビア導体群14Gの辺部は、切欠き部12の長手方向と平行に複数のビア導体14が並んでいる。 Further, as in the case of the wiring board 1 of the second embodiment described above, the via conductor group 14G has a side parallel to the longitudinal direction of the cutout portion 12 as seen in a plan view, as in the example shown in FIGS. 7 to 9. With the portion, heat is likely to be evenly transferred along the side of the cutout portion 12, heat transfer at the corners of the cutout portion 12 is suppressed, and the connection portion between the inner surface electrode 13 and the wiring conductor 15 is suppressed. Can be suppressed. In plan view, a plurality of via conductors 14 are arranged in parallel with the longitudinal direction of the notch 12 in the side portion of the via conductor group 14G.

また、上記した第2の実施形態の配線基板1と同様に、図7〜図9に示す例のように、絶縁基板11の辺方向において、ビア導体群14Gにおける辺部の両端部が切欠き部12における幅方向の両端部より内側に位置していると、電子部品2の熱が切欠き部12に伝わりにくいものとなり、切欠き部12への熱による応力を低減させることで、切欠き部12の角部において、内面電極13と配線導体15との接続部における断線を抑制することができる。また、切欠き部12の幅W1がビア導体群14Gにおける辺部の幅W3より大きくなっている(W1>W3)。 Further, similar to the wiring board 1 of the second embodiment described above, as in the example shown in FIGS. 7 to 9, in the side direction of the insulating substrate 11, both ends of the side portion of the via conductor group 14G are notched. If it is located inside both ends in the width direction of the portion 12, it becomes difficult for the heat of the electronic component 2 to be transferred to the notch portion 12, and the stress due to heat to the notch portion 12 is reduced, so that the notch It is possible to suppress disconnection at the connection between the inner surface electrode 13 and the wiring conductor 15 at the corner of the portion 12. Further, the width W1 of the cutout portion 12 is larger than the width W3 of the side portion of the via conductor group 14G (W1>W3).

第3の実施形態の配線基板1は、その他は上述の実施形態の配線基板1と同様の製造方法を用いて製作することができる。 The wiring board 1 of the third embodiment can be manufactured by using the same manufacturing method as that of the wiring board 1 of the above-described embodiment except for the above.

本発明は、上述の実施の形態の例に限定されるものではなく、種々の変更は可能である。例えば、絶縁基板11は、平面視において側面または角部に、切欠きまたは面取りを有している矩形状であっても構わない。 The present invention is not limited to the example of the above-described embodiment, and various modifications can be made. For example, the insulating substrate 11 may have a rectangular shape having a notch or a chamfer on a side surface or a corner portion in a plan view.

第2の実施形態の配線基板1および第3の実施形態の配線基板1は、縦断面視において、キャビティ17の内面が絶縁基板11の上面に対して垂直に形成されているが、キャビティ17の開口側がキャビティ17の底面側よりも広くなるように、キャビティ17の内面が傾斜していても構わない。 In the wiring board 1 according to the second embodiment and the wiring board 1 according to the third embodiment, the inner surface of the cavity 17 is formed perpendicularly to the upper surface of the insulating substrate 11 in the longitudinal sectional view. The inner surface of the cavity 17 may be inclined so that the opening side is wider than the bottom surface side of the cavity 17.

また、第1の実施形態の配線基板1〜第3の実施形態の配線基板1において、他の実施形態の構成を組み合わせてもよい。例えば、第1の実施形態の配線基板1において、第3の実施形態の配線基板1と同様に、切欠き部12が段部12aを有していても構わない。この場合、第3の実施形態1の配線基板1と同様に、絶縁基板13の辺方向において、ビア導体群14Gの幅W2が切欠き部12の幅W1より大きく、切欠き部12における幅方向の両端部に段部12aが位置しており、内面電極13を有する領域の外側に内面電極13を有していない領域が位置していることが好ましい。 Further, in the wiring board 1 of the first embodiment to the wiring board 1 of the third embodiment, the configurations of other embodiments may be combined. For example, in the wiring board 1 of the first embodiment, the cutout portion 12 may have the step portion 12a as in the wiring board 1 of the third embodiment. In this case, like the wiring board 1 of the third embodiment, the width W2 of the via conductor group 14G is larger than the width W1 of the notch 12 in the side direction of the insulating substrate 13, and the width direction of the notch 12 is It is preferable that the stepped portions 12a are located at both ends of the above, and the region not having the inner surface electrode 13 is located outside the region having the inner surface electrode 13.

また、第1の実施形態の配線基板1において、第2の実施形態の配線基板1および第3の実施形態の配線基板1と同様に、キャビティ17を備えていても構わない。 Further, the wiring board 1 of the first embodiment may be provided with the cavity 17 as in the wiring board 1 of the second embodiment and the wiring board 1 of the third embodiment.

また、電子部品搭載用基板1は、多数個取り基板の形態で製作されていてもよい。 The electronic component mounting board 1 may be manufactured in the form of a multi-piece board.

1・・・・配線基板
11・・・・絶縁基板
12・・・・切欠き部
12a・・・段部
13・・・・内面電極
14・・・・ビア導体
14G・・・ビア導体群
15・・・・配線導体
16・・・・金属層
17・・・・キャビティ
2・・・・電子部品
3・・・・接続部材
1...Wiring board
11... Insulating substrate
12... Cutout
12a...Step
13....Inner electrode
14... Via conductor
14G-via conductor group
15...Wiring conductor
16... Metal layer
17... Cavity 2... Electronic component 3... Connection member

Claims (7)

平面視で方形状であり、主面および側面に開口し、辺方向に長手である切欠き部を有する絶縁基板と、
前記切欠き部の内面に位置する内面電極と、
それぞれの両端部が前記絶縁基板の厚み方向に位置した複数のビア導体を含み、前記絶縁基板に位置したビア導体群とを有しており、
前記絶縁基板の辺方向において、前記ビア導体群の幅が前記切欠き部の幅より大きいことを特徴とする配線基板。
An insulating substrate having a rectangular shape in a plan view, having openings in the main surface and side surfaces and having a notch that is long in the side direction;
An inner surface electrode located on the inner surface of the cutout portion,
Each end portion includes a plurality of via conductors located in the thickness direction of the insulating substrate, and has a via conductor group located in the insulating substrate,
A wiring board, wherein a width of the via conductor group is larger than a width of the cutout portion in a side direction of the insulating board.
前記絶縁基板の辺方向において、前記切欠き部における幅方向の両端部が前記ビア導体群における幅方向の両端部より内側に位置していることを特徴とする請求項1に記載の配線基板。 The wiring board according to claim 1, wherein, in the side direction of the insulating substrate, both end portions in the width direction of the cutout portion are located inside the both end portions in the width direction of the via conductor group. 平面透視において、前記ビア導体群は、該ビア導体群から前記切欠き部に向かう方向に対して傾斜した傾斜部を有していることを特徴とする請求項1または請求項2に記載の配線基板。 The wiring according to claim 1 or 2, wherein the via conductor group has an inclined portion that is inclined with respect to a direction from the via conductor group toward the cutout portion when seen in a plan view. substrate. 平面透視において、前記ビア導体群は、前記切欠き部の長手方向と平行な辺部を有していることを特徴とする請求項1乃至請求項3のいずれかに記載の配線基板。 The wiring board according to claim 1, wherein the via conductor group has a side portion parallel to the longitudinal direction of the cutout portion when seen in a plan view. 前記絶縁基板の辺方向において、前記ビア導体群における前記辺部の両端部が前記切欠き部における幅方向の両端部より内側に位置していることを特徴とする請求項1乃至請求項4のいずれかに記載の配線基板。 The both end portions of the side portion of the via conductor group are located inside the both end portions of the cutout portion in the width direction in the side direction of the insulating substrate. The wiring board according to any one. 請求項1乃至請求項5のいずれかに記載の配線基板と、
該配線基板に搭載された電子部品とを有することを特徴とする電子装置。
A wiring board according to any one of claims 1 to 5,
An electronic device comprising: an electronic component mounted on the wiring board.
接続パッドを有するモジュール用基板と、
前記接続パッドにはんだを介して接続された請求項6に記載の電子装置とを有することを特徴とする電子モジュール。
A module substrate having a connection pad,
The electronic device according to claim 6, which is connected to the connection pad via solder.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023190738A1 (en) * 2022-03-30 2023-10-05 株式会社 東芝 Ceramic substrate, joined body, semiconductor device, method for manufacturing ceramic substrate, and method for manufacturing ceramic circuit board

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002026037A (en) * 2000-07-05 2002-01-25 Shinko Electric Ind Co Ltd Wiring board and semiconductor device
JP2005191097A (en) * 2003-12-24 2005-07-14 Kawaguchiko Seimitsu Co Ltd Semiconductor package
JP2007129191A (en) * 2005-09-01 2007-05-24 E I Du Pont De Nemours & Co Low-temperature co-fired ceramic (ltcc) tape composition, light emitting diode (led) module, illuminating devices and forming method thereof
JP2008004721A (en) * 2006-06-22 2008-01-10 Nichia Chem Ind Ltd Support for mounting semiconductor device
JP2010080640A (en) * 2008-09-25 2010-04-08 Citizen Electronics Co Ltd Surface-mounted light emitting diode
JP2013065793A (en) * 2011-09-20 2013-04-11 Ngk Spark Plug Co Ltd Wiring board
JP2014116411A (en) * 2012-12-07 2014-06-26 Kyocera Corp Substrate for mounting light emitting element and light emitting device
WO2017094589A1 (en) * 2015-11-30 2017-06-08 日本精工株式会社 Heat-dissipating substrate and electrically driven power steering device

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002026037A (en) * 2000-07-05 2002-01-25 Shinko Electric Ind Co Ltd Wiring board and semiconductor device
JP2005191097A (en) * 2003-12-24 2005-07-14 Kawaguchiko Seimitsu Co Ltd Semiconductor package
JP2007129191A (en) * 2005-09-01 2007-05-24 E I Du Pont De Nemours & Co Low-temperature co-fired ceramic (ltcc) tape composition, light emitting diode (led) module, illuminating devices and forming method thereof
JP2008004721A (en) * 2006-06-22 2008-01-10 Nichia Chem Ind Ltd Support for mounting semiconductor device
JP2010080640A (en) * 2008-09-25 2010-04-08 Citizen Electronics Co Ltd Surface-mounted light emitting diode
JP2013065793A (en) * 2011-09-20 2013-04-11 Ngk Spark Plug Co Ltd Wiring board
JP2014116411A (en) * 2012-12-07 2014-06-26 Kyocera Corp Substrate for mounting light emitting element and light emitting device
WO2017094589A1 (en) * 2015-11-30 2017-06-08 日本精工株式会社 Heat-dissipating substrate and electrically driven power steering device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023190738A1 (en) * 2022-03-30 2023-10-05 株式会社 東芝 Ceramic substrate, joined body, semiconductor device, method for manufacturing ceramic substrate, and method for manufacturing ceramic circuit board

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