JP2020020662A - Semiconductor device inspection jig - Google Patents

Abstract

To provide an inspection jig which can suppress signal attenuation inside a high-frequency substrate as much as possible when inspecting a semiconductor device, etc., having an I/O conversion function, transmitting/receiving a signal of 10 GHz or higher and equipped with electrodes at a narrow pitch of 250 μm or less.SOLUTION: The inspection jig comprises a plurality of probes, an impedance-matched high-frequency substrate 11 having contact electrodes 61 which come in contact with the probes, and holders for fixing the probes at positions where electric signal electrodes and the contact electrodes 61 are electrically connected. The high-frequency substrate 11 is provided with a ground layer 65 on one face and a circuit pattern 60 on the other face. The circuit pattern 60 includes a differential transmission area in an area A near the contact electrodes 61 coming in contact with the probes, where a pair of signal conductors 62 are wired in parallel, a single-end transmission area in an area B away from the area A where the conductor widths of the signal conductors 62 are expanded, and an area C in which the signal conductors 62 are wired heading toward signal output terminals 63.SELECTED DRAWING: Figure 3

Description

  The present invention relates to an inspection jig and an inspection method for a semiconductor device, and more specifically, for example, a semiconductor device having an I / O conversion function, transmitting and receiving signals of 10 GHz or more, and having a narrow pitch electrode of 250 μm or less. The present invention relates to an inspection jig for inspection.

  In the inspection of a semiconductor integrated circuit, a predetermined signal is simultaneously input to integrated circuits in a plurality of chips on a semiconductor substrate, and a normal operation / abnormality of an output signal at this time is simultaneously inspected to confirm a collective operation. . As an inspection device for that purpose, for example, an alignment device described in Patent Document 1 has been proposed. This alignment apparatus is an apparatus capable of accurately aligning a probe terminal provided on a probe sheet with an inspection electrode formed on a semiconductor wafer. More specifically, two alignment marks are formed near the outer periphery of the semiconductor substrate, two alignment marks are also formed on the probe substrate, and the positions of these alignment marks are detected to measure the amount of positional deviation. ing. The inspection board is provided with two through holes for detecting the alignment mark, and one CCD camera is installed above each of the two through holes. Each CCD camera images the alignment mark of the semiconductor substrate and the alignment mark of the probe substrate one by one through the through hole of the inspection substrate, measures the displacement amount using the captured image, and furthermore, the measurement result The position of the substrate mounting table is adjusted based on the above, so that the alignment and contact between the inspection electrode and the probe of the semiconductor substrate are performed.

  2. Description of the Related Art In recent years, there has been a demand for a semiconductor inspection device that can handle a large variety of small-scale products of semiconductor integrated circuits. Patent Document 2 proposes a small-sized substrate inspection device that solves the problems (inferior in accuracy, in-situ observation, and price) when a conventional semiconductor inspection device as in Patent Document 1 is used as it is. The small substrate inspection device has high positioning accuracy and contact accuracy between the inspection electrode and the probe in the integrated circuit of the small semiconductor substrate, and can inspect while observing the state of the entire processing substrate on the spot. An inexpensive and small-sized substrate inspection device, which is used to align an integrated circuit and a probe substrate provided with probe terminals to be brought into contact with electrodes of the integrated circuit. This is a technique in which a plurality of first alignment marks provided and a plurality of second alignment marks provided on a probe substrate are imaged by a camera and aligned.

  In a semiconductor inspection apparatus, the positioning of the fixed semiconductor device electrode and the inspection jig probe is performed by moving the inspection jig over the semiconductor device and marking the semiconductor device with a mark (unused electrode or circuit pattern). , Etc., while visually confirming (one image by a camera), the position with respect to the inspection jig is moved little by little (in the XYZθ direction) and adjusted.

  In current semiconductor devices, the speed is increasing, such as transmitting and receiving high-frequency signals of 10 GHz or more, and the transmission line of an inspection jig for extracting and inspecting an electric signal must also be impedance-matched. Some semiconductor devices have a plurality of light receiving elements, light emitting elements, and electric signal electrodes for an I / O conversion function. In such a semiconductor device inspection, light is transmitted between the light receiving elements and the light emitting elements. Sending and receiving signals. Further, miniaturization of semiconductor devices has been further advanced, and in recent years, the size has been reduced to 5 mm square or less, and the electrode pitch has been reduced to 250 μm or less.

  By the way, with the widespread use of broadband networks in recent years, high-speed signals, miniaturization and low cost of devices have been achieved. In order to reduce the influence of noise on high-speed signal transmission, differential signals are used. Is becoming more common. As a transmission line of such a differential signal transmission device, a differential transmission line having a GSGSG structure in which grounds (G) are arranged between two signal lines (S) and on both sides has been adopted.

  As a differential signal transmission device capable of high-speed and high-density mounting, for example, in Japanese Patent Application Laid-Open No. H11-163, the transmission characteristics of a current signal flowing through a differential transmission line can be ensured and the reflection noise can be suppressed. A differential signal transmission device capable of reducing the area of a transmission line has been proposed. The differential signal transmission device includes a differential transmission line and a transmission circuit. The differential transmission line includes a dielectric layer, a back ground layer formed on the back surface of the dielectric layer, and a front surface of the dielectric layer. The transmission circuit includes at least the resistors R1 to R3, the values of the resistors R1 and R2 become the same as the even mode impedance of the differential transmission line, and The values of the resistors R1 to R3 are set such that a parallel resistance value that is half the resistance value of the resistor R3 is equal to the odd mode impedance Zodd of the differential transmission line.

JP 2000-164655 A JP-A-2005-82587 JP 2018-7132A

  In the inspection jig for a semiconductor device, the high-frequency substrate provided in the inspection jig has a function of performing pitch conversion in a process of transmitting an electric signal from the semiconductor device to the inspection device side. At this time, it is possible to construct a transmission line with less change points of impedance by wiring up to the vicinity of the signal output terminal while keeping the signal conductors S-S parallel, and wiring the wiring immediately before the signal output terminal. However, when the electrode pitch is 250 μm or less, the signal conductor width is narrow, and there is a problem that the wiring method deteriorates attenuation characteristics due to conductor resistance. In addition, there is a means of matching the impedance of the signal conductor along the ground conductor. However, at a portion where the electrode of the semiconductor device and the electrode of the high-frequency board are brought into contact with the probe, the pitch is narrower, and the signal conductor is grounded. It is difficult to align the conductor itself.

  The present invention has been made to solve the above problems, and an object of the present invention is to provide a semiconductor device having an I / O conversion function, transmitting and receiving signals of 10 GHz or more, and having a narrow pitch electrode of 250 μm or less. It is an object of the present invention to provide a semiconductor device inspection jig for inspecting a semiconductor device.

(1) A semiconductor device inspection jig according to the present invention is an inspection jig used for inspecting electrical characteristics of a semiconductor device.
The plurality of probes provided at positions corresponding to the electric signal electrodes of the semiconductor device, an impedance-matched high-frequency substrate having a contact electrode that contacts the probe, and electrically connecting the electric signal electrode and the contact electrode. A holder for fixing the probe at a position to be connected,
The high-frequency board is provided with a ground layer on one surface and a circuit pattern on the other surface, and the circuit pattern is formed by parallelizing a pair of signal conductors in an area A near the contact electrode that contacts the probe. And a single-end transmission area where the conductor width of the signal conductor is enlarged in a region B remote from the region A, and further, the signal conductor is wired toward a signal output terminal. And a region.

  According to the present invention, since the contact electrodes that come into contact with the probe have a narrow pitch of 250 μm or less or 150 μm or less, the differential transmission in which two (one pair) signal conductors are arranged in parallel in the area A near the contact electrodes. Area (impedance is, for example, about 100Ω), and thereafter, the single-ended transmission in which the area B separated from the area A is branched from the differential transmission line to increase the conductor width in order to convert the area B into a pitch at the signal output terminal. The region (impedance is, for example, about 50Ω). With such a transmission path, signal attenuation in the high-frequency substrate can be suppressed as much as possible.

  In the inspection jig for a semiconductor device according to the present invention, the conductor width of the single-ended transmission region is larger than the conductor width of the differential transmission region in a range of 1 to 3 times. According to the present invention, by increasing the conductor width in the single-ended transmission region, the conductor resistance is reduced, the change in impedance is reduced, and the attenuation characteristics are improved.

  In the inspection jig for a semiconductor device according to the present invention, an area (C area) to be wired toward the signal output terminal is a single-ended transmission area in which a ground conductor is arranged at a fixed distance from the signal conductor. According to the present invention, the impedance can be adjusted by arranging the ground conductor at a predetermined distance in the C region wired toward the signal output terminal, and deterioration of the attenuation characteristic can be prevented.

  In the jig for inspecting a semiconductor device according to the present invention, the semiconductor device has a light-receiving element, the holder is provided on the high-frequency substrate side and fixes a position of the probe, and a high-frequency substrate-side holder; A high-frequency substrate, the high-frequency substrate-side holder and the semiconductor device-side holder, each having a hole for allowing light to reach the light-receiving element. Is provided, and at least a hole provided in the semiconductor device-side holder has two or more cutouts corresponding to marks such as electrodes and / or circuit patterns of the semiconductor device.

  According to the present invention, light can reach the light receiving element provided in the semiconductor device by the holes provided in the high-frequency substrate, the high-frequency substrate-side holder, and the semiconductor device-side holder. Since at least the hole provided in the semiconductor device-side holder has two or more notches, the notch corresponds to a mark such as an electrode and / or a circuit pattern of the semiconductor device, so that the inspection jig is provided. The probe can be positioned to make accurate contact with the electrode location for inspection.

  According to the present invention, there is provided a semiconductor device inspection jig having an I / O conversion function, transmitting and receiving a signal of 10 GHz or more, and inspecting a semiconductor device or the like having a narrow pitch electrode of 250 μm or less. be able to. The contact electrode of the high-frequency substrate that is in electrical contact with the electric signal electrode of the semiconductor device via a probe has a narrow pitch of 250 μm or less and a narrow conductor width, and the attenuation characteristics are deteriorated by the conductor resistance. By providing the A region, the B region, and the C region, signal attenuation in the high-frequency substrate can be suppressed as much as possible.

FIG. 2 is a schematic view showing an example of a semiconductor device inspection jig according to the present invention. FIG. 2 is a schematic diagram showing a mode in which a semiconductor device-side holder is arranged on a semiconductor device and aligned in the inspection jig of FIG. 1. It is a schematic diagram which shows an example of the wiring form of a high frequency board.

  An inspection jig for a semiconductor device according to the present invention will be described with reference to the drawings. The present invention can be modified or applied within the scope of the gist, and is not limited to the following embodiments. The “inspection jig” of the present invention may be rephrased as “inspection component”.

[Inspection jig for semiconductor device]
The inspection jig 10 of a semiconductor device according to the present invention (also simply referred to as “inspection jig”) is used for inspecting electrical characteristics of a semiconductor device 50 having a light receiving element 52 as shown in FIGS. An inspection jig 10 for a semiconductor device 50 for inspecting electrical characteristics by contacting a plurality of probes 1 provided at positions corresponding to the electrical signal electrodes 51 for inspecting electrical characteristics with the semiconductor device 50; A plurality of probes 1 provided at positions corresponding to the electric signal electrodes 51 of the above, an impedance-matched high-frequency substrate 11 having a contact electrode 61 in contact with the probe 1, and the electric signal electrode 51 and the contact electrode 61 are electrically connected. And a holder 14 for fixing the probe 1 at a connection position.

  As shown in FIG. 3, the high-frequency substrate 11 is provided with a GND layer 65 on one surface, a circuit pattern 60 on the other surface, and a circuit pattern 60 near a contact electrode 61 that contacts the probe 1. In the area A, a differential transmission area in which a pair of signal conductors 62 are wired in parallel, in the area B remote from the area A, a single-ended transmission area in which the conductor width of the signal conductor 62 is increased, And a C region in which the conductor 62 is wired toward the signal output terminal 63.

  In the inspection jig 10, the contact electrodes 61 of the high-frequency substrate 11 that contact the probe 1 have a narrow pitch of 250 μm or less or 150 μm or less. One pair) A differential transmission region (impedance is, for example, about 100Ω) wired in parallel, and then a region B separated from the region A is branched from the differential transmission line to convert the pitch into a pitch at the signal output terminal 63. To increase the conductor width in a single-ended transmission region (impedance is, for example, about 50Ω). With such a transmission path, signal attenuation in the high-frequency substrate can be suppressed as much as possible. The contact electrode 61 that electrically contacts the electric signal electrode 51 of the semiconductor device 50 via the probe 1 has a narrow pitch of 250 μm or less and a narrow conductor width, and the attenuation characteristic is deteriorated by the conductor resistance. By providing the A region, the B region, and the C region, the signal attenuation in the high-frequency substrate can be suppressed as much as possible. As a result, it has a function of I / O conversion, transmits and receives signals of 10 GHz or more, and can be preferably applied to the inspection of the semiconductor device 50 having a narrow pitch electrode of 250 μm or less.

  Each component will be described in detail. In the following, the inspection jig 10 of FIGS. 1 and 2 will be described as a representative example.

[Typical examples of inspection jigs]
The inspection jig 10 shown in FIGS. 1 and 2 is an inspection jig used for inspecting electrical characteristics of the semiconductor device 50 having the light receiving element 52. The probe 1 is provided at a position corresponding to the electric signal electrode 51 for inspecting electric characteristics, and has one end in contact with the electric signal electrode 51 and the other end in contact with the contact electrode 61 of the high-frequency substrate 11. The high-frequency board 11 transmits the electric signal transmitted from the probe 1 to the signal output terminal 63 via the signal conductor 62 in the high-frequency board 11. As shown in FIG. 1, the holder 14 holds the probe 1. The holder 14 is provided on the high-frequency substrate and fixes the position of the probe 1. The holder 14 is provided on the semiconductor device and the probe 1 is provided on the semiconductor device. 1. The high-frequency substrate 11, the high-frequency substrate-side holder 12, and the semiconductor device-side holder 13 are provided with the semiconductor device-side holder 13 for fixing the position of the light-receiving element 52, as shown in FIG. And at least two holes 20 provided in the semiconductor device side holder 13 corresponding to the marks (53, 54) such as the electrodes 54 and / or the circuit patterns 53 of the semiconductor device 50. The above notch 21 is provided.

  In this inspection jig 10, as shown in FIG. 1, an imaging device 40 is arranged on the high-frequency substrate side, and while observing the image obtained by the imaging device 40, the marks 53 and 54 on the semiconductor device and the semiconductor device side The positioning is performed with at least the notch 21 provided in the holder 13, and the positioning is performed to align the electric signal electrode 51 on the semiconductor device with the probe 1. This alignment can be performed by moving one or both of the semiconductor device stage (not shown) and the inspection jig stage (not shown), and is performed at a position corresponding to the electric signal electrode 51 for inspecting the electrical characteristics of the semiconductor device 50. The plurality of probes 1 provided can be brought into contact with the electrodes to accurately inspect the electrical characteristics of the semiconductor device.

  The inspection jig 10 is provided with holes 20 in the high-frequency substrate 11, the high-frequency substrate-side holder 12, and the semiconductor device-side holder 13, and allows the light to reach the light receiving element 52 of the semiconductor device 50 through the holes 20. The inspection can be performed with or without activating the I / O conversion function provided in the semiconductor device. Such alignment is performed manually or automatically while visually observing or viewing the image obtained by the imaging device 40. At least two notches 21 (see FIG. 3) are provided in at least the hole 20 provided in the semiconductor device side holder 13. Since it is provided, the position of the notch 21 is adjusted so as to correspond to the mark (the electrode 54, the circuit pattern 53, etc.) of the semiconductor device 50. As a result, the probe 1 included in the inspection jig 10 can be brought into accurate contact with the electric signal electrode 51 of the semiconductor device 50.

(Semiconductor device)
As shown in FIG. 1, the semiconductor device 50 is an inspection target of the inspection jig 10 according to the present invention. The semiconductor device 50 is not particularly limited as long as it has the light receiving element 52, but is a high-speed device that transmits and receives a high-frequency signal of 10 GHz or more. Specifically, a device having an I / O conversion function in which a light receiving element, a light emitting element, an electric signal electrode, and the like are arbitrarily provided on the same surface can be preferably cited. Such a semiconductor device 50 is driven at a high frequency of 10 GHz or more, and transmits and receives an optical signal between a light receiving element and a light emitting element. In addition, miniaturization is further advanced, and the inspection can be preferably performed on a device having a narrow pitch electrode having a size of 5 mm square or less, an electrode pitch of 250 μm or less, and further 150 μm or less.

  As an example, there is a semiconductor device 50 that receives an optical signal of 100 Gbps and transmits the signal as an electrical signal of 4 lines at 25 Gbps. The semiconductor device 50 may be, for example, a device provided with a plurality of light receiving elements 52 having a size of 5 mm square or less and having a plurality of electric signal electrodes 51 for transmitting electric signals on the same surface at a pitch of 150 μm.

(High frequency substrate)
As shown in FIG. 1, the high-frequency substrate 11 constitutes an inspection jig 10 which is joined to and integrated with a holder 14 (high-frequency substrate-side holder 12 and semiconductor device-side holder 13) for fixing the position of the probe 1. . The high-frequency substrate 11 is provided at a position opposite to the semiconductor device 50 with the holder 14 interposed therebetween.

  As shown in FIG. 3, the high-frequency substrate 11 is used for inspecting the semiconductor device 50, and has a GND layer 65 on one surface (also referred to as a back surface) for impedance matching, and the other surface. A substrate having a circuit pattern 60 (also referred to as a front surface) and capable of high-frequency transmission. The high-frequency substrate 11 is provided with an insulating layer (not shown) between the circuit pattern 60 on the front surface and the GND layer 65 on the rear surface. As the insulating layer, for example, a fluorine-based insulating material having a low dielectric constant (such as PFA) can be given, and the thickness is not particularly limited.

  In the high-frequency substrate 11, the contact electrodes 61 that come into contact with the probe 1 have a narrow pitch of 250 μm or less or 150 μm or less, corresponding to recent miniaturized and integrated semiconductor devices 50. When the pitch between the signal conductors 62a and 62b starting wiring from the contact electrode 61 is 150 μm, the precision wiring has a conductor width of 70 μm and a distance between conductors of 80 μm. It is difficult to connect the signal conductors 62a and 62b to the signal output terminal 63 while maintaining their narrow pitches with impedance matching. According to the present invention, in the circuit pattern 60, in a region A near the contact electrode 61 that contacts the probe 1, a pair of signal conductors 62a and 62b is a differential transmission region in which wiring is performed in parallel, and is separated from the region A. The B region is a single-ended transmission region in which the conductor widths of the signal conductors 62a and 62b are continuously or stepwise enlarged, and a region (C region) in which the signal conductors 62a and 62b are wired toward the signal output terminal 63. There is a feature in the point. With such a transmission path, signal attenuation in the high-frequency substrate can be suppressed as much as possible.

  In FIG. 3, the differential transmission area is represented as an area A near the contact electrode 61. In the region A, a pair of signal conductors 62 (62a, 62b) are wired in parallel at the same pitch as the contact electrodes 61. The A region can be divided into an A1 region and an A2 region as necessary. The A1 region is a differential transmission region in which a pair of signal conductors have the same pitch and an adjacent pair of signal conductors have the same interval, and is a region near the contact electrode 61. The A2 area is not necessarily essential, and the pair of signal conductors has the same pitch, but is a differential transmission area extending between the adjacent pair of signal conductors, and gradually shifts to the B area. It is an area for doing. The region A2 facilitates transition to the region B as shown in FIG. The enlargement width between the adjacent pair of signal conductors is not particularly limited, and can be arbitrarily designed in relation to the circuit pattern of the entire high-frequency board 11.

  In FIG. 3, the single-ended transmission area is an area for converting the pitch at the signal output terminal 63. The single-ended transmission area is branched from the differential transmission path in the A area to expand the conductor width of each signal conductor 62a, 62b. I have. This single-ended transmission area is represented as a B area away from the A area. The expansion of the conductor width in the region B may be continuous or stepwise. As the conductor width increases, the conductor resistance decreases and the impedance can be reduced, for example, from 100Ω to 50Ω. Note that the conductor width of the region B can be made larger than the conductor width of the region A by 1 to 3 times, and the impedance can be easily adjusted. In addition, since the expansion of the conductor width has a role of adjusting the conductor resistance, adjusting the conductor resistance by changing the conductor thickness together with the conductor width has the same meaning.

  As shown in FIG. 3, the C region is a region where the signal conductor 62 is further routed from the B region toward the signal output terminal 63. The single region in which the GND conductor 64 is arranged at a certain distance from the signal conductor 62. It is an end transmission area and can also be referred to as a GND conductor arrangement area. By arranging the GND conductor 64 at a certain distance in the C region wired toward the signal output terminal 63, the impedance can be adjusted and the deterioration of the attenuation characteristic can be prevented. The GND conductor 64 is in contact with the GND layer 65 on the rear surface by a via (connected to the inner periphery of the through hole by plating). In the high-frequency board 11, the signal conductors 62a and 62b in the region A (impedance is, for example, 100Ω) near the contact electrode 61 that contacts the probe 1 have a small width and a narrow pitch, but the pitch of the signal conductors 62a and 62b is enlarged. The impedance will change if it is used alone. In the region B, the conductor width can be increased to a predetermined impedance (for example, 50Ω) so as to reduce the conductor resistance. In addition, the impedance (50Ω) can be made constant and stable by extending the GND conductor 64 in the region C. Can be

  Since the high-frequency substrate 11 is provided with the circuit patterns 60 on the front surface at high density and the GND layer 65 on the rear surface, no holes are formed at the positions where the GND layers 65 are provided, and the high-frequency substrate 11 is large. There is no space for holes or extra holes. However, in the present invention, due to the structural design of the high-frequency substrate 11, small holes 20 as shown in FIGS. 2 and 3 are formed while maintaining the impedance of the transmission line. The hole 20 is opened at a position including the light receiving element 52 of the semiconductor device 50, and the light receiving element can receive an optical signal emitted from an optical fiber (not shown) on the side of an inspection device (not shown). Further, as shown in FIG. 1, while observing the image obtained by the imaging device 40, the marks 53 and 54 on the semiconductor device and the notch 21 provided at least in the semiconductor device side holder 13 shown in FIG. The position of the semiconductor device 50 and the inspection jig 10 were aligned by visual or image pickup and position adjustment, and the electric signal electrode 51 of the semiconductor device 50 was aligned with the probe 1 of the inspection jig 10. Contact.

(High frequency substrate side holder)
As shown in FIG. 1, the high-frequency substrate-side holder 12 is a holder located on the high-frequency substrate side among holders 14 (the high-frequency substrate-side holder 12 and the semiconductor device-side holder 13) for fixing the position of the probe 1. The high-frequency substrate-side holder 12 is installed at a certain distance from the semiconductor device-side holder 13. This makes it easier to achieve appropriate impedance matching. Note that the high-frequency substrate-side holder 12 may be formed of a resin material selected in consideration of workability, insulation, dielectric constant, and the like. For example, from the viewpoint of workability, a resin having good workability such as a polyester-based resin can be employed, and from the viewpoint of a low dielectric constant, a resin such as a fluorine-based resin material can be employed, and the influence on impedance can be reduced. . In order to minimize the reflection characteristics, it is desirable that the thickness is small. Further, for impedance matching, it is preferable that no dielectric is provided around the probe 1 between the high-frequency substrate-side holder 12 and the semiconductor device-side holder 13 at the position where the probe 1 is provided.

  For example, as shown in FIG. 2, the high-frequency substrate side holder 12 is provided with at least a probe hole 22 for inserting the probe 1 and a hole 20 for transmitting and receiving an optical signal as in the high-frequency substrate 11 described above. ing. The notch in the hole 20 is provided at least in the semiconductor device-side holder 13, but may not be provided in the high-frequency substrate-side holder 12, or may be provided as needed.

  The high-frequency substrate-side holder 12 may be provided with a dug portion similar to the semiconductor device-side holder 13 described later. By doing so, the thickness of the high-frequency substrate side holder can be reduced.

(Semiconductor device side holder)
As shown in FIGS. 1 and 2, the semiconductor device side holder 13 is a holder located on the semiconductor device side among holders 14 (the high frequency substrate side holder 12 and the semiconductor device side holder 13) for fixing the position of the probe 1. is there. The semiconductor device-side holder 13 is installed at a certain distance from the high-frequency substrate-side holder 12 in order to easily realize appropriate impedance matching. For example, the high-frequency substrate-side holder 12 and the semiconductor device-side holder 13 are fixed via a plate 15 having a rectangular shape when viewed from above, and the high-frequency substrate-side holder 12 and the semiconductor device-side holder 13 are fixed. Is configured to maintain a constant spatial distance. The semiconductor device side holder 13 may be formed of a resin material selected in consideration of workability, insulation, dielectric constant, and the like, similarly to the high frequency substrate side holder 12. For example, from the viewpoint of workability, a resin having good workability such as a polyester-based resin can be employed, and from the viewpoint of a low dielectric constant, a resin such as a fluorine-based resin material can be employed, and the influence on impedance can be reduced. . In order to minimize the reflection characteristics, it is desirable that the thickness is small.

  For example, as shown in FIG. 3, the semiconductor device side holder 13 is also provided with at least a probe hole 22 for inserting the probe 1 and a hole 20 for transmitting and receiving an optical signal. In the semiconductor device-side holder 13, as shown in FIGS. 2 and 3, a notch 21 to the hole 20 is provided. The notch 21 is provided in the semiconductor device-side holder 13 located closest to the marks 53 and 54 on the semiconductor device so as to correspond to the marks 53 and 54. By doing so, visual confirmation is easy and the focus of the imaging device (camera) 40 is most easily adjusted, which is the most effective in enabling accurate positioning.

  The size of the hole 20 provided in the semiconductor device side holder 13 is smaller than the holes provided in the high frequency substrate 11 and the high frequency substrate side holder 12. By doing so, the notch 21 provided in the semiconductor device-side holder 13 can be easily observed visually or by the imaging device 40 from the high-frequency substrate side.

  The semiconductor device-side holder 13 needs to have a mechanical strength necessary for assembling into the inspection jig 10. In order to secure the mechanical strength, the semiconductor device-side holder 13 has a certain thickness ( 1.15 mm or more). However, if the thickness becomes too thick, when imaging the notch 21 of the semiconductor device side holder 13 and the marks 53 and 54 on the semiconductor device from the imaging device (camera) 40 on the high frequency substrate side, the semiconductor device side holder Since the distance between the surface 13 on the high-frequency substrate side and the marks 53 and 54 on the semiconductor device becomes large, it is impossible to focus on both at the same time. Therefore, it is preferable to provide a dug portion 18 for thinning the surface of the semiconductor device side holder 13 on the high frequency substrate side. With the dug portion 18, the above-described distance can be shortened, and focusing can be facilitated. Also, a dug portion 17 may be provided on the surface on the semiconductor device side for mounting the semiconductor device 50 as necessary, and the thickness of the central portion can be further reduced.

(probe)
As shown in FIGS. 1 and 2, the probe 1 is applied to the inspection of the electrical characteristics of the semiconductor device 50, and is positioned on and contacted with the electrical signal electrode 51 for inspecting the electrical characteristics of the semiconductor device 50. To inspect. As described above, the probe 1 is held by the holder 14 (the high-frequency substrate-side holder 12 and the semiconductor device-side holder 13).

  The probe includes a signal probe and a GND probe. The signal probe 1 contacts the electric signal electrode 51 of the semiconductor device 50 and the contact electrode 61 of the high-frequency substrate 11. On the other hand, the GND probe 1 contacts the GND electrode of the semiconductor device 50 and the GND electrode of the high-frequency substrate 11. The GND electrode of the high-frequency substrate 11 with which the GND probe comes into contact is connected to the GND layer 65 on the rear surface of the substrate through a via.

  The probe 1 electrically connects the high-frequency substrate 11 and the semiconductor device 50. Since the distance between the circuit pattern of the high-frequency substrate 11 and the GND layer is determined, the thickness of the probe 1 is limited in order to perform impedance matching. For example, when the pitch of the circuit pattern of the high-frequency board 11 is 250 μm, the diameter of the probe 1 is preferably about 90 to 120 μm. Further, it is preferable that the length of the probe 1 is also limited to 5 mm or less so that the semiconductor device 50 does not resonate with a signal of, for example, about 25 Gbps (12.5 GHz).

  Although the structure (not shown) of the probe 1 is not particularly limited, the probe 1 includes a probe metal part and a probe body part, and one probe tip of the probe metal part contacts the electric signal electrode 51 of the semiconductor device 50 and the other part. Of the probe is in contact with or joined to the contact electrode 61 of the high-frequency substrate 11. The probe metal portion may be a single-wire type probe that contacts the electric signal electrode 51 by using its bending, or may be an elastic member such as a spring or the like with an elastic member such as a spring to provide both or one of the electrodes. The probe may be a composite probe that comes into contact with the probe. In the case of a single wire probe, it is preferable that an insulating layer is provided on the probe body. In the case of the composite probe, the probe body is formed of a conductive or insulating sleeve, and a distal probe, an elastic member such as a spring, and a rear probe are arranged in that sleeve in that order.

(Inspection methods)
As shown in FIGS. 1 and 2, the inspection method performed by the inspection jig 10 is to arrange an image pickup device 40 on the high-frequency substrate side and to observe a mark (electrode) on a semiconductor device while viewing an image obtained by the image pickup device 40. 54 and / or the circuit pattern 53) and the notch 21 provided at least in the semiconductor device-side holder 13, and the electrode 51 on the semiconductor device and the probe 1 are aligned. The aligned probe 1 contacts the electrode 51 for inspecting the electrical characteristics of the semiconductor device 50 and accurately inspects the electrical characteristics of the semiconductor device 50.

  Note that the imaging device 40 is not particularly limited, and a CCD camera or the like can be used. The fine adjustment means for positioning is not particularly limited, and can be performed by automatically or manually operating a stage or the like driven in the XYZθ directions. Note that the fine adjustment means is a means usually performed in this field or related fields, and therefore, the description thereof is omitted in the present application.

  As described above, according to the present invention, at the time of inspection, one or both of the contact pins 2A and 2B constituting the probe 1 move, and each of the contact pins 2A and 2B becomes an electrode (the electric signal electrode 51 of the semiconductor device). And the contact electrode 61) of the high-frequency substrate 11. In the present invention, by providing the high-frequency board 11 with the above-described area A, area B, and area C, signal attenuation in the high-frequency board can be suppressed as much as possible. A preferable inspection jig for transmitting and receiving the above signals and inspecting a semiconductor device or the like having a narrow pitch electrode of 250 μm or less can be provided.

DESCRIPTION OF SYMBOLS 1 Probe 10 Inspection jig 11 High frequency substrate 12 High frequency substrate side holder 13 Semiconductor device side holder 14 Holder 15 Plate 16 Space 17 Semiconductor device side dug part 18 High frequency substrate side holder dug part 20 Hole 21 Notch 22 Probe Hole 30 Signal output terminal member 40 Imaging device (camera)
Reference Signs List 50 semiconductor device 51 electric signal electrode contacted by probe 52 light receiving element (optical element)
53 Mark (circuit pattern)
54 Marks (electrodes)
55 substrate 60 circuit pattern of high-frequency substrate 61 contact electrode 62, 62a, 62b pair of signal conductors 63 signal output terminal 64 ground (GND) conductor on front surface 65 ground (GND) layer on rear surface A 1 at the same pitch as contact electrode A differential transmission area in which a pair of signal conductors are wired in parallel A1 A pair of signal conductors has the same pitch, and a pair of adjacent signal conductors has the same interval. Area A2 where signal conductors are wired in parallel A2 A pair of signal conductors have the same pitch, but area between adjacent pair of signal conductors is enlarged. B Conductor width of signal conductor is enlarged. Area C area to be wired to the signal output terminal (ground conductor arrangement area)

Claims (4)

An inspection jig used for inspecting electrical characteristics of a semiconductor device,
The plurality of probes provided at positions corresponding to the electric signal electrodes of the semiconductor device, an impedance-matched high-frequency substrate having a contact electrode that contacts the probe, and electrically connecting the electric signal electrode and the contact electrode. A holder for fixing the probe at a position to be connected,
The high-frequency board is provided with a ground layer on one surface and a circuit pattern on the other surface, and the circuit pattern is formed by parallelizing a pair of signal conductors in an area A near the contact electrode that contacts the probe. And a single-end transmission area where the conductor width of the signal conductor is enlarged in a region B remote from the region A, and further, the signal conductor is wired toward a signal output terminal. An inspection jig for a semiconductor device, comprising a region.   The inspection jig for a semiconductor device according to claim 1, wherein a conductor width of the single-ended transmission region is larger than a conductor width of the differential transmission region in a range of 1 to 3 times.   3. The semiconductor device inspection according to claim 1, wherein the area (C area) wired toward the signal output terminal is a single-ended transmission area in which a ground conductor is arranged at a fixed distance from the signal conductor. 4. jig. The semiconductor device has a light receiving element, the holder is installed on the high frequency substrate side and fixes the position of the probe, and a semiconductor is installed on the semiconductor device side and fixes the position of the probe. A device-side holder, wherein the high-frequency substrate, the high-frequency substrate-side holder, and the semiconductor device-side holder are each provided with a hole for allowing light to reach the light-receiving element, and at least the semiconductor device-side holder The semiconductor device according to any one of claims 1 to 3, wherein the hole provided in the semiconductor device has two or more cutouts corresponding to marks such as electrodes and / or circuit patterns of the semiconductor device. Inspection jig.