JP2020017712A - Method of manufacturing circuit substrate structure - Google Patents

Method of manufacturing circuit substrate structure Download PDF

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JP2020017712A
JP2020017712A JP2018235035A JP2018235035A JP2020017712A JP 2020017712 A JP2020017712 A JP 2020017712A JP 2018235035 A JP2018235035 A JP 2018235035A JP 2018235035 A JP2018235035 A JP 2018235035A JP 2020017712 A JP2020017712 A JP 2020017712A
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current density
density value
circuit board
electroplating
hole
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JP6719542B2 (en
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仕洋 羅
shi yang Luo
仕洋 羅
奇 孫
Ki Son
奇 孫
政明 呂
Cheng Ming Lu
政明 呂
國慶 鄭
Guo Qing Zheng
國慶 鄭
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Tripod Wuxi Electronic Co Ltd
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Tripod Wuxi Electronic Co Ltd
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/423—Plated through-holes or plated via connections characterised by electroplating method
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/18—Electroplating using modulated, pulsed or reversing current
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00—Electroplating characterised by the article coated
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14—Related to the order of processing steps
    • H05K2203/1476—Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning

Abstract

To provide a manufacturing method capable of effectively improving electroplating efficiency and electroplating effect (for example, achieving an excellent hole filling rate) while securing the hole filling rate.SOLUTION: The manufacturing method includes: a preparing step of providing a circuit substrate 1, having a hole 11 and having an aspect ratio of a hole obtained by dividing a hole diameter R by a hole depth D is 4 or more; a first electroplating step of electroplating the hole 11 of the circuit substrate 1 in a first period using a first current having a first current density value; and a second electroplating step of electroplating the holes 11 of the circuit substrate 1 in a second period using a second current having a second current density value. The first current density value and the second current density value are different and are respectively in 4 ASF to 60 ASF.SELECTED DRAWING: Figure 1

Description

本発明は回路基板に関し、特に回路基板構造の製造方法に関する。   The present invention relates to a circuit board, and more particularly to a method for manufacturing a circuit board structure.

従来の回路基板の製造方法では、回路基板の孔を電気めっきするとき、一定の電流密度（つまり、電流密度が一定値を維持している）を用いるのが一般的である。均一に電気めっきする効果を実現するために、従来の回路基板の製造方法では、孔充填率を増加するように小さい電流密度を使用しなければならないが、上記小さい電流密度により電気めっき時間が長くなり、さらに電気めっき効率を低減させる。   In the conventional method of manufacturing a circuit board, when electroplating holes in the circuit board, it is common to use a constant current density (that is, the current density maintains a constant value). In order to achieve the effect of uniform electroplating, in the conventional method of manufacturing a circuit board, a small current density must be used so as to increase the hole filling rate. And further reduce the electroplating efficiency.

さらに、従来の回路基板の製造方法では、アスペクト比が４未満の孔を電気めっきするとき、電気めっき時間と電気めっき効率への影響が小さいが、回路基板の発展に伴い、回路基板に形成されるべきアスペクト比が高い孔の割合が高まり、それによって、従来の回路基板の製造方法のようにアスペクト比が高い孔を電気めっきする方式についてさらなる改良が必要である。   Furthermore, in the conventional method of manufacturing a circuit board, when the hole having an aspect ratio of less than 4 is electroplated, the effect on the electroplating time and the electroplating efficiency is small. The proportion of high aspect ratio holes that should be increased increases, thereby requiring further improvements in the manner of electroplating high aspect ratio holes as in conventional circuit board manufacturing methods.

このため、本発明者は、上記欠陥を改善するために、鋭意検討を重ねて科学原理を活用した結果、設計が合理的で且つ効果的に上記欠陥を改善できる本発明を提供している。   For this reason, the present inventor has made intensive studies and utilized scientific principles to improve the above-mentioned defects, and as a result, the present invention has provided the present invention in which the design is rational and the defects can be effectively improved.

本発明の目的は、従来の回路基板の製造方法において発生し得る欠点を効果的に改善できる回路基板構造の製造方法を提供することである。   SUMMARY OF THE INVENTION It is an object of the present invention to provide a method of manufacturing a circuit board structure that can effectively improve disadvantages that can occur in a conventional method of manufacturing a circuit board.

上記目的を達成させるために、本発明は、孔を有し、孔径を孔深さで割った孔のアスペクト比が４以上である回路基板を提供する準備ステップと、第１電流密度値を有する第１電流を用いて、前記回路基板の前記孔を第１期間において電気めっきする第１電気めっきステップと、第２電流密度値を有する第２電流を用いて、前記回路基板の前記孔を第２期間において電気めっきする第２電気めっきステップとを含み、前記第１電流密度値と前記第２電流密度値は異なり、且つそれぞれ４ＡＳＦ〜６０ＡＳＦにある。   In order to achieve the above object, the present invention has a preparation step of providing a circuit board having a hole and an aspect ratio of a hole obtained by dividing a hole diameter by a hole depth of 4 or more, and having a first current density value. A first electroplating step of electroplating the hole of the circuit board during a first period using a first current, and a second current having a second current density value to form the hole of the circuit board in a first A second electroplating step of electroplating for two periods, wherein the first current density value and the second current density value are different and are respectively in 4 ASF to 60 ASF.

本発明はさらに、孔を有し、孔径を孔深さで割った孔のアスペクト比が４以上である回路基板を提供する準備ステップと、順次実施されるＮ個の電気めっきステップとを含み、前記電気めっきステップのそれぞれにおいて、電流密度値を有する電流を用いて、前記回路基板の前記孔を電気めっきし、Ｎが２以上の正整数であり、且つＮ個の前記電気めっきステップでは、２種以上の前記電流密度値を有し、且ついずれの前記電流密度値も４ＡＳＦ〜６０ＡＳＦにあり、順次実施される前記電気めっきステップのいずれかの２つにおいて、使用される２つの前記電流密度値の差が２より大きい場合、電流切替ステップを実施し、
前記電流切替ステップでは、勾配電流密度値を有する勾配電流を用いて、前記回路基板の前記孔を、切替期間において電気めっきし、前記勾配電流密度値は、前記切替期間において、使用される２つの前記電流密度値のうち先に実施された前記電流密度値から、後に実施される前記電流密度値へ徐々に変わり、前記切替期間は０〜２０分間である。 The present invention further includes a preparation step of providing a circuit board having holes and an aspect ratio of holes obtained by dividing the hole diameter by the hole depth of 4 or more, and N electroplating steps sequentially performed, In each of the electroplating steps, the hole of the circuit board is electroplated using a current having a current density value, wherein N is a positive integer of 2 or more, and N Two or more of the current density values having at least one of the current density values, and wherein each of the current density values is between 4 ASF and 60 ASF, and used in any two of the electroplating steps performed sequentially. If the difference is greater than 2, perform a current switching step,
In the current switching step, the hole of the circuit board is electroplated in a switching period using a gradient current having a gradient current density value, and the gradient current density value is used for two of the gradient current density values used in the switching period. The current density value gradually changes from the current density value performed first to the current density value performed later, and the switching period is 0 to 20 minutes.

以上のように、本発明で開示されている回路基板構造の製造方法では、使用される複数の電気めっきステップ（たとえば、第１電気めっきステップと第２電気めっきステップ）は、４ＡＳＦ〜６０ＡＳＦにある異なる電流密度値で、孔充填率をできるだけ確保するとともに、電気めっき効率と電気めっき効果（たとえば、好適な孔充填率を実現する）を効果的に向上させる。   As described above, in the method of manufacturing a circuit board structure disclosed in the present invention, a plurality of electroplating steps (for example, a first electroplating step and a second electroplating step) are in 4 ASF to 60 ASF. At different current density values, the hole filling rate is ensured as much as possible, and the electroplating efficiency and the electroplating effect (for example, realizing a suitable hole filling rate) are effectively improved.

本発明の特徴及び技術をより把握するために、以下、本発明に係る詳細な説明及び図面を参照できるが、このような説明及び図面は本発明を説明するためのものに過ぎず、本発明の保護範囲を制限するものではない。   In order to better understand the features and techniques of the present invention, reference can be made to the following detailed description and drawings of the present invention. However, such descriptions and drawings are merely for describing the present invention, and the present invention is not limited thereto. It does not limit the scope of protection.

本発明に係る回路基板構造の製造方法の実施形態１の準備ステップの模式図である。It is a mimetic diagram of a preparation step of Embodiment 1 of a manufacturing method of a circuit board structure concerning the present invention. 本発明に係る回路基板構造の製造方法の実施形態１の第１電気めっきステップと第２電気めっきステップの電流密度と時間の模式図である。It is a schematic diagram of the current density and time of the 1st electroplating step and the 2nd electroplating step of Embodiment 1 of the manufacturing method of the circuit board structure concerning the present invention. 本発明に係る回路基板構造の製造方法の実施形態１が実施された後の回路基板の構造模式図である。It is a structure schematic diagram of the circuit board after Embodiment 1 of the manufacturing method of the circuit board structure concerning the present invention was carried out. 本発明に係る回路基板構造の製造方法の実施形態２の第１電気めっきステップと第２電気めっきステップの電流密度と時間の模式図である。It is a schematic diagram of the current density and time of the 1st electroplating step and the 2nd electroplating step of Embodiment 2 of the manufacturing method of the circuit board structure concerning the present invention. 本発明に係る回路基板構造の製造方法の実施形態２が実施された後の回路基板の構造模式図である。It is a structure schematic diagram of the circuit board after Embodiment 2 of the manufacturing method of the circuit board structure concerning the present invention was carried out. 本発明に係る回路基板構造の製造方法の実施形態３の第１電気めっきステップと第２電気めっきステップの電流密度と時間の模式図（１）である。It is a schematic diagram (1) of the current density and time of the 1st electroplating step and the 2nd electroplating step of Embodiment 3 of the manufacturing method of the circuit board structure concerning the present invention. 本発明に係る回路基板構造の製造方法の実施形態３の第１電気めっきステップと第２電気めっきステップの電流密度と時間の模式図（２）である。It is a schematic diagram (2) of the current density and time of the 1st electroplating step and the 2nd electroplating step of Embodiment 3 of the manufacturing method of the circuit board structure concerning the present invention.

図１−図７には、本発明の実施形態が示されている。なお、本実施形態の対応図面に示された数や外形は、本発明の内容を把握できるように、本発明の実施形態を説明するためのものに過ぎず、本発明の保護範囲を制限するものではない。
［実施形態１］
なお、本実施形態の説明の便宜上、図面には関連する部分構造だけが示されている。図１−図３に示されるように、本実施形態は、準備ステップ、第１電気めっきステップ、及び第２電気めっきステップを含む回路基板構造の製造方法を開示する。本実施形態では、回路基板構造の製造方法において、いずれの電気めっきステップも電気めっき装置（未図示）によって実施でき、つまり、前記いずれの電気めっきステップにおける各種パラメータも電気めっき装置で制御できる。 1 to 7 show an embodiment of the present invention. It should be noted that the numbers and outer shapes shown in the corresponding drawings of the present embodiment are merely for explaining the embodiment of the present invention so that the contents of the present invention can be grasped, and limit the protection scope of the present invention. Not something.
[Embodiment 1]
For convenience of description of the present embodiment, only relevant partial structures are shown in the drawings. As shown in FIGS. 1 to 3, the present embodiment discloses a method of manufacturing a circuit board structure including a preparation step, a first electroplating step, and a second electroplating step. In the present embodiment, in the method for manufacturing a circuit board structure, any of the electroplating steps can be performed by an electroplating apparatus (not shown), that is, various parameters in any of the electroplating steps can be controlled by the electroplating apparatus.

さらに、本発明に係る回路基板構造の製造方法は、上記複数のステップの順番又は実施形態に制限されない。たとえば、本発明の図示しないほかの実施形態では、上記複数のステップは、実際の設計ニーズに応じて、調整したり増減したりしてもよい。また、以下、それぞれ本実施形態の回路基板構造の製造方法の各ステップを説明する。   Further, the method for manufacturing a circuit board structure according to the present invention is not limited to the order of the plurality of steps or the embodiment. For example, in other non-illustrated embodiments of the present invention, the steps may be adjusted or increased or decreased according to actual design needs. Hereinafter, each step of the method for manufacturing a circuit board structure according to the present embodiment will be described.

図１に示されるように、前記準備ステップを実施する。つまり、孔１１を有する回路基板１を提供する。本実施形態では、前記回路基板１として、多層板又は単層板が使用でき、且つ図１中、上記孔１１については、上記回路基板１を貫通している貫通孔を例に説明したが、本発明はそれに制限されない。たとえば、本発明の図示しないほかの実施形態では、前記孔１１は回路基板１を貫通していないブラインドホールであってもよい。   The preparation step is performed as shown in FIG. That is, the circuit board 1 having the holes 11 is provided. In the present embodiment, a multilayer board or a single-layer board can be used as the circuit board 1, and in FIG. 1, the hole 11 has been described as an example of a through-hole penetrating the circuit board 1. The invention is not so limited. For example, in another embodiment (not shown) of the present invention, the hole 11 may be a blind hole that does not penetrate the circuit board 1.

さらに、本実施形態では、孔径Ｒを孔深さＤで割った前記孔１１のアスペクト比（ａｓｐｅｃｔｒａｔｉｏ、ＡＲ）は４以上である。つまり、本実施形態の回路基板構造の製造方法を適用する物品又は対象は、好ましくは、アスペクト比４未満の孔を含まない。   Further, in this embodiment, the aspect ratio (aspect ratio, AR) of the hole 11 obtained by dividing the hole diameter R by the hole depth D is 4 or more. That is, the article or object to which the circuit board structure manufacturing method of the present embodiment is applied preferably does not include a hole having an aspect ratio of less than 4.

図２に示されるように、前記第１電気めっきステップを実施する。つまり、第１電流密度値Ｉを有する第１電流Ｘを用いて、前記回路基板１の孔１１を、第１期間Ｔ１において電気めっきする。本実施形態では、前記第１期間Ｔ１は５分間〜８０分間、前記第１電流Ｘの第１電流密度値Ｉは４ＡＳＦ〜６０ＡＳＦであるが、本発明はそれに制限されない。上記ＡＳＦは、電流密度単位として使用され、つまり、アンペア／平方フィートである。   As shown in FIG. 2, the first electroplating step is performed. That is, the hole 11 of the circuit board 1 is electroplated in the first period T1 using the first current X having the first current density value I. In the present embodiment, the first period T1 is 5 minutes to 80 minutes, and the first current density value I of the first current X is 4 ASF to 60 ASF, but the present invention is not limited thereto. The ASF is used as a current density unit, that is, amps / square foot.

図２に示されるように、前記第２電気めっきステップを実施する。つまり、第２電流密度値ＩＩを有する第２電流Ｙを用いて、前記回路基板１の孔１１を、第２期間Ｔ２において、電気めっきする。本実施形態では、前記第２期間Ｔ２は５分間〜８０分間、前記第２電流Ｙの第２電流密度値ＩＩは４ＡＳＦ〜６０ＡＳＦであるが、本発明はそれに制限されない。   As shown in FIG. 2, the second electroplating step is performed. That is, the hole 11 of the circuit board 1 is electroplated in the second period T2 using the second current Y having the second current density value II. In the present embodiment, the second period T2 is 5 minutes to 80 minutes, and the second current density value II of the second current Y is 4 ASF to 60 ASF, but the present invention is not limited thereto.

なお、図２と図３に示されるように、前記第１電流密度値Ｉと第２電流密度値ＩＩは異なり、且つ前記第１電流密度値Ｉと第２電流密度値ＩＩの差は、本実施形態では、上記第１電流密度値Ｉを瞬時に第２電流密度値ＩＩに切り替えるように、２以下とする。   As shown in FIGS. 2 and 3, the first current density value I and the second current density value II are different, and the difference between the first current density value I and the second current density value II is In the embodiment, the value is set to 2 or less so that the first current density value I is instantaneously switched to the second current density value II.

さらに、前記回路基板構造の製造方法では、上記ステップが実施されると、前記孔１１の孔壁に電気めっきされている導電体２が形成され、且つ前記導電体２の内面が取り囲む空間２１を形成する。   Furthermore, in the method for manufacturing a circuit board structure, when the above steps are performed, the conductor 2 that is electroplated is formed on the hole wall of the hole 11, and the space 21 surrounded by the inner surface of the conductor 2 is formed. Form.

さらに、前記孔１１内に上記導電体２を効果的に形成するために、前記第１電流密度値Ｉは、好ましくは、前記第２電流密度値ＩＩより小さい。前記第１電流密度値Ｉは、たとえば、４ＡＳＦ〜１２ＡＳＦ、且つ前記第２電流密度値ＩＩは、たとえば、１０ＡＳＦ〜３０ＡＳＦである。
［実施形態２］
図４及び図５には、本発明の実施形態２が示されており、本実施形態は、上記実施形態１と類似するため、２つの実施形態の共通部分（たとえば、準備ステップ）については詳細な説明を省略する。本実施形態は、実施形態１に比べて、本実施形態の回路基板構造の製造方法が実施されると、前記孔１１全体に電気めっきされ充填されている導電体３が形成される点が異なる。 Further, in order to effectively form the conductor 2 in the hole 11, the first current density value I is preferably smaller than the second current density value II. The first current density value I is, for example, 4 ASF to 12 ASF, and the second current density value II is, for example, 10 ASF to 30 ASF.
[Embodiment 2]
FIGS. 4 and 5 show a second embodiment of the present invention. This embodiment is similar to the first embodiment, and the common part (for example, a preparation step) of the two embodiments is detailed. Detailed description is omitted. The present embodiment is different from the first embodiment in that, when the method of manufacturing the circuit board structure of the present embodiment is performed, the entire surface of the hole 11 is formed with the conductor 3 filled with electroplating. .

具体的には、前記孔１１内に上記導電体３を効果的に形成するために、前記第１電流密度値Ｉは、好ましくは、第２電流密度値ＩＩより大きい。そのうち、前記第１電流密度値Ｉは、たとえば、１０ＡＳＦ〜６０ＡＳＦ、前記第２電流密度値ＩＩは、たとえば、４ＡＳＦ〜１５ＡＳＦである。
［実施形態３］
図６及び図７には、本発明の実施形態３が示されている。本実施形態は上記実施形態１及び実施形態２と類似するため、上記実施形態との共通部分（たとえば、準備ステップ、第１電気めっきステップ、及び第２電気めっきステップ）については詳細な説明を省略する。本実施形態は、実施形態１及び実施形態２に比べて、本実施形態の回路基板構造の製造方法では、上記第１電気めっきステップと第２電気めっきステップの間にさらに電流切替ステップを実施する点が異なる。 Specifically, in order to effectively form the conductor 3 in the hole 11, the first current density value I is preferably larger than the second current density value II. The first current density value I is, for example, 10 ASF to 60 ASF, and the second current density value II is, for example, 4 ASF to 15 ASF.
[Embodiment 3]
6 and 7 show a third embodiment of the present invention. Since the present embodiment is similar to the above-described first and second embodiments, detailed descriptions of common parts (for example, a preparation step, a first electroplating step, and a second electroplating step) with the above-described embodiment are omitted. I do. In the present embodiment, as compared with the first and second embodiments, in the method for manufacturing a circuit board structure of the present embodiment, a current switching step is further performed between the first electroplating step and the second electroplating step. The points are different.

具体的には、前記電流切替ステップでは、勾配電流密度値を有する勾配電流Ｚを用いて、前記回路基板１の孔１１を、切替期間Ｔｃにおいて電気めっきするように実施される。上記勾配電流密度値は、切替期間Ｔｃにおいて、前記第１電流密度値Ｉから第２電流密度値ＩＩへ徐々に変わる（たとえば、増加又は減少する）。   Specifically, in the current switching step, the hole 11 of the circuit board 1 is electroplated in a switching period Tc using a gradient current Z having a gradient current density value. The gradient current density value gradually changes (for example, increases or decreases) from the first current density value I to the second current density value II during the switching period Tc.

本実施形態では、前記切替期間Ｔｃは０〜２０分間であり、且つ上記切替期間Ｔｃの時間は前記第１電流密度値Ｉと第２電流密度値ＩＩの差によって決定されるが、本発明はそれに制限されない。さらに、本実施形態の回路基板構造の製造方法が実施された結果、下記電流密度差と切替期間Ｔｃの関係表が得られる。   In the present embodiment, the switching period Tc is 0 to 20 minutes, and the time of the switching period Tc is determined by the difference between the first current density value I and the second current density value II. You are not limited to it. Furthermore, as a result of the method of manufacturing the circuit board structure according to the present embodiment being performed, the following relationship table between the current density difference and the switching period Tc is obtained.

Figure 2020017712
上表に記載のとおり、前記第１電流密度値Ｉと第２電流密度値ＩＩの差が２以下である場合、該切替期間Ｔｃは０分間であり、つまり、上記実施形態１と実施形態２に記載の第１電流密度値Ｉが瞬時に第２電流密度値ＩＩに切り替えられる。
Figure 2020017712
 As described in the above table, when the difference between the first current density value I and the second current density value II is 2 or less, the switching period Tc is 0 minute, that is, in the first and second embodiments. Is instantaneously switched to the second current density value II.

さらに、前記第１電流密度値Ｉと第２電流密度値ＩＩの差が３〜５である場合、該切替期間Ｔｃは１〜１１分間、前記第１電流密度値Ｉと第２電流密度値ＩＩの差が６〜９である場合、該切替期間Ｔｃは１２〜１９分間、前記第１電流密度値Ｉと第２電流密度値ＩＩの差が１０以上である場合、該切替期間Ｔｃは２０分間である。   Further, when the difference between the first current density value I and the second current density value II is 3 to 5, the switching period Tc is 1 to 11 minutes, and the first current density value I and the second current density value II Is 6 to 9, the switching period Tc is 12 to 19 minutes, and when the difference between the first current density value I and the second current density value II is 10 or more, the switching period Tc is 20 minutes. It is.

それによって、本実施形態の回路基板構造の製造方法では、前記第１電流密度値Ｉと第２電流密度値ＩＩの差によって、切替期間Ｔｃの時間を調整し、さらに上記回路基板１の孔１１を優れた電気めっき効果と電気めっき効率で形成することができる。   Accordingly, in the method of manufacturing a circuit board structure according to the present embodiment, the time of the switching period Tc is adjusted by the difference between the first current density value I and the second current density value II. Can be formed with excellent electroplating effect and electroplating efficiency.

また、なお、上記実施形態１−実施形態３では、２つの電気めっきステップの場合（たとえば、第１電気めっきステップと第２電気めっきステップ）を説明したが、本発明に係る回路基板構造の製造方法で実施される電気めっきステップの回数はそれに制限されない。   In the first to third embodiments, the case of two electroplating steps (for example, the first electroplating step and the second electroplating step) has been described, but the manufacture of the circuit board structure according to the present invention is described. The number of electroplating steps performed in the method is not limited thereto.

さらに、本発明の図示しない実施形態では、前記回路基板構造の製造方法は、Ｎ（Ｎは２以上の正整数である）個の電気めっきステップを順次実施してもよい。前記電気めっきステップごとに、電流密度値を有する電流を用いて、上記回路基板１の孔１１を電気めっきする。さらに、上記Ｎ個の電気めっきステップでは、２種以上の電流密度値が含まれ、且ついずれの電流密度値も４ＡＳＦ〜６０ＡＳＦである。   Further, in an embodiment (not shown) of the present invention, the method for manufacturing a circuit board structure may sequentially perform N (N is a positive integer of 2 or more) electroplating steps. In each of the electroplating steps, the holes 11 of the circuit board 1 are electroplated using a current having a current density value. Further, the N electroplating steps include two or more current density values, and each of the current density values is 4 ASF to 60 ASF.

より具体的には、順次実施される前記電気めっきステップのいずれか２つにおいて、使用される２つの前記電流密度値の差が２より大きい場合、電流切替ステップを実施し、上記順次実施される前記電気めっきステップのいずれか２つにおいて、使用される２つの前記電流密度値の差が２未満である場合、該２つの電流密度値は瞬時に切り替えられる。   More specifically, in any two of the sequentially performed electroplating steps, if the difference between the two current density values used is greater than two, a current switching step is performed, and the sequentially performed steps are performed. In any two of the electroplating steps, if the difference between the two current density values used is less than 2, the two current density values are instantaneously switched.

前記電流切替ステップでは、勾配電流密度値を有する勾配電流を用いて、前記回路基板１の孔１１を切替期間において電気めっきし、前記勾配電流密度値は、前記切替期間において、使用される２つの前記電流密度値のうち先に実施される前記電流密度値から後に実施される前記電流密度値に徐々に変わる。さらに、前記切替期間は０〜２０分間であり、具体的な時間については、実施形態３の説明を参照すればよい。   In the current switching step, a hole 11 of the circuit board 1 is electroplated during a switching period using a gradient current having a gradient current density value, and the gradient current density value The current density value gradually changes from the current density value performed first to the current density value performed later. Further, the switching period is 0 to 20 minutes, and the specific time may be referred to the description of the third embodiment.

なお、上記Ｎ個の電気めっきステップに使用される電流密度値は、必要に応じて、高密度値から低密度値へ変わり、又は、低密度値から高密度値へ変わり、又は高密度値と低密度値を交互させるように制御でき、本発明では制限しない。   The current density value used in the N electroplating steps changes from a high density value to a low density value, or changes from a low density value to a high density value, or a high density value, if necessary. It can be controlled to alternate low density values and is not limited in the present invention.

また、従来の回路基板の製造方法では、孔充填率をできるだけ確保する場合、アスペクト比が４より大きく且つ８未満の孔への電気めっき効率は１０％低減し、且つアスペクト比が８より大きく且つ１１未満の孔への電気めっき効率は４０％低減し、アスペクト比が１１より大きく且つ１６未満の孔への電気めっき効率は７０％低減する。従来の回路基板の製造方法では、アスペクト比が１１より大きく且つ１６未満の孔への孔充填率は６０％を実現するのが極めて困難である。   Further, in the conventional method for manufacturing a circuit board, in order to ensure the hole filling rate as much as possible, the electroplating efficiency for holes having an aspect ratio larger than 4 and less than 8 is reduced by 10%, and the aspect ratio is larger than 8 and Electroplating efficiency for holes less than 11 is reduced by 40%, and electroplating efficiency for holes having an aspect ratio greater than 11 and less than 16 is reduced by 70%. In the conventional method for manufacturing a circuit board, it is extremely difficult to achieve a hole filling ratio of 60% for holes having an aspect ratio of greater than 11 and less than 16.

それに対して、本実施形態の回路基板構造の製造方法を適用した結果、孔充填率をできるだけ確保するとともに、アスペクト比が４より大きく且つ１６未満の孔１１への電気めっき効率は、従来の回路基板の製造方法よりも、効果的に向上する。さらに、本発明の実施形態に開示されている回路基板構造の製造方法は、アスペクト比が１１より大きく且つ１６未満の前記孔１１への孔充填率が６０％以上に達する。
［本発明の実施形態の技術的効果］
以上のように、本発明の実施形態で開示されている回路基板構造の製造方法では、使用される複数の電気めっきステップ（たとえば、第１電気めっきステップと第２電気めっきステップ）は、４ＡＳＦ〜６０ＡＳＦで且つ互いに異なる電流密度値を用いることで、孔充填率を確保するとともに、電気めっき効率と電気めっき効果（たとえば、優れた孔充填率を実現する）を効果的に向上できる。 On the other hand, as a result of applying the method of manufacturing the circuit board structure of the present embodiment, the hole filling rate is ensured as much as possible, and the electroplating efficiency for the holes 11 having an aspect ratio larger than 4 and smaller than 16 is smaller than that of the conventional circuit It is improved more effectively than the substrate manufacturing method. Further, according to the method for manufacturing a circuit board structure disclosed in the embodiment of the present invention, the hole filling ratio of the holes 11 having an aspect ratio of more than 11 and less than 16 reaches 60% or more.
[Technical effects of the embodiment of the present invention]
As described above, in the method for manufacturing a circuit board structure disclosed in the embodiment of the present invention, a plurality of electroplating steps (for example, the first electroplating step and the second electroplating step) are performed using 4 ASF to 4 ASF. By using 60 ASF and different current density values, the hole filling rate can be ensured, and the electroplating efficiency and the electroplating effect (for example, realizing an excellent hole filling rate) can be effectively improved.

さらに、本実施形態の回路基板構造の製造方法はさらに、２つの実施される電気めっきステップの電流密度値の差（たとえば、第１電流密度値と第２電流密度値の差）に基づいて、切替期間の時間を調整し、さらに上記回路基板の孔に優れた電気めっき効果と電気めっき効率を付与できる。   Further, the method of manufacturing a circuit board structure according to the present embodiment further includes, based on a difference between current density values of two performed electroplating steps (for example, a difference between a first current density value and a second current density value). By adjusting the time of the switching period, it is possible to impart excellent electroplating effect and electroplating efficiency to the holes of the circuit board.

以上は本発明の好適実施形態であり、本発明の保護範囲を制限するものではなく、本発明の特許請求の範囲を逸脱せずに実施される均等な変形や修飾はいずれも本発明の特許請求の範囲の保護範囲に属する。   The above is a preferred embodiment of the present invention, which does not limit the protection scope of the present invention, and any equivalent deformation or modification implemented without departing from the scope of the claims of the present invention is not limited to the patent of the present invention. It belongs to the protection scope of the claims.

１：回路基板
１１：孔
２：導電体
２１：空間
３：導電体
Ｘ：第１電流
Ｙ：第２電流
Ｚ：勾配電流
Ｔ１：第１期間
Ｔ２：第２期間
Ｔｃ：切替期間
Ｉ：第１電流密度値
ＩＩ：第２電流密度値
Ｒ：孔径
Ｄ：孔深さ
1: Circuit board 11: Hole 2: Conductor 21: Space 3: Conductor X: First current Y: Second current Z: Gradient current T1: First period T2: Second period Tc: Switching period I: First Current density value II: second current density value R: hole diameter D: hole depth

Claims (10)

回路基板構造の製造方法であって、
孔を有し、孔径を孔深さで割った孔のアスペクト比が４以上である回路基板を提供する準備ステップと、
第１電流密度値を有する第１電流を用いて、前記回路基板の前記孔を第１期間において電気めっきする第１電気めっきステップと、
第２電流密度値を有する第２電流を用いて、前記回路基板の前記孔を第２期間において電気めっきする第２電気めっきステップとを含み、
前記第１電流密度値と前記第２電流密度値は異なり、且つそれぞれ４ＡＳＦ〜６０ＡＳＦにあることを特徴とする回路基板構造の製造方法。 A method for manufacturing a circuit board structure, comprising:
A providing step of providing a circuit board having holes and an aspect ratio of holes obtained by dividing the hole diameter by the hole depth is 4 or more;
A first electroplating step of electroplating the hole of the circuit board in a first period using a first current having a first current density value;
A second electroplating step of electroplating the holes of the circuit board for a second period using a second current having a second current density value;
The method of manufacturing a circuit board structure according to claim 1, wherein the first current density value and the second current density value are different from each other and are each in the range of 4 ASF to 60 ASF. 前記孔の孔壁に電気めっきされている導電体が形成され、前記導電体の内面が取り囲む空間を形成し、且つ前記第１電流密度値は前記第２電流密度値未満である請求項１に記載の回路基板構造の製造方法。   The electroplated conductor is formed on a hole wall of the hole to form a space surrounded by an inner surface of the conductor, and the first current density value is less than the second current density value. A method for manufacturing the circuit board structure according to the above. 前記第１電流密度値は４ＡＳＦ〜１２ＡＳＦ、且つ前記第２電流密度値は１０ＡＳＦ〜３０ＡＳＦである請求項２に記載の回路基板構造の製造方法。   The method according to claim 2, wherein the first current density value is 4 ASF to 12 ASF, and the second current density value is 10 ASF to 30 ASF. 前記孔を充填するように電気めっきされている導電体が形成され、且つ前記第１電流密度値は前記第２電流密度値より大きい請求項１に記載の回路基板構造の製造方法。   The method of claim 1, wherein a conductor that is electroplated is formed to fill the hole, and the first current density value is greater than the second current density value. 前記第１電流密度値は１０ＡＳＦ〜６０ＡＳＦ、且つ前記第２電流密度値は４ＡＳＦ〜１５ＡＳＦにある請求項４に記載の回路基板構造の製造方法。   The method according to claim 4, wherein the first current density value is 10 ASF to 60 ASF, and the second current density value is 4 ASF to 15 ASF. 前記第１電気めっきステップと前記第２電気めっきステップの間に、
勾配電流密度値を有する勾配電流を用いて、前記回路基板の前記孔を切替期間において電気めっきし、前記勾配電流密度値は前記切替期間において、前記第１電流密度値から前記第２電流密度値へ徐々に変わる電流切替ステップをさらに含み、
前記切替期間は０〜２０分間である請求項１に記載の回路基板構造の製造方法。 Between the first electroplating step and the second electroplating step,
The hole of the circuit board is electroplated during a switching period using a gradient current having a gradient current density value, and the gradient current density value is changed from the first current density value to the second current density value during the switching period. Further includes a current switching step that gradually changes to
The method according to claim 1, wherein the switching period is 0 to 20 minutes. 前記第１電流密度値と前記第２電流密度値の差が２以下である場合、前記切替期間は０分間であり、前記第１電流密度値と前記第２電流密度値の差が１０以上である場合、前記切替期間は２０分間である請求項６に記載の回路基板構造の製造方法。   When the difference between the first current density value and the second current density value is 2 or less, the switching period is 0 minute, and the difference between the first current density value and the second current density value is 10 or more. 7. The method according to claim 6, wherein the switching period is 20 minutes. 前記第１電流密度値と前記第２電流密度値の差が３〜５である場合、前記切替期間は１〜１１分間である請求項６に記載の回路基板構造の製造方法。   The method according to claim 6, wherein when the difference between the first current density value and the second current density value is 3 to 5, the switching period is 1 to 11 minutes. 前記第１電流密度値と前記第２電流密度値の差が６〜９である場合、前記切替期間は１２〜１９分間である請求項６に記載の回路基板構造の製造方法。   7. The method of claim 6, wherein when the difference between the first current density value and the second current density value is 6 to 9, the switching period is 12 to 19 minutes. 回路基板構造の製造方法であって、
孔を有し、孔径を孔深さで割った孔のアスペクト比が４以上である回路基板を提供する準備ステップと、
順次実施されるＮ個の電気めっきステップとを含み、
前記電気めっきステップのそれぞれにおいて、電流密度値を有する電流を用いて、前記回路基板の前記孔を電気めっきし、Ｎが２以上の正整数であり、且つＮ個の前記電気めっきステップでは、２種以上の前記電流密度値を有し、且ついずれの前記電流密度値も４ＡＳＦ〜６０ＡＳＦにあり、
順次実施される前記電気めっきステップのいずれかの２つにおいて、使用される２つの前記電流密度値の差が２より大きい場合、電流切替ステップを実施し、
前記電流切替ステップでは、勾配電流密度値を有する勾配電流を用いて、前記回路基板の前記孔を、切替期間において電気めっきし、前記勾配電流密度値は、前記切替期間において、使用される２つの前記電流密度値のうち先に実施された前記電流密度値から、後に実施される前記電流密度値へ徐々に変わり、
前記切替期間は０〜２０分間であることを特徴とする回路基板構造の製造方法。 A method for manufacturing a circuit board structure, comprising:
A providing step of providing a circuit board having holes and an aspect ratio of holes obtained by dividing the hole diameter by the hole depth is 4 or more;
N electroplating steps performed sequentially;
In each of the electroplating steps, the hole of the circuit board is electroplated using a current having a current density value, wherein N is a positive integer of 2 or more, and N And more than one kind of said current density values, and any of said current density values is in 4 ASF to 60 ASF;
In any two of the electroplating steps performed sequentially, if a difference between the two current density values used is greater than 2, performing a current switching step;
In the current switching step, the hole of the circuit board is electroplated in a switching period using a gradient current having a gradient current density value, and the gradient current density value is used for two of the gradient current density values used in the switching period. From the current density value performed earlier among the current density values, gradually changes to the current density value performed later,
The method for manufacturing a circuit board structure, wherein the switching period is 0 to 20 minutes.
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