JP2019212724A5 - - Google Patents
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- JP2019212724A5 JP2019212724A5 JP2018106644A JP2018106644A JP2019212724A5 JP 2019212724 A5 JP2019212724 A5 JP 2019212724A5 JP 2018106644 A JP2018106644 A JP 2018106644A JP 2018106644 A JP2018106644 A JP 2018106644A JP 2019212724 A5 JP2019212724 A5 JP 2019212724A5
- Authority
- JP
- Japan
- Prior art keywords
- layer
- resistance layer
- concentration
- semiconductor device
- type impurity
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 239000012535 impurity Substances 0.000 claims 24
- 239000004065 semiconductor Substances 0.000 claims 15
- 238000004519 manufacturing process Methods 0.000 claims 8
- 238000000034 method Methods 0.000 claims 8
- 239000013078 crystal Substances 0.000 claims 4
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims 3
- 229910052796 boron Inorganic materials 0.000 claims 3
- 238000000137 annealing Methods 0.000 claims 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims 2
- 229910015900 BF3 Inorganic materials 0.000 claims 1
- WTEOIRVLGSZEPR-UHFFFAOYSA-N boron trifluoride Chemical compound FB(F)F WTEOIRVLGSZEPR-UHFFFAOYSA-N 0.000 claims 1
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2018106644A JP6962866B2 (ja) | 2018-06-04 | 2018-06-04 | 半導体装置およびその製造方法 |
| US16/407,916 US10818747B2 (en) | 2018-06-04 | 2019-05-09 | Semiconductor device and method of manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2018106644A JP6962866B2 (ja) | 2018-06-04 | 2018-06-04 | 半導体装置およびその製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2019212724A JP2019212724A (ja) | 2019-12-12 |
| JP2019212724A5 true JP2019212724A5 (https=) | 2020-11-26 |
| JP6962866B2 JP6962866B2 (ja) | 2021-11-05 |
Family
ID=68692799
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2018106644A Active JP6962866B2 (ja) | 2018-06-04 | 2018-06-04 | 半導体装置およびその製造方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US10818747B2 (https=) |
| JP (1) | JP6962866B2 (https=) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP7461373B2 (ja) | 2019-11-25 | 2024-04-03 | 株式会社Ｎｔｔドコモ | 端末及び通信方法 |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6242314B1 (en) * | 1998-09-28 | 2001-06-05 | Taiwan Semiconductor Manufacturing Company | Method for fabricating a on-chip temperature controller by co-implant polysilicon resistor |
| JP4547753B2 (ja) | 2000-01-14 | 2010-09-22 | 富士電機システムズ株式会社 | 半導体装置の製造方法 |
| JP2003078019A (ja) | 2001-09-05 | 2003-03-14 | Sanyo Electric Co Ltd | 半導体装置 |
| US6885280B2 (en) * | 2003-01-31 | 2005-04-26 | Fairchild Semiconductor Corporation | High value split poly p-resistor with low standard deviation |
-
2018
- 2018-06-04 JP JP2018106644A patent/JP6962866B2/ja active Active
-
2019
- 2019-05-09 US US16/407,916 patent/US10818747B2/en active Active
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