JP2019212648A - Film forming apparatus and film forming method - Google Patents

Film forming apparatus and film forming method Download PDF

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JP2019212648A
JP2019212648A JP2018104200A JP2018104200A JP2019212648A JP 2019212648 A JP2019212648 A JP 2019212648A JP 2018104200 A JP2018104200 A JP 2018104200A JP 2018104200 A JP2018104200 A JP 2018104200A JP 2019212648 A JP2019212648 A JP 2019212648A
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voltage
film forming
upper electrode
lower electrode
electrode
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龍夫 松土
Tatsuo Matsudo
龍夫 松土
靖 森田
Yasushi Morita
靖 森田
崇央 進藤
Takahisa Shindo
崇央 進藤
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Tokyo Electron Ltd
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Priority to PCT/JP2019/020314 priority patent/WO2019230526A1/en
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    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/50Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
    • C23C16/503Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using dc or ac discharges
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/50Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
    • C23C16/505Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using radio frequency discharges
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/50Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
    • C23C16/515Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using pulsed discharges
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/50Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
    • C23C16/517Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using a combination of discharges covered by two or more of groups C23C16/503 - C23C16/515
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05HPLASMA TECHNIQUE; PRODUCTION OF ACCELERATED ELECTRICALLY-CHARGED PARTICLES OR OF NEUTRONS; PRODUCTION OR ACCELERATION OF NEUTRAL MOLECULAR OR ATOMIC BEAMS
    • H05H1/00Generating plasma; Handling plasma
    • H05H1/24Generating plasma
    • H05H1/46Generating plasma using applied electromagnetic fields, e.g. high frequency or microwave energy

Abstract

To provide a technology capable of achieving both high electron density, low ion energy, and high uniformity.SOLUTION: A film forming apparatus according to the present disclosure includes a processing vessel capable of being evacuated, a lower electrode, an upper electrode, a gas supply unit, and a voltage application unit. A substrate to be processed is placed on the lower electrode. The upper electrode is disposed to face the lower electrode in the processing vessel. The gas supply unit supplies a film forming material gas, which is converted into plasma in a processing space between the upper electrode and the lower electrode, into the processing space. The voltage application unit applies an AC voltage whose reference potential alternately changes up and down with time to the upper electrode.SELECTED DRAWING: Figure 1

Description

本開示は、成膜装置及び成膜方法に関する。   The present disclosure relates to a film forming apparatus and a film forming method.

半導体集積回路の製造では、成膜装置によって、半導体ウエハ等の基板に対して成膜が行われる。成膜装置では、所定の真空度にされたチャンバ(処理容器)内に基板が配置され、チャンバ内に成膜原料ガスが供給されてプラズマが生成することにより、基板に対して成膜が行われる。成膜技術として、例えば、プラズマCVD(Chemical Vapor Deposition)、プラズマALD(Atomic Layer Deposition)等が知られている。   In manufacturing a semiconductor integrated circuit, a film is formed on a substrate such as a semiconductor wafer by a film forming apparatus. In a film forming apparatus, a substrate is placed in a chamber (processing container) that has a predetermined degree of vacuum, and a film forming raw material gas is supplied into the chamber to generate plasma, thereby forming a film on the substrate. Is called. As film formation techniques, for example, plasma CVD (Chemical Vapor Deposition), plasma ALD (Atomic Layer Deposition), and the like are known.

特開2009−239012号公報JP 2009-239012 A

プラズマCVDやプラズマALDのような数百mTorr〜数Torrの高圧条件下においては、高電子密度化が図れるプラズマを発生させる必要がある。これに対し、酸化膜成膜プロセスでは、高電子密度化のためには数MHz以下の低周波が必要である一方で、低イオンエネルギー化のためには数十MHz以上の高周波が必要である。一方で、窒化膜成膜プロセスでは、高電子密度化のためには数百MHz以上の高周波が必要である一方で、高均一性のためには数十MHz以下の低周波が必要である。   Under high pressure conditions of several hundred mTorr to several Torr such as plasma CVD or plasma ALD, it is necessary to generate plasma capable of increasing the electron density. On the other hand, in the oxide film forming process, a low frequency of several MHz or less is necessary for increasing the electron density, whereas a high frequency of several tens of MHz or more is necessary for reducing the ion energy. . On the other hand, in the nitride film forming process, a high frequency of several hundred MHz or more is necessary for increasing the electron density, while a low frequency of several tens of MHz or less is necessary for high uniformity.

よって、従来の成膜装置では、高電子密度化、低イオンエネルギー化、及び、高均一性を共に達成することは困難であった。このため、どのような成膜プロセスに対しても、高電子密度化、低イオンエネルギー化、及び、高均一性を共に達成できる成膜装置が望まれていた。   Therefore, it has been difficult to achieve high electron density, low ion energy, and high uniformity in the conventional film forming apparatus. Therefore, there has been a demand for a film forming apparatus capable of achieving both high electron density, low ion energy, and high uniformity for any film forming process.

本開示は、高電子密度化、低イオンエネルギー化、及び、高均一性を共に達成できる技術を提供する。   The present disclosure provides a technique capable of achieving both high electron density, low ion energy, and high uniformity.

本開示の一態様の成膜装置は、真空排気可能な処理容器と、下部電極と、上部電極と、ガス供給部と、電圧印加部とを有する。下部電極には被処理基板が載置される。上部電極は、処理容器内で下部電極に対向して配置される。ガス供給部は、上部電極と下部電極との間の処理空間でプラズマ化する成膜原料ガスを処理空間に供給する。電圧印加部は、基準電位が時間の経過に伴って上下に交互に変化する交流電圧を上部電極に印加する。   The film formation apparatus of one embodiment of the present disclosure includes a processing container that can be evacuated, a lower electrode, an upper electrode, a gas supply unit, and a voltage application unit. A substrate to be processed is placed on the lower electrode. The upper electrode is disposed to face the lower electrode in the processing container. The gas supply unit supplies a film forming material gas to be converted into plasma in the processing space between the upper electrode and the lower electrode to the processing space. The voltage application unit applies an AC voltage whose reference potential alternately changes up and down with time to the upper electrode.

本開示の技術によれば、高電子密度化、低イオンエネルギー化、及び、高均一性を共に達成できる。   According to the technique of the present disclosure, it is possible to achieve both high electron density, low ion energy, and high uniformity.

図1は、実施形態に係る成膜装置の構成例を示す図である。FIG. 1 is a diagram illustrating a configuration example of a film forming apparatus according to the embodiment. 図2は、実施形態に係る高周波電圧の一例を示す図である。FIG. 2 is a diagram illustrating an example of the high-frequency voltage according to the embodiment. 図3は、実施形態に係る直流パルス電圧の一例を示す図である。FIG. 3 is a diagram illustrating an example of a DC pulse voltage according to the embodiment. 図4は、実施形態に係る重畳電圧の一例を示す図である。FIG. 4 is a diagram illustrating an example of the superimposed voltage according to the embodiment. 図5は、比較例における実験結果の一例を示す図である。FIG. 5 is a diagram illustrating an example of an experimental result in a comparative example. 図6は、比較例における実験結果の一例を示す図である。FIG. 6 is a diagram illustrating an example of an experimental result in a comparative example. 図7は、実施形態に係る実験結果1の一例を示す図である。FIG. 7 is a diagram illustrating an example of the experimental result 1 according to the embodiment. 図8は、実施形態に係る実験結果2の一例を示す図である。FIG. 8 is a diagram illustrating an example of the experimental result 2 according to the embodiment. 図9は、実施形態に係る実験結果2の一例を示す図である。FIG. 9 is a diagram illustrating an example of the experimental result 2 according to the embodiment. 図10は、実施形態に係る実験結果3の一例を示す図である。FIG. 10 is a diagram illustrating an example of the experimental result 3 according to the embodiment.

以下に、本開示の技術の実施形態を図面に基づいて説明する。   Hereinafter, embodiments of the technology of the present disclosure will be described with reference to the drawings.

<成膜装置の構成>
図1は、実施形態に係る成膜装置の構成例を示す図である。
<Configuration of film forming apparatus>
FIG. 1 is a diagram illustrating a configuration example of a film forming apparatus according to the embodiment.

図1において、成膜装置1は、例えばアルミニウムまたはステンレス鋼等からなる金属製の処理容器であるチャンバ10を有する。チャンバ10は保安接地されている。   In FIG. 1, a film forming apparatus 1 has a chamber 10 which is a metal processing vessel made of, for example, aluminum or stainless steel. The chamber 10 is grounded for safety.

チャンバ10内には、被処理基板としての半導体ウエハWが載置される円盤状のサセプタ12が、水平に配置されている。サセプタ12は、下部電極としても機能する。チャンバ10の側壁には、半導体ウエハWの搬入出口を開閉するゲートバルブ28が取り付けられている。サセプタ12は、例えばAlNセラミックからなり、チャンバ10の底から鉛直上方に延びる絶縁性の筒状支持部14に支持されている。   A disc-shaped susceptor 12 on which a semiconductor wafer W as a substrate to be processed is placed is horizontally disposed in the chamber 10. The susceptor 12 also functions as a lower electrode. A gate valve 28 for opening and closing the loading / unloading port for the semiconductor wafer W is attached to the side wall of the chamber 10. The susceptor 12 is made of, for example, AlN ceramic, and is supported by an insulating cylindrical support portion 14 that extends vertically upward from the bottom of the chamber 10.

筒状支持部14の外周に沿ってチャンバ10の底から鉛直上方に延びる導電性の筒状支持部(内壁部)16とチャンバ10の側壁との間に、環状の排気路18が形成されている。排気路18の底には排気口22が設けられている。   An annular exhaust path 18 is formed between the conductive cylindrical support portion (inner wall portion) 16 extending vertically upward from the bottom of the chamber 10 along the outer periphery of the cylindrical support portion 14 and the side wall of the chamber 10. Yes. An exhaust port 22 is provided at the bottom of the exhaust path 18.

排気口22には排気管24を介して排気装置26が接続されている。排気装置26は、例えばターボ分子ポンプ等の真空ポンプを有しており、チャンバ10内の処理空間を所望の真空度まで減圧する。チャンバ10内は、例えば、200mTorr〜1700mTorrの範囲の一定の圧力に保たれるのが好ましい。   An exhaust device 26 is connected to the exhaust port 22 via an exhaust pipe 24. The exhaust device 26 has a vacuum pump such as a turbo molecular pump, for example, and depressurizes the processing space in the chamber 10 to a desired degree of vacuum. The inside of the chamber 10 is preferably maintained at a constant pressure in the range of, for example, 200 mTorr to 1700 mTorr.

下部電極として用いられるサセプタ12と接地との間には、コイル101と可変コンデンサ102とを有するインピーダンス調整回路100が接続棒36を介して電気的に接続されている。   An impedance adjusting circuit 100 having a coil 101 and a variable capacitor 102 is electrically connected via a connecting rod 36 between the susceptor 12 used as the lower electrode and the ground.

サセプタ12の上には処理対象の半導体ウエハWが載置され、半導体ウエハWを囲むようにリング38が設けられている。リング38は、導電材(例えばNi,Al等)からなり、サセプタ12の上面に着脱可能に取り付けられる。   A semiconductor wafer W to be processed is placed on the susceptor 12, and a ring 38 is provided so as to surround the semiconductor wafer W. The ring 38 is made of a conductive material (for example, Ni, Al, etc.) and is detachably attached to the upper surface of the susceptor 12.

サセプタ12の上面には、ウエハ吸着用の静電チャック40が設けられている。静電チャック40は、膜状または板状の誘電体の間にシート状またはメッシュ状の導電体を挟んで形成される。静電チャック40内の導電体には、チャンバ10の外に配置される直流電源42がオン/オフ切替スイッチ44及び給電線46を介して電気的に接続されている。直流電源42より印加される直流電圧によって静電チャック40に発生したクーロン力により、半導体ウエハWが静電チャック40上に吸着保持される。   On the upper surface of the susceptor 12, an electrostatic chuck 40 for attracting the wafer is provided. The electrostatic chuck 40 is formed by sandwiching a sheet-like or mesh-like conductor between film-like or plate-like dielectrics. A DC power source 42 disposed outside the chamber 10 is electrically connected to the conductor in the electrostatic chuck 40 via an on / off switch 44 and a power supply line 46. The semiconductor wafer W is attracted and held on the electrostatic chuck 40 by the Coulomb force generated in the electrostatic chuck 40 by the DC voltage applied from the DC power source 42.

サセプタ12の内部には、円周方向に延びる環状の冷媒室48が設けられている。冷媒室48には、チラーユニット(図示せず)より配管50,52を介して、所定温度の冷媒(例えば冷却水)が循環供給される。冷媒の温度によって静電チャック40上の半導体ウエハWの温度が制御される。さらに、ウエハ温度の精度を一層高めるために、伝熱ガス供給部(図示せず)からの伝熱ガス(例えばHeガス)が、ガス供給管51及びサセプタ12内のガス通路56を介して、静電チャック40と半導体ウエハWとの間に供給される。   An annular coolant chamber 48 extending in the circumferential direction is provided inside the susceptor 12. A refrigerant (for example, cooling water) having a predetermined temperature is circulated and supplied to the refrigerant chamber 48 via pipes 50 and 52 from a chiller unit (not shown). The temperature of the semiconductor wafer W on the electrostatic chuck 40 is controlled by the temperature of the coolant. Further, in order to further increase the accuracy of the wafer temperature, a heat transfer gas (for example, He gas) from a heat transfer gas supply unit (not shown) is passed through the gas supply pipe 51 and the gas passage 56 in the susceptor 12. It is supplied between the electrostatic chuck 40 and the semiconductor wafer W.

チャンバ10の天井には、サセプタ12と平行に向かい合って(つまり、対向して)、円盤状の内側上部電極60及びリング状の外側上部電極62が同心状に設けられている。径方向の好適なサイズとして、内側上部電極60は半導体ウエハWと同程度の口径(直径)を有し、外側上部電極62はリング38と同程度の口径(内径・外径)を有している。但し、内側上部電極60と外側上部電極62とは互いに電気的(より正確にはDC的)に絶縁されている。両電極60,62の間には、例えばセラミックからなるリング状の絶縁体63が挿入されている。   A disk-shaped inner upper electrode 60 and a ring-shaped outer upper electrode 62 are concentrically provided on the ceiling of the chamber 10 so as to face (that is, face each other) in parallel with the susceptor 12. As a preferred size in the radial direction, the inner upper electrode 60 has the same diameter (diameter) as the semiconductor wafer W, and the outer upper electrode 62 has the same diameter (inner diameter / outer diameter) as the ring 38. Yes. However, the inner upper electrode 60 and the outer upper electrode 62 are electrically insulated from each other (more accurately, DC). A ring-shaped insulator 63 made of ceramic, for example, is inserted between the electrodes 60 and 62.

内側上部電極60は、サセプタ12と真正面に向かい合う電極板64と、電極板64をその背後(上)から着脱可能に支持する電極支持体66とを有している。電極板64の材質として、NiまたはAl等の導電材が好ましい。電極支持体66は、例えばアルマイト処理されたアルミニウムで構成される。外側上部電極62も、サセプタ12と向かい合う電極板68と、電極板68をその背後(上)から着脱可能に支持する電極支持体70とを有している。電極板68及び電極支持体70は、電極板64及び電極支持体66とそれぞれ同じ材質で構成されるのが好ましい。以下では、内側上部電極60と外側上部電極62とを「上部電極60,62」と総称することがある。このように、成膜装置1では、円盤状のサセプタ12(つまり、下部電極)と、円盤状の上部電極60,62とが互いに平行に対向している。   The inner upper electrode 60 includes an electrode plate 64 facing the susceptor 12 directly in front, and an electrode support 66 that detachably supports the electrode plate 64 from behind (upper) thereof. As the material of the electrode plate 64, a conductive material such as Ni or Al is preferable. The electrode support 66 is made of alumite-treated aluminum, for example. The outer upper electrode 62 also has an electrode plate 68 facing the susceptor 12 and an electrode support 70 that detachably supports the electrode plate 68 from behind (upper) thereof. The electrode plate 68 and the electrode support 70 are preferably made of the same material as the electrode plate 64 and the electrode support 66, respectively. Hereinafter, the inner upper electrode 60 and the outer upper electrode 62 may be collectively referred to as “upper electrodes 60, 62”. As described above, in the film forming apparatus 1, the disk-shaped susceptor 12 (that is, the lower electrode) and the disk-shaped upper electrodes 60 and 62 face each other in parallel.

なお、本実施形態では、上部電極60,62が、内側上部電極60と外側上部電極62との2つの部材で構成される場合を一例として挙げた。しかし、上部電極は1つの部材で構成されても良い。   In the present embodiment, the case where the upper electrodes 60 and 62 are constituted by two members of the inner upper electrode 60 and the outer upper electrode 62 is taken as an example. However, the upper electrode may be composed of one member.

上部電極60,62とサセプタ12との間に設定される処理空間PSに成膜原料ガスを供給するために、内側上部電極60がシャワーヘッドとして兼用される。より詳細には、電極支持体66の内部にガス拡散室72が設けられ、ガス拡散室72からサセプタ12側に貫ける多数のガス吐出孔74が電極支持体66及び電極板64に形成される。ガス拡散室72の上部に設けられるガス導入口72aには、原料ガス供給部76から延びるガス供給管78が接続されている。なお、内側上部電極60だけでなく外側上部電極62にもシャワーヘッドを設ける構成としても良い。   In order to supply the film forming source gas to the processing space PS set between the upper electrodes 60 and 62 and the susceptor 12, the inner upper electrode 60 is also used as a shower head. More specifically, a gas diffusion chamber 72 is provided inside the electrode support 66, and a number of gas discharge holes 74 penetrating from the gas diffusion chamber 72 toward the susceptor 12 are formed in the electrode support 66 and the electrode plate 64. A gas supply pipe 78 extending from the source gas supply unit 76 is connected to the gas introduction port 72 a provided in the upper part of the gas diffusion chamber 72. Note that a shower head may be provided not only on the inner upper electrode 60 but also on the outer upper electrode 62.

チャンバ10の外には、印加電圧を出力する電圧印加部5が配置されている。電圧印加部5は、給電ライン88を介して上部電極60,62に接続されている。電圧印加部5は、高周波電源30と、マッチングユニット34と、可変直流電源80と、パルス発生器84と、フィルタ86と、重畳器91と、オン/オフ切替スイッチ92とを有する。   A voltage application unit 5 that outputs an applied voltage is disposed outside the chamber 10. The voltage application unit 5 is connected to the upper electrodes 60 and 62 via the power supply line 88. The voltage application unit 5 includes a high frequency power source 30, a matching unit 34, a variable DC power source 80, a pulse generator 84, a filter 86, a superimposing unit 91, and an on / off switch 92.

高周波電源30は、プラズマの生成に寄与する高周波数の交流電圧(以下では「高周波電圧」と呼ぶことがある)を生成し、生成した高周波電圧をマッチングユニット34及びオン/オフ切替スイッチ92を介して重畳器91に供給する。オン/オフ切替スイッチ92がオンになっているときは、高周波電圧が重畳器91に供給される一方で、オン/オフ切替スイッチ92がオフになっているときは、高周波電圧が重畳器91に供給されない。高周波電源30が生成する高周波電圧の周波数は、例えば13MHz以上であることが好ましい。   The high-frequency power supply 30 generates a high-frequency AC voltage (hereinafter sometimes referred to as “high-frequency voltage”) that contributes to plasma generation, and the generated high-frequency voltage is passed through the matching unit 34 and the on / off switch 92. To the superimposer 91. When the on / off switch 92 is turned on, the high frequency voltage is supplied to the superimposing unit 91, while when the on / off switching switch 92 is off, the high frequency voltage is supplied to the superimposing unit 91. Not supplied. The frequency of the high frequency voltage generated by the high frequency power supply 30 is preferably, for example, 13 MHz or more.

図2は、実施形態に係る高周波電圧の一例を示す図である。図2に示すように、高周波電源30は、例えば、0Vを基準電位RPとする−250V〜250Vの高周波電圧V1を生成する。マッチングユニット34は、高周波電源30側のインピーダンスと負荷(主に電極、プラズマ、チャンバ)側のインピーダンスとの間の整合をとる。   FIG. 2 is a diagram illustrating an example of the high-frequency voltage according to the embodiment. As illustrated in FIG. 2, the high frequency power supply 30 generates a high frequency voltage V <b> 1 of −250 V to 250 V with 0 V as a reference potential RP, for example. The matching unit 34 matches the impedance on the high frequency power supply 30 side and the impedance on the load (mainly electrodes, plasma, chamber) side.

可変直流電源80の出力端子はパルス発生器84に接続され、可変直流電源80は、負の直流電圧(つまり負のDC電圧)をパルス発生器84に出力する。パルス発生器84は、可変直流電源80から入力される負の直流電圧を用いて、矩形波の直流パルス電圧(つまりDCパルス電圧)を発生し、発生した直流パルス電圧をフィルタ86を介して重畳器91に供給する。パルス発生器84が発生する直流パルス電圧の周波数は、例えば、10kHz〜1MHzであることが好ましい。また、パルス発生器84が発生する直流パルス電圧のデューティ比は、10%〜90%であることが好ましい。   The output terminal of the variable DC power supply 80 is connected to the pulse generator 84, and the variable DC power supply 80 outputs a negative DC voltage (that is, a negative DC voltage) to the pulse generator 84. The pulse generator 84 uses a negative DC voltage input from the variable DC power supply 80 to generate a rectangular wave DC pulse voltage (that is, a DC pulse voltage), and superimposes the generated DC pulse voltage via a filter 86. To the container 91. The frequency of the DC pulse voltage generated by the pulse generator 84 is preferably, for example, 10 kHz to 1 MHz. The duty ratio of the DC pulse voltage generated by the pulse generator 84 is preferably 10% to 90%.

図3は、実施形態に係る直流パルス電圧の一例を示す図である。図3に示すように、パルス発生器84は、例えば、−500V〜0Vの矩形波の直流パルス電圧V2を生成する。フィルタ86は、パルス発生器84から出力される直流パルス電圧をスルーで重畳器91へ出力する一方で、高周波電源30から出力される高周波電圧を接地ラインへ流してパルス発生器84側へは流さないように構成されている。   FIG. 3 is a diagram illustrating an example of a DC pulse voltage according to the embodiment. As shown in FIG. 3, the pulse generator 84 generates a DC pulse voltage V <b> 2 having a rectangular wave of −500 V to 0 V, for example. The filter 86 outputs the direct-current pulse voltage output from the pulse generator 84 to the superimposer 91 through, while passing the high-frequency voltage output from the high-frequency power supply 30 to the ground line and to the pulse generator 84 side. Is configured to not.

重畳器91は、高周波電源30から出力される高周波電圧と、パルス発生器84から出力される直流パルス電圧とを重畳することにより、高周波電圧と直流パルス電圧とが重畳された電圧(以下では「重畳電圧」と呼ぶことがある)を生成する。生成された重畳電圧は、給電ライン88を介して上部電極60,62に印加される。重畳器91は、電圧重畳部の一例である。   The superimposing unit 91 superimposes the high-frequency voltage output from the high-frequency power supply 30 and the direct-current pulse voltage output from the pulse generator 84, thereby superimposing the high-frequency voltage and the direct-current pulse voltage (hereinafter “ (Sometimes referred to as "superimposed voltage"). The generated superimposed voltage is applied to the upper electrodes 60 and 62 via the power supply line 88. The superimposer 91 is an example of a voltage superimposing unit.

図4は、実施形態に係る重畳電圧の一例を示す図である。図2示す高周波電圧V1と図3に示す直流パルス電圧V2とが重畳された場合、図4に示す重畳電圧V3が生成される。高周波電圧に直流パルス電圧が重畳されることにより、図4に示すように、重畳電圧V3においては、矩形波の直流パルス電圧V2(図3)の波形に合わせて、高周波電圧V1(図2)の基準電位RPが時間の経過に伴って上下に交互に変化する。つまり、電圧印加部5は、オン/オフ切替スイッチ92がオンになっている場合には、パルス状(つまり、矩形波状)に変化する高周波電圧を出力する。   FIG. 4 is a diagram illustrating an example of the superimposed voltage according to the embodiment. When the high-frequency voltage V1 shown in FIG. 2 and the DC pulse voltage V2 shown in FIG. 3 are superimposed, a superimposed voltage V3 shown in FIG. 4 is generated. By superimposing the direct-current pulse voltage on the high-frequency voltage, as shown in FIG. 4, in the superimposed voltage V3, the high-frequency voltage V1 (FIG. 2) is matched to the waveform of the rectangular DC pulse voltage V2 (FIG. 3). The reference potential RP changes alternately up and down over time. That is, when the on / off switch 92 is turned on, the voltage application unit 5 outputs a high-frequency voltage that changes in a pulse shape (that is, a rectangular wave shape).

なお、オン/オフ切替スイッチ92がオンになっているときは、マッチングユニット34から出力される高周波電圧が重畳器91に供給されるので、重畳器91からは重畳電圧が出力される。一方で、オン/オフ切替スイッチ92がオフになっているときは、マッチングユニット34から出力される高周波電圧が重畳器91に供給されないので、フィルタ86から出力された直流パルス電圧がそのまま重畳器91から出力される。   When the on / off changeover switch 92 is on, the high frequency voltage output from the matching unit 34 is supplied to the superimposer 91, and thus the superimposing voltage is output from the superimposer 91. On the other hand, when the on / off switch 92 is off, the high-frequency voltage output from the matching unit 34 is not supplied to the superimposer 91, so the DC pulse voltage output from the filter 86 is used as it is. Is output from.

また、チャンバ10内で処理空間PSに面する適当な箇所(例えば、外側上部電極62の半径方向外側)には、例えばNi,Al等の導電性部材からなるリング状のグランドパーツ96が取り付けられている。グランドパーツ96は、例えばセラミックからなるリング状の絶縁体98に取り付けられるとともに、チャンバ10の天井壁に接続されており、チャンバ10を介して接地されている。プラズマ処理中に電圧印加部5から上部電極60,62に重畳電圧が印加されると、プラズマを介して上部電極60,62とグランドパーツ96との間で電子電流が流れるようになっている。   In addition, a ring-shaped ground part 96 made of a conductive member such as Ni or Al is attached to an appropriate portion facing the processing space PS in the chamber 10 (for example, the outside in the radial direction of the outer upper electrode 62). ing. The ground part 96 is attached to a ring-shaped insulator 98 made of, for example, ceramic, is connected to the ceiling wall of the chamber 10, and is grounded through the chamber 10. When a superimposed voltage is applied from the voltage application unit 5 to the upper electrodes 60 and 62 during the plasma processing, an electron current flows between the upper electrodes 60 and 62 and the ground part 96 via the plasma.

成膜装置1内の各構成(例えば、排気装置26、高周波電源30、オン/オフ切替スイッチ44,92、原料ガス供給部76、チラーユニット(図示せず)、伝熱ガス供給部(図示せず)等)の個々の動作、及び、成膜装置1全体の動作(シーケンス)は、例えばマイクロコンピュータからなる制御部(図示せず)によって制御される。   Each component (for example, exhaust device 26, high frequency power supply 30, on / off switch 44, 92, source gas supply unit 76, chiller unit (not shown), heat transfer gas supply unit (not shown) in film forming apparatus 1 1) and the like, and the entire operation (sequence) of the film forming apparatus 1 are controlled by a control unit (not shown) including, for example, a microcomputer.

<成膜装置での成膜処理>
成膜装置1において、成膜を行なうには、まずゲートバルブ28を開状態にして加工対象の半導体ウエハWをチャンバ10内に搬入して、静電チャック40の上に載置する。次に、オン/オフ切替スイッチ44をオンにし、静電吸着力によって静電チャック40上に半導体ウエハWを吸着保持する。そして、原料ガス供給部76より成膜原料ガスを所定の流量でチャンバ10内に導入し、排気装置26によりチャンバ10内の圧力を設定値に調節する。成膜原料ガスとして、例えば、Ar/O2ガス等の負性ガスやN2ガスが用いられる。さらに、高周波電源30及び可変直流電源80をオンにして、重畳電圧を上部電極60,62に印加する。また、静電チャック40と半導体ウエハWとの間に伝熱ガスを供給する。上部電極60より吐出された成膜原料ガスは、上部電極60,62と下部電極として用いられるサセプタ12との間での放電によってプラズマ化し、このプラズマで生成されるラジカルやイオンによって半導体ウエハW表面に被膜が生成される。
<Film forming process in film forming apparatus>
In order to perform film formation in the film forming apparatus 1, first, the gate valve 28 is opened, and the semiconductor wafer W to be processed is loaded into the chamber 10 and placed on the electrostatic chuck 40. Next, the on / off switch 44 is turned on, and the semiconductor wafer W is attracted and held on the electrostatic chuck 40 by electrostatic attraction force. Then, a film forming source gas is introduced into the chamber 10 from the source gas supply unit 76 at a predetermined flow rate, and the pressure in the chamber 10 is adjusted to a set value by the exhaust device 26. As the film forming source gas, for example, a negative gas such as Ar / O 2 gas or N 2 gas is used. Further, the high frequency power supply 30 and the variable DC power supply 80 are turned on, and the superimposed voltage is applied to the upper electrodes 60 and 62. Further, a heat transfer gas is supplied between the electrostatic chuck 40 and the semiconductor wafer W. The film-forming source gas discharged from the upper electrode 60 is turned into plasma by discharge between the upper electrodes 60 and 62 and the susceptor 12 used as the lower electrode, and the surface of the semiconductor wafer W is generated by radicals and ions generated from the plasma. A film is formed on the surface.

<比較例の実験結果(成膜原料ガス:Ar/O2)>
図5及び図6は、比較例における実験結果の一例を示す図である。図5には、比較例における実験結果として、上部電極60,62に重畳電圧を印加するのではなく、上部電極60,62に450kHz、2MHz、13MHzまたは40MHzの周波数の交流電圧のみを印加した場合の圧力と電子密度との関係を示す。図6には、比較例における実験結果として、上部電極60,62に重畳電圧を印加するのではなく、チャンバ10内の圧力を500mTorrにした状態で、上部電極60,62に450kHzの周波数の交流電圧のみを印加した場合のイオンエネルギーとイオンエネルギー分布(IED:Ion Energy Distribution)との関係を示す。
<Experimental result of comparative example (deposition source gas: Ar / O2)>
5 and 6 are diagrams illustrating an example of experimental results in the comparative example. In FIG. 5, as an experimental result in the comparative example, instead of applying a superimposed voltage to the upper electrodes 60 and 62, only an AC voltage having a frequency of 450 kHz, 2 MHz, 13 MHz, or 40 MHz is applied to the upper electrodes 60 and 62. The relationship between the pressure and the electron density is shown. In FIG. 6, as an experimental result in the comparative example, an alternating current having a frequency of 450 kHz is applied to the upper electrodes 60 and 62 in a state where the pressure in the chamber 10 is set to 500 mTorr instead of applying a superimposed voltage to the upper electrodes 60 and 62. The relationship between ion energy and ion energy distribution (IED: Ion Energy Distribution) when only a voltage is applied is shown.

周波数が450kHzの低周波の交流電圧のみが上部電極60,62に印加される場合は、図5に示すように、O2を含む負性ガスプラズマでも電子密度が高いため、特にチャンバ10内の圧力が0.7Torr付近で、成膜のための十分な電子密度が得られる。一方で、図6に示すように、交流電圧のパワーが1000Wの場合には、イオンエネルギーが高くなり、生成される膜に与えるダメージが大きくなる。また、交流電圧のパワーを1000Wにしたまま圧力を上げてもイオンエネルギーの大幅な低下は期待できない。これに対し、図6に示すように、交流電圧のパワーを300W、150Wというように低パワー化することで低イオンエネルギー化を図ることはできるが、低パワー化により電子密度が低下するため成膜レートが低下してしまう。   In the case where only a low frequency AC voltage having a frequency of 450 kHz is applied to the upper electrodes 60 and 62, as shown in FIG. 5, since the electron density is high even in the negative gas plasma containing O2, the pressure in the chamber 10 is particularly high. In the vicinity of 0.7 Torr, a sufficient electron density for film formation can be obtained. On the other hand, as shown in FIG. 6, when the power of the AC voltage is 1000 W, the ion energy increases and the damage to the generated film increases. Moreover, even if the pressure is increased with the AC voltage power set to 1000 W, a significant decrease in ion energy cannot be expected. On the other hand, as shown in FIG. 6, the ion voltage can be reduced by reducing the power of the AC voltage to 300 W and 150 W, but the electron density is lowered by the reduction of the power. The film rate decreases.

また、図5に示すように、イオンエネルギーを低下させるために交流電圧の周波数を2MHz、13MHz、40MHzというように高周波化すると、電子温度が低下するため、電子がラジカルに付着して負イオンが作られてしまい電子密度が低下してしまう。また、図5に示すように、イオンエネルギーを低下させるために高圧化すると、電子温度が低下するため、高周波化と同様に、負イオンが作られてしまい電子密度が低下する。   In addition, as shown in FIG. 5, when the frequency of the AC voltage is increased to 2 MHz, 13 MHz, 40 MHz in order to decrease the ion energy, the electron temperature decreases, so that the electrons adhere to the radicals and negative ions are generated. As a result, the electron density is reduced. Further, as shown in FIG. 5, when the pressure is increased in order to decrease the ion energy, the electron temperature is decreased, so that negative ions are generated and the electron density is decreased as in the case of the higher frequency.

このように、上部電極60,62に交流電圧のみを印加することによっては、高電子密度化と低イオンエネルギー化との両立を図ることは困難である。   Thus, it is difficult to achieve both high electron density and low ion energy by applying only an alternating voltage to the upper electrodes 60 and 62.

<実施形態の実験結果1(成膜原料ガス:Ar/O2)>
図7は、実施形態に係る実験結果1の一例を示す図である。図7には、実施形態に係る実験結果1として、上部電極60,62に重畳電圧を印加するのではなく、チャンバ10内の圧力を500mTorrにした状態で、上部電極60,62に500kHzの周波数の直流パルス電圧のみを印加した場合のイオンエネルギーとイオンエネルギー分布との関係を示す。つまり、実験結果1は、図1に示すオン/オフ切替スイッチ92をオフにした場合の実験結果である。
<Experimental result 1 of embodiment (deposition source gas: Ar / O2)>
FIG. 7 is a diagram illustrating an example of the experimental result 1 according to the embodiment. In FIG. 7, as an experimental result 1 according to the embodiment, a frequency of 500 kHz is applied to the upper electrodes 60 and 62 in a state where the pressure in the chamber 10 is set to 500 mTorr instead of applying a superimposed voltage to the upper electrodes 60 and 62. 3 shows the relationship between ion energy and ion energy distribution when only the DC pulse voltage is applied. That is, the experimental result 1 is an experimental result when the on / off switch 92 shown in FIG. 1 is turned off.

周波数が500kHzの低周波の直流パルス電圧のみが上部電極60,62に印加される場合は、図7に示すように、直流パルス電圧のパワーにかかわらず、イオンエネルギーは、図6の場合と比べて非常に低くなる。また、図7に示すように、直流パルス電圧のパワーを上げることにより、イオンエネルギーを低く維持したまま、電子密度のみを高くすることができる。   When only a low-frequency DC pulse voltage with a frequency of 500 kHz is applied to the upper electrodes 60 and 62, as shown in FIG. 7, the ion energy is higher than that in FIG. 6 regardless of the power of the DC pulse voltage. And very low. Further, as shown in FIG. 7, by increasing the power of the DC pulse voltage, it is possible to increase only the electron density while keeping the ion energy low.

このように、上部電極60,62に直流パルス電圧のみを印加することによって、高成膜レートのための高電子密度化と、低ダメージのための低イオンエネルギー化との両立を図ることが可能になる。   Thus, by applying only the DC pulse voltage to the upper electrodes 60 and 62, it is possible to achieve both high electron density for a high film formation rate and low ion energy for low damage. become.

<実施形態の実験結果2(成膜原料ガス:Ar/O2)>
図8及び図9は、実施形態に係る実験結果2の一例を示す図である。図8には、実施形態に係る実験結果2として、チャンバ10内の圧力を500mTorrにした状態で、上部電極60,62に重畳電圧を印加した場合のイオンエネルギーとイオンエネルギー分布との関係を示す。図8において、直流パルス電圧の周波数は500kHz、直流パルス電圧のパワーは300W、交流電圧の周波数は40.68MHz、交流電圧のパワーは200Wまたは500Wである。また、図9には、実施形態に係る実験結果2として、上部電極60,62に重畳電圧を印加した場合の圧力と電子密度との関係を示す。図9において、直流パルス電圧の周波数は500kHz、直流パルス電圧のパワーは300Wである。なお、図9において、450kHz、2MHz、13MHz及び40MHzのプロットは、図5と同一であり、40MHz+DCのプロットが重畳電圧を印加した場合のものである。
<Experimental result 2 of embodiment (deposition source gas: Ar / O2)>
8 and 9 are diagrams illustrating an example of the experimental result 2 according to the embodiment. FIG. 8 shows the relationship between the ion energy and the ion energy distribution when the superimposed voltage is applied to the upper electrodes 60 and 62 in the state where the pressure in the chamber 10 is 500 mTorr, as the experimental result 2 according to the embodiment. . In FIG. 8, the frequency of the DC pulse voltage is 500 kHz, the power of the DC pulse voltage is 300 W, the frequency of the AC voltage is 40.68 MHz, and the power of the AC voltage is 200 W or 500 W. FIG. 9 shows the relationship between the pressure and the electron density when the superimposed voltage is applied to the upper electrodes 60 and 62 as the experimental result 2 according to the embodiment. In FIG. 9, the frequency of the DC pulse voltage is 500 kHz, and the power of the DC pulse voltage is 300 W. In FIG. 9, the plots of 450 kHz, 2 MHz, 13 MHz, and 40 MHz are the same as those in FIG. 5, and the plot of 40 MHz + DC is obtained when a superimposed voltage is applied.

上記の実験結果1によれば、図7に示すように、直流パルス電圧のパワーを変化させても、イオンエネルギーは、ほとんど変化しない。   According to the above experimental result 1, as shown in FIG. 7, even if the power of the DC pulse voltage is changed, the ion energy hardly changes.

これに対し、実験結果2では、図8に示すように、重畳電圧の元になる交流電圧のパワーを変化させることで、電子密度を図7の場合と同等に維持したまま、イオンエネルギーを変化させることができる。   On the other hand, in the experimental result 2, as shown in FIG. 8, by changing the power of the alternating voltage that is the source of the superimposed voltage, the ion energy is changed while maintaining the electron density equivalent to the case of FIG. Can be made.

このように、上部電極60,62に重畳電圧を印加する場合には、上部電極60,62に直流パルス電圧のみを印加する場合に比べて、直流パルス電圧に基づく電子密度の制御と、交流電圧に基づくイオンエネルギーの制御とを、それぞれ独立に行うことができる。つまり、上部電極60,62に重畳電圧を印加することにより、高電子密度化と低イオンエネルギー化との両立を図った上で、電子密度の制御とイオンエネルギーの制御とを独立して行うことができる。   As described above, when the superimposed voltage is applied to the upper electrodes 60 and 62, compared with the case where only the DC pulse voltage is applied to the upper electrodes 60 and 62, the control of the electron density based on the DC pulse voltage and the AC voltage are performed. The ion energy control based on can be performed independently. In other words, by applying a superimposed voltage to the upper electrodes 60 and 62 to achieve both high electron density and low ion energy, the electron density control and the ion energy control are performed independently. Can do.

また、図9に示すように、上部電極60,62に重畳電圧を印加する場合でも、特にチャンバ10内の圧力が0.7Torr付近で、図5と同様に、成膜のための十分な電子密度が得られる。   Further, as shown in FIG. 9, even when a superimposed voltage is applied to the upper electrodes 60 and 62, sufficient electrons for film formation are formed in the same manner as in FIG. 5, particularly when the pressure in the chamber 10 is around 0.7 Torr. Density is obtained.

<実施形態の実験結果3(成膜原料ガス:N2)>
図10は、実施形態に係る実験結果3の一例を示す図である。図10には、実施形態に係る実験結果3として、チャンバ10内の圧力を500mTorrにした状態で、上部電極60,62に重畳電圧を印加した場合の波長と発光強度との関係を示す。
<Experimental result 3 of embodiment (deposition source gas: N2)>
FIG. 10 is a diagram illustrating an example of the experimental result 3 according to the embodiment. FIG. 10 shows the relationship between the wavelength and the emission intensity when the superimposed voltage is applied to the upper electrodes 60 and 62 in the state where the pressure in the chamber 10 is 500 mTorr, as the experimental result 3 according to the embodiment.

交流電圧のみを上部電極60,62に印加してN2プラズマを発生させると、窒化力が弱く、良好な膜質の窒化膜を成膜することが困難である。一般に交流電圧の周波数が高いほど窒化膜の質は良くなるため、μ波プラズマにより成膜された膜が最も良質な膜となる。μ波プラズマは上部電極60,62の直下で電子温度が非常に高く、サセプタ12(つまり、下部電極)に向かって拡散プラズマとなる。   When only an alternating voltage is applied to the upper electrodes 60 and 62 to generate N2 plasma, the nitriding power is weak and it is difficult to form a nitride film with good film quality. In general, the higher the frequency of the alternating voltage, the better the quality of the nitride film. Therefore, the film formed by μ-wave plasma is the highest quality film. The μ-wave plasma has a very high electron temperature immediately below the upper electrodes 60 and 62 and becomes a diffusion plasma toward the susceptor 12 (that is, the lower electrode).

直流パルス電圧を上部電極60,62印加することにより、μ波プラズマと同様に上部電極60,62の直下の電子温度を非常に高くすることができるため、μ波プラズマと同様のプラズマを発生させることができる。N2の解離には高エネルギーの電子が必要であり、直流パルス電圧のみ、または、重畳電圧を上部電極60,62印加することにより、図10に示すように、高効率にN2を解離することが可能になる。図10では、直流パルス電圧の印加によりN2の解離が進み、N2の発光強度が減少する一方で、Nラジカルの発光強度が増加していることが分かる。   By applying the DC pulse voltage to the upper electrodes 60 and 62, the electron temperature immediately below the upper electrodes 60 and 62 can be made very high as in the case of the μ-wave plasma, so that the same plasma as the μ-wave plasma is generated. be able to. Dissociation of N2 requires high-energy electrons. By applying only the DC pulse voltage or the superimposed voltage to the upper electrodes 60 and 62, N2 can be dissociated with high efficiency as shown in FIG. It becomes possible. In FIG. 10, it can be seen that the dissociation of N 2 proceeds due to the application of the DC pulse voltage, and the emission intensity of N radicals increases while the emission intensity of N 2 decreases.

さらに、高周波になるほど波長が短くなるため、波長効果によってプラズマ分布の均一性が悪化する。これに対し、従来の技術では、N2の高解離度とプラズマ均一性とを両立することが困難であったため、上部電極と下部電極との間隔を大きくしたり、上部電極の形状を工夫する必要があった。これに対し、平板状の上部電極と円盤状の下部電極とが互いに平行に対向している場合には、直流パルス電圧の印加によりプラズマ均一性が良好になる。このため、直流パルス電圧のみの印加、または、重畳電圧の印加により、N2の高解離度とプラズマ均一性とを両立できるとともに、上部電極と下部電極との間隔を小さくすることができる。よって、本開示の技術は、ガスの置換時間がプロセスのスループットに与える影響が大きいPEALD(Plasma Enhanced Atomic Layer Deposition)のようなプロセスに適用可能である。   Furthermore, since the wavelength becomes shorter as the frequency becomes higher, the uniformity of the plasma distribution deteriorates due to the wavelength effect. On the other hand, in the conventional technique, it was difficult to achieve both high dissociation of N2 and plasma uniformity, so it is necessary to increase the distance between the upper electrode and the lower electrode or to devise the shape of the upper electrode. was there. On the other hand, when the plate-like upper electrode and the disk-like lower electrode face each other in parallel, the plasma uniformity is improved by the application of the DC pulse voltage. For this reason, by applying only the DC pulse voltage or applying the superimposed voltage, it is possible to achieve both a high dissociation degree of N2 and plasma uniformity, and to reduce the distance between the upper electrode and the lower electrode. Therefore, the technology of the present disclosure can be applied to a process such as PEALD (Plasma Enhanced Atomic Layer Deposition) in which the gas replacement time has a large influence on the process throughput.

以上のように、実施形態では、成膜装置1は、真空排気可能なチャンバ10と、下部電極として用いられるサセプタ12、上部電極60,62と、原料ガス供給部76と、電圧印加部5とを有する。サセプタ12には被処理基板が載置される。上部電極60,62は、チャンバ10内でサセプタ12に対向して配置される。原料ガス供給部76は、上部電極60,62とサセプタ12との間の処理空間PSでプラズマ化する成膜原料ガスを処理空間PSに供給する。電圧印加部5は、基準電位が時間の経過に伴って上下に交互に変化する交流電圧と直流パルス電圧とが重畳された電圧である重畳電圧を上部電極60,62に印加する。   As described above, in the embodiment, the film forming apparatus 1 includes the chamber 10 that can be evacuated, the susceptor 12 that is used as the lower electrode, the upper electrodes 60 and 62, the source gas supply unit 76, and the voltage application unit 5. Have A substrate to be processed is placed on the susceptor 12. The upper electrodes 60 and 62 are disposed in the chamber 10 so as to face the susceptor 12. The raw material gas supply unit 76 supplies a film forming raw material gas that is turned into plasma in the processing space PS between the upper electrodes 60 and 62 and the susceptor 12 to the processing space PS. The voltage application unit 5 applies to the upper electrodes 60 and 62 a superimposed voltage that is a voltage obtained by superimposing an alternating voltage and a direct-current pulse voltage in which the reference potential alternately changes up and down with time.

こうすることで、成膜の際に、高電子密度化、低イオンエネルギー化、及び、高均一性を共に達成できる。さらに、高電子密度化と低イオンエネルギー化との両立を図った上で、電子密度の制御とイオンエネルギーの制御とを独立して行うことができる。   By doing so, it is possible to achieve both high electron density, low ion energy, and high uniformity during film formation. Furthermore, the control of the electron density and the control of the ion energy can be performed independently while achieving both high electron density and low ion energy.

また、実施形態では、成膜装置1は、サセプタ12と接地との間に接続されたインピーダンス調整回路100を有する。   In the embodiment, the film forming apparatus 1 includes the impedance adjustment circuit 100 connected between the susceptor 12 and the ground.

こうすることで、上部電極60,62とサセプタ12との間のインピーダンスを減少させることが可能になるため、重畳電圧の交流電圧成分がサセプタ12に到達し易くなる。   By doing so, the impedance between the upper electrodes 60 and 62 and the susceptor 12 can be reduced, so that the alternating voltage component of the superimposed voltage easily reaches the susceptor 12.

なお、本開示の実施形態はすべての点で例示であって制限的なものではないと考えられるべきである。実に、上記の実施形態は多様な形態で具現され得る。また、上記の実施形態は、特許請求の範囲及びその趣旨を逸脱することなく、様々な形態で省略、置換、変更されても良い。   In addition, it should be thought that embodiment of this indication is an illustration and restrictive at no points. Indeed, the above embodiments may be implemented in various forms. The above-described embodiments may be omitted, replaced, and changed in various forms without departing from the scope and spirit of the claims.

1 成膜装置
5 電圧印加部
10 チャンバ
12 サセプタ
60 内側上部電極
62 外側上部電極
76 原料ガス供給部
DESCRIPTION OF SYMBOLS 1 Film-forming apparatus 5 Voltage application part 10 Chamber 12 Susceptor 60 Inner upper electrode 62 Outer upper electrode 76 Raw material gas supply part

Claims (3)

真空排気可能な処理容器と、
前記処理容器内で被処理基板が載置される下部電極と、
前記処理容器内で前記下部電極に対向して配置される上部電極と、
前記上部電極と前記下部電極との間の処理空間でプラズマ化する成膜原料ガスを前記処理空間に供給するガス供給部と、
基準電位が時間の経過に伴って上下に交互に変化する交流電圧を前記上部電極に印加する電圧印加部と、
を具備する成膜装置。
A processing container capable of being evacuated;
A lower electrode on which a substrate to be processed is placed in the processing container;
An upper electrode disposed opposite to the lower electrode in the processing vessel;
A gas supply unit that supplies a film forming material gas to be converted into plasma in a processing space between the upper electrode and the lower electrode into the processing space;
A voltage application unit for applying an alternating voltage, which is alternately changed up and down as time passes, to the upper electrode;
A film forming apparatus comprising:
前記下部電極と接地との間に接続されたインピーダンス調整回路、
をさらに具備する請求項1に記載の成膜装置。
An impedance adjustment circuit connected between the lower electrode and ground;
The film forming apparatus according to claim 1, further comprising:
真空排気可能な処理容器と、
前記処理容器内で被処理基板が載置される下部電極と、
前記処理容器内で前記下部電極に対向して配置される上部電極と、
を具備する成膜装置における成膜方法であって、
前記上部電極と前記下部電極との間の処理空間でプラズマ化する成膜原料ガスを前記処理空間に供給することと、
基準電位が時間の経過に伴って上下に交互に変化する交流電圧を前記上部電極に印加することと、
を有する成膜方法。
A processing container capable of being evacuated;
A lower electrode on which a substrate to be processed is placed in the processing container;
An upper electrode disposed opposite to the lower electrode in the processing vessel;
A film forming method in a film forming apparatus comprising:
Supplying a film forming source gas to be converted into plasma in the processing space between the upper electrode and the lower electrode to the processing space;
Applying an alternating voltage, in which the reference potential alternately changes up and down with time, to the upper electrode;
A film forming method comprising:
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