JP2019195849A - Lead-free solder alloy, electronic circuit substrate, and electronic controller - Google Patents

Abstract

To provide: a lead-free solder alloy that suppresses cracking propagation at a solder joint part even in an environment where variation in temperature is extreme and vibration is applied, and restricts voids at the solder joint part which easily occur when mounting an electronic component onto a CuOSP substrate, and that suppresses cracking propagation near a boundary surface caused by growth of a CuSn layer which easily occurs when mounting an electronic component not plated with Ni/Pd/Au or Ni/Au on a substrate; an electronic circuit substrate that includes the solder joint part formed using said lead-free solder alloy; and an electronic controller.SOLUTION: There is provided a lead-free solder alloy containing: 1-4 mass% of Ag; 1-5 mass% of Sb; 0.01-0.03 mass% of Ni; and the balance consisting of Sn.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a lead-free solder alloy, and an electronic circuit board and an electronic control device having a solder joint formed using the lead-free solder alloy.

In order to join an electronic component to an electronic circuit formed on a substrate such as a printed wiring board or a silicon wafer, a solder joining method using a solder alloy is employed. Conventionally, lead has been generally used for this solder alloy. However, since the use of lead is restricted by the RoHS directive or the like from the viewpoint of environmental load, a solder joining method using a so-called lead-free solder alloy which does not contain lead is becoming common in recent years.
As this lead-free solder alloy, for example, Sn—Cu, Sn—Ag—Cu, Sn—Bi, and Sn—Zn solder alloys are well known. Among them, Sn-3Ag-0.5Cu solder alloy is often used in consumer electronic devices used for televisions, mobile phones, etc. and in-vehicle electronic devices mounted on automobiles.
Although the lead-free solder alloy is somewhat inferior in solderability as compared with the lead-containing solder alloy, the problem of solderability is covered by the improvement of the flux and the soldering apparatus. For this reason, for example, even in an in-vehicle electronic circuit board, a Sn-3Ag-0.5Cu solder alloy is used in an in-vehicle electronic circuit board that is placed in a relatively mild environment although there is a difference in temperature. There is no major problem with the solder joints formed.

However, in recent years, for example, electronic circuit boards used in electronic control devices, the temperature difference between the engine compartment, the engine directly mounted, and the electromechanical integration with the motor is particularly severe (for example, from −30 ° C. to 110 ° C., from −40 ° C. 125 ° C, -40 ° C to 150 ° C (cooling / heating difference), and in addition, the placement and implementation of electronic circuit boards under harsh environments that are subject to vibrational loads have been made. Under such an environment where the temperature difference is very severe, thermal displacement of the solder joint and stress accompanying it due to the difference in coefficient of linear expansion between the mounted electronic component and the substrate are likely to occur. Repeated plastic deformation due to temperature difference tends to cause cracks in the solder joints, and stress applied repeatedly over time concentrates near the crack tip, so the cracks cross to the deep part of the solder joints. It becomes easy to progress. The crack that has progressed remarkably in this way causes the disconnection of the electrical connection between the electronic component and the electronic circuit formed on the substrate. In particular, in an environment in which vibration is loaded on the electronic circuit board in addition to a severe temperature difference, the crack and its development are more likely to occur.
Therefore, as the number of in-vehicle electronic circuit boards and electronic control devices placed in the harsh environment described above increases, the demand for solder alloys that can exhibit sufficient crack growth suppression effects is expected to increase in the future. Is done.

  In addition, as an in-vehicle electronic circuit board, a board (hereinafter referred to as “CuOSP board” in this specification) in which a surface of a copper foil-coated board is subjected to a water-soluble preflux treatment (Organic Solderability Preservative) is widely used. It has been. Since the CuOSP substrate is inferior in wettability of the solder alloy, when an electronic component is mounted on the CuOSP substrate, there is a problem that voids are likely to be generated in a solder joint formed on the substrate. Therefore, it is expected that the demand for a solder alloy that suppresses the generation of voids will increase even when used for mounting electronic components on a CuOSP substrate.

Furthermore, lead parts of electronic components such as QFP (Quad Flat Package) and SOP (Small Outline Package) mounted on a vehicle-mounted electronic circuit board have been conventionally plated with Ni / Pd / Au or Ni / Au. Many parts were used. However, with the recent cost reduction of electronic components and downsizing of substrates, electronic components having lead portions replaced with Sn plating and electronic components having Sn-plated bottom electrodes have been studied and put into practical use.
Such an electronic component having, for example, a lead portion replaced with Sn plating or an electronic component having a Sn-plated bottom electrode is composed of Sn contained in the Sn plating and solder joint portion and Cu contained in the lead portion and the bottom electrode. Interdiffusion is likely to occur. Therefore, the Cu ₃ Sn layer, which is an intermetallic compound, is uneven in a region in the vicinity of the interface between the solder joint and the lead portion or the lower electrode (hereinafter referred to as “near the interface” in this specification). Easy to grow. This Cu ₃ Sn layer is originally hard and brittle, and the Cu ₃ Sn layer that has grown greatly in a concavo-convex shape becomes even more brittle. Therefore, particularly in the above-mentioned severe environment, cracks are likely to occur near the interface as compared with the solder joints, and the cracks that have occurred start at once, and thus an electrical short circuit is likely to occur.
Therefore, in the future, even in the case of using electronic parts that are not subjected to Ni / Pd / Au plating or Ni / Au plating under the severe environment described above, a solder alloy that can exhibit the effect of suppressing crack propagation near the interface The demand for is expected to increase.

  In the past, for the purpose of suppressing crack growth in the solder joint, a method of adding an element such as Ag or Bi to the Sn—Ag—Cu based solder alloy in order to improve the strength of the solder joint and the accompanying thermal fatigue characteristics has been proposed. Some are disclosed (see Patent Document 1 to Patent Document 8).

Japanese Patent Laid-Open No. 5-228685 Japanese Patent Laid-Open No. 9-326554 Japanese Patent Laid-Open No. 2000-190090 JP 2000-349433 A JP 2008-28413 A International Publication Pamphlet WO2009 / 011341 JP 2012-81521 A Japanese Patent No. 3353640

For example, when Bi is added to a solder alloy, Bi enters the lattice of the atomic arrangement of the solder alloy and substitutes Sn to distort the atomic arrangement of the lattice. As a result, the Sn matrix is strengthened and the alloy strength is improved, so that a certain improvement in the solder crack growth characteristics due to the addition of Bi is expected.
However, a lead-free solder alloy that has been strengthened by the addition of Bi has the demerit that extensibility deteriorates and brittleness increases. When the applicant soldered the substrate and the chip resistor component using a conventional lead-free solder alloy to which Bi was added and placed it in an environment with a severe temperature difference, the chip in the fillet portion on the chip resistor component side The crack entered a straight line from the direction of about 45 ° with respect to the longitudinal direction of the resistance component, and an electrical short circuit occurred. Therefore, in the case of a vehicle-mounted substrate placed in an environment where there is a great difference in temperature and temperature, the effect of suppressing crack growth is not sufficient only by increasing the strength by adding Bi or the like as in the prior art. Appearance of suppression methods is desired.

Further, for example, by adding Ni to the solder alloy, the thermal fatigue characteristics of the solder can be improved or the formation of intermetallic compounds (Cu ₃ Sn) can be suppressed, but on the other hand, the amount of Ni is increased (for example, 0.5 Mass%), voids are likely to occur at the solder joints.

Furthermore, in the above-described conventional technology, voids in solder joints that are likely to occur when electronic components are mounted on a CuOSP substrate, and electronic components that are not subjected to Ni / Pd / Au plating or Ni / Au plating are mounted on the substrate. There is no mention of suppression of crack growth near the interface due to the growth of the Cu ₃ Sn layer, which is particularly likely to occur.

The present invention solves the above-mentioned problems, and can suppress the crack progress of the solder joint even in a severe environment where the difference in temperature is intense and the vibration is loaded, and when the electronic component is mounted on the CuOSP substrate. Suppresses voids in solder joints that are likely to occur, and near the interface due to the growth of Cu ₃ Sn layer, which is likely to occur when electronic parts that are not plated with Ni / Pd / Au or Ni / Au are mounted on a substrate It is an object of the present invention to provide a lead-free solder alloy capable of suppressing crack propagation, and an electronic circuit board and an electronic control device having a solder joint formed using the lead-free solder alloy.

(1) In the lead-free solder alloy of the present invention, Ag is 1% by mass to 4% by mass, Sb is 1% by mass to 5% by mass, and Ni is 0.01% by mass to 0.03% by mass. And the remainder is made of Sn.

(2) In the configuration described in (1) above, the lead-free solder alloy of the present invention is characterized in that the Sb content is 3% by mass or more and 5% by mass or less.

(3) In the configuration described in the above (1) or (2), the lead-free solder alloy of the present invention is characterized in that it further contains Bi of 4.5% by mass or less.

(4) In the configuration described in any one of (1) to (3) above, the lead-free solder alloy of the present invention further includes Co in an amount of 0.001% by mass to 0.15% by mass. Its features.

(5) In the configuration described in (4) above, the lead-free solder alloy of the present invention is characterized in that the Co content is 0.008 mass% or more and 0.01 mass% or less.

(6) In the configuration described in any one of (1) to (5) above, the lead-free solder alloy according to the present invention further includes 6 mass% or less of In.

(7) In the configuration described in any one of (1) to (6) above, the lead-free solder alloy of the present invention further includes at least one of P, Ga, and Ge in a total amount of 0.001 mass. % To 0.05% by mass or less.

(8) In the configuration described in any one of (1) to (7) above, the lead-free solder alloy of the present invention further includes at least one of Fe, Mn, Cr, and Mo in a total of 0.00. It is characterized by containing 001 mass% or more and 0.05 mass% or less.

(9) The electronic circuit board of the present invention has a solder joint formed by using the lead-free solder alloy according to any one of (1) to (8) above. .

(10) The electronic control device of the present invention is characterized by having the electronic circuit board described in (9) above.

The lead-free solder alloy of the present invention, and an electronic circuit board and electronic control device having a solder joint formed using the lead-free solder alloy are subjected to a severe environment in which a difference in temperature is intense and vibration is loaded. Can suppress crack growth in solder joints, suppress voids in solder joints that are likely to occur when electronic components are mounted on a CuOSP substrate, and have no Ni / Pd / Au plating or Ni / Au plating It is possible to suppress the crack growth near the interface due to the growth of the Cu ₃ Sn layer that is likely to occur when the component is mounted on the substrate.

1 is a partial cross-sectional view illustrating a part of an electronic circuit board according to an embodiment of the present invention. The electron micrograph showing the cross section in which the void generate | occur | produced in the fillet part of a chip component in the test board | substrate which concerns on the comparative example of this invention. The photograph taken from the chip component side using the X-ray transmissive apparatus showing the area | region under the electrode of a chip component, and the area | region in which the fillet is formed in the test board which concerns on the Example and comparative example of this invention.

  Hereinafter, an embodiment of a lead-free solder alloy, an electronic circuit board, and an electronic control device of the present invention will be described in detail. Of course, the present invention is not limited to the following embodiments.

(1) Lead-free solder alloy The lead-free solder alloy of this embodiment can contain 1 mass% or more and 4 mass% or less of Ag. By adding Ag, the Ag ₃ Sn compound can be precipitated in the Sn grain boundary of the lead-free solder alloy, and mechanical strength can be imparted.
However, when the Ag content is less than 1% by mass, precipitation of the Ag ₃ Sn compound is small, and the mechanical strength and thermal shock resistance of the lead-free solder alloy are lowered, which is not preferable. On the other hand, if the content of Ag exceeds 4% by mass, the stretchability of the lead-free solder alloy is hindered, and a solder joint formed using this may cause an electrode peeling phenomenon of an electronic component.
If the Ag content is 2% by mass or more and 3.8% by mass or less, the balance between the strength and the stretchability of the lead-free solder alloy can be improved. A more preferable Ag content is 2.5% by mass or more and 3.8% by mass or less.

  The lead-free solder alloy of this embodiment can contain 1% by mass to 5% by mass of Sb. By adding Sb within this range, it is possible to improve the crack growth suppressing effect of the solder joint without inhibiting the stretchability of the solder alloy. When the Sb content is 2% by mass or more and 4% by mass or less, the effect of suppressing crack propagation can be further improved.

Here, in order to withstand the external stress of being exposed to a harsh environment for a long time in a severe temperature difference, the toughness of lead-free solder alloy (the size of the area surrounded by the stress-strain curve) is increased and stretched. It is considered effective to enhance the solid solution by adding an element which dissolves in the Sn matrix and dissolves in the Sn matrix. Then, Sb is an optimal element for solid solution strengthening of the lead-free solder alloy while ensuring sufficient toughness and stretchability.
That is, by adding Sb in the above range to a lead-free solder alloy having Sn as a base material (in this specification, the main constituent elements of a lead-free solder alloy; the same shall apply hereinafter), Sn A part of the crystal lattice is replaced with Sb, and distortion occurs in the crystal lattice. Therefore, in the solder joint formed using such a lead-free solder alloy, the energy necessary for transition in the crystal is increased by Sb substitution of a part of the Sn crystal lattice, and the metal structure is strengthened. . Furthermore, the fine SnSb, ε-Ag ₃ (Sn, Sb) compound precipitates at the Sn grain boundary, thereby preventing the crack deformation occurring in the solder joint by preventing the sliding deformation of the Sn grain boundary. obtain.

Compared to Sn-3Ag-0.5Cu solder alloy, the structure of the solder joint formed using the lead-free solder alloy with Sb added in the above range is exposed to harsh environments where the temperature difference is severe for a long time. After that, it was confirmed that the Sn crystal had a fine structure and the crack was difficult to progress. This is because the SnSb and ε-Ag ₃ (Sn, Sb) compounds precipitated at the Sn grain boundaries are finely dispersed in the solder joint even after being exposed to a harsh environment where the difference in temperature is high for a long time. Therefore, it is thought that the coarsening of the Sn crystal is suppressed. That is, in the solder joint portion using the lead-free solder alloy with Sb added within the above range, Sb solid solution in the Sn matrix is high temperature state, SnSb, ε-Ag ₃ (Sn, Sb) in the low temperature state. Since precipitation of compounds occurs, even when exposed to harsh environments where there is a great difference in temperature, the process of solid solution strengthening at high temperatures and precipitation strengthening at low temperatures is repeated, resulting in excellent cold resistance. It is thought that impact properties can be secured.

Furthermore, the lead-free solder alloy to which Sb is added within the above range can improve the strength without deteriorating the stretchability of the solder alloy, so that sufficient toughness against external stress can be secured and the residual stress is also reduced. be able to.
Here, when a solder joint formed using a solder alloy having low stretchability is placed in an environment where there is a great difference in temperature, the stress generated repeatedly is likely to accumulate on the electronic component side of the solder joint. Therefore, deep cracks often occur at solder joints near the electrodes of electronic components. As a result, a stress may be concentrated on the electrode of the electronic component near the crack, and a phenomenon may occur in which the solder joint peels off the electrode on the electronic component side. However, the lead-free solder alloy of the present embodiment has Sb added in the above range, so even if it contains an element that affects the extensibility of the solder alloy such as Bi, its own extensibility is hardly hindered. Therefore, even if it is a case where it exposes to the above severe environments for a long time, the electrode peeling phenomenon of an electronic component can also be suppressed.

However, if the content of Sb exceeds 5% by mass, the melting temperature of the lead-free solder alloy increases, and Sb does not re-dissolve at high temperatures. Therefore, when exposed to a harsh environment where the difference between the temperature and the temperature is severe, only precipitation strengthening by the SnSb, ε-Ag ₃ (Sn, Sb) compound is performed, so that these intermetallic compounds become coarse over time. And the effect of suppressing slip deformation at the Sn grain boundary is lost. Further, in this case, the heat resistance temperature of the electronic component becomes a problem due to an increase in the melting temperature of the lead-free solder alloy, which is not preferable.

  The lead-free solder alloy according to the present embodiment suppresses an excessive increase in the melting temperature of the lead-free solder alloy even if the Sb content is 1% by mass or more and 5% by mass or less depending on the configuration, and the solder formed Gives the joint good strength. Therefore, in the lead-free solder alloy of the present embodiment, it is possible to sufficiently exhibit the crack growth suppressing effect of the formed solder joint portion without using Bi as its essential composition.

The lead-free solder alloy of this embodiment can contain 0.01 mass% or more and 0.15 mass% or less of Ni.
When Cu is not added to the lead-free solder alloy, the melt viscosity of the alloy can be lowered. Therefore, in solder joints formed using the alloy, the gas caused by the flux is easily discharged and hardly remains as a void. However, since there is no Cu on the molten lead-free solder alloy side, there is a problem that Cu in the electrode is easily diffused to the molten solder alloy side, and the Cu ₃ Sn layer near the interface is further easily grown.
However, with the configuration of the lead-free solder alloy of this embodiment, by adding Ni in the above range, excessive diffusion of Cu on the electrode side to the molten lead-free solder alloy without adding Cu to this can be achieved. It can be suppressed, and fine (Cu, Ni) ₆ Sn ₅ is formed in the vicinity of the interface and dispersed in the base metal, so that crack propagation at the solder joint is suppressed and its thermal fatigue resistance is improved. Can be made.

In addition, the lead-free solder alloy of the present embodiment allows Ni to move to the vicinity of the interface at the time of soldering even when soldering an electronic component that is not subjected to Ni / Pd / Au plating or Ni / Au plating. Since the fine (Cu, Ni) ₆ Sn ₅ is formed, the growth of the Cu ₃ Sn layer in the vicinity of the interface can be suppressed, and the crack growth suppressing effect in the vicinity of the interface can be improved.

Here, Ni accelerates the timing of solidification of the melted solder alloy. Therefore, in the fillet of the solder joint portion to be formed, the gas that tried to escape outside during melting of the solder alloy tends to solidify while remaining in it. , Gas holes are likely to occur in the fillet. The voids in the fillet deteriorate the heat-resistant fatigue characteristics of the solder joint particularly in an environment where the temperature difference is severe, such as -40 ° C to 140 ° C and -40 ° C to 150 ° C.
However, in the lead-free solder alloy of this embodiment, the occurrence of such voids can be suppressed by keeping the Ni content within the above range and balancing the content with other elements.

  In addition, since the lead-free solder alloy of this embodiment does not contain Cu as described above, a substrate having poor solder wettability such as a CuOSP substrate while suppressing the progress of cracks in the solder joint by adding Ni. Even so, the generation of the voids can be suppressed.

  However, when the Ni content is less than 0.01% by mass, the modification effect of the intermetallic compound becomes insufficient, and therefore, it is difficult to sufficiently obtain the crack suppressing effect near the interface. Further, when the Ni content exceeds 0.15% by mass, the above-described voids are likely to occur in the fillet, which is not preferable.

The lead-free solder alloy of this embodiment can contain 0.001% by mass or more and 0.15% by mass or less Co in addition to Ni. If it is the structure of the lead-free solder alloy of this embodiment, by adding Co in this range, the above-mentioned effect by adding Ni is enhanced and excessive diffusion of Cu on the electrode side into the molten lead-free solder alloy is suppressed. In the vicinity of the interface, fine (Cu, Co) ₆ Sn ₅ is formed and dispersed in the base material. It is possible to improve the heat fatigue resistance of the solder joint even in a severe environment.

In addition, the lead-free solder alloy to which Co is added enhances the above-described effect by adding Ni, even when soldering an electronic component that is not subjected to Ni / Pd / Au plating or Ni / Au plating. Since it moves to the vicinity of the interface during solder bonding to form fine (Cu, Co) ₆ Sn ₅ , it is possible to suppress the growth of the Cu ₃ Sn layer in the vicinity of the interface and to suppress the crack propagation in the vicinity of the interface. Can be improved.

Here, Co, like Ni, accelerates the timing of solidification of the melted solder alloy, so that in the formed solder joint fillet, the gas that tried to escape to the outside during melting of the solder alloy remained in it. It becomes easy to solidify, and the hole (void) by a gas tends to generate | occur | produce in a fillet. The voids in the fillet deteriorate the heat fatigue characteristics of the solder joint in an environment with a severe temperature difference.
However, in the lead-free solder alloy of this embodiment, the occurrence of such voids can be suppressed by keeping the Co content within the above range and balancing the content with other elements including Ni. .

  In addition, since Co can suppress the progress of cracks in the solder joint portion together with Ni, the substrate having poor solder wettability such as a CuOSP substrate while further suppressing adverse effects caused by not adding Cu to the solder alloy. Even so, the generation of the voids can be suppressed.

  However, when the Co content is less than 0.001% by mass, the effect of modifying the intermetallic compound by Co becomes insufficient.

4.5 mass% or less Bi can be added to the lead-free solder alloy of this embodiment.
In the lead-free solder alloy in this embodiment, by adding Bi within this range, good thermal shock resistance can be maintained without hindering the stretchability of the solder alloy. However, if the Bi content exceeds 4.5% by mass, the stretchability of the lead-free solder alloy is hindered and the thermal shock resistance is lowered, which is not preferable.
When the Bi content is 3% by mass or more and 4% by mass or less, the thermal shock resistance can be further improved without inhibiting the stretchability.

Here, when Ag, Sb, Ni, Bi, and Co are contained in the lead-free solder alloy of the present embodiment, the content (mass%) of Ag, Sb, Ni, Bi, and Co is expressed by the following formula (A). To (C) are preferably satisfied.
(A) 3.6 ≦ Ag content + Sb content ≦ 9.0
(B) 0.17 <(Ag content / 3) + (Bi content / 4.5) ≦ 2.10
(C) 0 <(Ni content / 0.15) + (Co content / 0.15) ≦ 1.3
By controlling the content of Ag, Sb, Ni, Bi, and Co within the above range, the effect of suppressing crack growth in solder joints under harsh environments, solder joints that are likely to occur when electronic components are mounted on a CuOSP substrate Suppression of crack growth near the interface due to growth of Cu ₃ Sn layer that is likely to occur when electronic parts not plated with Ni / Pd / Au plating or Ni / Au plating are mounted on a substrate Any of the effects can be exerted in a balanced manner, and the reliability of the solder joint can be further improved.

The lead-free solder alloy of this embodiment can contain 6% by mass or less of In. By adding In within this range, it is possible to lower the melting temperature of the lead-free solder alloy that has been raised by the addition of Sb and to improve the crack growth suppressing effect. That is, since In dissolves in the Sn matrix as well as Sb, not only can the lead-free solder alloy be further strengthened, but also SnSnIn and InSb compounds are formed and precipitated at the Sn grain boundaries. It has the effect of suppressing slip deformation at grain boundaries.
However, if the content of In exceeds 6% by mass, the extensibility of the lead-free solder alloy is hindered, and γ-InSn ₄ is formed during a long period of time in a harsh environment where the difference in temperature is high. The lead-free solder alloy is not preferable because it self-deforms.
In addition, the more preferable content of In is 4% by mass or less, and 1% by mass to 2% by mass is particularly preferable.

  Moreover, the lead-free solder alloy of this embodiment can contain 0.001 mass% or more and 0.05 mass% or less of at least 1 sort (s) of P, Ga, and Ge. By adding at least one of P, Ga, and Ge within this range, oxidation of the lead-free solder alloy can be prevented. However, if the content of these exceeds 0.05% by mass, the melting temperature of the lead-free solder alloy is increased, or voids are likely to be generated in the soldered joint, which is not preferable.

  Furthermore, the lead-free solder alloy of this embodiment can contain 0.001 mass% or more and 0.05 mass% or less of at least 1 sort (s) of Fe, Mn, Cr, and Mo. By adding at least one of Fe, Mn, Cr, and Mo within this range, the effect of suppressing crack growth of the lead-free solder alloy can be improved. However, if the content of these exceeds 0.05% by mass, the melting temperature of the lead-free solder alloy is increased, or voids are likely to be generated in the soldered joint, which is not preferable.

  In addition, the lead-free solder alloy of this embodiment contains other components (elements) such as Cd, Tl, Se, Au, Ti, Si, Al, Mg, Zn, and the like as long as the effect is not hindered. be able to. In addition, the lead-free solder alloy of this embodiment naturally includes unavoidable impurities.

  Moreover, it is preferable that the remainder of the lead-free solder alloy of this embodiment is made of Sn. In addition, preferable Sn content is 80.1 mass% or more and 99.99 mass% or less.

  For the formation of the solder joint portion of this embodiment, any method may be used as long as it can form the solder joint portion, such as a flow method, mounting with a solder ball, and a reflow method using a solder paste composition. . Of these, a reflow method using a solder paste composition is particularly preferred.

(2) Solder paste composition Such a solder paste composition is produced, for example, by kneading the powdered lead-free solder alloy and a flux into a paste.

  As such a flux, for example, a flux containing a synthetic resin, a thixotropic agent, an activator, and a solvent is used.

Examples of the synthetic resin include rosin resins including rosin derivatives such as tall oil rosin, gum rosin, wood rosin and the like and hydrogenated rosin, polymerized rosin, heterogeneous rosin, acrylic acid modified rosin, maleic acid modified rosin; acrylic Acid, methacrylic acid, various esters of acrylic acid, various esters of methacrylic acid, crotonic acid, itaconic acid, maleic acid, maleic anhydride, maleic acid ester, maleic anhydride ester, acrylonitrile, methacrylonitrile, acrylamide, methacrylic acid Examples include acrylic resins obtained by polymerizing at least one monomer such as amide, vinyl chloride, vinyl acetate; epoxy resins; phenol resins. These can be used alone or in combination.
Of these, rosin resins, particularly hydrogenated acid-modified rosin obtained by hydrogenating acid-modified rosin, are preferably used.

  The acid value of the synthetic resin is preferably 10 mgKOH / g or more and 250 mgKOH / g or less, and the blending amount thereof is preferably 10% by mass or more and 90% by mass or less with respect to the total flux.

  Examples of the thixotropic agent include hydrogenated castor oil, fatty acid amides, and oxy fatty acids. These can be used alone or in combination. The blending amount of the thixotropic agent is preferably 3% by mass or more and 15% by mass or less with respect to the total amount of the flux.

  Examples of the activator include amine salts (inorganic acid salts and organic acid salts) such as organic amine hydrogen halide salts, organic acids, organic acid salts, and organic amine salts. More specifically, diphenylguanidine hydrobromide, cyclohexylamine hydrobromide, diethylamine salt, acid salt, succinic acid, adipic acid, sebacic acid and the like can be mentioned. These can be used alone or in combination. The blending amount of the activator is preferably 5% by mass or more and 15% by mass or less with respect to the total amount of the flux.

  As said solvent, isopropyl alcohol, ethanol, acetone, toluene, xylene, ethyl acetate, ethyl cellosolve, butyl cellosolve, glycol ether etc. can be used, for example. These can be used alone or in combination. The amount of the solvent is preferably 20% by mass or more and 40% by mass or less based on the total amount of the flux.

  In the flux, an antioxidant can be blended for the purpose of suppressing oxidation of the lead-free solder alloy. Examples of the antioxidant include hindered phenolic antioxidants, phenolic antioxidants, bisphenolic antioxidants, and polymer-type antioxidants. Of these, hindered phenol-based oxidizing agents are particularly preferably used. These can be used alone or in combination. The blending amount of the antioxidant is not particularly limited, but generally it is preferably about 0.5% by mass or more and about 5% by mass or less with respect to the total amount of the flux.

You may add other resin and additives, such as a halogen, a delustering agent, an antifoamer, and an inorganic filler, to the said flux.
The blending amount of the additive is preferably 10% by mass or less with respect to the total amount of the flux. Moreover, these more preferable compounding quantities are 5 mass% or less with respect to the flux whole quantity.

In the solder paste composition of this embodiment, acrylic acid, methacrylic acid, various esters of acrylic acid, various esters of methacrylic acid, crotonic acid, itaconic acid, maleic acid, maleic anhydride, maleic anhydride ester, anhydrous Acrylic resin obtained by polymerizing at least one monomer of maleic acid ester, acrylonitrile, methacrylonitrile, acrylamide, methacrylamide, vinyl chloride and vinyl acetate, rosin resin having carboxyl group and dimer acid derivative flexible alcohol compound -40 ° C./30 minutes to 125 ° C. in a flux solidified product containing at least one resin of a derivative compound obtained by dehydration condensation, a thixotropic agent, an activator, and a solvent. / 200 thermal shock test with 30 minutes as one cycle Adhesion of the flux solidified after given cycles flux is preferably used as a 0.2 N / mm ² or more. In addition, the said adhesive force is measured based on standard number JISC60068-2-21.

  The blending ratio of the lead-free solder alloy and the flux is preferably 65:35 to 95: 5 in the ratio of solder alloy: flux. A more preferred blending ratio is 85:15 to 93: 7, and a particularly preferred blending ratio is 87:13 to 92: 8.

(3) Electronic circuit board The structure of the electronic circuit board of this embodiment is demonstrated using FIG. The electronic circuit board 100 of this embodiment includes a substrate 1, an insulating layer 2, an electrode part 3, an electronic component 4, and a solder joint body 10. The solder joint body 10 has a solder joint portion 6 and a flux residue 7, and the electronic component 4 has an external electrode 5 and an end portion 8.
The substrate 1 can be used as the substrate 1 as long as it is used for mounting and mounting electronic components such as a printed wiring board, a silicon wafer, and a ceramic package substrate.
The electrode portion 3 is electrically joined to the external electrode 5 of the electronic component 4 via the solder joint portion 6.
Moreover, the solder joint part 6 is formed using the solder alloy which concerns on this embodiment.

Since the electronic circuit board 100 according to the present embodiment having such a configuration has an alloy composition in which the solder joint portion 6 exhibits an effect of suppressing crack propagation, the crack is generated even when the solder joint portion 6 is cracked. Can suppress the progress of In addition, even when the substrate 1 is a CuOSP substrate, the generation of voids in the solder joint 6 can be suppressed.
Furthermore, the electronic circuit board 100 of the present embodiment is near the interface between the solder joint 6 and the electronic component 4 even when the electronic component 4 is not subjected to Ni / Pd / Au plating or Ni / Au plating. It is also possible to exert an effect of suppressing crack propagation in.

Such an electronic circuit board 100 is manufactured as follows, for example.
First, the solder paste composition is printed according to the above pattern on a substrate 1 provided with an insulating layer 2 and an electrode portion 3 formed to have a predetermined pattern.
Next, the electronic component 4 is mounted on the printed board 1 and reflowed at a temperature of 230 ° C. to 260 ° C. By this reflow, the solder joint 10 having the solder joint 6 and the flux residue 7 is formed on the substrate 1, and the electronic circuit board 100 in which the substrate 1 and the electronic component 4 are electrically joined is manufactured.

  In addition, by incorporating such an electronic circuit board 100, the electronic control device of this embodiment is manufactured.

  Hereinafter, the present invention will be described in detail with reference to Examples and Comparative Examples. The present invention is not limited to these examples.

Production of Flux The following components were kneaded to obtain fluxes according to Examples and Comparative Examples.
Hydrogenated acid-modified rosin (product name: KE-604, manufactured by Arakawa Chemical Industries, Ltd.) 51% by mass
Hardened castor oil 6% by mass
10% by mass of dodecanedioic acid (product name: SL-12, manufactured by Okamura Oil Co., Ltd.)
Malonic acid 1% by mass
Diphenylguanidine hydrobromide 2% by mass
Hindered phenol antioxidant (Product name: Irganox 245, manufactured by BASF Japan Ltd.) 1% by mass
Diethylene glycol monohexyl ether 29% by mass

Preparation of Solder Paste Composition 11.0% by mass of the flux was mixed with 89.0% by mass of each lead-free solder alloy powder (powder particle size of 20 μm to 38 μm) listed in Tables 1 and 2. Each solder paste composition according to 1 to Example 27 and Comparative Examples 1 to 17 was prepared.

(1) Solder crack test (-40 ° C to 125 ° C)
・ 3.2mm × 1.6mm chip parts (chip A)
A chip component (Ni / Sn plating) having a size of 3.2 mm × 1.6 mm, a solder resist having a pattern capable of mounting the chip component of the size, and an electrode for connecting the chip component (1.6 mm × 1.2 mm) A glass epoxy substrate (CuOSP substrate) having a thickness of 150 μm and a metal mask having the same pattern were prepared.
Each solder paste composition was printed on the glass epoxy substrate using the metal mask, and the chip component was mounted on each of the solder paste compositions.
Thereafter, using a reflow furnace (product name: TNP-538EM, manufactured by Tamura Seisakusho Co., Ltd.), each of the glass epoxy substrates is heated to electrically bond the glass epoxy substrate and the chip component to each other. A part was formed, and the chip component was mounted. The reflow conditions at this time are: preheating from 170 ° C. to 190 ° C. for 110 seconds, peak temperature of 245 ° C., time of 200 ° C. or higher for 65 seconds, time of 220 ° C. or higher for 45 seconds, peak temperature to 200 ° C. The cooling rate was 3 ° C. to 8 ° C./second, and the oxygen concentration was set to 1500 ± 500 ppm.
Next, using a thermal shock test apparatus (product name: ES-76LMS, manufactured by Hitachi Appliances Co., Ltd.) set to -40 ° C. (30 minutes) to 125 ° C. (30 minutes), the thermal shock cycle is 1, Each glass epoxy substrate was exposed to each other in an environment where 000, 1,500, 2,000, 2,500, and 3,000 cycles were repeated, and then taken out to prepare each test substrate.
Subsequently, the target part of each test board | substrate was cut out, and this was sealed using the epoxy resin (Product name: Epomount (main agent and hardening | curing agent), the refine tech Co., Ltd. product). Furthermore, wet polishing machine (Product name: TegraPol-25, Marumoto Struers Co., Ltd.,
Whether or not the cracks generated in the formed solder joints have completely crossed the solder joints and led to breakage. These were observed using a scanning electron microscope (product name: TM-1000, manufactured by Hitachi High-Technologies Corporation) and evaluated according to the following criteria. The results are shown in Tables 3 and 4. The number of evaluation chips in each thermal shock cycle was 10.
A: No crack that completely traverses the solder joint until 3,000 cycles. O: A crack that completely traverses the solder joint occurs between 2,501 and 3,000 cycles. Δ: 2,001 to 2 , Cracks that completely traverse the solder joints occur during 500 cycles ×: cracks that completely traverse the solder joints occur in less than 2,000 cycles

・ 2.0 × 1.2mm chip parts (chip B)
2.0 × 1.2 mm size chip component (Ni / Sn plating), a solder resist having a pattern capable of mounting the chip component of the size, and an electrode for connecting the chip component (1.25 mm × 1.0 mm) A test substrate was prepared under the same conditions as those of a 3.2 mm × 1.6 mm chip component except that a glass epoxy substrate (CuOSP substrate) provided with the above was used, and evaluated by the same method. The results are shown in Tables 3 and 4.

(2) Solder crack test in Sn-plated SON 1.3 mm pitch SON (Small Outline Non-leaded package) parts with 6 mm x 5 mm x 0.8 tmm size (8 pins, product name: STL60N3LLH5, manufactured by STM Microelectronics) A glass epoxy substrate (CuOSP substrate) having a solder resist having a pattern on which the SON component can be mounted and an electrode (compliant with the manufacturer's recommended design) for connecting the SON component, and a 150 μm thick metal mask having the same pattern Prepared.
Each solder paste composition was printed on the glass epoxy substrate using the metal mask, and the SON component was mounted on each of the solder paste compositions. Thereafter, the glass epoxy substrate is reflowed and cooled under the same conditions as in the above (1) solder crack test except that each glass epoxy substrate is placed in an environment where the thermal shock cycle is repeated 1,000, 2,000, and 3,000 cycles. Each test substrate was produced by applying an impact.
Subsequently, the target part of each test board | substrate was cut out, and this was sealed using the epoxy resin (Product name: Epomount (main agent and hardening | curing agent), the refine tech Co., Ltd. product). Furthermore, using a wet polisher (product name: TegraPol-25, manufactured by Marumoto Struers Co., Ltd.), the terminal central section of the SON component mounted on each test substrate was made clear, and the solder joint was generated. It was observed using a scanning electron microscope (product name: TM-1000, manufactured by Hitachi High-Technologies Corporation) as to whether or not the crack completely crossed the solder joint and reached a fracture. Based on this observation, with respect to the solder joint portion, the solder base material (in this specification, the solder base material refers to the portion other than the interface of the electrode of the SON component and the vicinity thereof in the solder joint portion. And in Table 4, it is simply referred to as “base metal”.) Evaluation was made as follows by dividing into cracks occurring at the interface between the solder joint and the electrode of the SON part (intermetallic compound). . The results are shown in Tables 3 and 4. Note that the number of SONs evaluated in each thermal shock cycle was 20, and one terminal of the gate electrode was observed per SON, and the cross section of a total of 20 terminals was confirmed.

-Cracks that occurred in the solder base material ◎: No cracks that completely traverse the solder base material until 3,000 cycles ○: Cracks that completely traverse the solder base material between 2,001 and 3,000 cycles Occurrence Δ: A crack that completely traverses the solder base material occurs between 1,001 and 2,000 cycles. ×: A crack that completely traverses the solder base material occurs in less than 1,000 cycles.

・ A crack that occurred at the interface between the solder joint and the electrode of the SON part ◎: No crack that completely traverses the interface until 3,000 cycles ○: The interface was completely completed between 2,001 to 3,000 cycles Δ: A crack that completely crosses the interface between 1,001 and 2,000 cycles is generated. ×: A crack that completely crosses the interface is generated in less than 1,000 cycles.

(3) Solder crack test (-40 ° C to 150 ° C)
Since in-vehicle boards and the like are placed in a severe environment where the temperature difference is extremely severe, it is required that the solder alloy used therein exhibits a good crack growth suppressing effect even in such an environment. Therefore, in order to clarify whether or not the solder alloy according to the present embodiment can exhibit the effect even under such severe conditions, it is −40 ° C. to 150 ° C. using a liquid tank type thermal shock test apparatus. The solder crack test in the temperature difference of was conducted. The conditions are as follows.
Liquid bath type thermal shock test equipment (product name: ETAC WINTECH LT80, Enomoto) in which each glass epoxy board (CuOSP board) after solder joint formation was set to a condition of -40 ° C. (30 minutes) to 150 ° C. (30 minutes) 3.2 × 1. Under the same conditions as the above (1) solder crack test except that the thermal shock cycle is exposed to an environment where 1,000, 2,000, and 3,000 cycles are repeated. Test substrates mounted with 6 mm chip components (chip A) and 2.0 × 1.2 mm chip components (chip B) were produced.
Subsequently, the target part of each test board | substrate was cut out, and this was sealed using the epoxy resin (Product name: Epomount (main agent and hardening | curing agent), the refine tech Co., Ltd. product). Further, using a wet polishing machine (product name: TegraPol-25, manufactured by Marumoto Struers Co., Ltd.), the chip parts mounted on each test board are in a state where the central cross section of the chip parts can be seen, and the formed solder joints Whether or not the generated crack completely crosses the solder joint and reaches the fracture is observed using a scanning electron microscope (product name: TM-1000, manufactured by Hitachi High-Technologies Corporation), and is based on the following criteria. evaluated. The results are shown in Tables 3 and 4. The number of evaluation chips in each thermal shock cycle was 10.
A: No crack that completely crosses the solder joint until 3,000 cycles ○: A crack that completely crosses the solder joint occurs between 2,001 to 3,000 cycles Δ: 1,001 to 2 Cracks that completely traverse the solder joints occur during 1,000 cycles ×: Cracks that completely traverse the solder joints occur in less than 1,000 cycles

(4) Void test 2.0 × 1.2 mm size chip component (Ni / Sn plating), solder resist having a pattern on which the chip component of the size can be mounted, and an electrode for connecting the chip component (1.25 mm) A glass epoxy substrate (CuOSP substrate) provided with a × 1.0 mm) and a 150 μm thick metal mask having the same pattern were prepared.
Each solder paste composition was printed on the glass epoxy substrate using the metal mask, and the chip component was mounted on each of the solder paste compositions.
Thereafter, using a reflow furnace (product name: TNP-538EM, manufactured by Tamura Seisakusho Co., Ltd.), each of the glass epoxy substrates is heated to electrically bond the glass epoxy substrate and the chip component to each other. Each test substrate on which the chip component was mounted was formed. The reflow conditions at this time are: preheating from 170 ° C. to 190 ° C. for 110 seconds, peak temperature of 245 ° C., time of 200 ° C. or higher for 65 seconds, time of 220 ° C. or higher for 45 seconds, peak temperature to 200 ° C. The cooling rate was 3 ° C. to 8 ° C./second, and the oxygen concentration was set to 1500 ± 500 ppm.
Next, the surface state of each test substrate was observed with an X-ray transmission device (product name: SMX-160E, manufactured by Shimadzu Corporation), and the region under the electrode of the chip component (see FIG. 3 is the void area ratio (ratio of the total area of voids; the same applies hereinafter) and the area where fillets are formed (area (b) surrounded by broken lines in FIG. 3). The average value of the area ratio of voids in each was obtained and evaluated for each as follows. The results are shown in Tables 3 and 4.
A: The average value of the void area ratio is 3% or less and the effect of suppressing the generation of voids is very good. ○: The average value of the void area ratio is more than 3% and 5% or less, and the effect of suppressing the generation of voids. △: The average value of the void area ratio is more than 5% and 8% or less, and the effect of suppressing the generation of voids is sufficient. ×: The average value of the void area ratio exceeds 8%, and the effect of suppressing the generation of voids insufficient

As described above, the solder joint formed using the lead-free solder alloy according to the embodiment can be used without adding Cu even in a severe environment where the difference in temperature and temperature is intense and vibration is loaded. Regardless of the size of the chip and whether the electrode is Ni / Pd / Au plated or Ni / Au plated, the solder alloy has an effect of suppressing crack growth at the solder joint and in the vicinity of the interface. Even when a CuOSP substrate having poor wettability is used, a void suppressing effect can be exhibited both under the electrode and in the fillet. In particular, it can be seen that the solder joints of the examples have a good crack suppression effect even in a very severe environment where the difference in temperature is -40 ° C. to 150 ° C. using a liquid tank type thermal shock test apparatus.
In Examples 14 to 27 using Ni and Co in combination, it can be seen that the void suppression effect of the fillet is particularly good.

  As described above, the lead-free solder alloy of the present invention can be suitably used for an electronic circuit board that is required to have high reliability, such as a vehicle-mounted electronic circuit board. Furthermore, such an electronic circuit board can be suitably used for an electronic control device that requires higher reliability.

DESCRIPTION OF SYMBOLS 1 Board | substrate 2 Insulating layer 3 Electrode part 4 Electronic component 5 External electrode 6 Solder joint part 7 Flux residue 8 End part 10 Solder joint body 100 Electronic circuit board

Claims (10)

  Ag is 1% by mass to 4% by mass, Sb is 1% by mass to 5% by mass, Ni is 0.01% by mass to 0.03% by mass, and the balance is Sn. Lead-free solder alloy.   The lead-free solder alloy according to claim 1, wherein the Sb content is 3 mass% or more and 5 mass% or less.   Furthermore, Bi is contained 4.5 mass% or less, The lead-free solder alloy of Claim 1 or Claim 2 characterized by the above-mentioned.   The lead-free solder alloy according to any one of claims 1 to 3, further comprising 0.001% by mass to 0.15% by mass of Co.   The lead-free solder alloy according to claim 4, wherein the Co content is 0.008 mass% or more and 0.01 mass% or less.   The lead-free solder alloy according to any one of claims 1 to 5, further comprising 6 mass% or less of In.   The lead-free solder according to any one of claims 1 to 6, further comprising at least one of P, Ga, and Ge in a total of 0.001 mass% to 0.05 mass%. alloy.   The lead according to any one of claims 1 to 7, further comprising at least one of Fe, Mn, Cr, and Mo in a total amount of 0.001% by mass or more and 0.05% by mass or less. Free solder alloy.   An electronic circuit board comprising a solder joint formed using the lead-free solder alloy according to claim 1.   An electronic control device comprising the electronic circuit board according to claim 9.