JP2019129297A - Printed wiring board and semiconductor device - Google Patents

Abstract

To provide a printed wiring board and a semiconductor device that can suppress a bridge from being generated according to the present invention.SOLUTION: A printed wiring board according to the present invention comprises: a substrate provided with a mounting-inhibited region; a soldering land group which is arranged on four sides of a quadrangle inclined to an advancing direction of soldering; and a backward soldering land provided behind the soldering land group in the advancing direction. The backward soldering land has a first backward soldering land and a second backward soldering land passing the center of a pair of backward soldering land group forming two rear sides in the advancing direction among four sides respectively, and separated from each other across a virtual line parallel with the advancing direction, and the second backward soldering land is closer to the mounting-inhibited region than the first backward soldering land, and close to the virtual line.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a printed wiring board and a semiconductor device.

  Patent Document 1 discloses a printed wiring board having a soldered land group for mounting a four-way lead flat package IC. The soldering land group includes a front soldering land group and a rear soldering land group. The soldered lands are inclined with respect to the solder flow direction. Further, this printed wiring board is provided with a rear soldering land adjacent to the rear soldering land group and divided in two in the horizontal direction with respect to the solder flow traveling direction. Each land divided into two is in line symmetry relation. In the soldering process using a jet solder bath, solder is drawn from the rear soldering lands to the rear soldering lands.

JP 2012-146936 A

  In order to reduce the component mounting density, it may be necessary to mount a narrow-pitch four-way lead flat package IC on a printed wiring board. At this time, it is generally necessary to prevent a short circuit due to solder between the lead terminals of the four-direction lead flat package IC.

  Here, it is conceivable that the printed wiring board is deformed by the heat of the solder while passing through the solder bath. In order to suppress this deformation, a support for the printed wiring board may be provided on the solder bath along the direction of soldering. When using a support tool, solder bridges can be more likely to occur on the support tool side of the rear solder lands due to the effect of the solder jets rebounding from the support tool.

  The present invention has been made to solve the above-described problems, and it is an object of the present invention to obtain a printed wiring board and a semiconductor device capable of suppressing the generation of a solder bridge.

  The printed wiring board according to the present invention includes a substrate having a mounting prohibited area on the main surface, and a plurality of solders provided on the main surface and arranged on four sides of a square inclined with respect to the direction of progress of soldering. And a rear soldered land provided behind the solder lands in the main surface with respect to the main surface, the rear solder lands comprising: First rear soldering lands that are separated from each other across a virtual line that passes through the center of a pair of rear soldering lands that form the two rear sides of the four sides of the four sides and that are parallel to the direction of movement. And a second rear soldering land, and the second rear soldering land is closer to the mounting prohibited area than the first rear soldering land and closer to the virtual line.

  The semiconductor device according to the present invention includes a substrate provided with a mounting prohibited area on the main surface, and a plurality of solderings provided on the main surface and arranged on the four sides of a square inclined with respect to the direction of progress of soldering. A soldering land group having lands, a rear soldering land provided behind the soldering land group on the main surface in the traveling direction, and four directions joined to the soldering land group And the rear soldered lands are separated from each other across a virtual line parallel to the traveling direction passing through the apex of the rearmost to the traveling direction of the four-direction lead flat package IC. A first rear soldering land and a second rear soldering land, the second rear soldering land being closer to the mounting prohibited area than the first rear soldering land, Close to.

  In the printed wiring board and the semiconductor device according to the present invention, the generation of the solder bridge can be suppressed.

1 is a plan view of a semiconductor device according to a first embodiment. FIG. 6 is an enlarged view of the vicinity of the 4-direction lead flat package IC of the semiconductor device according to the first embodiment; FIG. 5 is an enlarged view of the vicinity of a rear soldered land of the semiconductor device according to the first embodiment. FIG. 5 is a plan view of the rear soldered land according to the first embodiment. 7 is a flowchart illustrating a method of manufacturing a semiconductor device according to Embodiment 1; FIG. 2 is a front view of the soldering apparatus of Embodiment 1; FIG. 2 is a plan view of the soldering apparatus of Embodiment 1; FIG. 16 is a plan view of a semiconductor device according to a modification of the first embodiment.

  A printed wiring board and a semiconductor device according to an embodiment of the present invention will be described with reference to the drawings. The same or corresponding components may be assigned the same reference numerals and repetition of the description may be omitted.

Embodiment 1
FIG. 1 is a plan view of the semiconductor device 101 according to the first embodiment. The semiconductor device 101 includes a printed wiring board 100 and circuit components disposed on the printed wiring board 100. The circuit components include components that are automatically mounted on the front or back surface of the printed wiring board 100 and components that are manually inserted. The components to be automatically mounted are, for example, SOP package IC (Small Outline Package IC) 12, four-direction lead flat package IC 14, chip resistor, chip capacitor, chip diode, discrete resistor, discrete capacitor, discrete diode and the like. The manually inserted parts are, for example, a large-capacity resistor, a transformer, a coil, a large-capacity semiconductor, and a large capacitor.

  The printed wiring board 100 includes a substrate 10 and a plurality of lands provided on the major surface 11 of the substrate 10. The substrate 10 is formed of, for example, paper. The material of the substrate 10 is not limited to this. The plurality of lands include a soldering land group and a rear soldering land which will be described later. The plurality of lands are formed of, for example, copper foil.

  A four-direction lead flat package IC 14 is joined to the soldering land group. In the four-direction lead flat package IC 14, the printed wiring board 100 is inclined 45 ° so that one corner is at the top and the opposite corner is at the end with respect to the soldering advancing direction 31 shown in FIG. 1. Is provided. The soldering traveling direction 31 is the traveling direction of the printed wiring board 100 in jet soldering. The traveling direction 31 is also called a DIP direction. In the present embodiment, the traveling direction 31 is parallel to the long side of the substrate 10.

  In the present embodiment, “front” indicates the advancing direction 31 of the soldering, and “rear” indicates the direction opposite to the advancing direction 31.

  The substrate 10 is rectangular. The mounting prohibited area 16 is provided on the main surface 11 of the substrate 10. The mounting prohibited area 16 is a portion supported by a support tool described later when moving the substrate 10 in the solder jet flow. The mounting prohibited area 16 is a portion of the main surface 11 where no circuit component is provided. The mounting prohibited area 16 is band-shaped and is parallel to the traveling direction 31. In addition, the mounting prohibited area 16 is provided at the center of the main surface 11.

  FIG. 2 is an enlarged view of the vicinity of the four-way lead flat package IC 14 of the semiconductor device 101 according to the first embodiment. A soldering land group 20 is provided on the main surface 11. The soldering land group 20 has a plurality of soldering lands 23 aligned on four sides of a square inclined with respect to the direction 31 of soldering. Each soldering land 23 is rectangular. A plurality of leads of the four-direction lead flat package IC 14 are joined to the plurality of solder lands 23, respectively. Here, a plurality of leads are omitted in FIG. 2 for the sake of convenience.

  The soldering land group 20 includes a pair of front soldering lands 21 and a pair of rear soldering lands 22. The pair of front soldering land groups 21 respectively form two sides ahead of the traveling direction 31 among the four sides. The pair of rear soldering lands 22 form two sides behind the traveling direction 31 among the four sides.

  Side soldering lands 24 are provided between the front soldering lands 21 and the rear soldering lands 22. The lateral solder lands 24 are, for example, square.

  Further, a rear soldering land 25 is provided on the main surface 11 behind the soldering land group 20 in the traveling direction 31. The rear soldering land 25 includes a first rear soldering land 26 and a second rear soldering land 27. The second rear solder lands 27 are closer to the mounting prohibited area 16 than the first rear solder lands 26. The first rear soldering land 26 and the second rear soldering land 27 extend along the traveling direction 31.

  FIG. 3 is an enlarged view of the vicinity of the rear soldering land 25 of the semiconductor device 101 according to the first embodiment. The first rear soldering land 26 and the second rear soldering land 27 are separated from each other across an imaginary line 32 passing through the center of the pair of rear soldering lands 22 and parallel to the traveling direction 31. In a state where the four-way lead flat package IC 14 is bonded to the soldering land group 20, the virtual line 32 passes through the last vertex with respect to the traveling direction 31 of the four-way lead flat package IC 14.

  The rear soldering land 25 is provided adjacent to the last soldering land 23 among the plurality of soldering lands 23. The front ends of the first rear soldering land 26 and the second rear soldering land 27 are provided in parallel or substantially in parallel with the longitudinal direction of the adjacent soldering land 23. The lengths of the front ends of the first rear soldering land 26 and the second rear soldering land 27 are equal to or longer than the length of the adjacent soldering land 23 in the longitudinal direction. The front ends of the first rear soldering land 26 and the second rear soldering land 27 are connected to the rearmost lead 15 of the four-way lead flat package IC 14, respectively.

  Next, an example of the dimensions of the leads 15 and the soldering lands 23 will be described. The width A of each lead 15 of the four-direction lead flat package IC 14 is 0.35 mm. The pitch B of the leads 15 is 0.65 mm. The width and the pitch in the short direction of the soldering lands 23 are substantially the same as the width A and the pitch B of the leads 15. The longitudinal length C of the soldering land 23 is 3.1 mm, which is longer than the longitudinal length of the lead 15. This facilitates soldering.

  FIG. 4 is a plan view of the rear soldering land 25 according to the first embodiment. The second rear solder lands 27 are closer to the imaginary line 32 than the first rear solder lands 26. That is, in the present embodiment, the rear soldering land 25 is asymmetric with respect to the virtual line 32.

  Further, the width of the second rear solder land 27 in the direction perpendicular to the traveling direction 31 is larger than that of the first rear solder land 26. A portion of the second rear soldering land 27 on the front end side is provided wider than the rear end side so as to approach the virtual line 32. The first rear soldering land 26 is longer than the second rear soldering land 27 in the traveling direction 31.

  Next, an example of the dimension of the rear soldering land 25 will be described. The front end width F of the first rear soldering land 26 and the second rear soldering land 27 is 3.1 mm. The length J of the traveling direction 31 of the first rear soldering land 26 is 13.6 mm. The length K of the traveling direction 31 of the second rear soldering land 27 is 10.8 mm. Of the distances between the first rear soldering lands 26 and the second rear soldering lands 27, the distance L on the front end side, which is the solder drawing portion, is 0.8 mm. Of the first rear soldering land 26 and the second rear soldering land 27, the width M on the rear end side, which is a solder escape portion, is 2.0 mm. Of the second rear soldering land 27, the length H of the portion having a wide front end side is 5.0 mm. Of the second rear soldering land 27, the width N of the portion provided with a wide front end side is 2.2 mm.

  FIG. 5 is a flowchart for explaining the method of manufacturing the semiconductor device 101 according to the first embodiment. The procedure for soldering the 4-way lead flat package IC 14 to the printed wiring board 100 using a jet soldering apparatus will be described according to FIG. First, a plurality of lands are formed on the main surface 11 of the substrate 10. The plurality of lands are formed by printing, for example.

  Here, a plurality of solder lands 23 on the main surface 11 are arranged on four sides of a quadrangle inclined with respect to the soldering direction 31 to form a solder land group 20. Further, a rear soldering land 25 is formed behind the soldering land group 20 in the traveling direction 31 in the main surface 11. Thereby, the printed wiring board 100 is formed.

  Next, as shown in step S1 of FIG. 5, component mounting is performed by the automatic mounting machine. Here, the four-direction lead flat package IC 14, the SOP package IC 12 and other parts to be automatically mounted are mounted on the front and back surfaces of the printed wiring board 100 by an automatic mounting machine. At this time, the four-direction lead flat package IC 14 or the like and the printed wiring board 100 may be fixed to each other by, for example, an adhesive.

  Next, as shown in step S2 of FIG. 5, component mounting is performed by manual insertion. Here, components to be manually inserted are mounted by hand on the front and back surfaces of the printed wiring board 100.

  Next, as shown in step S3 of FIG. 5, the flux is applied. Here, a flux activator is applied to the back surface of the printed wiring board 100 in a state where the components to be automatically mounted and the components to be manually inserted are mounted. The flux activator blends the solder with the plurality of lands. Here, the back surface of the printed wiring board 100 corresponds to the main surface 11 of the substrate 10.

  Next, as shown in step S4 of FIG. 5, preheating is performed. Here, the printed wiring board 100 is heated so that the flux activator has the best activation temperature.

  Next, the primary solder jet process shown in step S5 of FIG. 5 and the secondary solder jet process shown in step S6 are performed. In these processes, a soldering land group 20 is provided on the four-way lead flat package IC 14, and a solder jet is formed along the traveling direction 31 in a state in which a support device described later is brought into contact with the mounting prohibited area 16. Move inside. As a result, the four-way lead flat package IC 14 and the soldering land group 20 are soldered.

  FIG. 6 is a front view of the soldering apparatus 50 of the first embodiment. FIG. 7 is a plan view of the soldering apparatus 50 of the first embodiment. The soldering device 50 is a jet soldering device. The structure of the soldering apparatus 50 used for soldering in steps S5 and S6 will be described with reference to FIGS. The soldering apparatus 50 comprises a solder bath 51. The solder bath 51 contains the solder melted by heat.

  The soldering apparatus 50 includes an ejection part that ejects the solder like a fountain from a nozzle in which a plurality of holes are formed. A primary jet 54 and a secondary jet 55 which are solder jets are formed by the jet part. Furthermore, a conveyor 52 is provided above the solder tank 51. The conveyor 52 is provided along the advancing direction 31 of the soldering, and conveys the printed wiring board 100 along the advancing direction 31. The conveyor 52 includes a pair of rails provided on both sides in a direction perpendicular to the traveling direction 31 across the region where the solder jet flow is formed.

  A support device 53 is provided between the pair of rails. The support tool 53 is provided along the traveling direction 31 in the region where the solder jet is formed. The support device 53 supports the substrate 10 along the traveling direction 31. The support device 53 is also called a center bar. The conveyor 52 and the support device 53 are inclined so as to move away from the solder bath 51 toward the front with respect to the traveling direction 31.

  In step S5, first, the printed wiring board 100 is placed on the conveyor 52. At this time, the printed wiring board 100 is disposed at the position shown by the broken line in FIG. Further, the surface of the printed wiring board 100 on which the four-direction lead flat package IC 14 is provided is directed downward.

  Next, the printed wiring board 100 is moved on the conveyor 52 in the traveling direction 31. As a result, the printed wiring board 100 and the four-direction lead flat package IC 14 pass through the solder jet in the order of the primary jet 54 and the secondary jet 55. In the primary jet 54, the solder is evenly sprayed to the lead portion of the circuit component. Thereby, the printed wiring board 100 and the circuit component are soldered.

  Here, in the state immediately after the primary solder jet process is performed, generally, a solder bridge is generated between the leads of the circuit component. Subsequently, as shown in step S6, the printed wiring board 100 is allowed to pass through the secondary jet 55 having a flat liquid level compared to the primary jet 54. As a result, the solder in a bridged state between the leads 15 of the four-way lead flat package IC 14 can be removed.

  Here, the soldering of the four-way lead flat package IC 14 to the printed wiring board 100 will be described in more detail. When the four-way lead flat package IC 14 enters the primary jet 54, the solder flows rearward along the pair of front soldering lands 21 and the corresponding leads 15. At this time, the solder moves backward while forming a bridge one after another by the action of surface tension and interfacial tension between the front soldering land group 21 and the lead 15. Then, the solder moved to the rear of the front soldering land group 21 is drawn into the adjacent side soldering land 24.

  Similarly, in the rear soldering land group 22, the solder flows rearward along the pair of rear soldering land groups 22 and the corresponding leads 15. At this time, the solder moves backward while forming bridges one after another by the action of surface tension and interfacial tension between the rear soldering lands 22 and the leads 15. Then, the solder moved to the rear of the rear soldering land group 22 is drawn into the adjacent rear soldering land 25.

  That is, the remaining solder at the tail end of the four-way lead flat package IC 14 is drawn into the rear soldering land 25. At this time, the solder from the side closer to the support device 53 in the pair of rear soldering land groups 22 is drawn into the second rear soldering land 27. Further, the solder from the side of the pair of rear soldering lands 22 far from the support tool 53 is drawn into the first rear soldering land 26. Thus, it is possible to suppress the solder bridge due to the excess solder.

  Further, while the printed wiring board 100 passes through the solder jet, the support tool 53 contacts the mounting prohibited area 16 of the substrate 10 to support the substrate 10. Thereby, the deformation | transformation by the heat | fever of the printed wiring board 100 can be suppressed. The deformation of the printed wiring board 100 is, for example, warpage of the printed wiring board 100 or the like. In particular, when using a material that is easily deformed by heat as the material of the printed wiring board 100, deformation due to heat can be suppressed. Furthermore, since the support tool 53 supports the central portion of the substrate 10 in the longitudinal direction, the deformation of the printed wiring board 100 can be stably suppressed.

  Next, as shown in step S7 of FIG. 5, substrate cooling is performed. Here, the soldered printed wiring board 100 is cooled. From the above, the process of soldering the circuit component including the four-direction lead flat package IC 14 to the printed wiring board 100 is completed.

  Here, when the support tool 53 is used, the thermal deformation of the printed wiring board 100 can be suppressed, while the printed wiring board 100 is influenced by the rebound of the primary jet 54 and the secondary jet 55 from the support tool 53. For this reason, the supply amount of the solder tends to be larger on the side closer to the support device 53 in the pair of rear soldering land groups 22 than when the support device 53 is not provided. In this case, in order to suppress the solder bridge, it is necessary to release more solder to the rear soldering land 25 than to the side farther from the side closer to the support tool 53 in the pair of rear soldering lands 22.

  On the other hand, in the present embodiment, the second rear soldered land 27 on the side of the support tool 53 is closer to the virtual line 32 than the first rear soldered land 26. In the present embodiment, it is possible to easily release the solder from the second rear soldering land 27 to the first rear soldering land 26 by bringing the front end side of the second rear soldering land 27 closer to the first rear soldering land 26. . Thus, more solder can be released to the rear soldering lands 25 than the far side of the pair of rear soldering land groups 22 closer to the support device 53. Therefore, the use of the support device 53 can suppress the solder bridge. In addition, since the influence of the primary jet 54 and the secondary jet 55 bouncing back from the support tool 53 can be suppressed by the arrangement of the second rear soldering land 27, the solder bridge can be suppressed under easy management.

  Also, in the solder drawn into the rear soldering lands 25, a force of returning to the rear soldering land group 22 side acts by the action of the surface tension and the interfacial tension of the solder. On the other hand, in the present embodiment, the rear end side of the second rear soldering land 27 is formed thinner than the front end side. The amount of solder return can be reduced by thinning the rear relief portion. In addition, the second rear soldered land 27 is closer to the imaginary line 32 in the forward direction with respect to the traveling direction 31. As a result, the solder can efficiently escape to the first rear solder drawing land 26 at the solder drawing portion.

  In the present embodiment, only a portion in front of the second rear soldering land 27 is formed thick. Not limited to this, the width of the second rear solder land 27 in the direction perpendicular to the traveling direction 31 may be smaller toward the rear with respect to the traveling direction 31.

  Further, by making the first rear soldering land 26 longer than the second rear soldering land 27, the amount of solder drawn from the second rear soldering land 27 to the first rear soldering land 26 is increased. Can do. Thereby, it is possible to easily draw the solder from the second rear soldering land 27 to the first rear soldering land 26, and the generation of bridges in the rear soldering land group 22 can be further suppressed.

  The inventor compared this embodiment with a case where the rear soldering lands 25 are arranged symmetrically with respect to the imaginary line 32 by verification. As a result, it was confirmed that when the rear soldered lands 25 are arranged symmetrically with respect to the virtual line 32, a large number of solder bridges of the rear soldered land group 22 are generated as compared with the present embodiment. .

  Furthermore, by making the rear side of the second rear soldering land 27 thinner, it is possible to suppress the force of the solder returning to the rear soldering land group 22 side, and to greatly reduce the solder bridge of the rear soldering land group 22. It was confirmed by verification that it was possible. Further, by making the total length in the traveling direction 31 of the first rear soldering land 26 longer than that of the second rear soldering land 27, the pulling force of the solder from the second rear soldering land 27 is increased and the solder bridge is reduced. Confirmed that the effect of

  The first rear soldering land 26 is preferably formed longer in the traveling direction as the distance from the support device 53 is shorter. The width of the first rear solder land 26 in the direction perpendicular to the direction of travel 31 may be larger as the distance from the support device 53 is shorter. Further, the first rear soldering land 26 may be formed closer to the imaginary line 32 as the distance from the support device 53 is shorter. As described above, it was confirmed by the verification that the formation of the first rear soldered land 26 has an effect of reducing the solder bridge.

  As a modification of the present embodiment, the shape of the rear soldering land 25 is not limited to that shown in FIGS. As the shape of the rear soldering land 25, any shape in which the second rear soldering land 27 is closer to the virtual line 32 than the first rear soldering land 26 can be adopted. For example, in the present embodiment, the second rear soldering land 27 and the virtual line 32 overlap each other, but the second rear soldering land 27 and the virtual line 32 may be separated from each other. Also, the rear solder lands 25 may be separated from the leads 15.

  In general, when the four-direction lead flat package IC 14 is mounted on the printed wiring board 100 by the jet-type soldering apparatus, the arrangement of the soldering lands 20 is determined after the soldering traveling direction 31 is determined. In the present embodiment, the soldering land group 20 is provided such that the four-direction lead flat package IC 14 is inclined 45 ° with respect to the traveling direction 31. The present invention is not limited to this, as long as the four-direction lead flat package IC 14 is inclined with respect to the traveling direction 31. Further, the traveling direction 31 may be parallel to the short side of the substrate 10.

  Further, in the present embodiment, the mounting prohibited area 16 is a central portion in the short side direction of the main surface 11. Not only this but the mounting prohibition area | region 16 may be another part if it is a part supported by the support instrument 53 among the main surfaces 11. FIG. For example, the mounting prohibited area 16 may be a central portion of the main surface 11 in the longitudinal direction. Further, no land may be provided in the mounting prohibition area 16.

  FIG. 8 is a plan view of a semiconductor device 201 according to a modification of the first embodiment. The semiconductor device 201 includes a printed wiring board 200 and a four-direction lead flat package IC 14 joined to the printed wiring board 200. The printed wiring board 200 includes the substrate 10 and a plurality of lands provided on the major surface 11 of the substrate 10. The plurality of lands include a soldering land group 20 and a rear soldering land 225. In the modification, the shape of the rear soldered land 225 is different from that of the first embodiment. Other than this is the same as the first embodiment.

  The rear soldering land 225 has a first rear soldering land 226 and a second rear soldering land 27. In addition, the rear soldering land 225 further includes an independent third rear soldering land 228 on the opposite side of the second rear soldering land 27 with respect to the first rear soldering land 226.

  By providing the third rear soldering land 228, more solder can be drawn from the second rear soldering land 27 to the first rear soldering land 226 and the third rear soldering land 228 than in the first embodiment. In addition, there may be a restriction such that the total length of the first rear soldering land 226 can not be increased due to the component layout of the printed wiring board 100. Also in this case, the third rear soldering land 228 can provide the same effect as increasing the total length of the first rear soldering land 226.

  Further, the first rear soldering land 226 has a smaller width in the direction perpendicular to the traveling direction 31 toward the rear with respect to the traveling direction 31. Thereby, also in the first rear soldered land 226, it is possible to suppress the amount of return of the solder.

  The various dimensions shown in the present embodiment are merely an example, and the present invention is not limited thereto, and can be suitably changed within the range having effects depending on the size of the four-direction lead flat package IC 14 or the positional condition with the support device 53. Can do. In addition, you may implement one part among the technical features demonstrated in this Embodiment. Further, the technical features described in the present embodiment may be combined in any way.

100, 200 Printed circuit board, 101, 201 Semiconductor device, 10 substrate, 11 main surface, 14 4-direction lead flat package IC, 16 mounting prohibited area, 20 soldering land group, 22 rear soldering land group, 23 soldering land , 25, 225 Rear soldering land, 26, 226 First rear soldering land, 27 Second rear soldering land, 228 Third rear soldering land, 31 Traveling direction, 32 Virtual line, 53 Support device, 54 Primary jet 55 Secondary jet

Claims (14)

A board with a mounting prohibited area on the main surface;
A soldering land group provided on the main surface and having a plurality of soldering lands arranged on four sides of a square inclined with respect to the advancing direction of soldering;
Of the main surface, a rear soldering land provided behind the soldering land group with respect to the traveling direction;
With
The rear soldering lands are separated from each other across an imaginary line parallel to the traveling direction passing through the centers of a pair of rear soldering land groups respectively forming two rear sides in the traveling direction among the four sides. A first rear soldering land and a second rear soldering land;
The printed wiring board according to claim 1, wherein the second rear soldered land is closer to the mounting prohibited area than the first rear soldered land and closer to the virtual line.   The printed wiring board according to claim 1, wherein the mounting prohibited area is a band shape.   The printed wiring board according to claim 2, wherein the mounting prohibited area is parallel to the traveling direction.   The printed wiring board according to any one of claims 1 to 3, wherein the traveling direction is parallel to a long side of the substrate.   The said mounting prohibition area | region is provided in the center part of the said main surface, The printed wiring board in any one of Claim 1 to 4 characterized by the above-mentioned.   The printed wiring board according to any one of claims 1 to 4, wherein the width of the second rear solder land in a direction perpendicular to the traveling direction is larger than that of the first rear solder land. .   7. The printed wiring board according to claim 1, wherein the second rear soldering land has a smaller width in a direction perpendicular to the traveling direction toward the rear with respect to the traveling direction. 8.   The printed wiring board according to any one of claims 1 to 7, wherein the second rear solder land is closer to the virtual line as it is forward with respect to the traveling direction.   9. The printed wiring board according to claim 1, wherein the first rear soldering land is longer in the traveling direction than the second rear soldering land.   10. The printed wiring board according to claim 1, wherein the first rear soldering land has a smaller width in a direction perpendicular to the traveling direction toward the rear in the traveling direction. 11.   11. The rear soldering land further includes an independent third rear soldering land on the side opposite to the second rear soldering land with respect to the first rear soldering land. The printed wiring board according to any one of the above.   The printed wiring board according to claim 1, wherein no land is provided in the mounting prohibited area. A board with a mounting prohibited area on the main surface;
A soldering land group provided on the main surface and having a plurality of soldering lands arranged on four sides of a square inclined with respect to the advancing direction of soldering;
Of the main surface, a rear soldering land provided behind the soldering land group with respect to the traveling direction;
A four-way lead flat package IC joined to the soldering lands,
With
The rear soldering land is a first rear soldering land separated from each other with an imaginary line parallel to the traveling direction passing through the apex of the rear end with respect to the traveling direction of the four-direction lead flat package IC. A second rear soldering land;
The semiconductor device according to claim 1, wherein the second rear solder land is closer to the non-mounting area than the first rear solder land and closer to the virtual line.   The semiconductor device according to claim 13, wherein no circuit component is provided in the mounting prohibited area.

Images