JP2019129249A - Wiring board - Google Patents

Abstract

To provide a small-sized wiring boad excellent in high frequency properties.SOLUTION: A wiring board comprises: an insulating layer 1b that has a flat surface; a conductor 2S for a signal that is located on the surface and has a meandering structure 8 including a folding pattern having openings and closings; inner areas 9 that are located between the openings and the closings on the insulating layer 1b; a conductor 2G for grounding that is on the surface and inside the insulating layer 1b and is located around the conductor 2S for the signal at an interval; via hole forming areas 5a that are located in the inner areas 9; and via holes 5G for grounding that are in the via hole forming areas 5a and have the conductor 2G for grounding located therein, where a diameter L1 of each via hole forming area 5a is larger than a diameter L2 of each opening, and the via holes 5G for grounding are located in a staggered manner between the inner areas 9 adjacent to each other in a plan view.SELECTED DRAWING: Figure 2

Description

  The present disclosure relates to a wiring board on which a semiconductor element is mounted.

  Along with the miniaturization and high functionality of electronic devices represented by portable game machines and communication devices, development of a wiring board on which a highly functional semiconductor element is mounted is in progress. Such a wiring board has fine signal conductors and ground conductors located at high density on the surfaces of a plurality of insulating layers in a stacked state.

Japanese Patent Laid-Open No. 10-233562

  As the wiring substrate, a signal conductor called a meander wiring having a meandering structure including a folded pattern may be used. The meander wiring is used to adjust the signal transmission timing between the plurality of signal conductors by adjusting the length of the signal conductor according to the number of turns, the curvature of the turned-up portion, and the like. By the way, as the speed and frequency of signals to be transmitted progress along with the advancement of electronic devices, the stray capacitance between the wires in the meander wiring increases and the radiation noise from the meander wiring increases the high frequency characteristics of the wiring substrate. May decrease. In order to suppress such stray capacitance between the wires and radiation noise, grounding conductors are provided on the insulating layers above and below the insulating layer between the meander wires and between the meander wires, and Sometimes connected via a via hole. However, in order to provide a via hole between the meander wirings, it is necessary to secure an area for grounding the via hole between the meander wirings, so that the area occupied by the meander wirings becomes large and it is difficult to reduce the size of the wiring board. There is a risk of becoming.

  A wiring board according to the present disclosure includes an insulating layer having a planar surface, a signal conductor having a meandering configuration including a folded pattern located on the surface and having an opening and a closing portion, and an opening in the insulating layer and An inner region located between the closing portions, a grounding conductor located on the surface and inside of the insulating layer and spaced around the signal conductor, and a via hole forming region located in the inner region And a via hole for grounding in which a conductor for grounding is located inside the via hole formation region, the diameter of the via hole formation region is larger than the diameter of the opening, and the via hole for grounding is a plan view. Are located in a staggered manner between the inner regions adjacent to each other.

  According to the wiring board of the present disclosure, it is possible to provide a small-sized wiring board having excellent high frequency characteristics.

FIG. 1 is a schematic cross-sectional view for explaining a wiring board according to the present disclosure. FIG. 2 is a schematic plan view showing the main part of the first embodiment of the wiring board according to the present disclosure. FIG. 3 is a schematic plan view illustrating the main part of the second embodiment of the wiring board according to the present disclosure. FIG. 4 is a schematic plan view showing the main part of the third embodiment of the wiring board according to the present disclosure.

  An embodiment of the wiring substrate 20 of the present disclosure will be described based on FIGS. 1 to 4. FIG. 1 shows a schematic cross-sectional view of the wiring substrate 20. As shown in FIG. The wiring substrate 20 includes the insulating substrate 1, the circuit conductor 2, and the solder resist 3.

  The insulating substrate 1 includes a core insulating layer 1a, and a plurality of buildup insulating layers 1b positioned on the upper and lower surfaces of the core insulating layer 1a. The insulating substrate 1 has, for example, a square shape in plan view. The thickness of the insulating substrate 1 is set to, for example, about 0.3 to 1.5 mm.

  The core insulating layer 1 a has, for example, a function of securing the rigidity of the insulating substrate 1 and maintaining the flatness of the wiring substrate 20. The core insulating layer 1a is formed by, for example, pressing a semi-cured prepreg in which a glass cloth is impregnated with an epoxy resin, a bismaleimide triazine resin, or the like, while pressing it flatly while heating.

  The buildup insulating layer 1b has a planar surface. The build-up insulating layer 1b has a function of, for example, securing a space for routing the circuit conductor 2, which will be described in detail later, and the circuit conductor 2 is located on a planar surface. The buildup insulating layer 1b is formed, for example, by sticking a resin film containing an epoxy resin, a polyimide resin or the like to the core insulating layer 1a under vacuum and thermosetting.

  The core insulating layer 1a has a plurality of through holes 4 penetrating the upper and lower sides. The diameter of the through hole 4 is set to, for example, 50 to 300 μm. The through holes 4 are formed, for example, by blasting or drilling.

  The build-up insulating layer 1b has a plurality of via holes 5 with the circuit conductor 2 as a bottom surface. The diameter of the via hole 5 is set to, for example, 30 to 100 μm. The via hole 5 is formed by, for example, laser processing.

  Circuit conductor 2 is located on the surface of core insulating layer 1 a, the surface of build-up insulating layer 1 b, in through hole 4, and in via hole 5. The circuit conductor 2 positioned in the through hole 4 constitutes a through hole conductor 2a, and has a function of establishing conduction between the circuit conductors 2 on the upper and lower surfaces of the core insulating layer 1a.

  The circuit conductor 2 located in the via hole 5 constitutes the via conductor 2b, and the circuit conductors 2 on the upper and lower surfaces of the buildup insulating layer 1b or the surface of the core insulating layer 1a and the surface of the buildup insulating layer 1b It has the function to take conduction between the circuit conductors 2 located at.

  The circuit conductor 2 is made of, for example, electroless copper plating and electrolytic copper plating, or a highly conductive metal such as copper foil. Such a circuit conductor 2 is formed by a plating technique such as a semi-additive method or a subtractive method.

  The circuit conductor 2 located on the upper surface of the uppermost buildup insulating layer 1b in the insulating substrate 1 functions as, for example, the first pad 6 connected to the electrode of the semiconductor element. Electrically connected to the

  The circuit conductor 2 positioned on the lower surface of the lowermost buildup insulating layer 1b in the insulating substrate 1 functions as, for example, the second pad 7 connected to the electrode of the external substrate. Electrically connected to the The first pad 6 and the second pad 7 are electrically connected via the circuit conductor 2.

  The circuit conductor 2 includes a signal conductor 2S, a grounding conductor 2G, and a power supply conductor 2P. The first pad 6 includes a first signal pad 6S, a first ground pad 6G, and a first power source pad 6P. The second pad 7 includes a signal second pad 7S, a ground second pad 7G, and a power second pad 7P.

  The signal conductor 2S has, for example, a linear shape. The plurality of signal conductors 2S are located from the area corresponding to the first signal pad 6S to the area corresponding to the second signal pad 7S in plan view. The signal conductor 2S electrically connects the first signal pad 6S and the second signal pad 7S via the through-hole conductor 2a and the via conductor 2b. For example, between the semiconductor element and the external substrate And has a function of transmitting an electric signal. The width of the signal conductor 2S is set to, for example, 15 to 100 μm. In FIGS. 2 to 4, in order to clearly show the signal conductor 2S, the signal conductor 2S is hatched.

  A portion of the signal conductor 2S has a serpentine shape including a folded pattern having an opening and a closed portion as shown in FIG. 2 in order to align the timing of transmitting an electrical signal with another signal conductor 2S. Configuration 8 is provided. The transmission timings between the signal conductors 2S are aligned by making the line lengths of the other signal conductors 2S equal to one another by using such a meandering configuration 8.

  The closed portion is a folded portion, and the opening is a portion between adjacent signal conductors 2S apart from the folded portion.

  In the meandering configuration 8, the distance between the signal conductors 2S adjacent to each other is set to, for example, 110 to 180 μm.

  The grounding conductor 2G has a function of providing a potential difference with the power supply conductor 2P, suppressing stray capacitance generated between the adjacent signal conductors 2S, and absorbing radiation noise generated from the signal conductor 2S. doing.

  The ground conductor 2G is located above the buildup insulating layer 1b where the signal conductor 2S is located, and above the buildup insulating layer 1b where the signal conductor 2S is located. It is located on the upper surface of the build-up insulating layer 1b and is located with the signal conductor 2S interposed therebetween.

  In addition, the grounding conductor 2G is spaced around the signal conductor 2S including the inner region 9 between the opening portion and the closing portion of the folded pattern in the same buildup insulating layer 1b where the signal conductor 2S is located. It is located with a gap. The distance between the signal conductor 2S and the ground conductor 2G is set to 40 to 100 μm, for example.

  A via hole forming region 5a is located in the inner region 9 of the buildup insulating layer 1b. The via hole 5G for grounding is located in the via hole formation region 5a. The grounding via hole 5G has a bottom surface that is the grounding conductor 2G located on the lower buildup insulating layer 1b. A grounding conductor 2G is located in the grounding via hole 5G, and is connected to the grounding conductor 2G which is a bottom surface.

Further, the via hole 5 having the grounding conductor 2G located in the via hole formation region 5a as the bottom surface is located in the buildup insulating layer 1b on the upper layer. In such a via hole 5, a part of the ground conductor 2G located on the upper surface of the buildup insulating layer 1b located further above is located and connected to the ground conductor 2G located in the via hole formation region 5a. .

  The via hole forming area 5a is an area for electrically connecting the grounding conductor 2G and the via hole conductors 2a located on the upper surface and the lower surface of the grounding conductor 2G, in consideration of a positional deviation error and the like in manufacturing. Thus, it has a region wider than the planar area of the via hole conductor 2a.

  The grounding conductor 2G has a function of suppressing stray capacitance generated between the signal conductors 2S adjacent to each other in the meandering configuration 8. Further, the grounding conductor 2G has a function of absorbing the radiation noise generated from the signal conductor 2S and suppressing the mixing of the noise into the other signal conductors 2S.

  In particular, since the grounding conductor 2G is located in the inner region 9, it is possible to efficiently suppress stray capacitance between adjacent signal conductors 2S and absorb radiation noise.

  Further, the function described above can be further improved by connecting the grounding conductor 2G located in the via hole forming area 5a of the inner area 9 with the grounding conductor 2G on the upper side and the grounding conductor 2G on the lower side. I can expect.

  Apart from this, the ground conductors 2G in the inner region 9 also have a function of applying a ground potential to the narrow gap between the signal conductors 2S adjacent to each other.

  In the inner region 9, the diameter L1 of the via hole formation region 5a is set larger than the diameter L2 of the opening. Furthermore, the via holes 5G for grounding located in the via hole forming area 5a are located in a zigzag shape between the inner areas 9 adjacent to each other in a plan view.

  That is, in the meandering structure 8, the intervals between the signal conductors 2S adjacent to each other are made different, so that a wide area where the via hole formation area 5a is located in the inner area 9 and a width where the via hole formation area 5a is unnecessary And a small area. The inner regions 9 adjacent to each other are positioned so that the wide region and the small region are adjacent to each other.

  Such a serpentine structure 8 is advantageous in securing the via hole formation area 5a while suppressing the occupied area. The serpentine configuration 8 is made possible by the plurality of ground via holes 5G being arranged in a staggered manner. Staggered means that the plurality of grounding via holes 5G are arranged in the direction intersecting with the longitudinal and lateral directions of the entire meandering configuration 8. The intersecting direction may be 45 degrees, and may be at different angles in the vertical and horizontal directions as in the example shown in FIG.

  A diameter L1 of the via hole formation region 5a is set to 80 to 200 μm, for example. The diameter L2 of the opening is set to, for example, 110 to 180 μm.

  The power supply conductor 2P has a function of supplying power to an electronic component such as a semiconductor element mounted on the upper surface of the wiring board 20, for example. The power supply conductor 2P is located, for example, from the area corresponding to the first power supply pad 6P to the area corresponding to the second power supply pad 7P. The power supply conductor 2P electrically connects the power supply first pad 6P and the power supply second pad 7P via the through hole conductor 2a and the via conductor 2b.

The solder resist 3 is located on the upper surface and the lower surface of the insulating substrate 1. The solder resist 3 on the upper surface has a pad opening 3 a for exposing the first pad 6. The solder resist 3 on the lower surface has a pad opening 3 b for exposing the second pad 7.

  Such a solder resist 3 is formed by, for example, pasting a photosensitive thermosetting resin film such as an acrylic-modified epoxy resin on the upper and lower surfaces of the insulating substrate 1, exposing and developing it in a predetermined pattern, and then curing with ultraviolet rays. And formed by thermosetting. The solder resist 3 has a function of protecting the circuit conductor 2 from heat when, for example, a semiconductor element is mounted on the wiring board 20.

  As described above, according to the wiring substrate 20 according to the present disclosure, the diameter L1 of the via hole formation region 5a is smaller than the diameter L2 of the opening of the folded pattern of the signal conductor 2S in the inner region 9 of the buildup insulating layer 1b. Is also set larger. The grounding via holes 5G located in the via hole formation region 5a are staggered between the inner regions 9 adjacent to each other in plan view.

  Thereby, the area | region which the meandering structure 8 occupies can be suppressed, implement | achieving efficiently the suppression of the stray capacitance in the meandering structure 8, and the suppression of mixing of radiation noise. As a result, a small wiring board excellent in high frequency characteristics can be provided.

  The present disclosure is not limited to the above-described embodiment, and various modifications can be made without departing from the scope of the present disclosure.

  For example, in the above-described embodiment, the case where one grounding via hole 5G is located in each inner area 9 is shown, but as shown in FIG. 3, a plurality of grounding via holes 5G are formed in each inner area 9. May be located. Here, the two grounding via holes 5G located in the respective inner regions 9 are located in a staggered manner between the adjacent inner regions 9. The number of grounding via holes 5G located in each inner region 9 may be different between different inner regions 9.

  In such a case, the grounding conductor 2G in the buildup insulating layer 1b above the buildup insulating layer 1b located in the inner region 9 and the insulating film 1b below the buildup insulating layer 1b where the grounding conductor 2G is located The connection path with the ground conductor 2G in the layer 1b can be increased. As a result, it is possible to more efficiently suppress stray capacitance and radiation noise, which is advantageous for improving high frequency characteristics.

  Further, as shown in FIG. 4, by forming the respective signal conductors 2S facing each other with the inner region 9 in a curved shape, more via hole forming regions 5a can be formed without increasing the occupied region of the meandering configuration 8. Can be secured.

  In such a case, the grounding conductor 2G in the buildup insulating layer 1b above the buildup insulating layer 1b located in the inner region 9 and the insulating film 1b below the buildup insulating layer 1b where the grounding conductor 2G is located The connection path to the ground conductor 2G in the layer 1b can be further increased.

  As a result, miniaturization of the wiring board, suppression of stray capacitance, and suppression of radiation noise can be performed more efficiently, which is advantageous for improving high frequency characteristics.

  Further, for example, in the above-described embodiment, the case where the grounding via hole 5G is located only in the inner region 9 is shown, but even if the grounding via hole 5G is located in a region other than the inner region 9 I do not care.

  For example, the grounding via hole 5G is positioned adjacent to the signal conductor 2S in a state along the signal conductor 2S, which is further advantageous for suppressing stray capacitance and improving suppression of radiation noise.

  Further, for example, in the above-described embodiment, an example of a single line constituted by one signal conductor 2S is shown, but a differential line constituted by two signal conductors 2S may be used. Absent. In such a case, it becomes possible to transmit an electrical signal at a higher speed, which is advantageous in that the function of the wiring board 20 can be enhanced.

1b (for buildup) Insulating layer 2G Grounding conductor 2S Signaling conductor 5a Via hole forming area 5G Grounding via hole 8 Meandering configuration 9 Inner area 20 Wiring substrate L1 Diameter of via hole formation area L2 Diameter of opening

Claims (3)

An insulating layer having a planar surface;
A signal conductor having a serpentine configuration including a folded pattern located on the surface and having an opening and a closing portion;
An inner region located between the opening and the closing portion in the insulating layer;
A grounding conductor located on and around the surface of the insulating layer and spaced around the signal conductor;
A via hole forming region located in the inner region;
And a via hole for grounding which is located in the via hole formation region and in which the grounding conductor is located.
The diameter of the via hole forming region is larger than the diameter of the opening, and the ground via hole is staggered between the inner regions adjacent to each other in plan view substrate.   The wiring board according to claim 1, wherein the meandering configuration includes a linear signal conductor.   The wiring substrate according to claim 1, wherein a plurality of the ground via holes are located in each of the inner regions.

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