JP2019115032A - Solid-state imaging device, imaging apparatus, and imaging method - Google Patents

Abstract

To provide a solid-state imaging device, an imaging apparatus, and an imaging method, capable of reducing power consumption.SOLUTION: The solid-state imaging device includes: a pixel unit in which a plurality of pixels including a sensor unit including an avalanche photodiode and a quench resistor is disposed; and setting means for so setting that a reverse bias voltage equal to or higher than a breakdown voltage of the avalanche photodiode is applied to an avalanche photodiode provided in a pixel other than defective pixels among the plurality of pixels and a reverse bias voltage lower than the breakdown voltage of the avalanche photodiode is applied to an avalanche photodiode provided in a pixel which is a defective pixel among the plurality of pixels.SELECTED DRAWING: Figure 3

Description

  The present invention relates to a solid-state imaging device, an imaging device, and an imaging method.

  Conventionally, there has been proposed a technique for detecting a single photon by using an avalanche photo diode (APD). When photons are incident on the avalanche photodiode to which a reverse bias voltage larger than the breakdown voltage is applied, carriers are generated, avalanche multiplication occurs, and a large current is generated. Photons can be detected based on this current. Such an avalanche photodiode is called SPAD (Single Photon Avalanche Diode). Patent Document 1 discloses a photodetector in which an avalanche photodiode is provided in a light receiving element.

JP, 2014-81253, A

  If there is a crystal defect in an avalanche photodiode, a dark current is generated due to the crystal defect, and an avalanche multiplication phenomenon may occur in the avalanche photodiode even though photons are not incident on the avalanche photodiode. . If the avalanche multiplication phenomenon occurs despite the fact that photons are not incident, the power consumption increases.

  An object of the present invention is to provide a solid-state imaging device, an imaging device and an imaging method capable of reducing power consumption.

  According to one aspect of the embodiment, a pixel unit including a plurality of pixels including a sensor unit including an avalanche photodiode and a quench resistor, and the avalanche unit provided in a pixel other than the defective pixel among the plurality of pixels. A voltage equal to or greater than the breakdown voltage of the avalanche photodiode is applied to the photodiode, and the avalanche photodiode provided to the pixel which is the defective pixel among the plurality of pixels is There is provided a solid-state imaging device comprising: setting means for setting a voltage lower than the breakdown voltage to be applied.

  According to the present invention, it is possible to provide a solid-state imaging device, an imaging device, and an imaging method that can reduce power consumption.

It is a block diagram showing an imaging device by a 1st embodiment. It is a figure which shows the example of the layout of the solid-state image sensor by 1st Embodiment. It is a figure which shows the unit pixel with which the solid-state image sensor by 1st Embodiment was equipped. It is a graph which shows the voltage-current characteristic of an avalanche photodiode. It is a flowchart which shows operation | movement of the solid-state image sensor by 1st Embodiment. It is a figure which shows the unit pixel with which the solid-state image sensor by 2nd Embodiment was equipped. It is a figure which shows the unit pixel with which the solid-state image sensor by 3rd Embodiment was equipped. It is a figure which shows the unit pixel with which the solid-state image sensor by 4th Embodiment was equipped.

  Embodiments of the present invention will be described below with reference to the drawings. In addition, this invention is not limited to the following embodiment, It can change suitably. In addition, the embodiments described below may be combined as appropriate.

First Embodiment
A solid-state imaging device, an imaging device, and an imaging method according to the first embodiment will be described with reference to FIGS. 1 to 5. FIG. 1 is a block diagram showing an imaging device according to the present embodiment.

  The imaging apparatus 100 according to the present embodiment includes a lens drive unit 102, a shutter 103, a shutter drive unit 104, a solid-state imaging device 105, a signal processing unit 106, a timing generation unit 107, a memory unit 108, a control unit 109, a recording unit 110, and , And the display unit 112. Further, the imaging device 100 is provided with a photographing lens (imaging optical system, lens unit) 101. The photographing lens 101 may be detachable from the body (main body) of the imaging device 100 or may not be detachable.

  The solid-state imaging device 105 generates an imaging signal by photoelectrically converting an optical image of a subject formed by the imaging lens 101, and outputs the generated imaging signal. An avalanche photodiode 302 (see FIG. 3) and a counter 305 (see FIG. 3) are provided in a unit pixel 306 (see FIG. 3) provided in the solid-state imaging device 105, and the number of incident photons is counted. Can be output as a signal value.

  The lens drive unit 102 drives the photographing lens 101, and performs zoom control, focus control, aperture control, and the like. The imaging lens 101 forms an optical image of a subject, and forms the formed optical image on an imaging surface of the solid-state imaging device 105.

  A shutter 103 is provided between the photographing lens 101 and the solid-state image sensor 105. The shutter 103 is a mechanical shutter and is driven by the shutter drive unit 104.

  The signal processing unit 106 performs predetermined signal processing (image processing) such as correction processing on an image signal (image data) output from the solid-state imaging device 105. The signal processing unit 106 can also perform signal processing such as development and compression. The signal processing unit 106 can function as a processing unit that performs predetermined processing on a signal output from the solid-state imaging device 105 in cooperation with the control unit 109.

  A timing generation unit (timing generator) 107 supplies various timing signals to the solid-state imaging device 105, the signal processing unit 106, and the like.

  A control unit (whole control / calculation unit, control unit) 109 controls the entire imaging apparatus 100 and performs predetermined arithmetic processing and the like. The control unit 109 outputs a control signal for driving each functional block of the imaging device 100, control data for controlling the solid-state imaging device 105, and the like.

  The memory unit 108 temporarily stores image data and the like.

  The display unit 112 displays an imaging signal on which predetermined processing and the like have been performed by the control unit 109, various setting information of the imaging apparatus 100, and the like.

  The recording unit 110 records, on the recording medium 111, an imaging signal and the like on which signal processing and the like are performed by the signal processing unit 106 and the like. The recording unit 110 also reads out from the recording medium 111 an imaging signal and the like recorded on the recording medium 111. The recording medium 111 may be removable from the recording unit 110 or may not be removable. Examples of the recording medium 111 include a semiconductor memory such as a flash memory.

  Next, the operation of the imaging device 100 at the time of shooting will be described.

  When the main power is turned on by the operation of the power switch by the user, the power supplied to the control unit 109 is turned on, and the power supplied to the signal processing unit 106 is turned on.

  Thereafter, when the release button (not shown) is pressed by the user, the imaging operation by the imaging device 100 is started. When the imaging operation by the imaging device 100 ends, the signal processing unit 106 performs predetermined signal processing on the image signal output from the solid-state imaging device 105. The image data (data) subjected to predetermined signal processing by the signal processing unit 106 is held in the memory unit 108 in accordance with an instruction from the control unit 109. The data held in the memory unit 108 is recorded on the recording medium 111 via the recording unit 110 under the control of the control unit 109.

  Note that image data and the like may be output to a personal computer or the like through an external I / F unit (not shown). Then, predetermined signal processing may be performed on the image data by a personal computer or the like.

  Next, the solid-state imaging device 105 according to the present embodiment will be described with reference to FIG. FIG. 2 is a view showing an example of the layout of the solid-state imaging device 105 according to the present embodiment.

  The solid-state imaging device 105 includes a sensor unit substrate 201 having a pixel array (pixel unit) 207 in which a plurality of sensor units 203 are arranged in a matrix, and a pixel control in which a plurality of counters 305 (see FIG. 3) are arranged in a matrix. The counter unit substrate 202 having the unit 205 is stacked. An electrode (not shown) provided on the sensor unit substrate 201 and an electrode (not shown) provided on the counting unit substrate 202 are electrically connected to each other. Thereby, the pulse signal PLS output from the sensor unit 203 provided on the sensor unit substrate 201 is input to the counter 305 provided on the counting unit substrate 202. Further, the control signal PDEF output from the pixel control unit 205 provided on the counting unit substrate 202 is supplied to the switch 303 (see FIG. 3) provided on the sensor unit substrate 201.

  The counting unit substrate 202 is provided with a defective pixel storage unit 204, a pixel control unit 205, and a signal processing circuit 206. The defective pixel storage unit 204 is a memory that stores a pixel having a defect among the plurality of unit pixels 306, that is, an address of the defective pixel. The pixel control unit 205 is provided with a plurality of counters 305 respectively corresponding to the plurality of sensor units 203. The counter 305 counts the number of pulse signals output from the sensor unit 203 in response to the incidence of photons. The count value counted by the pixel control unit 205 is output to the outside through the signal processing circuit 206. The pixel control unit 205 performs appropriate control for each pixel based on the defective pixel information stored in the defective pixel storage unit 204. The pixel control unit 205 functions as the following setting unit. The setting means applies a voltage higher than the breakdown voltage to the avalanche photodiode 302 provided in the defective pixel and applies a voltage lower than the breakdown voltage to the avalanche photodiode 302 provided in the pixel other than the defective pixel. To set.

  Since the sensor unit 203 and the counter 305 are provided on separate substrates, a large area of the pixel array 207 can be secured. The configuration of the solid-state imaging device 105 is not limited to the above configuration. For example, the sensor unit 203 and the counter 305 may be provided on the same substrate.

  Next, the unit pixel 306 provided in the solid-state imaging device 105 will be described with reference to FIG. FIG. 3 is a view showing a unit pixel 306 provided in the solid-state imaging device 105. As shown in FIG.

  As shown in FIG. 3, the unit pixel 306 is provided with a sensor unit (light receiving unit) 203 and a counter 305. The sensor unit 203 includes an avalanche photodiode 302, a quench resistor 301, a switch 303, and an inversion buffer 304. The anode of the avalanche photodiode 302 is connected to the first potential LVDD or the second potential MVDD via the switch 303, and the cathode of the avalanche photodiode 302 is connected to one end of the quenching resistor 301. The other end of the quench resistor 301 is connected to the third potential HVDD.

  When the anode of the avalanche photodiode 302 is connected to the first potential LVDD via the switch 303, a reverse bias voltage higher than the breakdown voltage is applied to the avalanche photodiode 302 via the quench resistor 301. At this time, the avalanche photodiode 302 operates in Geiger mode. That is, when photons enter the avalanche photodiode 302, an avalanche multiplication phenomenon occurs. This causes an avalanche current to cause a voltage drop at the quench resistor 301. The quench resistor 301 is a resistive element for stopping the avalanche multiplication phenomenon of the avalanche photodiode 302. The quench resistor 301 can be configured using the resistance component of the transistor. When an avalanche current is generated in the avalanche photodiode 302 due to the avalanche multiplication phenomenon, a voltage drop occurs in the quench resistor 301, and the reverse bias voltage applied to the avalanche photodiode 302 drops. When the reverse bias voltage falls to the breakdown voltage, the avalanche multiplication phenomenon stops. As a result, no avalanche current flows, and a reverse bias voltage higher than the breakdown voltage of the avalanche photodiode 302 is applied to the avalanche photodiode 302 again.

  The inversion buffer 304 is provided to extract the voltage change generated by the quench resistor 301 as the pulse signal PLS. When photons enter the avalanche photodiode 302, a pulse signal PLS is output from the inversion buffer 304. As described above, the sensor unit 203 emits pulses at a frequency according to the light reception frequency of photons.

  When the anode of the avalanche photodiode 302 is connected to the second potential MVDD via the switch 303, a reverse bias voltage smaller than the breakdown voltage is applied to the avalanche photodiode 302 via the quench resistor 301. At this time, the avalanche photodiode 302 does not operate in Geiger mode.

  When the control signal PDEF supplied from the pixel control unit 205 to the switch 303 is at L level, the anode of the avalanche photodiode 302 is connected to the ground potential LDVV. On the other hand, when the control signal PDEF supplied from the pixel control unit 205 to the switch 303 is at H level, the anode of the avalanche photodiode 302 is connected to the second potential MVDD.

  Next, the operation of the sensor unit 203 when the L level control signal PDEF is supplied will be described using FIG. FIG. 4 is a graph showing voltage-current characteristics of an avalanche photodiode.

  An L level control signal PDEF is supplied from the pixel control unit 205 to the unit pixels 306 that are not defective pixels, that is, to the sensor unit 203 of the normal pixel. When the control signal PDEF is at the L level, the anode of the avalanche photodiode 302 is connected to the first potential LVDD via the switch 303. Therefore, the avalanche photodiode 302 operates in Geiger mode. When photons enter the avalanche photodiode 302, an avalanche multiplication phenomenon occurs in the avalanche photodiode 302, and a large current flows in the avalanche photodiode 302 (operation A). When a large current flows in the avalanche photodiode 302, a voltage drop occurs in the quench resistor 301, the reverse bias voltage applied to the avalanche photodiode 302 becomes less than the breakdown voltage, and the avalanche multiplication phenomenon stops (operation B). When the avalanche multiplication phenomenon stops, a reverse bias voltage equal to or higher than the breakdown voltage is applied again to the avalanche photodiode 302, and the operation mode of the avalanche photodiode 302 returns to the Geiger mode (operation C).

  The above-described operations A to C cause a change in the potential of the input terminal of the inversion buffer 304. The waveform shaping is performed by the inversion buffer 304, and the pulse signal PLS is output from the inversion buffer 304. The pulse signal PLS output from the inversion buffer 304 is counted by the counter 305. By repeating such an operation, the number of photons incident on the avalanche photodiode 302 is measured.

  Incidentally, when the defective pixel is operated as described above, the avalanche multiplication phenomenon is caused not only by the incidence of photons but also by the dark electrons generated by the defect. In a defective pixel in which a serious defect occurs, dark electrons are constantly generated, so an avalanche multiplication phenomenon occurs at a high frequency, and a large amount of power is consumed.

  Next, the operation of the sensor unit 203 when the H-level control signal PDEF is supplied will be described. In the present embodiment, the control signal PDEF at the H level is supplied from the pixel control unit 205 to the defective unit pixel 306, that is, the sensor unit 203 of the defective pixel. When the control signal PDEF is at the H level, the anode of the avalanche photodiode 302 is connected to the second potential MVDD via the switch 303. Therefore, the reverse bias voltage applied to the avalanche photodiode 302 is less than the breakdown voltage of the avalanche photodiode 302, and the avalanche photodiode 302 operates in the linear mode. In this case, even if photons enter the unit pixel 306, even if dark electrons are generated in the unit pixel 306, the avalanche multiplication phenomenon does not occur, and power consumption is suppressed. Further, since there is no change in the potential of the input terminal of the inversion buffer 304, the counter 305 does not count and the count value of the counter 305 remains zero.

  Next, the operation of the solid-state imaging device 105 according to the present embodiment will be described with reference to FIG. FIG. 5 is a flowchart showing the operation of the solid-state imaging device 105 according to the present embodiment. FIG. 5 shows the operation in the defect detection mode and the operation in the imaging mode. The defect detection mode is a mode in which a defective pixel is detected and the address of the detected defective pixel is stored in the defective pixel storage unit 204. The shooting mode is a mode in which a subject is actually shot.

  First, in step S501, when a release button (not shown) is pressed, a shooting operation by the user is detected, and the operation of this flowchart is started. Thereafter, the process proceeds to step S502.

  In step S502, the solid-state imaging device 105 is powered on. At this time, the logical initial value of the control signal PDEF output from the pixel control unit 205 is set to “H” for all addresses. With this configuration, power consumption due to defective pixels does not occur at the time of power on. Thereafter, the process proceeds to step S503. In the present embodiment, the power-on timing is a case where the user has issued a photographing operation instruction, but the present invention is not limited to this. For example, power may be turned on at predetermined time intervals. Further, as to power-on, all pixels may be operated in the linear mode before the imaging operation instruction, and the normal pixel may be changed to the Geiger mode according to the imaging operation instruction.

  In step S503, it is determined whether to operate in the defect detection mode or in the imaging mode. For example, before shipping the solid-state imaging device 105 or shipping the imaging device 100, the address of the defective pixel is stored in the defective pixel storage unit 204 by operating the solid-state imaging device 105 in the defect detection mode. Ru. The solid-state imaging device 105 can operate in the defect detection mode also when the user performs an operation through the operation unit (not shown) to operate the solid-state imaging device 105 in the defect pixel detection mode. Alternatively, the solid-state imaging device 105 may be operated in the defect detection mode to acquire a black image immediately before acquisition of the main image before shooting is started. When the solid-state imaging device 105 is operated in the defect detection mode (YES in S503), the process proceeds to step S504. On the other hand, when the solid-state imaging device 105 is not operated in the defect detection mode (NO in S503), that is, when the solid-state imaging device 105 is operated in the imaging mode, the process proceeds to step S507.

  In step S504, the pixel control unit 205 sets the control signal PDEF supplied to all unit pixels 306 to the L level. As a result, the avalanche photodiodes 302 of all the unit pixels 306 operate in Geiger mode. Thereafter, the process proceeds to step S505.

  In step S505, the photographing operation is performed with the shutter 103 closed, and acquisition of a dark image is performed. In the normal unit pixel 306, since photons are hardly incident, the count value in the unit pixel 306 becomes a value close to zero. On the other hand, since dark electrons are generated in the defective pixel, the count value in the unit pixel 306 is a large value. The pixel control unit 205 determines that a unit pixel 306 for which a count value equal to or more than a predetermined threshold value is obtained is a defective pixel. Thereafter, the process proceeds to step S506.

  In step S 506, the pixel control unit 205 stores information indicating the address of the unit pixel 306 determined to be a defective pixel, that is, defective pixel information in the defective pixel storage unit 204. Thereafter, the operation in the defect detection mode is ended.

  In step S507, the pixel control unit 205 supplies the control signal PDEF of H level to the switch 303 of the unit pixel 306 corresponding to the address stored in the defective pixel storage unit 204. As a result, the defective pixel operates in the linear mode, the avalanche multiplication phenomenon does not occur, and power consumption can be suppressed. Thereafter, the process proceeds to step S508.

  In step S508, normal photographing is performed. Thus, the operation in the photographing mode is ended.

  In the present embodiment, the case where only the address of the defective pixel is stored in the defective pixel storage unit 204 has been described as an example, but the present invention is not limited to this. Information indicating the degree of defect in the defective pixel may be stored in the defective pixel storage unit 204 together with the address of the defective pixel. Then, the control signal PDEF may be switched according to the ambient temperature of the solid-state imaging device 105, the accumulation time, the sensitivity, and the like.

  Thus, according to the present embodiment, when the unit pixel 306 is a defective pixel, the reverse bias voltage applied to the avalanche photodiode 302 of the unit pixel 306 is set to less than the breakdown voltage of the avalanche photodiode 302. Do. Therefore, according to the present embodiment, it is possible to prevent the avalanche multiplication phenomenon from occurring due to the dark electrons generated by the defect, and it is possible to reduce the power consumption.

Second Embodiment
A solid-state imaging device, an imaging device, and an imaging method according to the second embodiment will be described with reference to FIG. FIG. 6 is a view showing a unit pixel provided in the solid-state imaging device according to the present embodiment. In the solid-state imaging device according to the present embodiment, the wiring 602 of the defective pixel is cut (fused) by laser irradiation or the like.

  As shown in FIG. 6, in the solid-state imaging device according to the present embodiment, the anode of the avalanche photodiode 302 is connected to the first potential LVDD via the wiring 602. One end 603 of the wire 601 is connected to one end 603 of the wire 602. The other end 604 of the wire 602 is connected to the other end of the resistor 601.

  When the wire 602 is not cut off, both ends of the resistor 601 are shorted by the wire 602. Since the anode of the avalanche photodiode 302 is at the first potential LVDD, the avalanche photodiode 302 operates in Geiger mode.

  When the wiring 602 is cut off by laser irradiation or the like in a portion 605 surrounded by a dashed dotted oval, the anode of the avalanche photodiode 302 is connected to the first potential LVDD via the resistor 601. The resistance value of the resistor 601 is set such that a reverse bias voltage less than the breakdown voltage of the avalanche photodiode 302 is applied between the anode and the cathode of the avalanche photodiode 302. Therefore, when the wiring 602 is disconnected, the avalanche multiplication phenomenon hardly occurs in the avalanche photodiode 302, and the avalanche photodiode 302 operates in the linear mode.

  In a factory where solid-state imaging devices are manufactured, tests are performed on the manufactured solid-state imaging devices. In the test, acquisition of a dark image is performed, and determination of defective pixels is performed based on the acquired dark image. The wiring 602 of the defective pixel is cut, for example, by a laser.

  The resistor 601 and the wiring 602 function as the following setting means. The setting means applies a reverse bias voltage higher than the breakdown voltage to the avalanche photodiode 302 provided in the defective pixel, and applies a voltage lower than the breakdown voltage to the avalanche photodiode 302 provided in the pixel other than the defective pixel. Set to be

  Thus, according to the present embodiment, defective pixels are processed so as not to operate in Geiger mode. According to the present embodiment, the switch 303 provided in the first embodiment is not required. Also, no wiring is required to supply the control signal PDEF. Further, no wiring is required to supply the second potential MVDD. In addition, the defective pixel storage unit 204 is not required. According to this embodiment, since these components are unnecessary, it can contribute to expansion of the area of the avalanche photodiode 302, cost reduction, and the like.

Third Embodiment
In the first embodiment, the configuration has been described in which a switch is provided to switch whether the anode of the avalanche photodiode 302 is connected to the voltage LVDD or to the voltage MVDD. In the present embodiment, as another configuration, a configuration in which the quench resistor 301 provided on the cathode side of the avalanche photodiode 302 is replaced with a MOS transistor is shown.

  The configuration of the unit pixel 306 in the third embodiment will be described below with reference to FIG. In the configuration shown in FIG. 3, voltage MVDD and voltage switch 303 are not required, quench resistor 301 is replaced with PMOS transistor 701, and control signal PDEF is input to the gate of PMOS transistor 701. There is.

  In the case of a normal pixel, the control signal PDEF is set to “L” to turn on the PMOS transistor and to control the avalanche multiplication phenomenon by causing the on resistance of the PMOS transistor to act as a quench resistance. On the other hand, in the case of a defective pixel, by setting the control signal PDEF to “H” and turning off the PMOS transistor, the cathode of the avalanche photodiode 302 is floated to control the avalanche multiplication phenomenon.

  Also in such a configuration, it is possible to reduce the power consumption by the defective pixel as in the first embodiment.

  In the above description, although the PMOS transistor 701 is used instead of the quench resistor 301, the control signal PDEF is “H” when normal, and the control signal PDEF is “L” when defective pixel. An NMOS transistor may be used.

Fourth Embodiment
In the first to third embodiments, with the problem of power increase due to a defective pixel, an avalanche multiplication phenomenon due to dark electrons is caused by controlling the reverse bias voltage applied to the avalanche photodiode of the defective pixel to be less than the breakdown voltage. An example is shown. The value of the counter is always 0 because defective pixels do not suffer from avalanche multiplication by applying the above-described technique. Since this is visually recognized as a black defect as an image, it is necessary to correct it. Here, the signal processing unit 106 can not determine from the value of the counter whether it is a defective pixel or a zero or an output of a normal pixel. In addition, for example, a method of generating address data of a defective pixel by inspection of an imaging device in a factory and storing it in the memory unit 108 in the subsequent stage to determine whether it is a defective pixel or not may be considered. Therefore, it is not suitable.

  Here, a configuration will be described in which it is possible to accurately determine whether a defective pixel is present or not and the capacity of the memory unit 108 is not compressed.

  Hereinafter, the configuration of a unit pixel 306 according to the fourth embodiment of the present invention will be described with reference to FIG. In contrast to the configuration shown in FIG. 3, the control signal PDEF output from the pixel control unit 205 is also input to the counter 305 as indicated by an alternate long and short dash line 801.

  Next, the operation of the counter 305 in the fourth embodiment will be described.

  The counter 305 performs a reset operation immediately before the start of exposure. At this time, when the control signal PDEF input to the counter 305 is "H", that is, a defective pixel, the reset value of the counter 305 is set to 0, and when the control signal PDEF is "L", that is, a normal pixel. The reset value of the counter 305 is set to 1.

  With such a configuration, since the count value of a normal pixel is always 1 or more, when the counter value is 0, it can be determined as a defective pixel, and when it is 1 or more, it can be determined as a normal pixel. The signal processing unit 106 in the subsequent stage determines that the pixel having a counter value of 0 is a defective pixel, and performs various corrections. The influence of 1 which is a reset value of a normal pixel may be excluded by subtracting 1 after the defect correction by the signal processing unit 106.

  As a result, without squeezing the capacity of the memory unit 108, it is possible to accurately discriminate between a defective pixel and a normal pixel in the processing circuit of the latter stage.

  In the example described above, the reset value of the counter corresponding to the normal pixel is 1 and the reset value of the counter corresponding to the defective pixel is 0. However, the present invention is not limited to this. Assuming that the reset value of the counter corresponding to the defective pixel is at least 0, the reset value of the counter corresponding to the normal pixel may be a predetermined value other than 0.

Other Embodiments
As mentioned above, although the preferable embodiment of this invention was described, this invention is not limited to these embodiment, A various deformation | transformation and change are possible within the range of the summary.

  The present invention supplies a program that implements one or more functions of the above-described embodiments to a system or apparatus via a network or a recording medium, and one or more processors in a computer of the system or apparatus read and execute the program. Can also be realized. It can also be implemented by a circuit (eg, an ASIC) that implements one or more functions.

  103: shutter, 105: solid-state imaging device, 106: signal processing unit, 201: sensor unit substrate, 202: counting unit substrate, 203: sensor unit, 204: defective pixel storage unit, 205: pixel control unit, 206: signal processing Circuit, 301: Quench resistance, 302: Avalanche photodiode, 303: Switch, 304: Invert buffer, 305: Counter, 601 resistor, 602: Wiring, 701: PMOS transistor

Claims (14)

A pixel unit including a plurality of pixels including a sensor unit including an avalanche photodiode and a quench resistor;
A reverse bias voltage equal to or higher than the breakdown voltage of the avalanche photodiode is applied to the avalanche photodiode provided in a pixel other than the defect pixel among the plurality of pixels, and the defect pixel of the plurality of pixels is A setting unit configured to apply a reverse bias voltage less than the breakdown voltage of the avalanche photodiode to the avalanche photodiode provided in the pixel. The pixel has a switch,
When the anode of the avalanche photodiode is connected to the first potential via the switch, a reverse bias voltage higher than the breakdown voltage of the avalanche photodiode is applied to the avalanche photodiode;
When the anode of the avalanche photodiode is connected to the second potential different from the first potential via the switch, a reverse bias voltage less than the breakdown voltage of the avalanche photodiode is the avalanche photo The solid-state imaging device according to claim 1, which is applied to a diode. The storage device further includes a storage unit that stores information indicating the defective pixel.
The solid-state imaging device according to claim 2, wherein the setting unit controls the switch based on information indicating the defective pixel stored in the storage unit. In the setting means, one end is connected to the anode of the avalanche photodiode and the other end is connected to a predetermined potential, and one end is connected to one portion of the wiring, and the other portion is connected to the other portion of the wiring With a resistor connected at the end,
The wiring provided for pixels other than the defective pixel among the plurality of pixels is not cut off, and
The solid according to claim 1, wherein the wiring provided in the pixel which is the defective pixel among the plurality of pixels is cut between the one place and the other place. Image sensor. The quench resistance is constituted by the on resistance of a MOS transistor,
The setting means applies a reverse bias voltage higher than a breakdown voltage of the avalanche photodiode by turning on the MOS transistor provided in a pixel other than the defective pixel among the plurality of pixels, and the plurality of pixels The reverse bias voltage lower than the breakdown voltage of the avalanche photodiode is set to be applied by turning off the MOS transistor provided in the pixel which is the defective pixel of the above. The solid-state imaging device according to claim 1. The storage device further includes a storage unit that stores information indicating the defective pixel.
The solid-state imaging device according to claim 5, wherein the setting unit controls on / off of the MOS transistor based on the information indicating the defective pixel stored in the storage unit.   The solid-state imaging device according to any one of claims 1 to 6, further comprising a counter that counts a signal generated from the sensor unit.   The setting means further sets a reset value of the counter corresponding to a pixel other than the defective pixel among the plurality of pixels to a predetermined value other than 0, and the defective pixel among the plurality of pixels The solid-state imaging device according to claim 7, wherein a reset value of the counter corresponding to 0 is set to 0. The storage device further includes a storage unit that stores information indicating the defective pixel.
9. The solid-state imaging device according to claim 8, wherein the setting unit controls a reset value of the counter based on information indicating the defective pixel stored in the storage unit. The sensor unit is disposed on a first substrate,
The solid-state image pickup device according to any one of claims 7 to 9, wherein a counter for counting a signal emitted from the sensor unit is disposed on a second substrate different from the first substrate. element. A solid-state imaging device according to any one of claims 1 to 10.
And a processing unit configured to perform predetermined processing on a signal output from the solid-state imaging device. A reverse bias voltage equal to or higher than the breakdown voltage of the avalanche photodiode is provided to the avalanche photodiode provided in a pixel which is not a defective pixel among a plurality of pixels each including a sensor unit including an avalanche photodiode and a quench resistor. Setting a reverse bias voltage less than the breakdown voltage of the avalanche photodiode to be applied to the avalanche photodiode provided to the pixel which is the defective pixel among the plurality of pixels. When,
And D. imaging using a solid-state imaging device having a pixel array provided with a plurality of the sensor units.   The imaging method according to claim 12, further comprising acquiring information indicating the defective pixel based on a dark image acquired using the solid-state imaging device. The solid-state imaging device further includes a counter that counts a signal generated from the sensor unit,
The reset value of the counter corresponding to a pixel other than the defective pixel among the plurality of pixels is set to a predetermined value other than 0, and the counter corresponding to the defective pixel among the plurality of pixels is reset An imaging method according to claim 12 or 13, further comprising the step of setting the value to zero.

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