JP2019062341A - Oscillation circuit - Google Patents

Abstract

To stably suppress the fluctuation of the frequency of an oscillation signal to be output.SOLUTION: An oscillation circuit comprises: an oscillator 10 having a terminal enabling an oscillation frequency to be adjusted; a frequency voltage converter 20 converting the frequency of an oscillation signal Vout of the oscillator 10 into a voltage; a high pass filter 30 extracting a voltage component of fluctuation of the frequency deviated from the center frequency of the oscillator 10 from the output voltage of the frequency voltage converter; a DC bias source 40 outputting a DC bias voltage that determines the center frequency of the oscillator 10; and an adder 50 adding, as a negative feedback voltage, a voltage component output from the high pass filter 30 to the DC bias voltage output from the DC bias source 40, and the output voltage of the adder 50 is applied to the terminal enabling the oscillation frequency of the oscillator 10 to be adjusted.SELECTED DRAWING: Figure 1

Description

  The present invention relates to an oscillation circuit which suppresses fluctuation of a frequency deviated from a center frequency.

  FIG. 5 shows a conventional oscillation circuit (Patent Document 1), and FIG. 6 shows a schematic block diagram thereof. This oscillation circuit is configured as a Colpitts oscillator 100 by the transistor Q2, the capacitors C11 to C16, the resistors R11 to R14, the variable capacitance diode D1, the resonator X3, and the coil L1. The transistors Q3 and Q4, the resistors R15 to R18, and the baseband choke coil BFC constitute a DC bias source 110 having a current mirror configuration. Further, the high frequency choke coil RFC and the capacitor C17 constitute a low pass filter 120. An adder 140 subtracts the output signal of the low pass filter 120 from the output voltage of the DC bias source 110 as a negative feedback signal. The adder 140 corresponds to the base connection point of the transistor Q2. Reference numeral 150 denotes a control terminal to which the frequency control voltage Vt is applied, and reference numeral 160 denotes an output terminal of the oscillation signal Vout of the oscillator 100.

  In this oscillation circuit, low frequency noise components such as 1 / f noise remaining on the collector side of the transistor Q2 are extracted by the low pass filter 120 and negatively fed back to the DC bias source 110 to output the oscillation signal output from the oscillator 100. It aims to suppress the phase noise of Vout.

Patent No. 5155672 gazette

  In this oscillation circuit, as shown in FIG. 7A, 1 / f noise and 1 / f noise folded back to the center frequency fo coexist at the node N1 between the transistor Q2 and the coil RFC. . The low frequency component 1 / f noise among these noises is taken out to N2 of the common connection node of the coils RFC and BFC by the low pass filter 120 by the capacitor C17 and the coil RFC, as shown in FIG. 7 (b) The noise characteristic is as follows. Then, 1 / f noise is suppressed by the negative feedback to the DC bias source 110 by the coil BFC that works as a high impedance to the low frequency component.

  However, 1 / f noise that is suppressed in this way is noise that remains without being up-converted, and as shown in FIG. 7A, it is up-converted to noise that is folded back near the center frequency fo. On the other hand, there is no suppression effect, and it is difficult to stably suppress the fluctuation of the frequency of the oscillation signal Vout output to the output terminal 160.

  Also, this oscillation circuit can suppress only 1 / f noise of the oscillating portion using the transistor Q2. That is, due to buffer amplifiers generally included in the oscillation circuit and a rectangular wave converter for use as a reference clock for logic circuits, consideration is given to frequency fluctuations due to 1 / f noise and the like superimposed in the oscillation section and thereafter. Not paid.

  An object of the present invention is to provide an oscillation circuit which stably suppresses the fluctuation of the frequency of the oscillation signal to be output, and stably suppresses the fluctuation of the frequency due to 1 / f noise and the like superimposed in the oscillation unit and thereafter. It is.

In order to achieve the above object, the invention according to claim 1 comprises an oscillator having a terminal capable of adjusting the oscillation frequency, a frequency voltage converter for converting the frequency of the oscillation signal of the oscillator into a voltage, and the frequency voltage converter A high-pass filter for extracting a voltage component of fluctuation of a frequency deviated from the center frequency of the oscillator from an output voltage of the oscillator; a DC bias source for outputting a DC bias voltage determining the center frequency of the oscillator; And an adder for adding the voltage component output from the high-pass filter to the DC bias voltage as a negative feedback voltage, and applying the output voltage of the adder to the terminal capable of adjusting the oscillation frequency of the oscillator. I assume.
According to a second aspect of the present invention, in the oscillation circuit according to the first aspect, the oscillator includes: an oscillation unit that outputs the oscillation signal; an amplifier that amplifies the oscillation signal generated by the oscillation unit; and / or the oscillation And a waveform converter for converting the waveform of the signal into another waveform.

  According to the present invention, the frequency voltage converter and the high pass filter take out the voltage component of the fluctuation of the frequency deviated from the center frequency of the oscillation signal of the oscillator and use it as a negative feedback signal to control the frequency of the oscillator. It is possible to suppress the fluctuation of the outlier frequency. Further, when a buffer amplifier or waveform converter is connected to the subsequent stage of the oscillating unit constituting the oscillator, the oscillation signal output from the buffer amplifier or waveform converter is input to the frequency voltage converter, so that the subsequent stage of the oscillating unit It is possible to stably suppress the fluctuation of the frequency caused by 1 / f noise and the like superimposed by the buffer amplifier and the waveform converter.

It is a block diagram of the oscillation circuit of 1st Example of this invention. It is a block diagram of the oscillation circuit of 2nd Example of this invention. It is a block diagram of the oscillation circuit of 3rd Example of this invention. It is a block diagram of the oscillation circuit of 4th Example of this invention. It is a circuit diagram of the conventional oscillation circuit It is a block diagram of the oscillation circuit of FIG. FIG. 6 is a noise characteristic diagram of nodes N1 and N2 of the oscillation circuit of FIG. 5;

First Embodiment
FIG. 1 shows an oscillator circuit according to a first embodiment of the present invention. The oscillation circuit of this embodiment includes an oscillator 10 having a terminal capable of adjusting the oscillation frequency, a frequency-voltage converter 20 for converting the frequency of the oscillation signal Vout of the oscillator 10 into a voltage, and an oscillator based on the output voltage of the frequency-voltage converter 20. A high-pass filter 30 for extracting a voltage component of fluctuation of a frequency deviated from the center frequency of 10, a DC bias source 40 for outputting a DC bias voltage that determines the center frequency of the oscillator 10, and a DC bias voltage output from the DC bias source 40 The adder 50 adds the voltage component output from the high pass filter 30 as a negative feedback voltage, and the output voltage of the adder 50 is configured to be applied to a terminal capable of adjusting the oscillation frequency of the oscillator 10.

  The frequency voltage conversion circuit 20 outputs a voltage having a magnitude proportional to the frequency of the oscillation signal Vout output from the oscillator 10 to the output terminal 60. If a noise component is included in the frequency of the oscillation signal Vout, the frequency voltage conversion circuit 20 Fluctuation occurs in the output voltage of the Then, among the fluctuations, the voltage component of the fluctuation of the frequency out of the center frequency of the oscillator 10 is taken out by the high pass filter 30. As a result, frequency fluctuation components due to noise components such as 1 / f noise aliasing components near the center frequency of the oscillator 10 can be extracted by the high pass filter 30. The cutoff frequency of the high-pass filter 30 is set by the noise frequency to be removed, but for example, in the case of suppressing a noise component 1 kHz or more away from the center frequency of the oscillation signal of the oscillator 20, the cutoff frequency is 1 kHz Also set low. Thus, the voltage component of fluctuation of the frequency extracted from the high pass filter 30 is added (actually subtracted) to the bias voltage output from the DC bias source 40 as a negative feedback component in the adder 50. As described above, since the oscillation frequency of the oscillator is controlled so that the fluctuation component of the frequency near the center frequency is reduced, the fluctuation of the oscillation frequency is suppressed. Since the low frequency component of the fluctuation including the direct current component is not extracted, the central frequency of the oscillation signal of the oscillator 10 does not change.

Second Embodiment
FIG. 2 shows an oscillation circuit of the second embodiment in which the DC bias source 40 and the oscillator 10 are embodied. Here, the DC bias source 40 is constituted by the DC voltage source 41. Further, the oscillator 10 is constituted by an oscillating unit 11 and a buffer amplifier 12. The oscillation unit 11 is configured as a Colpitts oscillation type by a CMOS inverter INV1, a crystal oscillator X1, a resistor R1, and capacitors C1 and C2. The output voltage of the adder 50 is applied to the power supply terminal of the inverter INV1 of the oscillating unit 11.

  According to the present embodiment, the oscillation frequency is adjusted by the power supply voltage of the inverter INV1 in the oscillation unit 11. Therefore, the oscillation frequency is adjusted by applying the output voltage of the adder 50 thereto. Further, since the oscillation signal Vout extracted from the output side of the buffer amplifier 12 included in the oscillator 10 is input to the frequency-voltage converter 20, 1 / f noise or the like generated in the buffer amplifier 12 as well as the oscillation unit 11 The fluctuation of the frequency can also be suppressed.

Third Embodiment
FIG. 3 shows an oscillation circuit of a third embodiment in which the DC bias source 40 and the oscillator 10 are embodied. Here, the DC bias source 40 is configured by the DC voltage source 41. Further, the oscillator 10 is configured by an oscillating unit 13 and a waveform converter 14 that converts a sine wave oscillated by the oscillating unit 13 into a rectangular wave. The oscillation unit 13 is configured as a Colpitts oscillation type by the NPN transistor Q1, the quartz oscillator X2, the resistors R2 and R3, and the capacitors C3 and C4.

  In the present embodiment, the base bias voltage of the transistor Q1 of the oscillating unit 11 is adjusted by the output voltage of the adder 50, whereby the oscillation frequency of the oscillating unit 13 is adjusted. Further, since the oscillation signal Vout extracted from the output side of the waveform converter 14 included in the oscillator 10 is input to the frequency voltage converter 20, fluctuation of the frequency due to 1 / f noise or the like generated in the waveform converter 14 Can also be suppressed.

Fourth Embodiment
FIG. 4 shows an oscillation circuit of a fourth embodiment in which the DC bias source 40, the high pass filter 30, the adder 50 and the oscillator 10 are embodied. Here, the DC bias source 40 is configured by the DC voltage source 41. Further, the high pass filter 30 is configured by the capacitor C5. Further, the adder 50 is configured by an operational amplifier OP1 and a feedback resistor R3. Furthermore, the oscillator 10 is configured by the oscillating unit 11 and the buffer amplifier 12 as in the embodiment described with reference to FIG. The oscillator 10 may include the waveform converter 14 of the embodiment described in FIG. 3 between the oscillation unit 11 and the buffer amplifier 12.

10: oscillator, 11: oscillator, 12: buffer amplifier, 13: oscillator, 14: waveform converter 20: frequency voltage converter 30: high pass filter 40, 41: DC bias source 50: adder 60: output terminal

Claims (2)

  An oscillator having a terminal capable of adjusting the oscillation frequency, a frequency-voltage converter for converting the frequency of the oscillation signal of the oscillator into a voltage, fluctuation of the frequency deviated from the center frequency of the oscillator from the output voltage of the frequency-voltage converter A high pass filter for extracting a voltage component, a DC bias source for outputting a DC bias voltage for determining the center frequency of the oscillator, and a voltage component for output from the high pass filter to the DC bias voltage output from the DC bias source And an adder for adding as a feedback voltage, wherein an output voltage of the adder is applied to the terminal capable of adjusting an oscillation frequency of the oscillator. In the oscillation circuit according to claim 1,
The oscillator is characterized by comprising: an oscillating unit that outputs the oscillating signal; an amplifier that amplifies the oscillating signal generated by the oscillating unit; and / or a waveform converter that converts a waveform of the oscillating signal into another waveform. Oscillator circuit.

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