JP2019004186A - Semiconductor device and method for manufacturing the same, imaging apparatus, and electronic camera - Google Patents

Abstract

To reduce a size of a bump.SOLUTION: A semiconductor device 1 comprises: a substrate 11; an electrode 12 formed on the substrate 11; a protective film 14 which has an opening 14a corresponding to the electrode 12 and covers a peripheral portion of the electrode 12 and the substrate 11; a first conductive film 15 provided in the opening 14a; a second conductive film 16 provided on the first conductive film 15; and a bump 17 provided on the second conductive film 16.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a semiconductor device, a manufacturing method thereof, an imaging device, and an electronic camera.

  In FIG. 10 of the following Patent Document 1, (1) a passivation film is formed on a silicon wafer on which a semiconductor element is formed so as to open an aluminum pad, and (2) UBM (Under Bump Metal) material is formed by sputtering. Manufactured by (3) forming a reverse pattern (resist) to form bumps, (4) forming bumps by gold plating, and (5) removing unnecessary portions of resist and UBM material A semiconductor device and a method for manufacturing the same have been disclosed.

JP 2001-352005 A

  However, in the conventional semiconductor device, the size of the bump cannot be reduced. The reason for this will be described later in the description of the comparative example.

  The present invention has been made in view of such circumstances, and provides a semiconductor device capable of reducing the size of a bump, a manufacturing method thereof, and an imaging device and an electronic camera using the semiconductor device. Objective.

  The following aspects are presented as means for solving the problems. A semiconductor device according to a first aspect includes a substrate, an electrode formed on the substrate, a protective film having an opening corresponding to the electrode and covering a peripheral portion of the electrode and the substrate, and the opening. A first conductive film provided; a second conductive film provided on the first conductive film; and a bump provided on the second conductive film.

  In a semiconductor device according to a second aspect, in the first aspect, at least the uppermost material constituting the first conductive film is more resistant to an etchant than the material constituting the second conductive film. It is expensive.

  The semiconductor device according to a third aspect is the semiconductor device according to the first or second aspect, wherein at least the uppermost material constituting the first conductive film is Au.

  The semiconductor device according to a fourth aspect is the Au / Ni stack according to any one of the first to third aspects, wherein the electrode is made of Al, and the first conductive film is an Au / Ni stacked layer with the Ni layer on the electrode side. The second conductive film is an Au / TiW laminated film having a TiW layer on the side of the first conductive film or an Au single layer film, and the bump is made of Au.

  In a semiconductor device according to a fifth aspect, in the first or second aspect, the electrode is made of Al or Cu, and the first conductive film is an Au / Ni laminated film having a Ni layer on the electrode side. , An Au / Pd / Ni multilayer film with the Ni layer as the electrode side, a SnAg / Ni multilayer film with the Ni layer as the electrode side, or a Cu single layer film, and the second conductive film is TiW An Au / TiW multilayer film, an Au single layer film, a Ti single layer film, a W single layer film, or a Pd single layer film with the layer on the side of the first conductive film, and the bumps are Au, Ni, Cu, It consists of either Sn or SnAg.

  The semiconductor device according to a sixth aspect is the semiconductor device according to any one of the first to fifth aspects, wherein the substrate has an imaging region.

  According to a seventh aspect of the present invention, there is provided a method for manufacturing a semiconductor device, comprising: forming an electrode on a substrate; and forming the substrate having a protective film having an opening corresponding to the electrode so as to cover a peripheral portion of the electrode and the substrate. Preparing, forming a first conductive film in the opening, forming a second conductive film so as to cover the first conductive film and the protective film, and the second Forming a bump on the conductive film at a position corresponding to the opening; and removing the second conductive film on the protective film and patterning the second conductive film. It is.

  In the method of manufacturing a semiconductor device according to an eighth aspect, in the seventh aspect, in the step of forming the first conductive film, the first conductive film is formed in the opening by electroless plating. The step of forming the bump includes the step of forming a material to be the bump on the second conductive film by electroplating using the second conductive film as an electrode. The step of patterning the conductive film includes a step of wet-etching the second conductive film.

  An imaging device according to a ninth aspect includes the semiconductor device according to any one of the first to fifth aspects, and a semiconductor device different from the semiconductor device joined to the semiconductor device via the bump, One of these semiconductor devices has an imaging region, and further includes a package that contains these semiconductor devices and has a light-transmitting member at a location corresponding to the imaging region.

  An electronic camera according to a tenth aspect includes the semiconductor device according to any one of the first to sixth aspects or the imaging device according to the ninth aspect.

  ADVANTAGE OF THE INVENTION According to this invention, the semiconductor device which can reduce the size of bump, its manufacturing method, an imaging device and electronic camera using the said semiconductor device can be provided.

1 is a schematic cross-sectional view schematically showing a semiconductor device according to a first embodiment of the present invention. It is a schematic sectional drawing which shows typically each process of the manufacturing method of the semiconductor device shown in FIG. It is a schematic sectional drawing which shows typically the semiconductor device by a comparative example. It is a schematic sectional drawing which shows typically each process of the manufacturing method of the semiconductor device shown in FIG. It is a schematic sectional drawing which shows typically the semiconductor device shown in FIG. 1, and another semiconductor device joined to this. It is a schematic sectional drawing which shows typically the semiconductor device shown in FIG. 1, and another semiconductor device joined with this. It is a schematic sectional drawing which shows typically the imaging device by the 2nd Embodiment of this invention. It is a schematic sectional drawing which shows typically the electronic camera by the 3rd Embodiment of this invention.

  Hereinafter, a semiconductor device, a manufacturing method thereof, an imaging device, and an electronic camera according to the present invention will be described with reference to the drawings.

  [First Embodiment]

  FIG. 1 is a schematic cross-sectional view schematically showing a semiconductor device 1 according to the first embodiment of the present invention. FIG. 1 particularly shows the vicinity of two bumps 17.

  The semiconductor device 1 according to the present embodiment includes a semiconductor substrate 11 as a substrate, a pad electrode 12 as an electrode, an insulating film 13, a protective film 14, a first conductive film 15, and a second conductive film 16. And bumps 17 are formed as semiconductor chips.

  As the semiconductor substrate 11, for example, a silicon substrate or the like on which predetermined elements or circuits (not shown) are formed can be used. In the present invention, another substrate may be used instead of the semiconductor substrate 11.

  In the present embodiment, a plurality of pad electrodes 12 are formed on one main surface of the semiconductor substrate 11 via an insulating film 13 such as a silicon oxide film. The pad electrode 12 is formed continuously with a wiring layer (not shown). The pad electrode 12 can be made of, for example, Al or Cu. In the present embodiment, the insulating film 13 is composed of a plurality of layers (not shown), and the number of layers in other locations is larger than the number of layers in the insulating film 13 where the pad electrodes 12 are provided. Thereby, the height of the upper surface of the insulating film 13 where the pad electrode 12 is not provided is the same as the height of the upper surface of the pad electrode 12. However, the height of the upper surface of all portions of the insulating film 13 may be the same as the height of the lower surface of the pad electrode 12. In this case, the protective film 14 is formed so as to run on the peripheral edge of the pad electrode 12 from the insulating film 13. A wiring layer or the like (not shown) is formed in the insulating film 13 as necessary.

  The protective film 14 has an opening 14 a corresponding to the pad electrode 12 and covers the peripheral edge of the pad electrode 12 and the semiconductor substrate 11. In the present embodiment, the protective film 14 covers the semiconductor substrate 11 with the insulating film 13 interposed therebetween. For example, a silicon nitride film can be used as the protective film 14. The thickness of the protective film 14 can be set to about 1 μm, for example.

  The first conductive film 15 is formed in the opening 14a. The second conductive film 16 is formed on the first conductive film 15. The first conductive film 15 may be a single layer film or a laminated film including a plurality of layers. The second conductive film 16 may also be a single layer film or a multilayer film composed of a plurality of layers. It is preferable that at least the uppermost material constituting the first conductive film 15 has higher resistance to the etchant than the material constituting the second conductive film 16, and in particular, the material constituting the second conductive film 16. It is preferable that the material is not substantially etched with an etching solution for etching, and specifically, for example, Au is preferable.

  The bumps 17 are formed on the second conductive film 16. In FIG. 1, the width of the bump 17 is indicated by L. The bump 17 can be made of, for example, Au, Ni, Cu, Sn, or SnAg.

  When the pad electrode 12 is made of Al or Cu and the bump 17 is made of Au, Ni, Cu, Sn, or SnAg, at least the uppermost material constituting the first conductive film 15 constitutes the second conductive film 16. In order to satisfy the condition that the resistance to the etching solution is higher than that of the material and to improve the adhesion between the materials, the first and second conductive films 15 and 16 are preferably configured as follows. . That is, the first conductive film 15 includes an Au / Ni laminated film with the Ni layer on the pad electrode 12 side, an Au / Pd / Ni laminated film with the Ni layer on the pad electrode 12 side, and the Ni layer on the pad electrode 12. The second conductive film 16 is an Au / TiW multilayer film, an Au single layer film having a TiW layer on the side of the first conductive film 15, A Ti single layer film, a W single layer film, or a Pd single layer film is preferable.

  In particular, when the pad electrode 12 is made of Al and the bump 17 is made of Au, the first conductive film 15 is an Au / Ni laminated film with the Ni layer on the pad electrode 12 side, and the second conductive film. 16 is preferably an Au / TiW laminated film having a TiW layer on the first conductive film 15 side or an Au single layer film.

  For example, the thickness of the pad electrode 12 is 0.5 μm to 1.5 μm, the thickness of the first conductive film 15 is 0.5 μm to 1.5 μm, the thickness of the second conductive film 16 is 0.1 μm to 0.5 μm, The thickness of the bump can be 5 μm to 15 μm.

  Next, an example of a method for manufacturing the semiconductor device 1 shown in FIG. 1 will be described with reference to FIG. FIG. 2 is a schematic cross-sectional view schematically showing each step of the manufacturing method, and corresponds to FIG.

  First, a pad electrode 12 is formed on a semiconductor substrate 11 on which predetermined elements, circuits, and the like (not shown) are formed, and a protective film 14 having an opening 14a corresponding to the pad electrode 12 is formed on the periphery of the pad electrode 12 and the semiconductor substrate. A semiconductor substrate 11 formed so as to cover 11 is prepared (FIG. 2A). The pad electrode 12 is exposed from the opening 14a. Such a semiconductor substrate 11 can be prepared by using a known semiconductor manufacturing process. At this time, the semiconductor substrate 11 is prepared as a semiconductor wafer before being singulated, for example.

  Next, the first conductive film 15 is formed in the opening 14 a of the protective film 14. The first conductive film 15 is preferably formed almost only in the opening 14a. As a method for forming the first conductive film 15 almost only in the opening 14a, for example, an electroless plating method can be used. The film thickness of the first conductive film 15 is preferably approximately the same as the film thickness of the protective film 14. For example, the film thickness of the first conductive film 15 is preferably within ± 30% of the film thickness of the protective film 14, more preferably within ± 20% of the film thickness of the protective film 14. More preferably, the thickness is within ± 10% of the film thickness of 14. This is because if the film thickness of the first conductive film 15 is too thin, the coverage of the surface of the pad electrode 12 becomes unstable, and the film thickness of the first conductive film 15 is larger than the film thickness of the protective film 14. This is because the first conductive film 15 spreads outside the opening 14a and increases in size.

  Instead of using the electroless plating method, for example, after the material to be the first conductive film 15 is formed on the entire upper surface of the semiconductor wafer in the state shown in FIG. The first conductive film 15 may be formed only in the opening 14a by leaving it only in the 14a. However, in order to further reduce the cost, it is preferable to form the first conductive film 15 using an electroless plating method rather than using CMP.

  Next, the second conductive film 16 is formed on the entire top surface of the semiconductor wafer in the state shown in FIG. 2B by sputtering or the like (FIG. 2C). That is, the second conductive film 16 is formed so as to cover the first conductive film 15 and the protective film 14 continuously over the plurality of first conductive films 15 in which the second conductive film 16 is scattered. To do.

  Subsequently, bumps 17 are formed on the second conductive film 16 at positions corresponding to the openings 14a. Specifically, in this example, after the resist 18 is applied to the entire top surface of the semiconductor wafer in the state shown in FIG. 2C, the resist 18 at the site where the bumps 17 are formed (the site corresponding to the opening 14a). Then, a material to be the bump 17 is formed on the second conductive film 16 by electroplating using the second conductive film 16 as an electrode to form the bump 17 (FIG. 2D).

  Thereafter, the resist 18 is removed, and the second conductive film 16 exposed thereby is selectively removed by wet etching using an etching solution, and the second conductive film 16 is patterned. Finally, the semiconductor device 1 shown in FIG. 1 is completed by dividing the semiconductor wafer in this state into pieces by dicing.

  FIG. 3 is a schematic cross-sectional view schematically showing a semiconductor device 101 according to a comparative example compared with the semiconductor device 1 according to the present embodiment, and corresponds to FIG. The semiconductor device 101 according to this comparative example is the same as the conventional semiconductor device. 3, elements that are the same as or correspond to those in FIG. 1 are given the same reference numerals, and redundant descriptions thereof are omitted.

  The semiconductor device 101 according to this comparative example is different from the semiconductor device 1 according to the present embodiment in that a conductive film 116 is provided between the pad electrode 12 and the bump 17 instead of the first and second conductive films 15 and 16. The conductive film 116 is formed so as to run over the opening 14 a of the protective film 14 from the inside of the opening 14 a of the protective film 14, and the bump 17 is formed on the conductive film 116. It is. In FIG. 3, L1 indicates the width of the opening 14a of the protective film 14, and L2 indicates the width of the portion (climbing portion) where the conductive film 116 rides on the protective film 14. The width L of the bump 17 is L1 + 2 × L2.

  The conductive film 116 is composed of a Ti single layer film, a W single layer film, or a laminated film such as Au / TiW, and is generally referred to as UBM (Under Bump Metal). The thickness of the conductive film 116 is much thinner than the thickness of the protective film 14.

  Next, a method for manufacturing the semiconductor device 101 according to the comparative example shown in FIG. 3 will be described with reference to FIG. FIG. 4 is a schematic cross-sectional view schematically showing each step of the manufacturing method, and corresponds to FIG.

  First, a pad electrode 12 is formed on a semiconductor substrate 11 on which predetermined elements, circuits, and the like are formed, and a protective film 14 having an opening 14 a corresponding to the pad electrode 12 forms a peripheral portion of the pad electrode 12 and the semiconductor substrate 11. A semiconductor substrate 11 formed so as to be covered is prepared (FIG. 4A). The pad electrode 12 is exposed from the opening 14a. At this time, the semiconductor substrate 11 is prepared as a semiconductor wafer before being singulated.

  Next, the conductive film 116 is formed on the entire top surface of the semiconductor wafer in the state shown in FIG. 4A by sputtering or the like (FIG. 4B).

  Subsequently, after applying the resist 118 to the entire top surface of the semiconductor wafer in the state shown in FIG. 4B, the resist 118 at a portion where the bump 17 is formed (here, a portion corresponding to the width L in FIG. 3). Then, the bump 17 is formed by forming a material to be the bump 17 on the conductive film 116 by electroplating using the conductive film 116 as an electrode (FIG. 4C).

  Thereafter, the resist 118 is removed, and the conductive film 116 exposed thereby is selectively removed by wet etching using an etchant, and the conductive film 116 is patterned. Finally, the semiconductor wafer 101 in this state is separated into pieces by dicing, whereby the semiconductor device 101 according to the comparative example shown in FIG. 3 is completed.

  In the semiconductor device 101 according to this comparative example, the size (width L) of the bumps 17 cannot be reduced. In this comparative example, the bump 17 has a width L in addition to the width L1 of the connection region with the pad electrode 12 (the opening 14a of the protective film 14), and the bump 17 and the protective film 14 around it. The width L2 of the overlap region (corresponding to the portion of the conductive film 116 that rides on the protective film 14) is required, L = L1 + 2 × L2, and the width L2 cannot be sufficiently reduced. is there. The reason why the width L2 cannot be made sufficiently small is that a part of the pad electrode 12 is exposed when the conductive film 116 is etched after removing the resist 118 from the semiconductor wafer in the state shown in FIG. This is to prevent connection failure due to the disappearance of the exposed portion by etching. Therefore, the width L2 needs to be determined including the misalignment during patterning of the resist 118 and the size reduction during etching of the conductive film 116 (due to overetching), and thus the width L2 cannot be reduced so much. It is. Usually, the widths of the width L1 and the width L2 each need about 4 μm to 5 μm, and therefore the width L of the bump 17 is about 12 μm to 15 μm.

  In contrast, in the present embodiment, the portion of the pad electrode 12 exposed in the opening 14 a of the protective film 14 is covered with the first conductive film 15. For this reason, when etching the 2nd electrically conductive film 16, the problem which the pad electrode 12 is etched and lose | disappears becomes difficult to arise. When at least the uppermost material constituting the first conductive film 15 has higher resistance to the etchant than the material constituting the second conductive film 16, a pad is formed when the second conductive film 16 is etched. The problem that the electrode 12 is etched and disappears is further less likely to occur. In particular, when at least the uppermost material constituting the first conductive film 15 is a material (for example, Au) that is not substantially etched with an etchant that etches the material constituting the second conductive film 16, When the second conductive film 16 is etched, the problem that the pad electrode 12 is etched and disappears does not occur.

  Therefore, according to the present embodiment, even when the overlap region between the bump 17 and the protective film 14 is required as in the semiconductor device 101 according to the comparative example, the width L2 is set to the semiconductor according to the comparative example. Compared with the device 101, it can be made smaller, or the overlap region between the bump 17 and the protective film 14 required in the semiconductor device 101 according to the comparative example is not necessary, and L2 = 0 can be achieved. . For this reason, according to the present embodiment, the size (width L) of the bumps 17 can be reduced as compared with the comparative example. In particular, when the overlap region between the bump 17 and the protective film 14 is not required and L2 = 0 can be achieved, the size (width L) of the bump 17 is set to the size of the resist 18 in FIG. It can be determined only by accuracy. In this case, specifically, for example, the size (width L) of the bump 17 can be reduced to about 4 μm to 5 μm, which is significantly smaller than the lower limit of about 12 μm to 15 μm in the comparative example. be able to.

  1 and 2, the width L of the bump 17 and the width of the opening 14a of the protective film 14 are the same, and the center position in the width direction of the bump 17 and the width direction of the opening 14a of the protective film 14 are the same. An example is shown in which the center position of each coincides. However, the present invention is not limited to this, and may vary depending on, for example, the processing accuracy of the resist 18. Specifically, for example, the width L of the bump 17 and the width of the opening 14a of the protective film 14 may be the same, and the center positions may be shifted. Further, for example, the width L of the bump 17 and the width of the opening 14a of the protective film 14 may be different. In this case, the center positions may or may not match.

  Thus, according to the present embodiment, the size (width L) of the bumps 17 can be reduced. Therefore, according to the present embodiment, the arrangement density of the bumps 17 can be increased, and as a result, the density and size of the semiconductor device 101 can be increased.

  FIG. 5 is a schematic cross-sectional view schematically showing the semiconductor device 1 shown in FIG. 1 and another semiconductor device 21 joined thereto. In the example illustrated in FIG. 5, the semiconductor device 21 corresponds to the semiconductor substrate 11, the pad electrode 12, the insulating film 13, the protective film 14, the opening 14 a, and the first conductive film 15 of the semiconductor device 1. , A pad electrode 32, an insulating film 33, a protective film 34, an opening 34a and a conductive film 35, and is configured as a semiconductor chip. Here, a duplicate description thereof is omitted. For example, the material of the conductive film 35 may be the same as or different from the material of the first conductive film 15.

  The bumps 17 of the semiconductor device 1 and the conductive film 35 of the semiconductor device 21 are bonded to each other, whereby the semiconductor device 1 and the semiconductor device 21 are bonded via the bumps 17. The elements and circuits mounted on the semiconductor device 1 may be different from the elements and circuits mounted on the semiconductor device 1 or may be the same depending on circumstances. 1 is not necessarily limited to a semiconductor device having a semiconductor substrate, but may be a substrate device such as a printed wiring board.

  FIG. 6 is a schematic cross-sectional view schematically showing the semiconductor device 1 shown in FIG. 1 and still another semiconductor device 41 joined thereto. In the example illustrated in FIG. 6, the semiconductor device 41 includes the semiconductor substrate 11, the pad electrode 12, the insulating film 13, the protective film 14, the opening 14 a, the first conductive film 15, the second conductive film 16, and the semiconductor device 1. A semiconductor substrate 51, a pad electrode 52, an insulating film 53, a protective film 54, an opening 54 a, a first conductive film 55, a second conductive film 56, and a bump 57, each corresponding to the bump 17, are provided. It is configured as a chip. Here, a duplicate description thereof is omitted. The bumps 17 of the semiconductor device 1 and the bumps 57 of the semiconductor device 41 are joined, and thereby the semiconductor device 1 and the semiconductor device 41 are joined via the bumps 17.

  In the example shown in FIG. 5, the bumps 17 are provided only on one of the semiconductor devices 1 to be joined, whereas in the example shown in FIG. 6, the bumps 17 and 57 are provided on both of the semiconductor devices 1 and 41 to be joined. Is provided. Therefore, in the example shown in FIG. 6, the distance between two semiconductor devices to be joined can be increased compared to the example shown in FIG. In the example shown in FIG. 5, the distance between the semiconductor devices 1 and 21 may be insufficient as a result of the height of the bump 17 being reduced as the size of the bump 17 is reduced. In such a case, the example shown in FIG. 6 is suitable.

  [Second Embodiment]

  FIG. 7 is a schematic cross-sectional view schematically showing an imaging device 61 according to the second embodiment of the present invention.

  The imaging device 61 according to the present embodiment includes a semiconductor device 71 configured as a semiconductor chip and having an imaging region (light receiving region) 71a, two semiconductor devices 72 each configured as a semiconductor chip, and two flexible printed boards 73. A part of the flexible printed circuit board 73, a semiconductor device 71, and a package 81 in which two semiconductor devices 72 are accommodated in an internal airtight space are provided.

  The semiconductor device 71 is an image sensor such as a CMOS or CCD configured as a chip, and a plurality of pixels (not shown) are two-dimensionally arranged in the imaging region 71a. The semiconductor device 71 photoelectrically converts incident light that has entered the imaging region 71a via a translucent member 84, which will be described later, and outputs an image signal. In the present embodiment, the semiconductor device 71 is also equipped with a readout circuit (not shown) that drives the pixels and reads out an image signal.

  An image signal obtained by the semiconductor device 71 is taken out via two semiconductor devices 72 and two flexible printed boards 73. The semiconductor device 71 and the two semiconductor devices 72 are connected by bumps 74, and each semiconductor device 72 and each flexible printed circuit board 73 are connected by bumps 75.

  In the present embodiment, one semiconductor device 72 is mounted with a processing circuit that performs processing such as AD conversion on a part of the image signal output from the semiconductor device 71, and the other semiconductor device 72 includes A processing circuit that performs processing such as AD conversion on the remaining image signals output from the semiconductor device 71 is mounted. An output signal output from each semiconductor device 72 is output to the outside via each flexible printed circuit board 73.

  In the present embodiment, the package 81 includes a rear member 82 having a surface opposite to the imaging region 71a of the semiconductor device 71 fixed by an adhesive or the like, and an opening for introducing incident light into the imaging region 71a. A front member 83 having 83a, and a translucent member 84 such as a glass plate provided so as to close the opening 83a. The flexible printed board 73 passes between the rear member 82 and the front member 83 and is led out from the inside of the package. The space between the rear member 82 and the front member 83, between the rear member 82 and the flexible printed circuit board 73, and between the front member 83 and the flexible printed circuit board 73 are adhered by an adhesive or the like, so that the internal space of the package Is kept airtight. In addition, the material of the rear side member 82 and the front side member 83 is not specifically limited, For example, a ceramic, a metal, etc. may be sufficient. When metals are used as those materials (particularly, the material of the rear member 82), heat dissipation is enhanced.

  The package 81 is removed, and a translucent member such as a glass plate is disposed so as to cover the imaging region 71a and be spaced from the imaging region 71a, and the periphery of the translucent member is disposed through a spacer or the like. The device 71 may be airtightly fixed with an adhesive or the like around the imaging region 71a. In this case, a packageless imaging device is realized.

  In the present embodiment, the semiconductor device 71 is configured in the same manner as the semiconductor device 1 in FIG. 5, each semiconductor device 72 is configured in the same manner as the semiconductor device 21 in FIG. 5, and the bumps 74 in FIG. This corresponds to the bump 17 of the semiconductor device 1 in FIG. Conversely, the semiconductor device 71 may be configured in the same manner as the semiconductor device 21 in FIG. 5, and each semiconductor device 72 may be configured in the same manner as the semiconductor device 1 in FIG. Further, the semiconductor device 71 may be configured in the same manner as the semiconductor device 1 in FIG. 6, and each semiconductor device 72 may be configured in the same manner as the semiconductor device 41 in FIG. In this case, the bump 74 in FIG. 7 corresponds to a combination of the bump 17 of the semiconductor device 1 and the bump 57 of the semiconductor device 41 in FIG.

  According to the present embodiment, the size (width) of the bump 74 can be reduced as in the first embodiment. The pixel size tends to be reduced more and more, and the interval between signal lines for outputting signals from pixels in parallel is also required to be reduced. In the imaging device 61 according to the present embodiment, since a large number of small bumps 74 can be arranged and connected in parallel, a high-speed imaging device can be provided even when the pixel size is reduced.

  [Third Embodiment]

  FIG. 4 is a schematic cross-sectional view schematically showing an electronic camera 200 according to the third embodiment of the present invention.

  The imaging device 61 according to the second embodiment is incorporated in the body 201 of the electronic camera 200 according to the present embodiment. The electronic camera 200 according to the present embodiment is configured as a single-lens reflex type electronic still camera. However, the imaging device 61 according to the second embodiment can be applied to other electronic still cameras, video cameras, and mobile phones. You may incorporate in various electronic cameras, such as a mounted camera.

  In electronic camera 200 according to this embodiment, body 201 is provided with interchangeable photographic lens 202. The subject light that has passed through the photographing lens 202 is reflected upward by the quick return mirror 203 and forms an image on the screen 204. The subject image formed on the screen 204 is observed from the finder observation window 207 through the eyepiece lens 206 through the penta roof prism 205. When the release button (not shown) is fully pressed, the quick return mirror 203 jumps upward, and the subject image from the photographing lens 202 enters the imaging device 61 described above.

  The imaging device 61 is positioned and fixed in the body 201 by being attached to the body 201 via a bracket (not shown), a position adjustment mechanism (not shown), and the like.

  According to the present embodiment, since the imaging device 61 according to the second embodiment is used, high-speed imaging can be realized.

  Although the embodiments of the present invention have been described above, the present invention is not limited to these embodiments. For example, the semiconductor device according to the present invention can be used not only for an imaging apparatus but also for various other purposes.

DESCRIPTION OF SYMBOLS 1 Semiconductor device 11 Semiconductor substrate 12 Pad electrode 14 Protective film 14a Opening part 15 1st conductive film 16 2nd conductive film 17 Bump

Claims (10)

A substrate,
An electrode formed on the substrate;
A protective film having an opening corresponding to the electrode and covering the peripheral edge of the electrode and the substrate;
A first conductive film provided in the opening;
A second conductive film provided on the first conductive film;
Bumps provided on the second conductive film;
A semiconductor device comprising:   2. The semiconductor device according to claim 1, wherein at least the uppermost material constituting the first conductive film has higher resistance to an etching solution than the material constituting the second conductive film.   The semiconductor device according to claim 1, wherein at least an uppermost material constituting the first conductive film is Au. The electrode is made of Al,
The first conductive film is an Au / Ni laminated film with a Ni layer on the electrode side,
The second conductive film is an Au / TiW laminated film having a TiW layer on the side of the first conductive film, or an Au single layer film,
The semiconductor device according to claim 1, wherein the bump is made of Au. The electrode is made of Al or Cu,
The first conductive film includes an Au / Ni laminated film with an Ni layer on the electrode side, an Au / Pd / Ni laminated film with an Ni layer on the electrode side, and a SnAg with an Ni layer on the electrode side. / Ni laminated film or Cu single layer film,
The second conductive film is an Au / TiW multilayer film, an Au single layer film, a Ti single layer film, a W single layer film, or a Pd single layer film with a TiW layer on the side of the first conductive film,
The semiconductor device according to claim 1, wherein the bump is made of any one of Au, Ni, Cu, Sn, and SnAg.   The semiconductor device according to claim 1, wherein the substrate has an imaging region. Preparing the substrate on which an electrode is formed on a substrate and a protective film having an opening corresponding to the electrode is formed so as to cover a peripheral portion of the electrode and the substrate;
Forming a first conductive film in the opening;
Forming a second conductive film so as to cover the first conductive film and the protective film;
Forming a bump on the second conductive film at a position corresponding to the opening;
Removing the second conductive film on the protective film and patterning the second conductive film;
A method for manufacturing a semiconductor device comprising: Forming the first conductive film includes forming the first conductive film in the opening by an electroless plating method;
The step of forming the bump includes a step of forming a material to be the bump on the second conductive film by electroplating using the second conductive film as an electrode,
Patterning the second conductive film includes wet-etching the second conductive film;
A method for manufacturing a semiconductor device according to claim 7. A semiconductor device according to any one of claims 1 to 5;
A semiconductor device different from the semiconductor device bonded to the semiconductor device via the bump;
With
One of these semiconductor devices has an imaging region,
An imaging apparatus further comprising a package that accommodates these semiconductor devices and has a light-transmitting member at a location corresponding to the imaging area.   An electronic camera comprising the semiconductor device according to claim 1 or the imaging device according to claim 9.

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